Commit graph

3143 commits

Author SHA1 Message Date
Paul Brook
26b6f1917c 2010-03-05 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
2010-03-05 10:41:04 +00:00
Andrew Stubbs
772657e995 2010-03-02 Andrew Stubbs <ams@codesourcery.com>
* config/tc-sh.c (get_specific): Move overflow checking code to avoid
	reading uninitialized data.
2010-03-02 09:32:21 +00:00
Tristan Gingold
bd56defd73 2010-03-01 Tristan Gingold <gingold@adacore.com>
* config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
2010-03-01 16:47:52 +00:00
Jie Zhang
f8a8e9d60e * config/tc-arm.c (do_t_strexd): Remove
operand[1] != operand[2] contraint.

	testsuite/
	* gas/arm/thumb32.s, gas/arm/thumb32.d: Add a new test
	for strexd.
	* gas/arm/thumb32.l: Adjust.
2010-02-26 15:57:59 +00:00
Jie Zhang
3fde54a228 * config/tc-arm.c (neon_select_shape): No need to match
the remaining operands in the shape when one operand does
	not match.
2010-02-26 15:52:41 +00:00
Jie Zhang
e23c0ad820 2010-02-26 Jie Zhang <jie@codesourcery.com>
* config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
	alignment.

	testsuite/
	* gas/arm/neon-ldst-align-bad.d: New test.
	* gas/arm/neon-ldst-align-bad.l: New test.
	* gas/arm/neon-ldst-align-bad.s: New test.
2010-02-26 15:49:07 +00:00
H.J. Lu
a6c560506b Update x86 assembler error messages.
2010-02-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Update error messages.
2010-02-25 21:47:27 +00:00
H.J. Lu
891edac42b Improve x86 assembler error message.
2010-02-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (_i386_insn): Add err_msg.
	(operand_size_match): Set err_msg on failure.
	(operand_type_match): Likewise.
	(operand_type_register_match): Likewise.
	(VEX_check_operands): Likewise.
	(match_template): Likewise.  Use i.err_msg with as_bad.
2010-02-25 17:59:52 +00:00
Nick Clifton
c67a084a24 * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,
mips_fix_loongson2f_jump): New variables.
        (md_longopts): Add New options -mfix-loongson2f-nop/jump,
        -mno-fix-loongson2f-nop/jump.
        (md_parse_option): Initialize variables via above options.
        (options): New enums for the above options.
        (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
        (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
        New functions.
        (append_insn): call fix_loongson2f().
        (mips_handle_align): Replace the implicit nops.
        * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
        for the new mips_handle_align().
        * doc/c-mips.texi: Document the new options.

        * gas/mips/loongson-2f-2.s: New test of -mfix-loongson2f-nop.
        * gas/mips/loongson-2f-2.d: Likewise.
        * gas/mips/loongson-2f-3.s: New test of -mfix-loongson2f-jump.
        * gas/mips/loongson-2f-3.d: Likewise.
        * gas/mips/mips.exp: Run the new tests.

        * opcode/mips.h (LOONGSON2F_NOP_INSN): New macro.
2010-02-25 11:15:48 +00:00
Daniel Gutson
56adecf405 gas/
* config/tc-arm.c (do_rd_rm_rn): Added warning.

    gas/testsuite/
    * gas/arm/depr-swp.d: New test case.
    * gas/arm/depr-swp.s: New file.
    * gas/arm/depr-swp.l: New file.
2010-02-23 18:04:14 +00:00
Nick Clifton
17e5723725 PR 11297: Add support for 8-bit relocations to the AVR toolchain. 2010-02-23 11:38:36 +00:00
Matthew Gretton-Dann
8a59fff3dd PR 9861
* gas/config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
	compiler's predefines.
2010-02-22 10:24:56 +00:00
Matthew Gretton-Dann
cd21e5460f * bfd/elf32-arm.c (elf32_arm_merge_eabi_attributes): Add support for
merging Tag_DIV_use, Tag_MPextension_use, and
	Tag_MPextension_use_legacy tags.
	* binutils/readelf.c (arm_attr_tag_Advanced_SIMD_arch): Add
	description of newly permitted attribute values.
	(arm_attr_tag_Virtualization_use): Likewise.
	(arm_attr_tag_DIV_use): Add description of new attribute.
	(arm_attr_tag_MPextension_use_legacy): Likewise.
	* gas/config/tc-arm.c (arm_convert_symbolic_attribute):
	Add Tag_DIV_use.
	* gas/doc/c-arm.texi: Likewise.
	* gas/testsuite/gas/arm/attr-order.d: Fix test for new names for
	attribute values.
	* include/elf/arm.h (Tag_MPextension_use): Renumber.
	(Tag_DIV_use): Add.
	(Tag_MPextension_use_legacy): Likewise.
	* ld/testsuite/ld-arm/attr-merge-3.attr: Fix test for new attribute
	values.
	* ld/testsuite/ld-arm/attr-merge-3b.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-unknown-1.d: Fix test now that 42
	is a recognised attribute ID.
	* ld/testsuite/ld-arm/attr-merge-unknown-1.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-6.attr: New test.
	* ld/testsuite/ld-arm/attr-merge-6a.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-6b.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
	* ld/testsuite/ld-arm/attr-merge-7a.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-7b.s: Likewise.
	* ld/testsuite/ld-arm/arm-elf.exp: Run the new tests.
2010-02-18 10:56:28 +00:00
Daniel Gutson
5be8be5d5d gas/
* config/tc-arm.c (asm_opcode): operands type
	change.
	(BAD_PC_ADDRESSING): New macro message.
	(BAD_PC_WRITEBACK): Likewise.
	(MIX_ARM_THUMB_OPERANDS): New macro.
	(operand_parse_code): Added enum values.
	(parse_operands): Added thumb/arm distinction,
	plus new enum values handling.
	(encode_arm_addr_mode_2): Validations enhanced.
	(encode_arm_addr_mode_3): Likewise.
	(do_rm_rd_rn): Likewise.
	(encode_thumb32_addr_mode): Likewise.
	(do_t_ldrex): Likewise.
	(do_t_ldst): Likewise.
	(do_t_strex): Likewise.
	(md_assemble): Call parse_operands with
	a new parameter.
	(OPS_1): New macro.
	(OPS_2): Likewise.
	(OPS_3): Likewise.
	(OPS_4): Likewise.
	(OPS_5): Likewise.
	(OPS_6): Likewise.
	(insns): Updated insns operands.

	gas/testsuite/
	* gas/arm/sp-pc-validations-bad.d: New testcase.
	* gas/arm/sp-pc-validations-bad.l: New file.
	* gas/arm/sp-pc-validations-bad.s: New file.
	* gas/arm/sp-pc-validations-bad-t.d: New testcase.
	* gas/arm/sp-pc-validations-bad-t.l: New file.
	* gas/arm/sp-pc-validations-bad-t.s: New file.
	* gas/arm/sp-pc-usage-t.d: Removed invalid insns.
	* gas/arm/sp-pc-usage-t.s: Likewise.
	* gas/arm/unpredictable.d: Likewise.
	* gas/arm/unpredictable.s: Likewise.
	* gas/arm/thumb2_bcond.d: Added test.
	* gas/arm/thumb2_bcond.s: Likewise.
2010-02-12 20:15:13 +00:00
Tristan Gingold
9d0e849713 gas/
2010-02-12  Tristan Gingold  <gingold@adacore.com>
	    Douglas B Rupp  <rupp@gnat.com>

	* config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
	(DUMMY_RELOC_IA64_SLOTCOUNT): Added.
	(pseudo_func): Add an entry for slotcount.
	(md_begin): Initialize slotcount pseudo symbol.
	(ia64_parse_name): Handle @slotcount parameter.
	(ia64_gen_real_reloc_type): Handle slotcount.
	(md_apply_fix): Ditto.
	* doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.

gas/testsuite/
2010-02-12  Tristan Gingold  <gingold@adacore.com>

	* gas/ia64/slotcount.s, gas/ia64/slotcount.s: New test.
	* gas/ia64/ia64.exp: Add slotcount test (vms only).
2010-02-12 14:34:45 +00:00
Sterling Augustine
6fa78d941b 2010-02-11 Sterling Augustine <sterling@jaw.hq.tensilica.com>
* config/tc-xtensa.c (istack_init): Don't call memset.
2010-02-11 19:08:09 +00:00
Sterling Augustine
a89c407e4b 2010-02-11 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (cache_literal_section): Handle prefixes as
	well as suffixes.
2010-02-11 19:00:21 +00:00
H.J. Lu
24981e7b95 Reformat build_modrm_byte.
2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Reformat.
2010-02-11 14:02:50 +00:00
H.J. Lu
c75ef631bd Update copyright.
gas/

2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c: Update copyright.

opcodes/

2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c: Update copyright.
	* i386-gen.c: Likewise.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.
2010-02-11 13:41:19 +00:00
Sebastian Pop
a683cc34e4 2010-02-10 Quentin Neill <quentin.neill@amd.com>
Sebastian Pop  <sebastian.pop@amd.com>

gas:
        * config/tc-i386.c (vec_imm4) New operand type.
        (fits_in_imm4): New.
        (VEX_check_operands): New.
        (check_reverse): Call VEX_check_operands.
        (build_modrm_byte): Reintroduce code for 5
        operand insns.  Fix whitespace.

gas/testsuite:
        * gas/i386/x86-64-xop.d: Add vpermil2p[sd] tests.
        * gas/i386/x86-64-xop.s: Likewise.
        * gas/i386/xop.d: Likewise.
        * gas/i386/xop.s: Likewise.

opcodes:
        * i386-dis.c (OP_EX_VexImmW): Reintroduced
        function to handle 5th imm8 operand.
        (PREFIX_VEX_3A48): Added.
        (PREFIX_VEX_3A49): Added.
        (VEX_W_3A48_P_2): Added.
        (VEX_W_3A49_P_2): Added.
        (prefix table): Added entries for PREFIX_VEX_3A48
        and PREFIX_VEX_3A49.
        (vex table): Added entries for VEX_W_3A48_P_2 and
        and VEX_W_3A49_P_2.
        * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
        for Vec_Imm4 operands.
        * i386-opc.h (enum): Added Vec_Imm4.
        (i386_operand_type): Added vec_imm4.
        * i386-opc.tbl: Add entries for vpermilp[ds].
        * i386-init.h: Regenerated.
        * i386-tbl.h: Regenerated.
2010-02-11 05:06:14 +00:00
Sterling Augustine
3c83b96e24 2010-02-10 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
2010-02-10 20:18:14 +00:00
Richard Sandiford
cdc51b0748 gas/
* config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
	-mpwr6 and -mpwr7.

opcodes/
	* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
	and "pwr7".  Move "a2" into alphabetical order.
2010-02-10 19:59:07 +00:00
Sterling Augustine
3a1e9c4a2d 2010-02-09 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
	(next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
	(xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
2010-02-09 19:36:50 +00:00
Christophe Lyon
486499d044 2010-02-08 Christophe Lyon <christophe.lyon@st.com>
gas/
	* config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
	non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
	BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
	BFD_RELOC_ARM_PCREL_CALL)

	gas/testsuite/
	* gas/arm/branch-reloc.s, gas/arm/branch-reloc.d,
	gas/arm/branch-reloc.l: New tests and expected results with all
	variants of call: ARM/Thumb, local/global, inter/intra-section,
	using BL/BLX.
2010-02-09 14:44:50 +00:00
Sterling Augustine
19ef5f3d6d 2010-02-08 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (frag_format_size): Generalize logic to
	handle more instruction	sizes and fetch widths.
	(branch_align_power): Likewise.
	(text_align_power): Likewise.
	(bytes_to_stretch): Likewise.
2010-02-08 18:45:05 +00:00
Alan Modra
ce3d2015b2 include/
* opcode/ppc.h (PPC_OPCODE_TITAN): Define.
bfd/
	* archures.c (bfd_mach_ppc_titan): Define.
	* bfd-in2.h: Regenerate.
	* cpu-powerpc.c (bfd_powerpc_archs): Add titan entry.
opcodes/
	* ppc-dis.c (ppc_opts): Add titan entry.
	* ppc-opc.c (TITAN, MULHW): Define.
	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
gas/
	* config/tc-ppc.c (md_show_usage): Mention -mtitan.  Don't use tabs.
	(ppc_mach): Handle titan.
	* doc/c-ppc.texi: Mention -mtitan.
gas/testsuite/
	* gas/ppc/titan.d, * gas/ppc/titan.s: New test.
	* gas/ppc/ppc.exp: Run it.
2010-02-08 01:59:38 +00:00
Sterling Augustine
1beeb6866d 10-02-05 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
	replace with...
	(xtensa_fetch_width) ...this.
2010-02-05 18:52:27 +00:00
Sebastian Pop
68339fdf88 2010-02-03 Quentin Neill <quentin.neill@amd.com>
gas/
	* config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
	(i386_align_code): Rename  PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
	* config/tc-i386.h (processor_type): Same.
	* doc/c-i386.texi: Change amdfam15 to bdver1.

opcodes/
	* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
	to CPU_BDVER1_FLAGS
	* i386-init.h: Regenerated.

testsuite/
	* gas/i386/i386.exp: Rename amdfam15 test cases to bdver1.
	* gas/i386/x86-64-nops-1-amdfam15.d: Renamed test case to
	gas/i386/x86-64-nops-1-bdver1.d.
	* gas/i386/nops-1-amdfam15.d: Renamed test case to
	gas/i386/nops-1-bdver1.d.
2010-02-03 20:36:14 +00:00
Nick Clifton
99b253c514 PR 11136
* config/tc-arm.c (neon_check_type): Handle a neon_shape value of
        NS_NULL.
        * gas/arm/neon-omit.s: Add instruction that causes crash.
        * gas/arm/neon-omit.d: Add expected disassembly.
2010-01-29 16:02:41 +00:00
Dave Korn
31907d5e90 gas/ChangeLog:
* NEWS: Mention new feature.
	* config/obj-coff.c (obj_coff_section): Accept digits and use
	to override default section alignment power if specified.
	* doc/as.texinfo (.section directive): Update documentation.

gas/testsuite/ChangeLog:

	* gas/pe/section-align-1.s: New test source file.
	* gas/pe/section-align-1.d: Likewise control script.
	* gas/pe/section-align-2.s: Likewise ...
	* gas/pe/section-align-2.d: ... and likewise.
	* gas/pe/pe.exp: Invoke new testcases.
2010-01-27 22:01:38 +00:00
H.J. Lu
539f890d01 Allow VL=1 on AVX scalar instructions.
gas/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (avxscalar): New.
	(OPTION_MAVXSCALAR): Likewise.
	(build_vex_prefix): Select vector_length for scalar instructions
	based on avxscalar.
	(md_longopts): Add OPTION_MAVXSCALAR.
	(md_parse_option): Handle OPTION_MAVXSCALAR.
	(md_show_usage): Add -mavxscalar=.

	* doc/c-i386.texi: Document -mavxscalar=.

gas/testsuite/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/avx-scalar-intel.d: New.
	* gas/i386/avx-scalar.d: Likewise.
	* gas/i386/avx-scalar.s: Likewise.
	* gas/i386/x86-64-avx-scalar-intel.d: Likewise.
	* gas/i386/x86-64-avx-scalar.d: Likewise.
	* gas/i386/x86-64-avx-scalar.s: Likewise.

	* gas/i386/i386.exp: Run avx-scalar, avx-scalar-intel,
	x86-64-avx-scalar and x86-64-avx-scalar-intel.

opcodes/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (XMScalar): New.
	(EXdScalar): Likewise.
	(EXqScalar): Likewise.
	(EXqScalarS): Likewise.
	(VexScalar): Likewise.
	(EXdVexScalarS): Likewise.
	(EXqVexScalarS): Likewise.
	(XMVexScalar): Likewise.
	(scalar_mode): Likewise.
	(d_scalar_mode): Likewise.
	(d_scalar_swap_mode): Likewise.
	(q_scalar_mode): Likewise.
	(q_scalar_swap_mode): Likewise.
	(vex_scalar_mode): Likewise.
	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	q_scalar_mode, q_scalar_swap_mode.
	(OP_XMM): Handle scalar_mode.
	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	and q_scalar_swap_mode.
	(OP_VEX): Handle vex_scalar_mode.
2010-01-27 14:34:40 +00:00
H.J. Lu
80de6e001d Set the first 3byte VEX prefix individually.
2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
	0xc4 individually.
2010-01-24 15:44:05 +00:00
Richard Sandiford
c865e45b1b bfd/
* coff-rs6000.c (xcoff_howto_table): Change size to 0 and bitsize to 1.
	(_bfd_xcoff_reloc_type_lookup): Handle BFD_RELOC_NONE.
	* coff64-rs6000.c (xcoff64_howto_table): Change size to 0 and
	bitsize to 1.
	(xcoff64_reloc_type_lookup): Handle BFD_RELOC_NONE.

gas/
	* write.h (fix_at_start): Declare.
	* write.c (fix_new_internal): Add at_beginning parameter.
	Use it instead of REVERSE_SORT_RELOCS.  Fix the handling of
	seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
	(fix_new, fix_new_exp): Update accordingly.
	(fix_at_start): New function.
	* config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
	(ppc_ref): New function, for OBJ_XCOFF.
	(md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
	* config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.

gas/testsuite/
	* gas/ppc/xcoff-ref-1.s, gas/ppc/xcoff-ref-1.l: New test.
	* gas/ppc/aix.exp: Run it.


ld/testsuite/
	* ld-powerpc/aix-ref-1-32.od, ld-powerpc/aix-ref-1-64.od,
	ld-powerpc/aix-ref-1.s: New tests.
	* ld-powerpc/aix52.exp: Run them.
2010-01-23 12:05:33 +00:00
Rainer Orth
53e5c8fee6 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
on 64-bit Solaris/x86.
	Include obj-format.h earlier.
2010-01-21 20:58:34 +00:00
Andreas Krebbel
55786da2bf 2010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* readelf.c (get_machine_flags): Handle EF_S390_HIGH_GPRS.

2010-01-21  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390.h (EF_S390_HIGH_GPRS): Added macro definition.

2010-01-21  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/tc-s390.c (s390_elf_final_processing): New function.
	* config/tc-s390.h (elf_tc_final_processing): New macro definition.
	(s390_elf_final_processing): Added prototype.

2010-01-21  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* elf32-s390.c (elf32_s390_merge_private_bfd_data): New function.
	(bfd_elf32_bfd_merge_private_bfd_data): New macro definition.
2010-01-21 11:40:28 +00:00
Tristan Gingold
37a1f2771f 2010-01-18 Tristan Gingold <gingold@adacore.com>
* config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
2010-01-19 09:14:54 +00:00
Sebastian Pop
a6461c0251 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
gas/
	* config/tc-i386.c (md_assemble): Before accessing the IMM field
	check that it's not an XOP insn.

gas/testsuite/
	* gas/i386/x86-64-xop.d: Add missing patterns.
	* gas/i386/x86-64-xop.s: Same.
	* gas/i386/xop.d: Same.
	* gas/i386/xop.s: Same.

opcodes/
	* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
	* i386-tbl.h: Regenerated.
2010-01-15 21:24:13 +00:00
Jie Zhang
62fb9fe1fc * config/bfin-aux.h: Remove argument names in function
declarations.
	* config/bfin-lex.l (parse_int): Fix shadowed variable name
	warning.
	* config/bfin-parse.y (value_match): Remove argument names
	in declaration.
	(notethat): Likewise.
	(yyerror): Likewise.
2010-01-14 04:52:57 +00:00
Daniel Jacobowitz
afa62d5e34 gas/
* config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.

	gas/testsuite/
	* gas/arm/thumb-nop.d, gas/arm/thumb-nop.s: New test.
	* gas/arm/relax_branch_align.d: Expect a default NOP instruction.
	* gas/arm/vfp1_t2.d, gas/arm/vfp1xD_t2.d: Specify a CPU with
	Thumb-2.

	ld/testsuite/
	* ld-arm/arm-elf.exp (armelftests): Assemble Cortex-A8 tests with
	-mcpu=cortex-a8.
2010-01-13 19:01:10 +00:00
Nick Clifton
52b010e442 * config/tc-h8300.c (h8300_elf_section): New function - issue a
warning message if a new section is created without setting any
        attributes for it.
        (md_pseudo_table): Intercept section creation pseudos.
        (md_pcrel_from): Replace abort with an error message.
        * config/obj-elf.c (obj_elf_section_name): Export this function.
        * config/obj-elf.h (obj_elf_section_name): Prototype.

        * gas/elf/section0.d: Skip this test for the h8300.
        * gas/elf/section1.d: Likewise.
        * gas/elf/section6.d: Likewise.
        * gas/elf/elf.exp: Skip section2 and section5 tests when the
        target is the h8300.

        * ld-scrips/sort.exp: Skip these tests when the target is the
        h8300.
2010-01-13 14:08:54 +00:00
Sebastian Pop
69dd98654a 2010-01-06 Quentin Neill <quentin.neill@amd.com>
gas/
       * config/tc-i386.c (cpu_arch): Add amdfam15.
         (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
       * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
       * doc/c-i386.texi: Add amdfam15.

opcodes/
       * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
       * i386-init.h: Regenerated.

testsuite/
       * gas/i386/i386.exp: Add new amdfam15 test cases.
       * gas/i386/nops-1-amdfam15.d: New.
2010-01-06 22:52:47 +00:00
Nick Clifton
e3e535bc58 * arm-dis.c (print_insn): Fixed search for next
symbol and data dumping condition, and the
    initial mapping symbol state.

    * gas/arm/dis-data.d: New test case.
    * gas/arm/dis-data.s: New file.
2010-01-06 15:02:45 +00:00
Daniel Gutson
4316f0d240 2010-01-04 Daniel Gutson <dgutson@codesourcery.com>
gas/
        * config/tc-arm.c (do_neon_logic): Accept imm value
        in the third operand too.
        (operand_parse_code): OP_RNDQ_IMVNb renamed to
        OP_RNDQ_Ibig.
        (parse_operands): OP_NILO case removed, applied renaming.
        (insns): Neon shape changed for some logic instructions.

        gas/testsuite/
        * gas/arm/neon-logic.d: New test case.
        * gas/arm/neon-logic.s: New file.
2010-01-04 23:31:04 +00:00
Daniel Gutson
b1a769ed35 2010-01-04 Daniel Gutson <dgutson@codesourcery.com>
gas/
    * config/tc-arm.c (do_neon_ldx_stx): Added
    validation for vector load/store insns.

    gas/testsuite/
    * gas/arm/neon-addressing-bad.d: New test case.
    * gas/arm/neon-addressing-bad.s: New file.
    * gas/arm/neon-addressing-bad.l: New file.
2010-01-04 22:19:03 +00:00
Alan Modra
0dc9305793 bfd/
* archures.c: Add bfd_mach_ppc_e500mc64.
	* bfd-in2.h: Regenerate.
	* cpu-powerpc.c (bfd_powerpc_archs): Add entry for
	bfd_mach_ppc_e500mc64.
gas/
	* config/tc-ppc.c (md_show_usage): Document -me500mc64.
opcodes/
	* ppc-dis.c (ppc_opts): Add entry for "e500mc64".
2010-01-04 02:32:56 +00:00
Daniel Gutson
88714cb802 2010-01-03 Daniel Gutson <dgutson@codesourcery.com>
gas/
    * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
    (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
    (NEON_ENCODE): New macro.
    (check_neon_suffixes): New macro.
    (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
    (do_vfp_nsyn_opcode): Likewise.
    (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
    (do_vfp_nsyn_cmp): Likewise.
    (do_neon_shl_imm): Likewise.
    (do_neon_qshl_imm): Likewise.
    (neon_dyadic_misc): Likewise.
    (do_neon_mac_maybe_scalar): Likewise.
    (do_neon_qdmulh): Likewise.
    (do_neon_qmovn): Likewise.
    (do_neon_qmovun): Likewise.
    (do_neon_movn): Likewise.
    (neon_mac_reg_scalar_long): Likewise.
    (do_neon_vmull): Likewise.
    (do_neon_trn): Likewise.
    (do_neon_ldx_stx): Likewise.
    (neon_dp_fixup): Changed signature and set the flag.
    (neon_three_same): Call the above with new signature.
    (neon_two_same): Likewise.
    (neon_imm_shift): Likewise.
    (neon_mul_mac): Likewise.
    (do_neon_abs_neg): Likewise.
    (neon_mixed_length): Likewise.
    (do_neon_ext): Likewise.
    (do_neon_mov): Likewise.
    (do_neon_tbl_tbx): Likewise.
    (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
    (neon_compare): Likewise.
    (do_neon_shll): Likewise.
    (do_neon_cvt): Likewise.
    (do_neon_mvn): Likewise.
    (do_neon_dup): Likewise.
    (md_assemble): Call check_neon_suffixes ().

    gas/testsuite/
    * gas/arm/neon-suffix-bad.d: New test case.
    * gas/arm/neon-suffix-bad.s: New file.
    * gas/arm/neon-suffix-bad.l: New file.
2010-01-04 00:39:28 +00:00
Ramana Radhakrishnan
4a42ebbc0e Fix Thumb2 bl range options.
2009-12-21  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
            Richard Earnshaw  <richard.earnshaw@arm.com>

        * config/tc-arm.c (encode_thumb2_b_bl_offset): New. Refactored
        from md_apply_fix.
        (md_apply_fix): Fixup range checks for Thumb2 version
        of unconditional calls. Call encode_thumb2_b_bl_offset for
        unconditional branches / function calls.
2009-12-21 12:56:41 +00:00
H.J. Lu
2426c15ff8 Replace VexNDS, VexNDD and VexLWP with VexVVVV.
gas/

2009-12-19  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_operands): Check vexvvvv instead
	of vexnds and vexndd.
	(build_modrm_byte): Check vexvvvv instead of vexnds, vexndd
	and vexlwp.

opcodes/

2009-12-19  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove VexNDS, VexNDD and
	VexLWP.  Add VexVVVV.

	* i386-opc.h (VexNDS): Removed.
	(VexNDD): Likewise.
	(VexLWP): Likewise.
	(VEXXDS): New.
	(VEXNDD): Likewise.
	(VEXLWP): Likewise.
	(VexVVVV): Likewise.
	(i386_opcode_modifier): Remove vexnds, vexndd and vexlwp.
	Add vexvvvv.

	* i386-opc.tbl: Replace VexNDS with VexVVVV=1, VexNDD with
	VexVVVV=2 and VexLWP with VexVVVV=3.
	* i386-tbl.h: Regenerated.
2009-12-19 18:36:27 +00:00
Maciej W. Rozycki
7c0fc5246b gas/
* config/tc-mips.c (s_mips_ent): Also set BSF_FUNCTION for
	".aent".

	gas/testsuite/
	* gas/mips/aent.d: New test.
	* gas/mips/aent.s: Source for the new test.
	* gas/mips/mips.exp: Run it.
2009-12-19 00:21:29 +00:00
Steve Ellcey
fd4db1a12f 2009-12-18 Steve Ellcey <sje@cup.hp.com>
* config/tc-hppa.c: Change access to access_ctr.
2009-12-18 18:11:56 +00:00
Nick Clifton
ff4a8d2b93 PR binutils/10924
* config/tc-arm.c (do_ldstv4): Do not allow r15 as the destination
        register.
        (do_mrs): Likewise.
        (do_mul): Likewise.

        * arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
        unique register numbers.  Extend support for %<>R format to
        thumb32 and coprocessor instructions.

        * gas/arm/unpredictable.s: Add more unpredictable instructions.
        * gas/arm/unpredictable.d: Add expected disassemblies.
2009-12-17 09:52:18 +00:00
H.J. Lu
2eb952a4d9 Remove ByteOkIntel.
gas/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_suffix): Set i.suffix to 0 in
	Intel syntax if size is ignored and b/l/w suffixes are
	illegal.
	(check_byte_reg): Remove byteokintel check.

opcodes/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove ByteOkIntel.

	* i386-opc.h (ByteOkIntel): Removed.
	(i386_opcode_modifier): Remove byteokintel.

	* i386-opc.tbl: Remove ByteOkIntel.
	* i386-tbl.h: Regenerated.
2009-12-16 20:08:32 +00:00
H.J. Lu
7f399153c6 Replace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A with VexOpcode.
gas/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Replace vex0f, vex0f38,
	vex0f3a, xop08, xop09 and xop0a with vexopcode.

opcodes/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
	Vex0F3A, XOP08, XOP09 and XOP0A.  Add VexOpcode.

	* i386-opc.h (Vex0F): Removed.
	(Vex0F38): Likewise.
	(Vex0F3A): Likewise.
	(VexOpcode): New.
	(VEX0F): Likewise.
	(VEX0F38): Likewise.
	(VEX0F3A): Likewise.
	(XOP08): Defined as a macro.
	(XOP09): Likewise.
	(XOP0A): Likewise.
	(i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08,
	xop09 and xop0a.  Add vexopcode.

	* i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
	VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3,
	XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5.
	* i386-tbl.h: Regenerated.
2009-12-16 15:43:16 +00:00
H.J. Lu
8c43a48b28 Replace VEX2SOURCES with XOP2SOURCES.
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Check XOP2SOURCES
	instead VEX2SOURCES.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VEX2SOURCES): Renamed to ...
	(XOP2SOURCES): This.
2009-12-16 05:18:11 +00:00
H.J. Lu
8cd7925b45 Replace Vex2Sources and Vex3Sources with VexSources.
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_operands): Check vexsources
	instead of vex3sources.
	(build_modrm_byte): Check vexsources instead of vex2sources
	and vex3sources.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove Vex3Sources and
	Vex2Sources.  Add VexSources.

	* i386-opc.h ()Vex2Sources: Removed.
	(Vex3Sources): Likewise.
	(VEX2SOURCES): New.
	(VEX3SOURCES): Likewise.
	(VexSources): Likewise.
	(i386_opcode_modifier): Remove vex2sources and vex3sources.
	Add vexsources.

	* i386-opc.tbl: Replace Vex2Sources with VexSources=1 and
	Vex3Sourceswith VexSources=2.
	* i386-tbl.h: Regenerated.
2009-12-16 04:00:35 +00:00
H.J. Lu
1ef99a7be9 Remove VexW0 and VexW1. Add VexW.
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Replace vexw0/vexw1
	with vexw.
	(build_modrm_byte): Likewise.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1.  Add
	VexW.

	* i386-opc.h (VexW0): Removed.
	(VexW1): Likewise.
	(VEXW0): New.
	(VEXW1): Likewise.
	(VexW): Likewise.
	(i386_opcode_modifier): Remove vexw0 and vexw1.  Add vexw.

	* i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
	Vex=2.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2009-12-16 02:10:45 +00:00
H.J. Lu
e3c58833bf Define VEX128 and VEX256.
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Use VEX256.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VEX128): New.
	(VEX256): Likewise.
2009-12-15 16:36:59 +00:00
Nick Clifton
34ab888845 PR gas/11089
* config/tc-rx.c (rx_equ): Rename 'expr' to 'expression' in order
        to avoid shadowing a global symbol of the same name.
2009-12-14 10:59:37 +00:00
Nick Clifton
c7d6f51805 * config/tc-microblaze.c (md_assemble): Rename 'imm' to 'immed' in
order to avoid shadowing global variable of the same name.
2009-12-14 09:50:18 +00:00
Andrew Jenner
2e98972ef6 * config/tc-arm.c (arm_init_frag): Set thumb MODE_RECORDED flag for
non-elf.
       (arm_handle_align): Re-enable assert for non-elf.
2009-12-11 17:44:24 +00:00
Nick Clifton
91d6fa6a03 Add -Wshadow to the gcc command line options used when compiling the binutils.
Fix up all warnings generated by the addition of this switch.
2009-12-11 13:42:17 +00:00
H.J. Lu
8a2c8fef19 2009-12-09 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (arch_entry): Add len and skip.
	(cpu_arch): Use STRING_COMMA_LEN.
	(MESSAGE_TEMPLATE): New.
	(show_arch): Likewise.
	(md_show_usage): Use show_arch.
2009-12-10 02:51:39 +00:00
Nick Clifton
03ee1b7f8e PR gas/11013
* arm-dis.c (thumb32_opc): Adjust disassembly of QADD, QDADD, QSUB
        and QDSUB.

        * gas/arm/arch7em.d: Update expected disassembly.
        * gas/arm/thumb32.d: Likewise.

        * config/tc-arm.c (do_t_simd2): New function.
        (insns): Use do_t_simd2 for QADD, QDADD, QSUB and QDSUB.
2009-12-02 20:26:30 +00:00
Nick Clifton
974da60de1 PR gas/11032
* config/tc-arm.c (relax_adr): Cope with a frag with no symbol.
2009-11-30 14:36:21 +00:00
Sebastian Pop
f0ae4a24b0 2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
gas/
	* config/tc-i386.c (cpu_arch): Remove cvt16.
	(md_show_usage): Same.
	* doc/c-i386.texi: Same.

	gas/testsuite/
	* gas/i386/cvt16.d: Removed.
	* gas/i386/cvt16.s: Removed.
	* gas/i386/x86-64-cvt16.d: Removed.
	* gas/i386/x86-64-cvt16.s: Removed.
	* gas/i386/i386.exp: Remove cvt16 and x86-64-cvt16 tests.

	opcodes/
	* i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
	(VEX_LEN_XOP_08_A1): Removed.
	(xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
	VEX_LEN_XOP_08_A1.
	(vex_len_table): Same.
	* i386-gen.c (CPU_CVT16_FLAGS): Removed.
	(cpu_flags): Remove field for CpuCVT16.
	* i386-opc.h (CpuCVT16): Removed.
	(i386_cpu_flags): Remove bitfield cpucvt16.
	(i386-opc.tbl): Remove CVT16 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated.
2009-11-18 20:28:59 +00:00
Paul Brook
ada65aa377 2009-11-18 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (arm_fpus): Add fpv4-sp-d16.
	(aeabi_set_public_attributes): Correctly mark VFPv3xD.

	include/opcode/
	* arm.h (FPU_VFP_V4_SP_D16, FPU_ARCH_VFP_V4_SP_D16): Define.
2009-11-18 15:48:59 +00:00
Alan Modra
2d0f389600 bfd/
* bfd-in.h (_bfd_elf_ppc_at_tls_transform): Declare.
	* bfd-in2.h: Regenerate.
	* elf64-ppc.c (ppc64_elf_relocate_section): Move code for R_PPC64_TLS
	insn optimisation to..
	* elf32-ppc.c (_bfd_elf_ppc_at_tls_transform): ..here.  New function.
	(ppc_elf_relocate_section): Use it.
gas/
	* config/tc-ppc.c (md_assemble): Report error on invalid @tls operands
	and opcode.
2009-11-18 12:42:52 +00:00
Sebastian Pop
5dd85c9970 2009-11-17 Sebastian Pop <sebastian.pop@amd.com>
Quentin Neill  <quentin.neill@amd.com>

	gas/
	* config/tc-i386.c (cpu_arch): Added .xop and .cvt16.
	(build_vex_prefix): Handle xop08.
	(md_assemble): Don't special case the constant 3 for insns using MODRM.
	(build_modrm_byte): Handle vex2sources.
	(md_show_usage): Add xop and cvt16.
	* doc/c-i386.texi: Document fma4, xop, and cvt16.

	gas/testsuite/
	* gas/i386/i386.exp: Run xop and cvt16 in 32-bit mode.
	Run x86-64-xop and x86-64-cvt16 in 64-bit mode.
	* gas/i386/lwp.d: Update name of the testcase.
	* gas/i386/x86-64-xop.d: New.
	* gas/i386/x86-64-xop.s: New.
	* gas/i386/xop.d: New.
	* gas/i386/xop.s: New.
	* gas/i386/cvt16.d: New.
	* gas/i386/cvt16.s: New.

	opcodes/
	* i386-dis.c (OP_Vex_2src_1): New.
	(OP_Vex_2src_2): New.
	(Vex_2src_1): New.
	(Vex_2src_2): New.
	(XOP_08): Added.
	(VEX_LEN_XOP_08_A0): Added.
	(VEX_LEN_XOP_08_A1): Added.
	(VEX_LEN_XOP_09_80): Added.
	(VEX_LEN_XOP_09_81): Added.
	(xop_table): Added an entry for XOP_08.  Handle xop instructions.
	(vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
	VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
	(get_valid_dis386): Handle XOP_08.
	(OP_Vex_2src): New.
	* i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
	(cpu_flags): Add CpuXOP and CpuCVT16.
	(opcode_modifiers): Add XOP08, Vex2Sources.
	* i386-opc.h (CpuXOP): Added.
	(CpuCVT16): Added.
	(i386_cpu_flags): Add cpuxop and cpucvt16.
	(XOP08): Added.
	(Vex2Sources): Added.
	(i386_opcode_modifier): Add xop08, vex2sources.
	* i386-opc.tbl: Add entries for XOP and CVT16 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated.
2009-11-18 04:04:17 +00:00
Paul Brook
9e3c6df664 2009-11-17 Paul Brook <paul@codesourcery.com>
Daniel Jacobowitz  <dan@codesourcery.com>

	gas/
	* doc/c-arm.texi: Document .arch armv7e-m.
	* config/tc-arm.c (arm_ext_v6_dsp, arm_ext_v7m): New.
	(insns): Put Thumb versions of v5TExP instructions into
	arm_ext_v5exp also.  Move some Thumb variants from
	arm_ext_v6_notm to arm_ext_v6_dsp.
	(arm_archs): Add armv7e-m architecture.
	(aeabi_set_public_attributes): Handle -march=armv7e-m.

	gas/testsuite/
	* gas/arm/attr-march-armv7em.d: New test.
	* gas/arm/arch7em-bad.d: New test.
	* gas/arm/arch7em-bad.l: New test.
	* gas/arm/arch7em.d: New test.
	* gas/arm/arch7em.s: New test.

	include/elf/
	* arm.h (TAG_CPU_ARCH_V7E_M): Define.

	include/opcode/
	* arm.h (ARM_EXT_V6_DSP): Define.
	(ARM_AEXT_V6T2, ARM_AEXT_NOTM): Include ARM_EXT_V6_DSP.
	(ARM_AEXT_V7EM, ARM_ARCH_V7EM): Define.

	binutils/
	* readelf.c (arm_attr_tag_CPU_arch): Add v7E-M.

	bfd/
	* elf32-arm.c (using_thumb_only, arch_has_arm_nop,
	arch_has_thumb2_nop): Handle TAG_CPU_ARCH_V7E_M.
	(tag_cpu_arch_combine): Ditto. Correct MAX_TAG_CPU_ARCH test.
2009-11-17 16:31:56 +00:00
Nick Clifton
f7c21dc7b8 * config/tc-arm.c (parse_operands): Encode APSR_nzcv as r15.
(do_vmrs): New function.
        (do_vmsr): New function.
        (insns): Add vmrs and vmsr.

        * gas/arm/vfp1xD.s: Add vmrs and vmsr instructions.
        * gas/arm/vfp1xD.d: Update expected disassembly.
2009-11-16 11:47:36 +00:00
H.J. Lu
c1ba026631 Check destination operand for lockable instructions.
gas/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Check destination operand
	for lockable instructions.

gas/testsuite/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/lock-1-intel.d: Updated.
	* gas/i386/lock-1.d: Likewise.
	* gas/i386/lock-1.s: Likewise.
	* gas/i386/lockbad-1.l: Likewise.
	* gas/i386/lockbad-1.s: Likewise.
	* gas/i386/x86-64-lock-1-intel.d: Likewise.
	* gas/i386/x86-64-lock-1.d: Likewise.
	* gas/i386/x86-64-lock-1.s: Likewise.
	* gas/i386/x86-64-lockbad-1.l: Likewise.
	* gas/i386/x86-64-lockbad-1.s: Likewise.
2009-11-14 06:04:34 +00:00
H.J. Lu
4473e00469 2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (_i386_insn): Don't use bit field on
	swap_operand.
2009-11-14 01:46:28 +00:00
H.J. Lu
c32fa91d70 gas/
2009-11-12  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (LOCKREP_PREFIX): Removed.
	(REP_PREFIX): New.
	(LOCK_PREFIX): Likewise.
	(PREFIX_GROUP): Likewise.
	(REX_PREFIX): Updated.
	(MAX_PREFIXES): Likewise.
	(add_prefix): Updated.  Return enum PREFIX_GROUP.
	(md_assemble): Check for lock without a lockable instruction.
	(parse_insn): Updated.
	(output_insn): Likewise.

gas/testsuite/

2009-11-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run lock-1, lock-1-intel, lockbad-1,
	x86-64-lock-1, x86-64-lock-1-intel and x86-64-lockbad-1.

	* gas/i386/lock-1-intel.d: New.
	* gas/i386/lock-1.d: Likewise.
	* gas/i386/lock-1.s: Likewise.
	* gas/i386/lockbad-1.l: Likewise.
	* gas/i386/lockbad-1.s: Likewise.
	* gas/i386/x86-64-lock-1-intel.d: Likewise.
	* gas/i386/x86-64-lock-1.d: Likewise.
	* gas/i386/x86-64-lock-1.s: Likewise.
	* gas/i386/x86-64-lockbad-1.l: Likewise.
	* gas/i386/x86-64-lockbad-1.s: Likewise.

opcodes/

2009-11-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IsLockable.

	* i386-opc.h (IsLockable): New.
	(i386_opcode_modifier): Add islockable.

	* i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
	bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
	xor, xadd and xchg.
	* i386-tbl.h: Regenerated.
2009-11-12 18:57:14 +00:00
H.J. Lu
1b9f0c97ad 2009-11-11 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Don't set register
	operand twice.
2009-11-12 02:21:46 +00:00
Maxim Kuvyrkov
0d999f3337 * config/m68k-parse.h (enum m68k_register): Add ACR[4-7], RGPIOBAR.
* config/tc-m68k.c (mcf5206_ctrl): Fix whitespace.
	(mcf52223_ctrl): Remove non-existent registers.
	(mcf54418): Define.
	(mcf54455): Remove MBAR.
	(m68k_cpus): Add lines for MCF5441x family.
	(m68k_ip, init_table): Handle RGPIOBAR, ACR[4-7].

	* m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
2009-11-10 18:05:24 +00:00
Alan Modra
23ddb8504a * config/obj-elf.c (obj_elf_change_section): Remove FIXME from
comment.
2009-11-06 11:51:04 +00:00
Sebastian Pop
f88c9eb030 2009-11-05 Sebastian Pop <sebastian.pop@amd.com>
Quentin Neill  <quentin.neill@amd.com>

	* gas/config/tc-i386.c (cpu_arch): Add CPU_LWP_FLAGS.
	(build_vex_prefix): Handle xop09 and xop0a.
	(build_modrm_byte): Handle vexlwp.
	(md_show_usage): Add lwp.
	* gas/doc/c-i386.texi (i386-LWP): New section.

	* gas/testsuite/gas/i386/i386.exp: Run x86-64-lwp in 64-bit mode,
	run lwp in 32-bit mode.
	* gas/testsuite/gas/i386/x86-64-lwp.d: New.
	* gas/testsuite/gas/i386/x86-64-lwp.s: New.
	* gas/testsuite/gas/i386/lwp.d: New.
	* gas/testsuite/gas/i386/lwp.s: New.

	* opcodes/i386-dis.c (OP_LWPCB_E): New.
	(OP_LWP_E): New.
	(OP_LWP_I): New.
	(USE_XOP_8F_TABLE): New.
	(XOP_8F_TABLE): New.
	(REG_XOP_LWPCB): New.
	(REG_XOP_LWP): New.
	(XOP_09): New.
	(XOP_0A): New.
	(reg_table): Redirect REG_8F to XOP_8F_TABLE.
	Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
	(xop_table): New.
	(get_valid_dis386): Handle USE_XOP_8F_TABLE.
	Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
	to access to the vex_table.
	(OP_LWPCB_E): New.
	(OP_LWP_E): New.
	(OP_LWP_I): New.
	* opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
	(cpu_flags): Add CpuLWP.
	(opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
	* opcodes/i386-opc.h (CpuLWP): New.
	(i386_cpu_flags): Add bit cpulwp.
	(VexLWP): New.
	(XOP09): New.
	(XOP0A): New.
	(i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
	* opcodes/i386-opc.tbl (llwpcb): Added.
	(lwpval): Added.
	(lwpins): Added.
2009-11-05 23:40:05 +00:00
DJ Delorie
0d734b5d06 [opcodes]
* rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
	(mvtcp, mvfcp, opecp): Remove.
	* rx-decode.c: Regenerate.
	* rx-dis.c (cpen): Remove.

[gas]
	* config/rx-parse.y (MVTIPL): Update bit pattern.
	(cpen): Remove.

[include/opcode]
	* rx.h (rx_decode_opcode) (mvtipl): Add.
	(mvtcp, mvfcp, opecp): Remove.
2009-11-05 00:38:45 +00:00
Maxim Kuvyrkov
2c678708e6 2009-11-04 Daniel Jacobowitz <dan@codesourcery.com>
Maxim Kuvyrkov  <maxim@codesourcery.com>

	* config/tc-m68k.h (CF_DIFF_EXPR_OK): Define to 0 for uClinux.
	(CFI_DIFF_LSDA_OK): Define.
	* config/te-uclinux.h: New file.
	* configure.tgt (m68k-uclinux): Define em.
	* dw2gencfi.c (CFI_DIFF_LSDA_OK): New macro.
	(dot_cfi_lsda, output_fde): Use instead of CFI_DIFF_EXPR_OK.
2009-11-04 09:52:00 +00:00
Paul Brook
1ee6951580 2009-11-03 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (do_vfp_nsyn_mla_mls): Fix vmls excoding.

	gas/testsuite/
	* gas/arm/vfp-neon-syntax.d: Update expected results.
	* gas/arm/vfp-neon-syntax_t2.d: Update expected results.
2009-11-03 12:37:45 +00:00
Paul Brook
62f3b8c867 2009-11-02 Paul Brook <paul@codesourcery.com>
ld/testsuite/
	* ld-arm/arm-elf.exp: Add new attr-merge-vfp tests.
	* ld-arm/attr-merge-vfp-1.d: New test.
	* ld-arm/attr-merge-vfp-1r.d: New test.
	* ld-arm/attr-merge-vfp-2.d: New test.
	* ld-arm/attr-merge-vfp-2r.d: New test.
	* ld-arm/attr-merge-vfp-3.d: New test.
	* ld-arm/attr-merge-vfp-3r.d: New test.
	* ld-arm/attr-merge-vfp-4.d: New test.
	* ld-arm/attr-merge-vfp-4r.d: New test.
	* ld-arm/attr-merge-vfp-5.d: New test.
	* ld-arm/attr-merge-vfp-5r.d: New test.
	* ld-arm/attr-merge-vfp-2.s: New test.
	* ld-arm/attr-merge-vfp-3.s: New test.
	* ld-arm/attr-merge-vfp-3-d16.s: New test.
	* ld-arm/attr-merge-vfp-4.s: New test.
	* ld-arm/attr-merge-vfp-4-d16.s: New test.

	gas/
	* doc/c-arm.texi: Document new -mfpu options.
	* config/tc-arm.c (fpu_vfp_ext_v3xd, fpu_vfp_fp16, fpu_neon_ext_fma,
	fpu_vfp_ext_fma): New.
	(NEON_ENC_TAB): Add vfma, vfms, vfnma and vfnms.
	(do_vfp_nsyn_fma_fms, do_neon_fmac): New functions.
	(insns): Move double precision load/store.  Split out double
	precision VFPv3 instrucitons.  Add VFPv4 instructions.
	(arm_fpus): Add VFPv3-FP16, VFPv3xD and VFPv4 variants.
	(aeabi_set_public_attributes): Set VFPv4 variants

	gas/testsuite/
	* gas/arm/attr-mfpu-vfpv4.d: New test.
	* gas/arm/attr-mfpu-vfpv4-d16.d: New test.
	* gas/arm/neon-fma-cov.d: New test.
	* gas/arm/neon-fma-cov.s: New test.
	* gas/arm/vfp-fma-inc.s: New test.
	* gas/arm/vfp-fma-arm.d: New test.
	* gas/arm/vfp-fma-arm.s: New test.
	* gas/arm/vfp-fma-thumb.d: New test.
	* gas/arm/vfp-fma-thumb.s: New test.
	* gas/arm/vfma1.d: New test.
	* gas/arm/vfma1.s: New test.
	* gas/arm/vfpv3xd.d: New test.
	* gas/arm/vfpv3xd.s: New test.

	include/opcode/
	* arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
	FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define.
	(FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD,
	FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16,
	FPU_ARCH_NEON_VFP_V4): Define.

	binutils/
	* readelf.c (arm_attr_tag_VFP_arch): Add VFPv4 and VFPv4-D16.

	bfd/
	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle VFPv4
	attributes.

	opcodes/
	* arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
	Add VFPv4 instructions.
2009-11-02 13:44:05 +00:00
Alan Modra
4cae74aaa2 * ecoff.c (ecoff_symbol_clone_hook): New function.
* ecoff.h (ecoff_symbol_clone_hook): Declare.
	* obj.h (struct format_ops): Add symbol_clone_hook.
	* config/obj-aout.c (aout_format_ops): Init new field.
	* config/obj-coff.c (coff_format_ops): Likewise.
	* config/obj-ecoff.c (ecoff_format_ops): Likewise.
	* config/obj-elf.c (elf_format_ops): Likewise.
	* config/obj-ecoff.h (obj_symbol_clone_hook): Define.
	* config/obj-multi.h (obj_symbol_clone_hook): Define.
2009-11-02 11:49:48 +00:00
Dave Anglin
b6cdf8aeed * config/tc-hppa.c (pa_build_unwind_subspace): Replace start symbol
with local symbol.
2009-10-30 17:05:58 +00:00
H.J. Lu
206c2556c2 gas/
2009-10-29  Sebastian Pop  <sebastian.pop@amd.com>

	* config/tc-i386.c (build_modrm_byte): Do not swap REG and
	NDS operands for FMA4.

gas/testsuite/

2009-10-29  Sebastian Pop  <sebastian.pop@amd.com>

	* gas/i386/fma4.d: Updated patterns.
	* gas/i386/x86-64-fma4.d: Same.

opcodes/

2009-10-29  Sebastian Pop  <sebastian.pop@amd.com>

	* i386-dis.c (OP_VEX_FMA): Removed.
	(VexFMA): Removed.
	(Vex128FMA): Removed.
	(prefix_table): First source operand of FMA4 insns is decoded
	with Vex not with VexFMA.
	(OP_EX_VexW): Second source operand is decoded with get_vex_imm8
	when vex.w is set.  Third source operand is decoded with
	get_vex_imm8 when vex.w is cleared.
	(OP_VEX_FMA): Removed.
2009-10-29 22:22:59 +00:00
Paul Brook
e6655fdab4 2009-10-29 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (neon_tab_entry): Fix VNMLA/VNMLS opcodes.

	gas/testsuite/
	* gas/arm/vfp-neon-syntax.d: Update expected results.
	* gas/arm/vfp-neon-syntax_t2.d: Update expected results.
2009-10-29 18:01:13 +00:00
Paul Brook
b38f9f31ea 2009-10-29 Paul Brook <paul@codesourcery.com>
gas/
	* doc/c-arm.texi: Document ARM -mcpu=cortex-a5.
	* config/arm/tc-arm.c (arm_cpu_option_table): Add cortex-a5.
2009-10-29 15:37:53 +00:00
Tristan Gingold
1b31b9e34a 2009-10-29 Tristan Gingold <gingold@adacore.com>
* config/tc-mep.c (md_pseudo_table): Remove dwarf2 pseudo
	as they are already defined in obj-elf.c
	* config/tc-m32c.c (md_pseudo_table): Ditto.
	* config/tc-spu.c (md_pseudo_table): Ditto.
	* config/tc-avr.c (md_pseudo_table): Ditto.
2009-10-29 09:43:18 +00:00
Paul Brook
721a818646 2009-10-28 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (opcode_lookup): Allow VFP/NEON type suffixes
	unconditionally.
2009-10-28 16:50:44 +00:00
Tristan Gingold
66b4202f30 2009-10-27 Tristan Gingold <gingold@adacore.com>
* config/tc-avr.c (md_pseudo_table): Add dwarf2 debug pseudo.
	* config/tc-avr.h (DWARF2_LINE_MIN_INSN_LENGTH): Define.
	(DWARF2_ADDR_SIZE): Define.
2009-10-27 15:39:27 +00:00
Arnold Metselaar
3c45a255a8 * config/tc-z80.c (z80_start_line_hook): Fix parsing of 'equ' or
'defl' in cases where the space between the keyword and the
expression has been scrubbed away.
Do not check whether a symbol is redefined with 'equ' here;
the function equals takes an argument indicating whether
redefinitions are allowed.
Only call LISTING_NEWLINE if needed, and then after the call to
bump_line_counters.
2009-10-25 16:15:19 +00:00
Doug Evans
d71f39f5cf * config/tc-lm32.c (md_begin): Add missing call to bfd_set_arch_mach. 2009-10-19 15:30:06 +00:00
Doug Evans
23f5dfcb86 * config/tc-xc16x.c (md_cgen_lookup_reloc): Ensure fix_size is set
correctly for all 16 bit relocs.  Return BFD_RELOC_NONE if reloc
	isn't recognized, not BFD_RELOC_XC16X_SOF.

	testsuite:
	* gas/xc16x/shlrol.s: Specify constant shift amount.
	* gas/xc16x/xc16x.exp (do_xc16x_shlrol): Update expected output.
2009-10-19 15:27:39 +00:00
Alan Modra
c5ed243be1 * as.h (know): Don't define as empty.
* config/tc-arm.c (make_mapping_symbol): Revert last patch.
2009-10-18 13:33:20 +00:00
Alan Modra
a75b90823c * config/tc-arm.c (make_mapping_symbol): Add braces to avoid empty body
in release builds.
2009-10-18 08:20:17 +00:00
H.J. Lu
4c2c651631 2009-10-13 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/10766
	* config/tc-i386.c (build_modrm_byte): Declare exp earlier.
2009-10-13 16:42:40 +00:00
H.J. Lu
313c53d19e gas/
2009-10-13  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10740
	* config/tc-i386-intel.c (i386_intel_operand): Handle call
	and jump with 2 immediate operands.

	* config/tc-i386.c (i386_finalize_immediate): Don't generate
	error message if operand string is NULL.

gas/testsuite/

2009-10-13  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10740
	* gas/i386/jump.s: Add new tests.
	* gas/i386/jump16.s: Likewise.

	* gas/i386/jump.d: Updated.
	* gas/i386/jump16.d: Likewise.
2009-10-13 16:23:25 +00:00
Nick Clifton
b2b7424819 gas:
2009-10-07  Vincent Riviere  <vincent.riviere@freesbee.fr>

        PR gas/3041
        * config/tc-m68k.c (tc_gen_reloc): Fix addend for relocations
        located in data section an referencing a weak symbol.

gas/testsuite:

2009-10-07  Vincent Riviere  <vincent.riviere@freesbee.fr>

        PR gas/3041
        * gas/m68k/all.exp: Added "p3041data".
        * gas/m68k/p3041.d, gas/m68k/p3041.s: Added tests of weak references
        from text section to all possible sections.
        * gas/m68k/p3041data.d, gas/m68k/p3041data.s: New test. Check weak
        references from data section.
2009-10-13 08:55:31 +00:00
Nathan Sidwell
d31060819e * config/tc-arm.c (mapping_state, mapping_state_2): Make dummy
versions slightly more than nothing.
2009-10-07 14:00:06 +00:00
Alan Modra
cd42ff9c60 PR gas/2117
* config/tc-ia64.c (parse_operand): Use expression rather than
	expression_and_evalute.
	(parse_operand_and_eval): New function.  Replace all uses of
	parse_operand outside of parse_operands with this function.
	(parse_operans_maybe_eval): New function.  Replace uses of
	parse_operand in parse_operands, except for the dummy, with
	this function.
2009-10-07 05:13:53 +00:00
Peter Bergner
9fe54b1ca1 gas/
* config/tc-ppc.c (md_show_usage): Document -m476.
	* doc/c-ppc.texi (PowerPC-Opts): Document -m476.

gas/testsuite/
	* gas/ppc/476.s: New test.
	* gas/ppc/476.d: Likewise.
	* gas/ppc/ppc.exp: Run the 476 test.

include/opcode/
	* ppc.h (PPC_OPCODE_476): Define.

opcodes/
	* ppc-dis.c (ppc_opts): Add "476" entry.
	* ppc-opc.c (PPC476): Define.
	(powerpc_opcodes): Update mnemonics where required for 476.
2009-10-02 14:42:42 +00:00
Jakub Jelinek
38462edfa2 * dw2gencfi.c: Include dwarf2dbg.h.
(DWARF2_FORMAT): Define if not defined.
	(dot_cfi_sections): New function.
	(cfi_pseudo_table): Handle .cfi_sections.
	(CFI_EMIT_eh_frame, CFI_EMIT_debug_frame): Define.
	(cfi_sections): New variable.
	(output_cie, output_fde, select_cie_for_fde): Add eh_frame
	argument, add supporting for outputting .debug_frame
	section.
	(cfi_change_reg_numbers): New function or macro.
	(cfi_finish): Only emit .eh_frame if
	cfi_sections & CFI_EMIT_eh_frame.  Emit .debug_frame if
	cfi_sections & CFI_EMIT_debug_frame.
	* config/tc-ppc.h (md_reg_eh_frame_to_debug_frame): Define.
	* doc/as.texinfo (CFI directives): Document .cfi_sections.
2009-10-02 11:33:50 +00:00
Peter Bergner
634b50f2a6 gas/
* config/tc-ppc.c (md_show_usage): Rename "ppca2" to "a2".
	* doc/c-ppc.texi (PowerPC-Opts): Likewise.

gas/testsuite/
	* gas/ppc/a2.d: Rename "ppca2" to "a2".

include/opcode/
	* ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2.

opcodes/
	* ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
	* ppc-dis.c (ppc_opts): Likewise.
	Rename "ppca2" to "a2".
2009-10-01 19:24:48 +00:00
H.J. Lu
9f32dd5b5a 2009-10-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (x86_cons): Reformat.
2009-10-01 14:31:43 +00:00
Nick Clifton
c7927a3c0e bfd
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo.
        (ALL_MACHINES_CFILES): Add cpu-rx.c.
        (BFD32_BACKENDS): Add elf32-rx.lo.
        (BFD32_BACKENDS_CFILES): Add elf32-rx.c.
        * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx.
        Export bfd_rx_arch.
        (bfd_archures_list): Add bfd_rx_arch.
        * config.bfd: Add entry for rx-*-elf.
        * configure.in: Add entries for bfd_elf32_rx_le_vec and
        bfd_elf32_rx_be_vec.
        * reloc.c: Add RX relocations.
        * targets.c: Add RX target vectors.
        * Makefile.in: Regenerate.
        * bfd-in2.h: Regenerate.
        * configure: Regenerate.
        * libbfd.h: Regenerate.
        * cpu-rx.c: New file.
        * elf32-rx.c: New file.

binutils
        * readelf.c: Add support for RX target.
        * MAINTAINERS: Add DJ and NickC as maintainers for RX.

gas
        * Makefile.am: Add RX target.
        * configure.in: Likewise.
        * configure.tgt: Likewise.
        * read.c (do_repeat_with_expander): New function.
        * read.h: Provide a prototype for do_repeat_with_expander.
        * doc/Makefile.am: Add RX target documentation.
        * doc/all.texi: Likewise.
        * doc/as.texinfo: Likewise.
        * Makefile.in: Regenerate.
        * NEWS: Mention support for RX architecture.
        * configure: Regenerate.
        * doc/Makefile.in: Regenerate.
        * config/rx-defs.h: New file.
        * config/rx-parse.y: New file.
        * config/tc-rx.h: New file.
        * config/tc-rx.c: New file.
        * doc/c-rx.texi: New file.

gas/testsuite
        * gas/rx: New directory.
        * gas/rx/*: New set of test cases.
        * gas/elf/section2.e-rx: New expected output file.
        * gas/all/gas.exp: Add support for RX target.
        * gas/elf/elf.exp: Likewise.
        * gas/lns/lns.exp: Likewise.
        * gas/macros/macros.exp: Likewise.

include
        * dis-asm.h: Add prototype for print_insn_rx.

include/elf
        * rx.h: New file.

include/opcode
        * rx.h: New file.

ld
        * Makefile.am: Add rules to build RX emulation.
        * configure.tgt: Likewise.
        * NEWS: Mention support for RX architecture.
        * Makefile.in: Regenerate.
        * emulparams/elf32rx.sh: New file.
        * emultempl/rxelf.em: New file.

opcodes
        * Makefile.am: Add RX files.
        * configure.in: Add support for RX target.
        * disassemble.c: Likewise.
        * Makefile.in: Regenerate.
        * configure: Regenerate.
        * opc2c.c: New file.
        * rx-decode.c: New file.
        * rx-decode.opc: New file.
        * rx-dis.c: New file.
2009-09-29 14:17:19 +00:00
Nick Clifton
21d799b5c4 Update soruces to make alpha, arc and arm targets compile cleanly
with -Wc++-compat:
        * config/tc-alpha.c: Add casts.
        (extended_bfd_reloc_code_real_type): New type. Used to avoid
        enumeration conversion warnings.
        (struct alpha_fixup, void assemble_insn, assemble_insn)
        (assemble_tokens): Use new type.
        * ecoff.c: Add casts. (mark_stabs): Use enumeration names.
        * config/obj-elf.c: Add cast
        * config/tc-arc.c: Add casts.
        * config/obj-aout.h (text_section,data_section,bss_section):
        Make extern.
        * config/obj-elf.c: Add cast.
        * config/tc-arm.c: Add casts.
        (X, TxCE, TxCE, TxC3, TxC3w, TxCM_, TxCM, TUE, TUF, CE, CL, cCE)
        (cCL, C3E, xCM_, nUF, nCE_tag): Change input format to avoid the
        need for keywords as arguments.
        * ecoff.c: Add casts.
        * ecofflink.c: Add casts.
        * elf64-alpha.c: Add casts.
        (struct alpha_elf_got_entry, struct alpha_elf_reloc_entry): Move
        to top level.
        (SKIP_HOWTO): Use enum name.
        * elf32-arm.c: Add casts.
        (elf32_arm_vxworks_bed): Update code to avoid multiple
        declarations.
        (struct map_stub): Move to top level.
        * arc-dis.c Fix casts.
        * arc-ext.c: Add casts.
        * arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
        enum.
        * emultempl/armelf.em: Add casts.
2009-09-25 19:13:27 +00:00
H.J. Lu
2bf05e5730 gas/
2009-09-24  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Check vex == 2 instead
	of vex256.

opcodes/

2009-09-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove Vex256.
	(set_bitfield): Handle XXX=V.

	* i386-opc.h (Vex): Update comments.
	(Vex256): Removed.
	(VexNDS): Updated.
	(i386_opcode_modifier): Change vex to 2 bits.  Remove vex256.

	* i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
	* i386-tbl.h: Regenerated.
2009-09-24 16:37:09 +00:00
H.J. Lu
f5d9e8160d gas/
2009-09-24  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10677
	* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Return true
	for BFD_RELOC_X86_64_GOTPCREL.

gas/testsuite/

2009-09-24  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10677
	* gas/i386/i386.exp: Run x86-64-localpic.

	* gas/i386/x86-64-localpic.d: New.
	* gas/i386/x86-64-localpic.s: Likewise.
2009-09-24 14:36:48 +00:00
H.J. Lu
2a86604a47 gas/
2009-09-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Don't check
	BFD_RELOC_386_GOT32.

gas/testsuite/

2009-09-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run localpic.

	* gas/i386/localpic.d: New.
	* gas/i386/localpic.s: Likewise.
2009-09-24 03:23:52 +00:00
Sterling Augustine
9ac367048b 2009-09-22 Sterling Augustine <sterling@jaw.hq.tensilica.com>
* config/tc-xtensa.c (md_apply_fix): Remove check for constant with
	difference of of two symbols.
	(xtensa_fix_adjustable): Likewise.
2009-09-22 21:47:03 +00:00
H.J. Lu
76ba998616 2009-09-21 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c: Remove white spaces.
2009-09-21 21:50:19 +00:00
Ben Elliston
e0d602ecff gas/
* config/tc-ppc.c (md_show_usage): Document -mpcca2.
	* doc/c-ppc.texi (PowerPC-Opts): Document -mppca2.

gas/testsuite/
	* gas/ppc/a2.s: New.
	* gas/ppc/a2.d: Likewise.
	* gas/ppc/ppc.exp: Run the a2 dump test.

include/opcode/
	* ppc.h (PPC_OPCODE_PPCA2): New.

opcodes/
	* ppc-dis.c (ppc_opts): Add "ppca2" entry.
	* ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
	eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
	icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
	ici mnemonics.
	(ERAT_T): New operand.
	(XWC_MASK): New mask.
	(XOPL2): New macro.
	(PPCA2): Define.
2009-09-21 10:29:07 +00:00
H.J. Lu
fa289fb8df 2009-09-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (offset_in_range): Sign extend offset only
	if BFD64 is defined.
2009-09-15 18:51:53 +00:00
H.J. Lu
1acf546ea5 gas/
2009-09-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386-intel.c (i386_intel_operand): Initialize
	intel_state.has_offset to 0.

gas/testsuite/

2009-09-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/disp.s: Add an offset test.
	* gas/i386/x86-64-disp.s: Likewise.

	* gas/i386/intelbad.s: Comment out "byte ptr [1]" test.

	* gas/i386/disp.d: Updated.
	* gas/i386/disp-intel.d: Likewise.
	* gas/i386/intelbad.l: Likewise.
	* gas/i386/x86-64-disp.d: Likewise.
	* gas/i386/x86-64-disp-intel.d: Likewise.
2009-09-15 18:41:24 +00:00
H.J. Lu
9de868bf63 2009-09-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (offset_in_range): Sign extend offset only
	for 32bit address mode.
2009-09-15 17:47:26 +00:00
H.J. Lu
6cee4cdae4 gas/
2009-09-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10637
	* config/tc-i386-intel.c (intel_state): Add has_offset.
	(i386_intel_simplify): Set intel_state.has_offset to 1 for
	O_offset.
	(i386_intel_operand): Turn on intel_state.is_mem if
	intel_state.has_offset is 0 and the last char is ']'.

gas/testsuite/

2009-09-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10637
	* gas/i386/disp.s: Add tests for Intel syntax.
	* gas/i386/x86-64-disp.s: Likewise.

	* gas/i386/disp.d: Updated.
	* gas/i386/intelok.d: Likewise.
	* gas/i386/x86-64-disp.d: Likewise.

	* gas/i386/disp-intel.d: New.
	* gas/i386/x86-64-disp-intel.d: Likewise.

	* gas/i386/i386.exp: Run disp-intel and x86-64-disp-intel.
2009-09-14 22:02:26 +00:00
H.J. Lu
0e1147d951 gas/
2009-09-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10636
	* config/tc-i386.c (optimize_disp): Set disp32 for 64bit only
	if there is an ADDR_PREFIX.
	(i386_finalize_displacement): Repor error if signed 32bit
	displacement is out of range.

gas/testsuite/

2009-09-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10636
	* gas/i386/disp.d: New.
	* gas/i386/disp.s: Likewise.
	* gas/i386/x86-64-disp.d: Likewise.
	* gas/i386/x86-64-disp.s: Likewise.

	* gas/i386/i386.exp: Run disp and x86-64-disp.

	* gas/i386/x86-64-addr32.s: Add high 32bit displacement tests.

	* gas/i386/x86-64-addr32.d: Updated.
	* gas/i386/x86-64-addr32-intel.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.
	* gas/i386/x86-64-prescott.d: Likewise.

	* gas/i386/x86-64-inval.s: Add invalid displacement tests.

	* gas/i386/x86-64-prescott.s: Replace 0x90909090 displacement
	with 0x909090.
2009-09-14 13:57:45 +00:00
Richard Sandiford
1180b5a4de gas/
* config/tc-mips.c (MIPS_JALR_HINT_P): Take an expr argument.
	Require the target to be a bare symbol on targets with
	in-place addends.
	(macro_build_jalr): Update accordingly.
	(mips_fix_adjustable): Don't reduce R_MIPS_JALRs on targets
	with in-place addends.

gas/testsuite/
	* gas/mips/jalr2.s, gas/mips/jalr2.d: New test.
	* gas/mips/jal-svr4pic.d: Don't expect R_MIPS_JALRs to be reduced.
	* gas/mips/jal-xgot.d: Likewise.
	* gas/mips/mips-abi32-pic2.d: Likewise.
	* gas/mips/mips.exp: Run it.
2009-09-13 19:18:11 +00:00
Nick Clifton
1e9cc1c27b * po/bfd.pot: Updated by the Translation project.
* po/binutils.pot: Updated by the Translation project.
        * po/gold.pot: Updated by the Translation project.
        * po/gold.pot: Updated by the Translation project.
        * po/gprof.pot: Updated by the Translation project.
        * po/sv.po: Updated Swedish translation.
        * po/ld.pot: Updated by the Translation project.
        * po/fi.po: Updated Finnish translation.
        * po/ld.pot: Updated by the Translation project.
        * po/fi.po: Updated Finnish translation.

        Updated sources to compile cleanly with -Wc++-compat:
        * basic_blocks.c: Add casts.
        * cg_dfn.c: Add cast.
        * corefile.c: Add casts.
        * gmon_io.c: Add casts.
        * hist.c: Add cast.
        * source.c: Add cast.
        * sym_ids.c (struct match): Moved to top level.

        Updated soruces in ld/* to compile cleanly with -Wc++-compat:
        * ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level.
        * ldcref.c: Add casts.
        * ldctor.c: Add casts.
        * ldexp.c
        * ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level.
        * ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer.
        * ldlang.h (enum statement_enum): Move to top level.
        * ldmain.c: Add casts.
        * ldwrite.c: Add casts.
        * lexsup.c: Add casts. (enum control_enum): Move to top level.
        * mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer.

        Updated sources to compile cleanly with -Wc++-compat:
        * basic_blocks.c: Add casts.
        * cg_dfn.c: Add cast.
        * corefile.c: Add casts.
        * gmon_io.c: Add casts.
        * hist.c: Add cast.
        * source.c: Add cast.
        * sym_ids.c (struct match): Moved to top level.

        * as.c (main): Call dwarf2_init.
        * config/obj-elf.c (struct group_list): New field.
        (build_group_lists): Use hash lookup.
        (free_section_idx): New function.
        (elf_frob_file): Adjust.
        * dwarf2dbg.c (all_segs_hash, last_seg_ptr): New variables.
        (get_line_subseg): Adjust.
        (dwarf2_init): New function.
        * dwarf2dbg.h (dwarf2_init): New declaration.
2009-09-11 15:27:38 +00:00
Hans-Peter Nilsson
3e81d9f9fa PR gas/10623
* config/tc-mmix.c (md_assemble) <case mmix_operands_xyz_opt>:
	Allow register operands for SWYM as for TRIP and TRAP.  Correct
	operand handling and error checking.  Never emit
	BFD_RELOC_MMIX_REG_OR_BYTE for operands to these insns.
2009-09-10 22:26:36 +00:00
Alan Modra
800f6ec8e2 gas/
* config/tc-d10v.c: Include dwarf2dbg.h.
	(write_long, write_1_short, write_2_short): Call dwarf2_emit_insn.
	(d10v_frob_label): New function.
	* config/tc-d10v.h (d10v_frob_label): Declare.
	(tc_frob_label): Define as d10v_frob_label.
gas/testsuite/
	* gas/lns/lns-common-1.s: Use two nops between each .loc.
	* gas/lns/lns.exp: Don't exclude d10v.
2009-09-10 14:31:23 +00:00
Alan Modra
f2e25d931f * config/tc-d30v.c (d30v_frob_label): Call dwarf2_emit_label.
* config/tc-frv.c (frv_frob_label): Likewise.
2009-09-10 14:05:40 +00:00
Alan Modra
22ba098178 * config/obj-coff.h (USE_UNIQUE): Don't define.
* config/obj-coff.c (weak_uniquify): Use an_external_name when TE_PE.
	* symbols.c (an_external_name): Define when TE_PE.
	(S_SET_EXTERNAL): Assign an_external_name when TE_PE.
	* tc.h (an_external_name): Declare when TE_PE.
2009-09-09 13:19:51 +00:00
Alan Modra
9384f2ffd0 * config/tc-i386.c (i386_target_format): Avoid duplicate case label. 2009-09-09 09:31:16 +00:00
Alan Modra
d4f4f3fb2b * read.c (emit_expr_fix): Handle size 3.
* config/tc-avr.c (md_assemble): Call dwarf2_emit_insn.
	* config/tc-d30v.c (write_long, write_1_short,
	write_2_short, md_assemble): Likewise.
	* config/tc-dlx.c (md_assemble): Likewise.
	* config/tc-i860.c (md_assemble): Likewise.
	* config/tc-mn10200.c (md_assemble): Likewise.
	* config/tc-pj.c (md_assemble): Likewise.
	* config/tc-vax.c (md_assemble): Likewise.
2009-09-08 10:36:39 +00:00
Daniel Gutson
307c948d20 9-09-07 Daniel Gutson <dgutson@codesourcery.com>
* config/tc-arm.c (arm_cpus): cortex-r4f CPU added.
        * doc/c-arm.texi: cortex-r4f CPU added.
2009-09-07 16:34:39 +00:00
Tristan Gingold
b11d79f2b2 bfd/:
2009-09-07  Tristan Gingold  <gingold@adacore.com>

	* bfd.m4 (BFD_HAVE_TIME_TYPE_MEMBER,
	BFD_HAVE_SYS_STAT_TYPE_MEMBER): Moved to gas/acinclude.m4
	* configure.in: Move tests for tm_gmtoff, st_mtim.tv_sec and
	st_mtim.tv_nsec to gas/configure.in
	(bfd_elf64_ia64_vms_vec): Remove vmsutil.lo
	* configure: Regenerate.
	* config.in: Regenerate.
	* vmsutil.c: Moved to gas/config/te-vms.c
	* vmsutil.h: Removed.
	* Makefile.am (BFD32_BACKENDS_CFILES): Remove vmsutil.c
	(BFD32_BACKENDS): Remove vmsutil.lo
	* Makefile.in: Regenerate.

gas/:
2009-09-07  Tristan Gingold  <gingold@adacore.com>

	* Makefile.am (TARG_ENV_CFILES): New variable.  Set to te-vms.c
	(POTFILES): Add $(TARG_ENV_CFILES) in definition.
	(EXTRA_as_new_SOURCES): Ditto.
	* Makefile: Regenerate.
	* acinclude.m4 (BFD_HAVE_TIME_TYPE_MEMBER,
	BFD_HAVE_SYS_STAT_TYPE_MEMBER): New macro created from bfd/bfd.m4.
	* configure.in: Add Tests for tm_gmtoff, st_mtim.tv_sec and
	st_mtim.tv_nsec (from bfd/configure.in).  Check for time.h and
	sys/stat.h headers.
	Add te-vms.o in extra_objects if te_file is vms.
	* configure: Regenerate.
	* config.in: Regenerate.
	* config/te-vms.c: New file, from bfd/vmsutil.c
	(vms_dwarf2_file_time_name, vms_dwarf2_file_size_name)
	(vms_dwarf2_file_name): New functions.
	(vms_file_stats_name): Make it static, add a dirname parameter to
	locally create the full pathname.
	* config/te-vms.h: Add a copyright header.
	Declare the above functions.
	(DWARF2_FILE_TIME_NAME, DWARF2_FILE_SIZE_NAME, DWARF2_FILE_NAME): Use
	the above functions in the definition.
	* makefile.vms (OBJS): Add te-vms.obj.
	(te-vms.obj): Create a specific target.
	* configure.com: Create targ-env.h using a per target value.
	Compile te-vms.c for ia64.
2009-09-07 09:15:31 +00:00
Nick Clifton
96d56e9f91 * bfd/coff-arm.c (coff_arm_relocate_section)
(record_thumb_to_arm_glue, bfd_arm_process_before_allocation):
        Change member name class to symbol_class.
        * bfd/coff-i960.c (coff_i960_relocate_section) Rename variable
        class to class_val. Change member name class to symbol_class.
        * bfd/coff-rs6000.c (_bfd_xcoff_swap_aux_in)
        (_bfd_xcoff_swap_aux_out): Rename arguments class to in_class.
        * bfd/coff-stgo32.c (adjust_aux_in_post)
        (adjust_aux_out_pre, adjust_aux_out_post): Rename arguments class
        to in_class.
        * bfd/coff64-rs6000.c (_bfd_xcoff64_swap_aux_in)
        (_bfd_xcoff64_swap_aux_out): Rename arguments class to in_class.
        * bfd/coffcode.h (coff_pointerize_aux_hook): Rename variable class
        to n_sclass.
        * bfd/coffgen.c (coff_write_symbol, coff_pointerize_aux): Rename
        variables named class to n_sclass. (coff_write_symbols): Rename
        variable class to sym_class. (bfd_coff_set_symbol_class): Rename
        argument class to symbol_class.
        * bfd/cofflink.c (_bfd_coff_link_hash_newfunc)
        (coff_link_add_symbols, _bfd_coff_link_input_bfd)
        (_bfd_coff_write_global_sym, _bfd_coff_generic_relocate_section):
        Update code to use renamed members.
        * bfd/coffswap.h (coff_swap_aux_in, coff_swap_aux_out): Rename
        argument class to in_class.
        * bfd/libcoff-in.h (struct coff_link_hash_entry, struct
        coff_debug_merge_type) Renamed members class to symbol_class and
        type_class.
        * bfd/libcoff.h Regenerated.
        * bfd/peXXigen.c: (_bfd_XXi_swap_aux_in, _bfd_XXi_swap_aux_out):
        Rename argument class to in_class.
        * bfd/pef.c (bfd_pef_parse_imported_symbol): Update code to use
        renamed members.
        * bfd/pef.h (struct bfd_pef_imported_symbol): Changed name of
        member class to symbol_class.
        * binutils/ieee.c (ieee_read_cxx_misc, ieee_read_cxx_class)
        (ieee_read_reference): Rename variables named class to cxxclass.
        * gas/config/tc-arc.c (struct syntax_classes): Rename member class
        to s_class. (arc_extinst): Rename variable class to
        s_class. Update code to use renamed members.
        * gas/config/tc-mips.c (insn_uses_reg): Rename argument class to
        regclass.
        * gas/config/tc-ppc.c (ppc_csect, ppc_change_csect, ppc_function)
        (ppc_tc, ppc_is_toc_sym, ppc_symbol_new_hook, ppc_frob_label)
        (ppc_fix_adjustable, md_apply_fix): Update code to use renamed
        members.
        * gas/config/tc-ppc.h (struct ppc_tc_sy): Change name of member
        from class to symbol_class. (OBJ_COPY_SYMBOL_ATTRIBUTES): Update
        code to use renamed members.
        * gas/config/tc-score.c (s3_adjust_paritybit): Rename argument
        class to i_class.
        * gas/config/tc-score7.c (s7_adjust_paritybit): Rename argument
        class to i_class.
        * gprof/corefile.c (core_create_function_syms): Rename variable
        class to cxxclass.
        * include/coff/ti.h (GET_LNSZ_SIZE, PUT_LNSZ_SIZE): Updated name
        of class variable to in_class to match changes in function that
        use this macro.
        * include/opcode/ia64.h (struct ia64_operand): Renamed member
        class to op_class
        * ld/emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols)
        (gld${EMULATION_NAME}_try_needed): Rename variable class to
        link_class
        * opcodes/ia64-dis.c (print_insn_ia64): Update code to use renamed
        member.
        * opcodes/m88k-dis.c (m88kdis): Rename variable class to in_class.
        * opcodes/tic80-opc.c (tic80_symbol_to_value)
        (tic80_value_to_symbol): Rename argument class to symbol_class.
2009-09-05 07:56:26 +00:00
Jie Zhang
66a6900a09 gas/
* config/bfin-parse.y (asm_1): Implement HLT instruction.
	Fix comments for DBGA, DBGAH and DBGAL.
	* config/tc-bfin.c (bfin_gen_pseudodbg_assert): Change according
	to the new encoding of DBGA, DBGAH, and DBGAL.

	include/
	* opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp.
	(PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define.
	(PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask,
	PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask):
	Adjust accordingly.
	(init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and
	PseudoDbg_Assert_grp_mask.

	opcodes/
	* bfin-dis.c (decode_pseudodbg_assert_0): Change according
	to the new encoding of DBGA, DBGAH, and DBGAL.
	(_print_insn_bfin): Likewise.
2009-09-04 04:29:42 +00:00
Jie Zhang
110c21e165 * config/tc-bfin.c (md_parse_option): Call as_fatal for bad
-mcpu= option.
2009-09-03 18:03:38 +00:00
Jie Zhang
c639698b41 * config/bfin-lex.l: Remove V as STATUS_REG. 2009-09-03 17:52:06 +00:00
Jie Zhang
ad15c38ee6 gas/
* config/bfin-parse.y: Remove trailing whitespace.
	(ccstat): Indent.
	* config/tc-bfin.c (struct bfin_reg_entry): Remove.
	(bfin_reg_info[]): Remove.

	opcodes/
	* bfin-dis.c (_print_insn_bfin): Don't declare.
	(print_insn_bfin): Don't declare.
	(dregs_pair): Remove.
	(ignore_bits): Remove.
	(ccstat): Remove.
2009-09-03 17:42:53 +00:00
Jie Zhang
f31bf2c696 * config/bfin-defs.h (F_REG_ALL): Remove macro.
(F_REG_HIGH): Redefine.
	(F_REG_NONE): New macro.
	(F_REG_LOW): New macro.
	(REG_CLASS): Enclose macro argument in parentheses when used.
	(REG_EVEN): Likewise.
	(IS_H): Use flags.
	(IS_HCOMPL): Use flags.
	* config/bfin-lex.l (SP.L, SP.H, FP.L, FP.H): Set flags.
	(parse_reg): Set flags.
	(parse_halfreg): Set flags.
2009-09-03 17:06:38 +00:00
Jie Zhang
118176876b * config/bfin-parse.y (gen_multi_instr_1): Check anomaly
05000074 only when both slot1 and slot2 are filled.

	testsuite/
	* gas/bfin/parallel5.s: New test.
	* gas/bfin/error.exp: New test.
2009-09-03 16:50:39 +00:00
Jie Zhang
bd03da3089 * config/tc-bfin.c (md_assemble): Bump line counters if there is
EOL in the instruction.

	testsuite/
	* gas/bfin/line_number.l, gas/bfin/line_number.s: New test.
	* gas/bfin/bfin.exp: Add the new test.
2009-09-03 16:32:42 +00:00
Jie Zhang
c958a8a8fb gas/
* config/bfin-defs.h (IS_GENREG): Define.
	(IS_DAGREG): Define.
	(IS_SYSREG): Define.
	* config/bfin-parse.y (asm_1): Check illegal register move
	instructions.

	gas/testsuite/
	* gas/bfin/expected_move_errors.s,
	gas/bfin/expected_move_errors.l: Add "LC1 = I0;".
	* gas/bfin/move.s, gas/bfin/move.d: Remove "CYCLES = A0.W".

	opcodes/
	* bfin-dis.c (IS_DREG): Define.
	(IS_PREG): Define.
	(IS_AREG): Define.
	(IS_GENREG): Define.
	(IS_DAGREG): Define.
	(IS_SYSREG): Define.
	(decode_REGMV_0): Check illegal register move instructions.
2009-09-03 16:17:36 +00:00
Jie Zhang
1d3ad4d0b0 * config/bfin-parse.y (asm_1): Fix a typo.
testsuite/
	* gas/bfin/expected_comparison_errors.l: Expect error on Line 13.
2009-09-03 15:48:16 +00:00
Jie Zhang
d3a50e1419 * config/bfin-parse.y (asm_1): Add LOOP_BEGIN and LOOP_END.
* config/tc-bfin.c (bfin_start_line_hook): Remove.
	(bfin_loop_beginend): New.
	* config/tc-bfin.h (bfin_start_line_hook): Don't declare.
	(md_start_line_hook): Don't define.
	* config/bfin-aux.h (bfin_loop_beginend): Declare.

	testsuite/
	* gas/bfin/loop.s, gas/bfin/loop.d: New test.
	* gas/bfin/loop2.s, gas/bfin/loop2.d: New test.
	* gas/bfin/loop3.s, gas/bfin/loop3.d: New test.
	* gas/bfin/bfin.exp: Add the new tests.
2009-09-03 15:36:02 +00:00
Tristan Gingold
a0840211ed 2009-09-03 Tristan Gingold <gingold@adacore.com>
* config/tc-ia64.c (ia64_vms_note): Use lbasename instead of basename.
	Call xstrdup on the result and free the buffer after use.
2009-09-03 13:20:31 +00:00
Jie Zhang
958cff2f9b * config/bfin-parse.y (value_match): Use int instead of long.
From  Michael Frysinger  <michael.frysinger@analog.com>
	* config/bfin-defs.h (Expr_Node_Value): Declare the i_value
	member as long long.
2009-09-02 08:57:38 +00:00
Jie Zhang
39b4412d0f From Bernd Schmidt <bernd.schmidt@analog.com>
* config/gas/bfin-parse.y (asm_1): Clean up and unify error handling
	for load and store insns.
	(neg_value): Delete function.

	testsuite/
	From  Bernd Schmidt  <bernd.schmidt@analog.com>
	* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
	Check error messages for invalid load/store insns.
2009-09-02 07:30:34 +00:00
Alan Modra
aa820537ea update copyright dates 2009-09-02 07:25:43 +00:00
Jie Zhang
83ee431c60 * config/bfin-parse.y (asm_1): Only PREG and DREG are allowed
in comparison.

	testsuite/
	* gas/bfin/expected_comparison_errors.s: Add more cases.
	* gas/bfin/expected_comparison_errors.l: Update accordingly.
2009-09-01 07:21:42 +00:00
Jie Zhang
08c1b05642 2007-09-28 Bernd Schmidt <bernd.schmidt@analog.com>
* config/tc-bfin.c (bfin_fix_adjustable): Partially revert the
	2007-08-23 change; BFD_RELOC_BFIN_GOT is not adjustable.

	2007-08-23  Jie Zhang  <jie.zhang@analog.com>
	* config/tc-bfin.c (bfin_fix_adjustable): Adjust
	BFD_RELOC_BFIN_GOT, BFD_RELOC_BFIN_GOT17M4 and
	BFD_RELOC_BFIN_FUNCDESC_GOT17M4.
2009-09-01 05:56:30 +00:00
Jie Zhang
5e8c8f8f89 * read.c (TC_START_LABEL): Add a new argument.
(read_a_source_file): Pass the beginning of the symbol through
	the new argument of TC_START_LABEL.
	* config/tc-arm.h (TC_START_LABEL): Add a new argument.
	* config/tc-bfin.c (bfin_start_label): Only search '(' and '['
	from the beginning of the symbol.
	* config/tc-bfin.h (TC_START_LABEL): Add the new argument.
	* config/tc-d30v.h (TC_START_LABEL): Likewise.
	* config/tc-fr30.h (TC_START_LABEL): Likewise.
	* config/tc-m32c.h (TC_START_LABEL): Likewise.
	* config/tc-m32r.h (TC_START_LABEL): Likewise.
	* config/tc-mep.h (TC_START_LABEL): Likewise.

	testsuite/
	* gas/bfin/stack2.s: Add pop multiple instruction with a label
	on the same line.
	* gas/bfin/stack2.d: Adjust accordingly.
2009-09-01 00:24:02 +00:00
Jan Beulich
94be91de01 bfd/
2009-08-31  Jan Beulich  <jbeulich@novell.com>

	* elf-bfd.h (bfd_elf_get_default_section_type): Declare.
	* elf.c (bfd_elf_get_default_section_type): New.
	(elf_fake_sections): Use bfd_elf_get_default_section_type.

gas/
2009-08-31  Jan Beulich  <jbeulich@novell.com>

	* config/obj-elf.c (obj_elf_change_section): Set default type
	by calling bfd_elf_get_default_section_type.

gas/testsuite/
2009-08-31  Jan Beulich  <jbeulich@novell.com>

	* gas/elf/section5.l: Remove no longer issued warning pattern.
2009-08-31 12:02:36 +00:00
Jie Zhang
e690f7f3ac * config/bfin-aux.h: Change format from DOS to UNIX. 2009-08-31 10:12:26 +00:00
Nick Clifton
d3ce72d070 Updated sources to avoid using the identifier name "new", which is a
keyword in c++.

        * bfd/aoutx.h (NAME (aout, make_empty_symbol)): Rename variable
        new to new_symbol.
        * bfd/coffgen.c (coff_make_empty_symbol)
        (coff_bfd_make_debug_symbol): Rename variable new to new_symbol.
        * bfd/cpu-ia64-opc.c (ext_reg, ins_imms_scaled): Rename variable
        new to new_insn.
        * bfd/doc/chew.c (newentry, add_intrinsic): Rename variable new to
        new_d.
        * bfd/ecoff.c (_bfd_ecoff_make_empty_symbol): Rename variable new
        to new_symbol.
        * bfd/elf32-m68k.c (elf_m68k_get_got_entry_type): Rename argument
        new to new_reloc.
        * bfd/hash.c (bfd_hash_lookup): Rename variable new to new_string.
        * bfd/ieee.c (ieee_make_empty_symbol): Rename variable new to
        new_symbol.
        * bfd/linker.c (bfd_new_link_order): Rename variable new to
        new_lo.
        * bfd/mach-o.c (bfd_mach_o_sizeof_headers): Rename variable new to
        symbol.
        * bfd/oasys.c (oasys_make_empty_symbol): Rename variable new to
        new_symbol_type.
        * bfd/pdp11.c (NAME (aout, make_empty_symbol)): Rename variable
        new to new_symbol_type.
        * bfd/plugin.c (bfd_plugin_make_empty_symbol): Rename variable new
        to new_symbol.
        * bfd/rs6000-core.c (CoreHdr, VmInfo): Rename union member new to
        new_dump.
        (read_hdr, rs6000coff_core_p)
        (rs6000coff_core_file_matches_executable_p)
        (rs6000coff_core_file_failing_command)
        (rs6000coff_core_file_failing_signal): Updated function to use new
        union member name.
        * bfd/som.c (som_make_empty_symbol): Rename variable new to
        new_symbol_type.
        * bfd/syms.c (_bfd_generic_make_empty_symbol): Rename variable new
        to new_symbol.
        * bfd/tekhex.c (first_phase, tekhex_make_empty_symbol): Rename
        variable new to new_symbol.
        * binutils/nlmconv.c (main): Rename variable new to new_name.
        * gas/config/tc-arm.c (insert_reg_alias): Rename variable new to
        new_reg.
        * gas/config/tc-dlx.c (parse_operand): Rename variable new to
        new_pos.
        * gas/config/tc-ia64.c (ia64_gen_real_reloc_type): Rename variable
        new to newr.
        * gas/config/tc-mcore.c (parse_exp, parse_imm): Rename variable
        new to new_pointer.
        * gas/config/tc-microblaze.c (parse_exp, parse_imm, check_got):
        Change name from new to new_pointer.
        * gas/config/tc-or32.c (parse_operand): Rename variable new to
        new_pointer.
        * gas/config/tc-pdp11.c (md_assemble): Rename variable new to
        new_pointer.
        * gas/config/tc-pj.c (alias): Change argument new to new_name.
        * gas/config/tc-score.c (s3_build_score_ops_hsh): Rename variable
        new to new_opcode. (s3_build_dependency_insn_hsh) Rename variable
        new to new_i2n. (s3_convert): Rename variables old and new to
        r_old and r_new.
        * gas/config/tc-score7.c (s7_build_score_ops_hsh): Rename variable
        new to new_opcode. (s7_build_dependency_insn_hsh): Rename variable
        new to new_i2d. (s7_b32_relax_to_b16, s7_convert_frag): Rename
        variables old and new to r_old and r_new.
        * gas/config/tc-sh.c (parse_exp): Rename variable new to
        new_pointer.
        * gas/config/tc-sh64.c (shmedia_parse_exp): Rename variable new to
        new_pointer.
        * gas/config/tc-tic4x.c (tic4x_operand_parse): Rename variable new
        to new_pointer.
        * gas/config/tc-z8k.c (parse_exp): Rename variable new to
        new_pointer.
        * gas/listing.c (listing_newline): Rename variable new to new_i.
        * ld/ldexp.c (exp_intop, exp_bigintop, exp_relop, exp_binop)
        (exp_trinop, exp_unop, exp_nameop, exp_assop): Rename variable new
        to new_e.
        * ld/ldfile.c (ldfile_add_library_path): Rename variable new to
        new_dirs. (ldfile_add_arch): Rename variable new to new_arch.
        * ld/ldlang.c (new_statement, lang_final, lang_add_wild)
        (lang_target, lang_add_fill, lang_add_data, lang_add_assignment)
        (lang_add_insert): Rename variable new to new_stmt. (new_afile):
        Added missing cast. (lang_memory_region_lookup): Rename variable
        new to new_region. (init_os): Rename variable new to
        new_userdata. (lang_add_section): Rename variable new to
        new_section. (ldlang_add_undef): Rename variable new to
        new_undef. (realsymbol): Rename variable new to new_name.
        * opcodes/z8kgen.c (internal, gas): Rename variable new to new_op.

        Updated sources to avoid using the identifier name "template",
        which is a keyword in c++.

        * bfd/elf32-arm.c (struct stub_def): Rename member template to
        template_sequence. (arm_build_one_stub,
        find_stub_size_and_template, arm_size_one_stub, arm_map_one_stub):
        Rename variable template to template_sequence.
        * bfd/elfxx-ia64.c (elfNN_ia64_relax_br, elfNN_ia64_relax_brl):
        Rename variable template to template_val.
        * gas/config/tc-arm.c (struct asm_cond, struct asm_psr, struct
        asm_barrier_opt): Change member template to
        template_name. (md_begin): Update code to reflect new member
        names.
        * gas/config/tc-i386.c (struct templates, struct _i386_insn)
        (match_template, cpu_flags_match, match_reg_size, match_mem_size)
        (operand_size_match, md_begin, i386_print_statistics, pi)
        (build_vex_prefix, md_assemble, parse_insn, optimize_imm)
        (optimize_disp): Updated code to use new names. (parse_insn):
        Added casts.
        * gas/config/tc-ia64.c (dot_template, emit_one_bundle): Updated
        code to use new names.
        * gas/config/tc-score.c (struct s3_asm_opcode): Renamed member
        template to template_name. (s3_parse_16_32_inst, s3_parse_48_inst,
        s3_do_macro_ldst_label, s3_build_score_ops_hsh): Update code to
        use new names.
        * gas/config/tc-score7.c (struct s7_asm_opcode): Renamed member
        template to template_name. (s7_parse_16_32_inst,
        s7_do_macro_ldst_label, s7_build_score_ops_hsh): Update code to
        use new names.
        * gas/config/tc-tic30.c (md_begin, struct tic30_insn)
        (md_assemble): Update code to use new names.
        * gas/config/tc-tic54x.c (struct _tic54x_insn, md_begin)
        (optimize_insn, tic54x_parse_insn, next_line_shows_parallel):
        Update code to use new names.
        * include/opcode/tic30.h (template): Rename type template to
        insn_template. Updated code to use new name.
        * include/opcode/tic54x.h (template): Rename type template to
        insn_template.
        * opcodes/cris-dis.c (bytes_to_skip): Update code to use new name.
        * opcodes/i386-dis.c (putop): Update code to use new name.
        * opcodes/i386-gen.c (process_i386_opcodes): Update code to use
        new name.
        * opcodes/i386-opc.h (struct template): Rename struct template to
        insn_template. Update code accordingly.
        * opcodes/i386-tbl.h (i386_optab): Update type to use new name.
        * opcodes/ia64-dis.c (print_insn_ia64): Rename variable template
        to template_val.
        * opcodes/tic30-dis.c (struct instruction, get_tic30_instruction):
        Update code to use new name.
        * opcodes/tic54x-dis.c (has_lkaddr, get_insn_size)
        (print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
        Update code to use new name.
        * opcodes/tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
        Update type to new name.
2009-08-29 22:11:02 +00:00
Kaz Kojima
0c9b4fd74a * config/tc-sh.c (md_apply_fix): Extend sign of the offset value
for 64-bit host.
	* gas/sh/sign-extension.d: New file.
	* gas/sh/sign-extension.s: New file.
	* gas/sh/basic.exp: Run new test.
2009-08-29 10:38:33 +00:00
H.J. Lu
3632d14b13 gas/
2009-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Use PROCESSOR_L1OM on "l1om".
	(i386_align_code): Handle PROCESSOR_L1OM.
	(check_cpu_arch_compatible): Fix a typo in comments.
	(set_cpu_arch): Check cpu_arch_isa instead of
	cpu_arch_isa_flags.bitfield.cpul1om.
	(i386_mach): Likewise.
	(i386_target_format): Likewise.

	* config/tc-i386.h (processor_type): Add PROCESSOR_L1OM.

gas/testsuite/

2009-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/l1om.d: Check elf64-l1om format.
2009-08-28 21:42:16 +00:00
DJ Delorie
4e7defc130 * config/tc-mep.c (md_pcrel_from_section): Handle any other
forced-relocation cases.
2009-08-26 23:28:12 +00:00