defined weak symbol is in.
* config/tc-arm.c (relax_adr, relax_branch, md_apply_fix): Treat
weak symbols as not known to be in the same section, even if they
are defined.
* gas/arm/weakdef-1.s: New.
* gas/arm/weakdef-1.d: New.
* gas/arm/weakdef-2.s: New.
* gas/arm/weakdef-2.d: New.
* gas/arm/weakdef-2.l: New.
* config/tc-tic6x.h (tic6x_label_list): New.
(tic6x_segment_info_type): Keep a list of labels and a current
frag instead of a boolean for whether labels seen and a count of
instructions.
(tic6x_frag_info, TC_FRAG_TYPE, TC_FRAG_INIT, tic6x_frag_init,
md_do_align, tic6x_do_align, md_end, tic6x_end): New.
* config/tc-tic6x.c (tic6x_frob_label): Put label on list.
(tic6x_cleanup): Correct comment.
(tic6x_free_label_list): New.
(tic6x_cons_align): Free label list and update for
tic6x_segment_info_type changes.
(tic6x_do_align): New.
(md_assemble): Handle list of labels and saved frag for execute
packet. Create machine-dependent frag for new execute packet and
adjust labels accordingly.
(tic6x_adjust_section, tic6x_frag_init, tic6x_end): New.
(md_convert_frag, md_estimate_size_before_relax): Update comments.
gas/testsuite:
* gas/tic6x/align-1-be.d, gas/tic6x/align-1.d,
gas/tic6x/align-1.s, gas/tic6x/align-2.d, gas/tic6x/align-2.s:
New.
gas/
2010-04-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11509
* config/tc-i386-intel.c (i386_intel_simplify_register): New.
(i386_intel_simplify): Use i386_is_register and
i386_intel_simplify_register. Set X_md for O_register and
check X_md for O_constant.
(i386_intel_operand): Use i386_is_register.
* config/tc-i386.c (i386_is_register): New.
(x86_cons): Initialize the X_md field. Use i386_is_register.
(parse_register): Use i386_is_register.
(tc_x86_parse_to_dw2regnum): Likewise.
gas/testsuite/
2010-04-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11509
* gas/i386/equ.s: Add tests for ".equ symbol, reg + NUM".
* gas/i386/equ.d: Updated.
* config/tc-hppa.c (pa_ip): Do not allow 64-bit add condition
matcher to accept and unconditional 32-bit add instruction.
(pa_build_unwind_subspace): Cope with error conditions not
allowing the start symbol to be set.
* gas/hppa/basic/add2.s: Add test of simple 32-bit instruction.
* gas/hppa/basic/basic.exp (do_add2): Add grep for expected
disassembly.
* config/tc-alpha.c: Includes vms/egps.h on EVAX.
(s_alpha_comm): Used new EGPS macros from egps.h
(RGPS__V_NO_SHIFT, EGPS__V_MASK): New local macros.
(s_alpha_section_word): Add comments. Use new EGPS macros.
Adjust for modified bfd_vms_set_section_flags function.
2010-03-21 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (i386_error): New.
(_i386_insn): Replace err_msg with error.
(operand_size_match): Set error instead of err_msg on failure.
(operand_type_match): Likewise.
(operand_type_register_match): Likewise.
(VEX_check_operands): Likewise.
(match_template): Likewise. Use error instead of err_msg with
as_bad.
that two mapping symbols have the same value.
testsuite/
* gas/arm/mapmisc.s: Add the test case for two mapping
symbols having the same value.
* gas/arm/mapmisc.d: Likewise.
* config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
alignment.
testsuite/
* gas/arm/neon-ldst-align-bad.d: New test.
* gas/arm/neon-ldst-align-bad.l: New test.
* gas/arm/neon-ldst-align-bad.s: New test.
mips_fix_loongson2f_jump): New variables.
(md_longopts): Add New options -mfix-loongson2f-nop/jump,
-mno-fix-loongson2f-nop/jump.
(md_parse_option): Initialize variables via above options.
(options): New enums for the above options.
(md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
(fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
New functions.
(append_insn): call fix_loongson2f().
(mips_handle_align): Replace the implicit nops.
* config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
for the new mips_handle_align().
* doc/c-mips.texi: Document the new options.
* gas/mips/loongson-2f-2.s: New test of -mfix-loongson2f-nop.
* gas/mips/loongson-2f-2.d: Likewise.
* gas/mips/loongson-2f-3.s: New test of -mfix-loongson2f-jump.
* gas/mips/loongson-2f-3.d: Likewise.
* gas/mips/mips.exp: Run the new tests.
* opcode/mips.h (LOONGSON2F_NOP_INSN): New macro.
* config/tc-arm.c (do_rd_rm_rn): Added warning.
gas/testsuite/
* gas/arm/depr-swp.d: New test case.
* gas/arm/depr-swp.s: New file.
* gas/arm/depr-swp.l: New file.
gas/
* config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
BFD_RELOC_ARM_PCREL_CALL)
gas/testsuite/
* gas/arm/branch-reloc.s, gas/arm/branch-reloc.d,
gas/arm/branch-reloc.l: New tests and expected results with all
variants of call: ARM/Thumb, local/global, inter/intra-section,
using BL/BLX.
gas/
* config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
(i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
* config/tc-i386.h (processor_type): Same.
* doc/c-i386.texi: Change amdfam15 to bdver1.
opcodes/
* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
to CPU_BDVER1_FLAGS
* i386-init.h: Regenerated.
testsuite/
* gas/i386/i386.exp: Rename amdfam15 test cases to bdver1.
* gas/i386/x86-64-nops-1-amdfam15.d: Renamed test case to
gas/i386/x86-64-nops-1-bdver1.d.
* gas/i386/nops-1-amdfam15.d: Renamed test case to
gas/i386/nops-1-bdver1.d.
* NEWS: Mention new feature.
* config/obj-coff.c (obj_coff_section): Accept digits and use
to override default section alignment power if specified.
* doc/as.texinfo (.section directive): Update documentation.
gas/testsuite/ChangeLog:
* gas/pe/section-align-1.s: New test source file.
* gas/pe/section-align-1.d: Likewise control script.
* gas/pe/section-align-2.s: Likewise ...
* gas/pe/section-align-2.d: ... and likewise.
* gas/pe/pe.exp: Invoke new testcases.
* coff-rs6000.c (xcoff_howto_table): Change size to 0 and bitsize to 1.
(_bfd_xcoff_reloc_type_lookup): Handle BFD_RELOC_NONE.
* coff64-rs6000.c (xcoff64_howto_table): Change size to 0 and
bitsize to 1.
(xcoff64_reloc_type_lookup): Handle BFD_RELOC_NONE.
gas/
* write.h (fix_at_start): Declare.
* write.c (fix_new_internal): Add at_beginning parameter.
Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
(fix_new, fix_new_exp): Update accordingly.
(fix_at_start): New function.
* config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
(ppc_ref): New function, for OBJ_XCOFF.
(md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
* config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
gas/testsuite/
* gas/ppc/xcoff-ref-1.s, gas/ppc/xcoff-ref-1.l: New test.
* gas/ppc/aix.exp: Run it.
ld/testsuite/
* ld-powerpc/aix-ref-1-32.od, ld-powerpc/aix-ref-1-64.od,
ld-powerpc/aix-ref-1.s: New tests.
* ld-powerpc/aix52.exp: Run them.
gas/
* config/tc-i386.c (md_assemble): Before accessing the IMM field
check that it's not an XOP insn.
gas/testsuite/
* gas/i386/x86-64-xop.d: Add missing patterns.
* gas/i386/x86-64-xop.s: Same.
* gas/i386/xop.d: Same.
* gas/i386/xop.s: Same.
opcodes/
* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
* i386-tbl.h: Regenerated.
warning message if a new section is created without setting any
attributes for it.
(md_pseudo_table): Intercept section creation pseudos.
(md_pcrel_from): Replace abort with an error message.
* config/obj-elf.c (obj_elf_section_name): Export this function.
* config/obj-elf.h (obj_elf_section_name): Prototype.
* gas/elf/section0.d: Skip this test for the h8300.
* gas/elf/section1.d: Likewise.
* gas/elf/section6.d: Likewise.
* gas/elf/elf.exp: Skip section2 and section5 tests when the
target is the h8300.
* ld-scrips/sort.exp: Skip these tests when the target is the
h8300.
gas/
* config/tc-arm.c (do_neon_logic): Accept imm value
in the third operand too.
(operand_parse_code): OP_RNDQ_IMVNb renamed to
OP_RNDQ_Ibig.
(parse_operands): OP_NILO case removed, applied renaming.
(insns): Neon shape changed for some logic instructions.
gas/testsuite/
* gas/arm/neon-logic.d: New test case.
* gas/arm/neon-logic.s: New file.
gas/
* config/tc-arm.c (do_neon_ldx_stx): Added
validation for vector load/store insns.
gas/testsuite/
* gas/arm/neon-addressing-bad.d: New test case.
* gas/arm/neon-addressing-bad.s: New file.
* gas/arm/neon-addressing-bad.l: New file.
2009-12-21 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Richard Earnshaw <richard.earnshaw@arm.com>
* config/tc-arm.c (encode_thumb2_b_bl_offset): New. Refactored
from md_apply_fix.
(md_apply_fix): Fixup range checks for Thumb2 version
of unconditional calls. Call encode_thumb2_b_bl_offset for
unconditional branches / function calls.
* config/tc-mips.c (s_mips_ent): Also set BSF_FUNCTION for
".aent".
gas/testsuite/
* gas/mips/aent.d: New test.
* gas/mips/aent.s: Source for the new test.
* gas/mips/mips.exp: Run it.
* config/tc-arm.c (do_ldstv4): Do not allow r15 as the destination
register.
(do_mrs): Likewise.
(do_mul): Likewise.
* arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
unique register numbers. Extend support for %<>R format to
thumb32 and coprocessor instructions.
* gas/arm/unpredictable.s: Add more unpredictable instructions.
* gas/arm/unpredictable.d: Add expected disassemblies.
* config/tc-i386.c (arch_entry): Add len and skip.
(cpu_arch): Use STRING_COMMA_LEN.
(MESSAGE_TEMPLATE): New.
(show_arch): Likewise.
(md_show_usage): Use show_arch.
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* config/tc-i386.c (build_modrm_byte): Do not swap REG and
NDS operands for FMA4.
gas/testsuite/
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* gas/i386/fma4.d: Updated patterns.
* gas/i386/x86-64-fma4.d: Same.
opcodes/
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* i386-dis.c (OP_VEX_FMA): Removed.
(VexFMA): Removed.
(Vex128FMA): Removed.
(prefix_table): First source operand of FMA4 insns is decoded
with Vex not with VexFMA.
(OP_EX_VexW): Second source operand is decoded with get_vex_imm8
when vex.w is set. Third source operand is decoded with
get_vex_imm8 when vex.w is cleared.
(OP_VEX_FMA): Removed.
* config/tc-mep.c (md_pseudo_table): Remove dwarf2 pseudo
as they are already defined in obj-elf.c
* config/tc-m32c.c (md_pseudo_table): Ditto.
* config/tc-spu.c (md_pseudo_table): Ditto.
* config/tc-avr.c (md_pseudo_table): Ditto.
'defl' in cases where the space between the keyword and the
expression has been scrubbed away.
Do not check whether a symbol is redefined with 'equ' here;
the function equals takes an argument indicating whether
redefinitions are allowed.
Only call LISTING_NEWLINE if needed, and then after the call to
bump_line_counters.
2009-10-07 Vincent Riviere <vincent.riviere@freesbee.fr>
PR gas/3041
* config/tc-m68k.c (tc_gen_reloc): Fix addend for relocations
located in data section an referencing a weak symbol.
gas/testsuite:
2009-10-07 Vincent Riviere <vincent.riviere@freesbee.fr>
PR gas/3041
* gas/m68k/all.exp: Added "p3041data".
* gas/m68k/p3041.d, gas/m68k/p3041.s: Added tests of weak references
from text section to all possible sections.
* gas/m68k/p3041data.d, gas/m68k/p3041data.s: New test. Check weak
references from data section.
* config/tc-ia64.c (parse_operand): Use expression rather than
expression_and_evalute.
(parse_operand_and_eval): New function. Replace all uses of
parse_operand outside of parse_operands with this function.
(parse_operans_maybe_eval): New function. Replace uses of
parse_operand in parse_operands, except for the dummy, with
this function.
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10637
* config/tc-i386-intel.c (intel_state): Add has_offset.
(i386_intel_simplify): Set intel_state.has_offset to 1 for
O_offset.
(i386_intel_operand): Turn on intel_state.is_mem if
intel_state.has_offset is 0 and the last char is ']'.
gas/testsuite/
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10637
* gas/i386/disp.s: Add tests for Intel syntax.
* gas/i386/x86-64-disp.s: Likewise.
* gas/i386/disp.d: Updated.
* gas/i386/intelok.d: Likewise.
* gas/i386/x86-64-disp.d: Likewise.
* gas/i386/disp-intel.d: New.
* gas/i386/x86-64-disp-intel.d: Likewise.
* gas/i386/i386.exp: Run disp-intel and x86-64-disp-intel.
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10636
* config/tc-i386.c (optimize_disp): Set disp32 for 64bit only
if there is an ADDR_PREFIX.
(i386_finalize_displacement): Repor error if signed 32bit
displacement is out of range.
gas/testsuite/
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10636
* gas/i386/disp.d: New.
* gas/i386/disp.s: Likewise.
* gas/i386/x86-64-disp.d: Likewise.
* gas/i386/x86-64-disp.s: Likewise.
* gas/i386/i386.exp: Run disp and x86-64-disp.
* gas/i386/x86-64-addr32.s: Add high 32bit displacement tests.
* gas/i386/x86-64-addr32.d: Updated.
* gas/i386/x86-64-addr32-intel.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/x86-64-prescott.d: Likewise.
* gas/i386/x86-64-inval.s: Add invalid displacement tests.
* gas/i386/x86-64-prescott.s: Replace 0x90909090 displacement
with 0x909090.
* config/tc-mips.c (MIPS_JALR_HINT_P): Take an expr argument.
Require the target to be a bare symbol on targets with
in-place addends.
(macro_build_jalr): Update accordingly.
(mips_fix_adjustable): Don't reduce R_MIPS_JALRs on targets
with in-place addends.
gas/testsuite/
* gas/mips/jalr2.s, gas/mips/jalr2.d: New test.
* gas/mips/jal-svr4pic.d: Don't expect R_MIPS_JALRs to be reduced.
* gas/mips/jal-xgot.d: Likewise.
* gas/mips/mips-abi32-pic2.d: Likewise.
* gas/mips/mips.exp: Run it.
* config/tc-mmix.c (md_assemble) <case mmix_operands_xyz_opt>:
Allow register operands for SWYM as for TRIP and TRAP. Correct
operand handling and error checking. Never emit
BFD_RELOC_MMIX_REG_OR_BYTE for operands to these insns.
* config/tc-d10v.c: Include dwarf2dbg.h.
(write_long, write_1_short, write_2_short): Call dwarf2_emit_insn.
(d10v_frob_label): New function.
* config/tc-d10v.h (d10v_frob_label): Declare.
(tc_frob_label): Define as d10v_frob_label.
gas/testsuite/
* gas/lns/lns-common-1.s: Use two nops between each .loc.
* gas/lns/lns.exp: Don't exclude d10v.
* config/obj-coff.c (weak_uniquify): Use an_external_name when TE_PE.
* symbols.c (an_external_name): Define when TE_PE.
(S_SET_EXTERNAL): Assign an_external_name when TE_PE.
* tc.h (an_external_name): Declare when TE_PE.
2009-09-07 Tristan Gingold <gingold@adacore.com>
* bfd.m4 (BFD_HAVE_TIME_TYPE_MEMBER,
BFD_HAVE_SYS_STAT_TYPE_MEMBER): Moved to gas/acinclude.m4
* configure.in: Move tests for tm_gmtoff, st_mtim.tv_sec and
st_mtim.tv_nsec to gas/configure.in
(bfd_elf64_ia64_vms_vec): Remove vmsutil.lo
* configure: Regenerate.
* config.in: Regenerate.
* vmsutil.c: Moved to gas/config/te-vms.c
* vmsutil.h: Removed.
* Makefile.am (BFD32_BACKENDS_CFILES): Remove vmsutil.c
(BFD32_BACKENDS): Remove vmsutil.lo
* Makefile.in: Regenerate.
gas/:
2009-09-07 Tristan Gingold <gingold@adacore.com>
* Makefile.am (TARG_ENV_CFILES): New variable. Set to te-vms.c
(POTFILES): Add $(TARG_ENV_CFILES) in definition.
(EXTRA_as_new_SOURCES): Ditto.
* Makefile: Regenerate.
* acinclude.m4 (BFD_HAVE_TIME_TYPE_MEMBER,
BFD_HAVE_SYS_STAT_TYPE_MEMBER): New macro created from bfd/bfd.m4.
* configure.in: Add Tests for tm_gmtoff, st_mtim.tv_sec and
st_mtim.tv_nsec (from bfd/configure.in). Check for time.h and
sys/stat.h headers.
Add te-vms.o in extra_objects if te_file is vms.
* configure: Regenerate.
* config.in: Regenerate.
* config/te-vms.c: New file, from bfd/vmsutil.c
(vms_dwarf2_file_time_name, vms_dwarf2_file_size_name)
(vms_dwarf2_file_name): New functions.
(vms_file_stats_name): Make it static, add a dirname parameter to
locally create the full pathname.
* config/te-vms.h: Add a copyright header.
Declare the above functions.
(DWARF2_FILE_TIME_NAME, DWARF2_FILE_SIZE_NAME, DWARF2_FILE_NAME): Use
the above functions in the definition.
* makefile.vms (OBJS): Add te-vms.obj.
(te-vms.obj): Create a specific target.
* configure.com: Create targ-env.h using a per target value.
Compile te-vms.c for ia64.
(record_thumb_to_arm_glue, bfd_arm_process_before_allocation):
Change member name class to symbol_class.
* bfd/coff-i960.c (coff_i960_relocate_section) Rename variable
class to class_val. Change member name class to symbol_class.
* bfd/coff-rs6000.c (_bfd_xcoff_swap_aux_in)
(_bfd_xcoff_swap_aux_out): Rename arguments class to in_class.
* bfd/coff-stgo32.c (adjust_aux_in_post)
(adjust_aux_out_pre, adjust_aux_out_post): Rename arguments class
to in_class.
* bfd/coff64-rs6000.c (_bfd_xcoff64_swap_aux_in)
(_bfd_xcoff64_swap_aux_out): Rename arguments class to in_class.
* bfd/coffcode.h (coff_pointerize_aux_hook): Rename variable class
to n_sclass.
* bfd/coffgen.c (coff_write_symbol, coff_pointerize_aux): Rename
variables named class to n_sclass. (coff_write_symbols): Rename
variable class to sym_class. (bfd_coff_set_symbol_class): Rename
argument class to symbol_class.
* bfd/cofflink.c (_bfd_coff_link_hash_newfunc)
(coff_link_add_symbols, _bfd_coff_link_input_bfd)
(_bfd_coff_write_global_sym, _bfd_coff_generic_relocate_section):
Update code to use renamed members.
* bfd/coffswap.h (coff_swap_aux_in, coff_swap_aux_out): Rename
argument class to in_class.
* bfd/libcoff-in.h (struct coff_link_hash_entry, struct
coff_debug_merge_type) Renamed members class to symbol_class and
type_class.
* bfd/libcoff.h Regenerated.
* bfd/peXXigen.c: (_bfd_XXi_swap_aux_in, _bfd_XXi_swap_aux_out):
Rename argument class to in_class.
* bfd/pef.c (bfd_pef_parse_imported_symbol): Update code to use
renamed members.
* bfd/pef.h (struct bfd_pef_imported_symbol): Changed name of
member class to symbol_class.
* binutils/ieee.c (ieee_read_cxx_misc, ieee_read_cxx_class)
(ieee_read_reference): Rename variables named class to cxxclass.
* gas/config/tc-arc.c (struct syntax_classes): Rename member class
to s_class. (arc_extinst): Rename variable class to
s_class. Update code to use renamed members.
* gas/config/tc-mips.c (insn_uses_reg): Rename argument class to
regclass.
* gas/config/tc-ppc.c (ppc_csect, ppc_change_csect, ppc_function)
(ppc_tc, ppc_is_toc_sym, ppc_symbol_new_hook, ppc_frob_label)
(ppc_fix_adjustable, md_apply_fix): Update code to use renamed
members.
* gas/config/tc-ppc.h (struct ppc_tc_sy): Change name of member
from class to symbol_class. (OBJ_COPY_SYMBOL_ATTRIBUTES): Update
code to use renamed members.
* gas/config/tc-score.c (s3_adjust_paritybit): Rename argument
class to i_class.
* gas/config/tc-score7.c (s7_adjust_paritybit): Rename argument
class to i_class.
* gprof/corefile.c (core_create_function_syms): Rename variable
class to cxxclass.
* include/coff/ti.h (GET_LNSZ_SIZE, PUT_LNSZ_SIZE): Updated name
of class variable to in_class to match changes in function that
use this macro.
* include/opcode/ia64.h (struct ia64_operand): Renamed member
class to op_class
* ld/emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols)
(gld${EMULATION_NAME}_try_needed): Rename variable class to
link_class
* opcodes/ia64-dis.c (print_insn_ia64): Update code to use renamed
member.
* opcodes/m88k-dis.c (m88kdis): Rename variable class to in_class.
* opcodes/tic80-opc.c (tic80_symbol_to_value)
(tic80_value_to_symbol): Rename argument class to symbol_class.
* config/bfin-parse.y (asm_1): Implement HLT instruction.
Fix comments for DBGA, DBGAH and DBGAL.
* config/tc-bfin.c (bfin_gen_pseudodbg_assert): Change according
to the new encoding of DBGA, DBGAH, and DBGAL.
include/
* opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp.
(PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define.
(PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask,
PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask):
Adjust accordingly.
(init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and
PseudoDbg_Assert_grp_mask.
opcodes/
* bfin-dis.c (decode_pseudodbg_assert_0): Change according
to the new encoding of DBGA, DBGAH, and DBGAL.
(_print_insn_bfin): Likewise.
(F_REG_HIGH): Redefine.
(F_REG_NONE): New macro.
(F_REG_LOW): New macro.
(REG_CLASS): Enclose macro argument in parentheses when used.
(REG_EVEN): Likewise.
(IS_H): Use flags.
(IS_HCOMPL): Use flags.
* config/bfin-lex.l (SP.L, SP.H, FP.L, FP.H): Set flags.
(parse_reg): Set flags.
(parse_halfreg): Set flags.
* config/gas/bfin-parse.y (asm_1): Clean up and unify error handling
for load and store insns.
(neg_value): Delete function.
testsuite/
From Bernd Schmidt <bernd.schmidt@analog.com>
* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
Check error messages for invalid load/store insns.
* config/tc-bfin.c (bfin_fix_adjustable): Partially revert the
2007-08-23 change; BFD_RELOC_BFIN_GOT is not adjustable.
2007-08-23 Jie Zhang <jie.zhang@analog.com>
* config/tc-bfin.c (bfin_fix_adjustable): Adjust
BFD_RELOC_BFIN_GOT, BFD_RELOC_BFIN_GOT17M4 and
BFD_RELOC_BFIN_FUNCDESC_GOT17M4.
(read_a_source_file): Pass the beginning of the symbol through
the new argument of TC_START_LABEL.
* config/tc-arm.h (TC_START_LABEL): Add a new argument.
* config/tc-bfin.c (bfin_start_label): Only search '(' and '['
from the beginning of the symbol.
* config/tc-bfin.h (TC_START_LABEL): Add the new argument.
* config/tc-d30v.h (TC_START_LABEL): Likewise.
* config/tc-fr30.h (TC_START_LABEL): Likewise.
* config/tc-m32c.h (TC_START_LABEL): Likewise.
* config/tc-m32r.h (TC_START_LABEL): Likewise.
* config/tc-mep.h (TC_START_LABEL): Likewise.
testsuite/
* gas/bfin/stack2.s: Add pop multiple instruction with a label
on the same line.
* gas/bfin/stack2.d: Adjust accordingly.
keyword in c++.
* bfd/aoutx.h (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol.
* bfd/coffgen.c (coff_make_empty_symbol)
(coff_bfd_make_debug_symbol): Rename variable new to new_symbol.
* bfd/cpu-ia64-opc.c (ext_reg, ins_imms_scaled): Rename variable
new to new_insn.
* bfd/doc/chew.c (newentry, add_intrinsic): Rename variable new to
new_d.
* bfd/ecoff.c (_bfd_ecoff_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/elf32-m68k.c (elf_m68k_get_got_entry_type): Rename argument
new to new_reloc.
* bfd/hash.c (bfd_hash_lookup): Rename variable new to new_string.
* bfd/ieee.c (ieee_make_empty_symbol): Rename variable new to
new_symbol.
* bfd/linker.c (bfd_new_link_order): Rename variable new to
new_lo.
* bfd/mach-o.c (bfd_mach_o_sizeof_headers): Rename variable new to
symbol.
* bfd/oasys.c (oasys_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/pdp11.c (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol_type.
* bfd/plugin.c (bfd_plugin_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/rs6000-core.c (CoreHdr, VmInfo): Rename union member new to
new_dump.
(read_hdr, rs6000coff_core_p)
(rs6000coff_core_file_matches_executable_p)
(rs6000coff_core_file_failing_command)
(rs6000coff_core_file_failing_signal): Updated function to use new
union member name.
* bfd/som.c (som_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/syms.c (_bfd_generic_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/tekhex.c (first_phase, tekhex_make_empty_symbol): Rename
variable new to new_symbol.
* binutils/nlmconv.c (main): Rename variable new to new_name.
* gas/config/tc-arm.c (insert_reg_alias): Rename variable new to
new_reg.
* gas/config/tc-dlx.c (parse_operand): Rename variable new to
new_pos.
* gas/config/tc-ia64.c (ia64_gen_real_reloc_type): Rename variable
new to newr.
* gas/config/tc-mcore.c (parse_exp, parse_imm): Rename variable
new to new_pointer.
* gas/config/tc-microblaze.c (parse_exp, parse_imm, check_got):
Change name from new to new_pointer.
* gas/config/tc-or32.c (parse_operand): Rename variable new to
new_pointer.
* gas/config/tc-pdp11.c (md_assemble): Rename variable new to
new_pointer.
* gas/config/tc-pj.c (alias): Change argument new to new_name.
* gas/config/tc-score.c (s3_build_score_ops_hsh): Rename variable
new to new_opcode. (s3_build_dependency_insn_hsh) Rename variable
new to new_i2n. (s3_convert): Rename variables old and new to
r_old and r_new.
* gas/config/tc-score7.c (s7_build_score_ops_hsh): Rename variable
new to new_opcode. (s7_build_dependency_insn_hsh): Rename variable
new to new_i2d. (s7_b32_relax_to_b16, s7_convert_frag): Rename
variables old and new to r_old and r_new.
* gas/config/tc-sh.c (parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-sh64.c (shmedia_parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-tic4x.c (tic4x_operand_parse): Rename variable new
to new_pointer.
* gas/config/tc-z8k.c (parse_exp): Rename variable new to
new_pointer.
* gas/listing.c (listing_newline): Rename variable new to new_i.
* ld/ldexp.c (exp_intop, exp_bigintop, exp_relop, exp_binop)
(exp_trinop, exp_unop, exp_nameop, exp_assop): Rename variable new
to new_e.
* ld/ldfile.c (ldfile_add_library_path): Rename variable new to
new_dirs. (ldfile_add_arch): Rename variable new to new_arch.
* ld/ldlang.c (new_statement, lang_final, lang_add_wild)
(lang_target, lang_add_fill, lang_add_data, lang_add_assignment)
(lang_add_insert): Rename variable new to new_stmt. (new_afile):
Added missing cast. (lang_memory_region_lookup): Rename variable
new to new_region. (init_os): Rename variable new to
new_userdata. (lang_add_section): Rename variable new to
new_section. (ldlang_add_undef): Rename variable new to
new_undef. (realsymbol): Rename variable new to new_name.
* opcodes/z8kgen.c (internal, gas): Rename variable new to new_op.
Updated sources to avoid using the identifier name "template",
which is a keyword in c++.
* bfd/elf32-arm.c (struct stub_def): Rename member template to
template_sequence. (arm_build_one_stub,
find_stub_size_and_template, arm_size_one_stub, arm_map_one_stub):
Rename variable template to template_sequence.
* bfd/elfxx-ia64.c (elfNN_ia64_relax_br, elfNN_ia64_relax_brl):
Rename variable template to template_val.
* gas/config/tc-arm.c (struct asm_cond, struct asm_psr, struct
asm_barrier_opt): Change member template to
template_name. (md_begin): Update code to reflect new member
names.
* gas/config/tc-i386.c (struct templates, struct _i386_insn)
(match_template, cpu_flags_match, match_reg_size, match_mem_size)
(operand_size_match, md_begin, i386_print_statistics, pi)
(build_vex_prefix, md_assemble, parse_insn, optimize_imm)
(optimize_disp): Updated code to use new names. (parse_insn):
Added casts.
* gas/config/tc-ia64.c (dot_template, emit_one_bundle): Updated
code to use new names.
* gas/config/tc-score.c (struct s3_asm_opcode): Renamed member
template to template_name. (s3_parse_16_32_inst, s3_parse_48_inst,
s3_do_macro_ldst_label, s3_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-score7.c (struct s7_asm_opcode): Renamed member
template to template_name. (s7_parse_16_32_inst,
s7_do_macro_ldst_label, s7_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-tic30.c (md_begin, struct tic30_insn)
(md_assemble): Update code to use new names.
* gas/config/tc-tic54x.c (struct _tic54x_insn, md_begin)
(optimize_insn, tic54x_parse_insn, next_line_shows_parallel):
Update code to use new names.
* include/opcode/tic30.h (template): Rename type template to
insn_template. Updated code to use new name.
* include/opcode/tic54x.h (template): Rename type template to
insn_template.
* opcodes/cris-dis.c (bytes_to_skip): Update code to use new name.
* opcodes/i386-dis.c (putop): Update code to use new name.
* opcodes/i386-gen.c (process_i386_opcodes): Update code to use
new name.
* opcodes/i386-opc.h (struct template): Rename struct template to
insn_template. Update code accordingly.
* opcodes/i386-tbl.h (i386_optab): Update type to use new name.
* opcodes/ia64-dis.c (print_insn_ia64): Rename variable template
to template_val.
* opcodes/tic30-dis.c (struct instruction, get_tic30_instruction):
Update code to use new name.
* opcodes/tic54x-dis.c (has_lkaddr, get_insn_size)
(print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
Update code to use new name.
* opcodes/tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
Update type to new name.
* config/tc-xtensa.c (config_max_slots): New global variable.
(md_begin): Set config_max_slots.
(total_frag_text_expansion): Use config_max_slots instead of
MAX_SLOTS.
(xg_init_vinsn): Likewise.
(xg_clear_vinsn): Likewise.
(xg_free_vinsn): Likewise.
* config/tc-xtensa.h (xtensa_frag_data): Rename unused field fr_prev
to no_transform_end.
* config/tc-xtensa.c (xtensa_mark_difference_of_two_symbols): Set
and use no_transform_end.
* config/tc-xtensa.c (xtensa_create_xproperty_segments): Use
sizeof instead of hard-coded value.
(add_xt_block_frags): Remove unused local variable.
(frag_flags_to_number): Change return type to flagword. Remove
unused local variable.
* config/tc-arm.c (marked_pr_dependency, mapstate): Delete global
variables.
(mapping_state): Use the section's mapstate.
(mapping_state_2): Likewise. Skip special sections.
(s_arm_unwind_fnend): Use the section's marked_pr_dependency.
(arm_elf_change_section): Do not set deleted globals.
* config/tc-arm.h (struct arm_segment_info_type): Document
marked_pr_dependency.
gas/testsuite/
* gas/arm/mapping2.s: Test code after .ident.
* config/tc-mips.c (MIPS_JALR_HINT_P): New define. For IRIX, it is
true for new abi. For non-IRIX targets, it is always true.
(macro_build_jalr): If MIPS_JALR_HINT_P, emit BFD_RELOC_MIPS_JALR.
* binutils-all/arm/thumb2-cond.s: Use instructions instead of
.short.
gas/
* config/obj-elf.c (obj_elf_ident): Notify section change to the hook.
* config/tc-arm.c (make_mapping_symbol): New function, from
mapping_state. Save mapping symbols in the frag.
(insert_data_mapping_symbol): New.
(mapping_state): Use make_mapping_symbol, improve state transitions.
(mapping_state_2): New. Provide dummy definition.
(opcode_select): Do not call mapping_state.
(s_bss): Call md_elf_section_change_hook instead of mapping_state.
(output_inst): Update use of tc_frag_data.
(new_automatic_it_block): Call mapping_state before emitting the
IT instruction.
(md_assemble): Move mapping_state to just before outputting the
new instruction.
(arm_handle_align): Update use of tc_frag_data.
Call insert_data_mapping_symbol.
(arm_init_frag): Update use of tc_frag_data. Call
mapping_state_2.
(arm_elf_change_section): Always update the mapping symbol FSM state.
(check_mapping_symbols): New function.
(arm_adjust_symtab): Use check_mapping_symbols.
* config/tc-arm.h (struct arm_frag_type): New.
(TC_FRAG_TYPE): Change to struct arm_frag_type.
(TC_FRAG_INIT): Pass max_chars.
(arm_init_frag): Update prototype.
gas/testsuite/
* gas/arm/mapdir.d, gas/arm/mapdir.s: New files.
* gas/arm/mapping.d: Adapted to new symbols generation.
* gas/arm/mapping2.d: New test case.
* gas/arm/mapping2.s: New file.
* gas/arm/mapping3.d: New test case.
* gas/arm/mapping3.s: New file.
* gas/arm/mapping4.d: New test case.
* gas/arm/mapping4.s: New file.
* gas/arm/mapshort-eabi.d: Adapted to new symbols generation.
* gas/elf/section2.e-armeabi: Adapted to new symbols generation.
2009-07-27 Jan Beulich <jbeulich@novell.com>
* obj-elf.c (elf_file_symbol): Replace symbol name set up by
symbol_new() with the passed in, unmodified one.
gas/testsuite/
2009-07-27 Jan Beulich <jbeulich@novell.com>
* gas/elf/file.[ds]: New.
* gas/elf/elf.exp: Run new test.
* config/tc-cr16.c (md_apply_fix): Put the addend value alone in to
object file without symbol values.
(tc_gen_reloc): For local symbols resolved or its absolute symbol,
then set the relocation type as NULL.
gnu_unique_object.
* doc/as.texinfo: Document new feature of .type directive.
* NEWS: Mention support for gnu_unique_object symbol type.
* common.h (STB_GNU_UNIQUE): Define.
* NEWS: Mention the linker's support for symbols with a binding of
STB_GNU_UNIQUE.
* gas/elf/type.s: Add unique global symbol definition.
* gas/elf/type.e: Add expected readelf output for global unique
symbol.
* elfcpp.h (enum STB): Add STB_GNU_UNIQUE.
* readelf.c (get_symbol_binding): For Linux targeted files return
UNIQUE for symbols with the STB_GNU_UNIQUE binding.
* doc/binutils.texi: Document the meaning of the 'u' symbol
binding in the output of nm and objdump --syms.
* elf-bfd.h (struct elf_link_hash_entry): Add unique_global field.
* elf.c (swap_out_syms): Set binding to STB_GNU_UNIQUE for symbols
with the BSF_GNU_UNIQUE flag bit set.
* elfcode.h (elf_slurp_symbol_table): Set the BSF_GNU_UNIQUE flag
for symbols with STB_GNU_UNIQUE binding.
* elflink.c (_bfd_elf_merge_symbol): Set unique_global for symbols
with the STB_GNU_UNIQUE binding.
(elf_link_add_object_symbols): Set the BSF_GNU_UNIQUE flag for
symbols with STB_GNU_UNIQUE binding. Set STB_GNU_UNIQUE for
symbols with the unique_global field set.
(elf_link_output_extsym): Set unique_global field for symbols with
the STB_GNU_UNIQUE binding.
* syms.c (struct bfd_symbol): Define BSF_GNU_UNIQUE flag bit.
(bfd_print_symbol_vandf): Print a 'u' character for BSF_GNU_UNIQUE
symbols.
(bfd_decode_symclass): Return a 'u' character for BSF_GNU_UNIQUE
symbols.
* bfd-in2.h: Regenerate.
2009-07-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10420
* config/tc-i386.c (i386_align_code): Tune for 32bit nops in
64bit.
(i386_target_format): Set cpu_arch_isa_flags.bitfield.cpulm
for 64bit.
gas/testsuite/
2009-07-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10420
* gas/i386/i386.exp: Run x86-64-nops-1-pentium.
* gas/i386/x86-64-nops-1-pentium.d: New.
* config/tc-i386.c (md_assemble): Update operand types.
(update_imm): Updated.
(finalize_imm): Update the first 2 immediate operands only
for instructions with 2 operands or more.
(MAX_MEM_FOR_RS_ALIGN_CODE): Define in terms of
MAX_MEM_ALIGNMENT_BYTES.
* config/tc-arm.c (arm_frag_align_code): Replace hard coded
constant with MAX_MEM_FOR_RS_ALIGN_CODE.
* gas/arm/align64.s: New test case.
* gas/arm/align64.d: Expected disassembly.
* config/tc-arm.c (md_assemble): Added validation.
gas/testsuite
* gas/arm/thumb-w-bad.d: New test case.
* gas/arm/thumb-w-bad.l: New file.
* gas/arm/thumb-w-bad.s: New file.
* gas/arm/thumb-w-good.d: New test case.
* gas/arm/thumb-w-good.s: New file.
(set_it_insn_type_nonvoid): New macro.
(emit_thumb32_expr): New function.
(thumb_insn_size): New function.
(emit_insn): New function.
(s_arm_elf_inst): New function.
(md_pseudo_table): New pseudo-opcode entries added.
* doc/c-arm.texi: New directive added.
* gas/arm/inst-po.d: New testcase.
* gas/arm/inst-po.s: New file.
* gas/arm/inst-po-2.d: New testcase.
* gas/arm/inst-po-2.s: New file.
* gas/arm/inst-po-2.l: New file.
* gas/arm/inst-po-3.d: New testcase.
* gas/arm/inst-po-3.s: New file.
* gas/arm/inst-po-be.d: New testcase.
32 bits for relaxable branches so that we can relax them later.
(md_estimate_size_before_relax): Assume IVC2 branches will be relaxed.
(mep_relax_frag): New.
(md_convert_frag): Relax IVC2 branches in-place.
* config/tc-mep.h ((mep_relax_frag): New.
(implicit_it_mode): New global.
(it_instruction_type): New enum.
(arm_parse_it_mode): New function.
(arm_long_opts): New option added.
(arm_it): New field.
(it_state): New enum.
(now_it): New macro.
(check_it_blocks_finished): New function.
(insns[]): Use the IT Thumb opcodes for ARM too.
(arm_cleanup): Call check_it_blocks_finished.
(now_it_compatible): New function.
(conditional_insn): New function.
(set_it_insn_type): New macro.
(set_it_insn_type_last): New macro.
(do_it): Call automatic IT machinery functions.
(do_t_add_sub): Likewise
(do_t_arit3): Likewise.
(do_t_arit3c): Likewise.
(do_t_blx): Likewise.
(do_t_branch): Likewise.
(do_t_bkpt): Likewise.
(do_t_branch23): Likewise.
(do_t_bx): Likewise.
(do_t_bxj): Likewise.
(do_t_cps): Likewise.
(do_t_cpsi): Likewise.
(do_t_cbz): Likewise.
(do_t_it): Likewise.
(encode_thumb2_ldmstm): Likewise.
(do_t_ldst): Likewise.
(do_t_mov_cmp): Likewise.
(do_t_mvn_tst): Likewise.
(do_t_mul): Likewise.
(do_t_neg): Likewise.
(do_t_setend): Likewise.
(do_t_shift): Likewise.
(do_t_tb): Likewise.
(output_it_inst): New function.
(new_automatic_it_block): New function.
(close_automatic_it_block): New function.
(now_it_add_mask): New function.
(it_fsm_pre_encode): New function.
(handle_it_state): New function.
(it_fsm_post_encode): New function.
(force_automatic_it_block_close): New function.
(in_it_block): New function.
(md_assemble): Call automatic IT block machinery functions.
(arm_frob_label): Likewise.
(arm_opts): New element.
* config/tc-arm.h (it_state): New enum.
(current_it): New struct.
(arm_segment_info_type): New member added.
* doc/c-arm.texi: New option -mimplicit-it documented.
* gas/arm/arm-it-auto.d: New test.
* gas/arm/arm-it-auto.s: New file.
* gas/arm/arm-it-auto-2.d: New test case.
* gas/arm/arm-it-auto-2.s: New file.
* gas/arm/arm-it-auto-3.d: New test case.
* gas/arm/arm-it-auto-3.s: New file.
* gas/arm/arm-it-bad.d: New test case.
* gas/arm/arm-it-bad.l: New file.
* gas/arm/arm-it-bad.s: New file.
* gas/arm/arm-it-bad-2.d: New test case.
* gas/arm/arm-it-bad-2.l: New file.
* gas/arm/arm-it-bad-2.s: New file.
* gas/arm/arm-it-bad-3.d: New test case.
* gas/arm/arm-it-bad-3.l: New file.
* gas/arm/arm-it-bad-3.s: New file.
* gas/arm/thumb2_it_auto.d: New test.
* gas/arm/thumb2_it_bad.l: Error message updated.
* gas/arm/thumb2_it_bad_auto.d: New test.
* gas/arm/thumb2_it.d: Comment added.
* gas/arm/thumb2_it_bad.d: Comment added.
* gas/tc-arm.c (do_t_ssat): Move common code from here...
(do_t_usat): ... and here to...
(do_t_ssat_usat): New function: ... here. Add code to check that
the shift value, if present, is in range.
* gas/arm/thumb2_bad_reg.s: Add tests for SSAT and USAT with an
out of range shift.
* gas/arm/thumb2_bad_reg.l: Update expected error messages.
* elf32-vax.c (elf_vax_check_relocs): Handle the visibility
attribute.
(elf_vax_relocate_section): Likewise.
gas/
* config/tc-vax.c (md_estimate_size_before_relax): Accept
indirect symbol references in the PIC mode and emit a
PC-relative relocation instead of a GOT/PLT one. Likewise
for symbols known to be hidden at this point.
* arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
instruction.
* gas/arm/thumb32.d: Fix expected binary value of SEV.W instruction.
* config/tc-arm.c (T16_32_TAB): Fix binary value of SEV.W
instruction.
* config/tc-i386.c (md_estimate_size_before_relax): Don't relax
branches to weak symbols.
(md_apply_fix): Don't convert fixes against weak symbols to
section-relative offsets, but save addend for later reloc emission.
(tc_gen_reloc): When emitting reloc against weak symbol, adjust
addend to pre-compensate for bfd_install_relocation.
* config/tc-mips.c (nops_for_vr4130): Don't check noreorder_p.
(nops_for_insn): Likewise.
gas/testsuite/
* gas/mips/vr4130.s, gas/mips/vr4130.d: Expect part A to have nops.
H.J. Lu <hongjiu.lu@intel.com>
* config/obj-coff.h: Include "coff/x86_64.h" for x86 pe-coff.
(TARGET_FORMAT): Removed for x86 pe-coff.
(COFF_TARGET_FORMAT): Likewise.
* config/tc-i386.c (md_longopts): Allow --64 for x86 pe-coff.
(md_parse_option): Likewise.
(md_show_usage): Show option --32/--64 for x86 pe-coff.
(i386_target_format): Use also for x86 pe-coff.
* config/tc-i386.h (TARGET_FORMAT): Defined as i386_target_format
for x86 pe-coff.
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* cofflink.c (process_embedded_commands): Ignore "-aligncomm".
==> gas/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* NEWS: Mention new feature.
* config/obj-coff.c (obj_coff_common_parse): New function.
(obj_coff_comm): Likewise.
(coff_pseudo_table): Override default ".comm" definition on PE.
* doc/as.texinfo: Document new feature.
==> gas/testsuite/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* gas/pe/: New directory for PE format-specific tests.
* gas/pe/aligncomm-a.d: New test pattern file.
* gas/pe/aligncomm-a.s: New test source file.
* gas/pe/aligncomm-b.d: New test pattern file.
* gas/pe/aligncomm-b.s: New test source file.
* gas/pe/aligncomm-c.d: New test pattern file.
* gas/pe/aligncomm-c.s: New test source file.
* gas/pe/aligncomm-d.d: New test pattern file.
* gas/pe/aligncomm-d.s: New test source file.
* gas/pe/pe.exp: New test control script.
* lib/gas-defs.exp (is_pecoff_format): New function.
==> ld/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* NEWS: Mention new feature.
* deffile.h (def_file_aligncomm): Add new struct definition.
(def_file): Add new def_file_aligncomm member.
* deffilep.y (%token): Add new ALIGNCOMM token.
(command): Add production rule for ALIGNCOMM.
(def_file_free): Free any chained def_file_aligncomm structs.
(diropts[]): Add entry for '-aligncomm' .drectve command.
(def_aligncomm): New grammar function.
* ld.texinfo: Document new feature.
* pe-dll.c (process_def_file): Rename from this ...
(process_def_file_and_drectve): ... to this, updating all callers,
and process any aligncomms chained to the def file after scanning
all .drectve sections.
(generate_edata): Updated to match.
(pe_dll_build_sections): Likewise.
==> ld/testsuite/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* ld-pe/aligncomm-1.c: New test source file.
* ld-pe/aligncomm-2.c: Likewise.
* ld-pe/aligncomm-3.c: Likewise.
* ld-pe/aligncomm-4.c: Likewise.
* ld-pe/aligncomm.d: New test pattern file.
* ld-pe/direct.exp: Deleted, and content moved into ...
* ld-pe/pe-run.exp: ... New common file for all PE run tests.
* ld-pe/vers-script.exp: Deleted, and content merged into ...
* ld-pe/pe-compile.exp: ... New common file for PE tests needing
a compiler, adding aligned common tests.
* ld-pe/pe.exp: Update header comment.
* config/obj-coff.c (obj_coff_section): Add 'y' as
specifier for SEC_COFF_NOREAD section flag.
* doc/as.texinfo: Add documentation about .section flag 'y'.
* config/tc-armeabi.h (FPU_DEFAULT): Likewise.
* config/tc-arm.c (md_begin): If FPU_DEFAULT is set, don't infer
the default FPU from the processor.
testsuite/
* gas/arm/attr-mcpu.d: Add -mfpu=neon.
* gas/arm/mapmisc.d: Correct expected output for .double and
.dcb.d.
* config/tc-arm.c (do_t_blx): Always use BFD_RELOC_THUMB_PCREL_BLX.
(md_pcrel_from_section): Align address for BLX.
(tc_gen_reloc): Change BFD_RELOC_THUMB_PCREL_BLX relocations to
BFD_RELOC_THUMB_PCREL_BRANCH23 for EABI v4+.
2009-04-30 Nick Clifton <nickc@redhat.com>
* common.h (STT_GNU_IFUNC): Define.
elfcpp
2009-04-30 Nick Clifton <nickc@redhat.com>
* (enum STT): Add STT_GNU_IFUNC.
gas
2009-04-30 Nick Clifton <nickc@redhat.com>
* config/obj-elf.c (obj_elf_type): Add support for a
gnu_indirect_function type.
* config/tc-i386.c (tc_i386_fix_adjustable): Do not adjust fixups
against indirect function symbols.
* doc/as.texinfo (.type): Document the support for the
gnu_indirect_function symbol type.
* NEWS: Mention the new feature.
gas/testsuite
2009-04-30 Nick Clifton <nickc@redhat.com>
* gas/elf/elf.exp: Extend type test to include an ifunc symbol.
Provide an alternative test for targets which do not support ifunc
symbols.
(type.s): Add entry for an ifunc symbol.
(type.e): Add ifunc entry to expected symbol dump.
(section2.e-armelf): Add entry for ifunc symbol.
(type-noifunc.s): New file.
(type-noifunc.e): New file.
bfd/
2009-04-30 Nick Clifton <nickc@redhat.com>
* elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs
section pointer.
(struct elf_obj_data): Add has_ifunc_symbols boolean.
* elf.c (swap_out_syms): Convert BSF_GNU_INDIRECT_FUNCTION flags
into a STT_GNU_IFUNC symbol type.
(_bfd_elf_is_function_type): Accept STT_GNU_IFUNC as a function
type.
(_bfd_elf_set_osabi): Set the osasbi field to ELFOSABI_LINUX if
the binary contains ifunc symbols.
* elfcode.h (elf_slurp_symbol_table): Translate the STT_GNU_IFUNC
symbol type into a BSF_GNU_INDIRECT_FUNCTION flag.
* elf32-i386.c (is_indirect_function): New function.
(elf_i386_check_relocs): Create an ifunc output section.
(allocate_dynrelocs): Create dynamic relocs in the ifunc output
section if necessary.
(elf_i386_relocate_section): Emit a reloc against an ifunc symbol
if necessary.
(elf_i386_add_symbol_hook): New function. Set the
has_ifunc_symbols field of the elf_obj_data structure if an ifunc
symbol is encountered.
(elf_backend_post_process_headers): Define.
(elf_backend_add_symbol_hook): Define.
(elf_i386_post_process_headers): Rename to
elf_i388_fbsd_post_process_headers.
* elf64-x86_64.c (IS_X86_64_PCREL_TYPE): New macro.
(is_indirect_function): New function.
(elf64_x86_64_check_relocs): Create an ifunc output section.
(allocate_dynrelocs): Create dynamic relocs in the ifunc output
section if necessary.
(elf64_x86_64_relocate_section): Emit a reloc against an ifunc
symbol if necessary.
(elf_i386_add_symbol_hook): Set the has_ifunc_symbols field of the
elf_obj_data structure if an ifunc symbol is encountered.
(elf_backend_post_process_headers): Define.
* elflink.c (_bfd_elf_adjust_dynamic_symbol): Always create a PLT
if we have ifunc symbols to handle.
(get_ifunc_reloc_section_name): New function. Computes the name
for an ifunc section.
(_bfd_elf_make_ifunc_reloc_section): New function. Creates a
section to hold ifunc relocs.
* syms.c (BSF_GNU_INDIRECT_FUNCTION): Define.
(bfd_print_symbol_vandf): Handle ifunc symbols.
(bfd_decode_symclass): Likewise.
* bfd-in2.h: Regenerate.
binutils
2009-04-30 Nick Clifton <nickc@redhat.com>
* readelf.c (dump_relocations): Display a relocation against an
ifunc symbol as if it were a function invocation.
(get_symbol_type): Handle STT_GNU_IFUNC.
ld
2009-04-30 Nick Clifton <nickc@redhat.com>
* NEWS: Mention support for IFUNC symbols.
ld/testsuite
2009-04-30 Nick Clifton <nickc@redhat.com>
* ld-ifunc: New directory.
* ld-ifunc/ifunc.exp: New file: Run the IFUNC tests.
* ld-ifunc/prog.c: New file.
* ld-ifunc/lib.c: New file.
2009-04-15 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (process_operands): Print operands in
correct order depending on intel_syntax.
gas/testsuite/
2009-04-15 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.e: Adjust expectations.
* config/tc-vax.c (synthetic_votstrs): add "jbbcci" and "jbbssi"
(md_assemble): emit symbol name when used as immediate in PIC mode.
(md_assemble): fix LP64 bug (use sizeof (valueT) instead 4).
gas/
* config/tc-arm.c (md_apply_fix): Check BFD_RELOC_ARM_IMMEDIATE and
BFD_RELOC_ARM_ADRL_IMMEDIATE value is in the correct section.
Check BFD_RELOC_ARM_ADRL_IMMEDIATE has a defined symbol.
gas/testsuites/
* gas/arm/adr-invalid.d: New file.
* gas/arm/adr-invalid.l: New file.
* gas/arm/adr-invalid.s: New file.
* internal.h (C_AIX_WEAKEXT): New macro.
(C_WEAKEXT): Use the GNU definition in the generic part of the file,
and conditionally reset it to C_AIX_WEAKEXT in the XCOFF part of
the file.
(CSECT_SYM_P): New macro.
* xcoff.h (L_WEAK): Define.
(EXTERN_SYM_P): New macro.
bfd/
* coffcode.h (coff_pointerize_aux_hook): Update CSECT_SYM_P to
check whether a symbol has csect information.
(coff_print_aux): Likewise.
* coff-rs6000.c (_bfd_xcoff_swap_aux_in): Handle auxillary csect
information for C_AIX_WEAKEXT too.
(_bfd_xcoff_swap_aux_out): Likewise.
(xcoff_reloc_type_br): Handle defweak symbols too.
* coff64-rs6000.c (_bfd_xcoff64_swap_aux_in): Handle auxillary csect
information for C_AIX_WEAKEXT too.
(_bfd_xcoff64_swap_aux_out): Likewise.
(xcoff64_reloc_type_br): Handle defweak symbols too.
* coffgen.c (coff_print_symbol): Handle auxillary function
information for C_AIX_WEAKEXT too.
* xcofflink.c (_bfd_xcoff_canonicalize_dynamic_symtab): Set BSF_WEAK
instead of BSF_GLOBAL if the L_WEAK flag is set.
(xcoff_dynamic_definition_p): New function.
(xcoff_link_add_dynamic_symbols): Use it to decide whether ldsym
defines h. Don't change h if ldsym isn't the definition. Otherwise,
always take the symbol class from the ldsym. Use weak bfd symbol
types for weak ldsyms.
(xcoff_link_add_symbols): Use CSECT_SYM_P and EXTERN_SYM_P.
Fix the check for whether a definition is from a shared object.
Allow redefinitions of weak symbols.
(xcoff_link_check_ar_symbols): Use EXTERN_SYM_P.
(xcoff_keep_symbol_p): Likewise.
(bfd_xcoff_size_dynamic_sections): Use CSECT_SYM_P.
(xcoff_link_input_bfd): Use CSECT_SYM_P and EXTERN_SYM_P.
Add .loader entries for C_AIX_WEAKEXT as well as C_EXT symbols,
but mark them as L_WEAK.
(xcoff_write_global_symbol): Treat weak symbols as C_AIX_WEAKEXT
instead of C_EXT if C_AIX_WEAKEXT == C_WEAKEXT.
gas/
* config/tc-ppc.c (ppc_frob_symbol): Add csect information for
C_AIX_WEAKEXT too.
ld/testsuite/
* ld-powerpc/aix-glink-2a.s, ld-powerpc/aix-glink-2a.ex,
ld-powerpc/aix-glink-2b.s, ld-powerpc/aix-glink-2c.s,
ld-powerpc/aix-glink-2c.ex, ld-powerpc/aix-glink-2d.s,
ld-powerpc/aix-glink-2-32.dd, ld-powerpc/aix-glink-2-64.dd,
ld-powerpc/aix-weak-1a.s, ld-powerpc/aix-weak-1b.s,
ld-powerpc/aix-weak-1-rel.hd, ld-powerpc/aix-weak-1-rel.nd,
ld-powerpc/aix-weak-1-dso.hd, ld-powerpc/aix-weak-1-dso.nd,
ld-powerpc/aix-weak-1-dso.dnd, ld-powerpc/aix-weak-1.ex,
ld-powerpc/aix-weak-2a.s, ld-powerpc/aix-weak-2a.ex,
ld-powerpc/aix-weak-2a.nd, ld-powerpc/aix-weak-2b.s,
ld-powerpc/aix-weak-2b.nd, ld-powerpc/aix-weak-2c.s,
ld-powerpc/aix-weak-2c.ex, ld-powerpc/aix-weak-2c.nd,
ld-powerpc/aix-weak-2c.od, ld-powerpc/aix-weak-3a.s,
ld-powerpc/aix-weak-3a.ex, ld-powerpc/aix-weak-3b.s,
ld-powerpc/aix-weak-3b.ex, ld-powerpc/aix-weak-3-32.d,
ld-powerpc/aix-weak-3-32.dd, ld-powerpc/aix-weak-3-64.d,
ld-powerpc/aix-weak-3-64.dd: New tests.
* ld-powerpc/aix52.exp: Run them. Replace tmp/aix-* with
tmp/aix64-* in 64-bit ld options.
Rename, changing all callers, to...
(md_create_short_jump): Adjust head comment. Assert
word-sized-branch distance for v32. Bail out calling as_fatal for
compatibility mode here.
(md_create_long_jump): ...not here.
* config/tc-cris.h (md_create_short_jump): Do not define.
* ppc.h (R_PPC_TLSGD, R_PPC_TLSLD): Add new relocs.
* ppc64.h (R_PPC64_TLSGD, R_PPC64_TLSLD): Add new relocs.
bfd/
* reloc.c (BFD_RELOC_PPC_TLSGD, BFD_RELOC_PPC_TLSLD): New.
* section.c (struct bfd_section): Add has_tls_get_addr_call.
(BFD_FAKE_SECTION): Init new flag.
* ecoff.c (bfd_debug_section): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_TLSGD and R_PPC_TLSLD.
(ppc_elf_reloc_type_lookup): Handle new relocs.
(ppc_elf_check_relocs): Set has_tls_get_addr_call on finding such
without marker relocs.
(ppc_elf_tls_optimize): Allow out-of-order __tls_get_addr relocs
if section has no old-style calls.
(ppc_elf_relocate_section): Set tls_mask for non-tls relocs too.
Don't try to optimize new-style __tls_get_addr call when handling
arg setup relocs. Instead do so for R_PPC_TLSGD and R_PPC_TLSLD
relocs.
* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_TLSGD, R_PPC64_TLSLD.
(ppc64_elf_reloc_type_lookup): Handle new relocs.
(ppc64_elf_check_relocs): Set has_tls_get_addr_call on finding such
without marker relocs.
(ppc64_elf_tls_optimize): Allow out-of-order __tls_get_addr relocs
if section has no old-style calls. Set toc_ref for new relocs as
appropriate.
(ppc64_elf_relocate_section): Set tls_mask for non-tls relocs too.
Don't try to optimize new-style __tls_get_addr call when handling
arg setup relocs. Instead do so for R_PPC_TLSGD and R_PPC_TLSLD
relocs.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Error if ppc32 tls got relocs
have non-zero addend.
(md_assemble): Parse args of __tls_get_addr calls.
(md_apply_fix): Handle BFD_RELOC_PPC_TLSGD and BFD_RELOC_PPC_TLSLD.
ld/testsuite/
* ld-powerpc/tlsmark.s, * ld-powerpc/tlsmark.d: New test.
* ld-powerpc/tlsmark32.s, * ld-powerpc/tlsmark32.d: New test.
* ld-powerpc/powerpc.exp: Run them.
Eric Botcazou <ebotcazou@adacore.com>
Douglas B Rupp <rupp@gnat.com>
* doc/as.texinfo (Overview): Mention -replace/-noreplace options
for Alpha.
* doc/c-alpha.texi (Alpha Options): Document -replace/-noreplace.
* config/tc-alpha.h (TC_VALIDATE_FIX_SUB): Define to 1 (evax).
(OBJ_SYMFIELD_TYPE): Remove.
(tc_canonicalize_symbol_name): Define to evax_shorten_name.
(TC_IMPLICIT_LCOMM_ALIGNMENT): For alignment to 3 on evax.
(tc_frob_file_before_fix): Do not defined on evax.
* config/tc-alpha.c: Always includes dwarf2dbg.h.
Include vms.h if OBJ_EVAX.
(struct alpha_fixup): Add xtrasym and procsym (evax only).
(enum alpha_macro_arg): Remove trailing comma.
(md_longopts): Add replace and noreplace arguments (evax only).
(alpha_evax_proc_hash): New variable.
(alpha_link_section): Make it global.
(alpha_ctors_section, alpha_dtors_section): Removed.
(alpha_ctors_symbol, alpha_dtors_symbol): Ditto.
(alpha_lit8_section): Ifndef'ed on evax.
(alpha_lit8_symbol): Ditto.
(alpha_prologue_label): New variable.
(alpha_linkage_symbol): New variable (evax only).
(alpha_flag_replace): Ditto.
(struct alpha_evax_procs): Add handler and handler_data field.
(alpha_evax_proc): Now of type pointer.
(alpha_linkage_fixup_root, alpha_linkage_fixup_tail): New variables.
(struct alpha_reloc_tag): Add sym and psym fields (evax only).
(get_alpha_reloc_tag): Initialize sym and psym fields (evax only).
(alpha_adjust_relocs): Ifndef'ed on evax.
(load_expression): Add opname argument.
Implement LDA/BSR optimization for evax.
(emit_lda): Adjust for new prototype of load_expression.
(emit_ir_load): Ditto. Do not nothing for GP if ..lk symbols.
(emit_loadstore): Likewise.
(emit_ldXu): Likewise.
(emit_stX): Likewise.
(emit_jsrjmp): Likewise. Implement LDA/BSR optimization for evax.
(emit_ldgp): Avoid warning in evax case.
(add_to_link_pool): Make it static. Return symbolic expression rather
than number expression for the offset.
(s_alpha_text): Create .text symbol for evax if not already created.
(s_alpha_comm): Do not create specific section for common symbol.
Fill common area with zeros for evax.
(s_alpha_prologue): Create alpha_prologue_label.
(s_alpha_section_name): New function (evax).
(s_alpha_section_word): Likewise.
(section_name): New static variabke moved out from ...
(s_alpha_section): ... here. Create new sections on demand.
(s_alpha_literals): New function (evax).
(s_alpha_ent): Create alpha_evax_proc instance and insert it in the
alpha_evax_proc_hash table.
(s_alpha_handler): New function (evax).
(s_alpha_frame): Adjust for new type of alpha_evax_proc.
(s_alpha_prologue): New function (evax).
(s_alpha_pdesc): Adjust for new type of alpha_evax_proc and new
handling of procedures with hash table.
Add support for condition handlers.
(s_alpha_linkage): Create linkage_fixup instance and chain it.
(s_alpha_fp_save): Adjust for new type of alpha_evax_proc.
(s_alpha_mask): Likewise.
(s_alpha_fmask): Likewise.
(s_alpha_end): Clear alpha_evax_proc.
(s_alpha_align): Increase max_alignment to 16.
(alpha_print_token): Call print_expr_1 instead of print_expr.
(md_pseudo_table): Add "section", "literals", "handler" and
"handler_data" (evax). Do not ignore "prologue" on evax.
Fix indentation.
(md_begin): Create hash table for alpha_evax_proc_hash.
(md_parse_option): Handle OPTION_REPLACE and OPTION_NOREPLACE.
(md_show_usage): Mention -replace/-noreplace for evax.
(md_apply_fix): Handle evax relocs (_NOP, _LDA, _BSR and _BOH).
(alpha_force_relocation): Likewise.
(alpha_fix_adjustable): Likewise. Add BFD_RELOC_16 case.
(tc_gen_reloc): Likewise. Add BFD_RELOC_ALPHA_LINKAGE for evax.
(emit_insn): New cases for evax specific relocs.
(assemble_insn): Fix indentation.
Take care of -MDISP in operand table.
* config/obj-evax.h (struct alpha_linkage_fixups): New struct.
(OBJ_SYMFIELD_TYPE): New macro.
(obj_symbol_new_hook): Define.
(obj_frob_symbol, obj_frob_file_before_adjust): Ditto.
(obj_frob_file_before_fix): Ditto.
(PDSC_S_M_HANDLER_VALID): New macro.
(PDSC_S_M_HANDLER_DATA_VALID): Ditto.
(TC_IMPLICIT_LCOMM_ALIGNMENT): Remove.
Add prototypes for functions declared in obj-evax.c
* config/obj-evax.c: Include subsegs.h, struc-symbol.h, safe-ctype.h.
(s_evax_weak): Convert to ansi-C.
(evax_symbol_new_hook): New function.
(evax_frob_symbol): Ditto.
(evax_frob_file_before_adjust): Ditto.
(evax_frob_file_before_fix): Ditto.
(evax_shorten_name): Ditto.
(crc32): Ditto.
(encode_32): Ditto.
(encode_16): Ditto.
(decode_16): Ditto.
(shorten_identifier): Ditto.
(is_truncated_identifier): Ditto.
* dwarf2dbg.c (out_debug_info): Do not append trailing slash on VMS.
* as.c (close_output_file): Remove #ifndef OBJ_VMS.
(main): Ditto.
(do_t_mov_cmp): Permit R13 as the second
argument to "cmp.n".
* gas/arm/thumb2_bad_reg.s: Update to allow R13 as second argument
for CMP.
* gas/arm/thumb2_bad_reg.l: Adjust accordingly.
* config/tc-arm.c (MODE_RECORDED): New define.
(output_inst): Record the thumb_mode in the current frag.
(arm_handle_align): Ignore the MODE_RECORDED bit in tc_frag_data.
(arm_init_frag): Only set the tc_frag_data field if it has not
already been set.
2009-01-29 Paul Brook <paul@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
* config/tc-arm.c (do_t_mul): In Thumb-2 mode, use 16-bit encoding
of MUL when possible.
gas/testsuite:
2009-01-29 Paul Brook <paul@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
* gas/arm/thumb2_mul.s: New file.
* gas/arm/thumb2_mul.d: Likewise.
* gas/arm/thumb2_mul-bad.s: Likewise.
* gas/arm/thumb2_mul-bad.d: Likewise.
* gas/arm/thumb2_mul-bad.l: Likewise.
* gas/arm/t16-bad.s: Add tests for"mul" with high registers.
* gas/arm/t16-bad.l: Update accordingly.
* gas/all/gas.exp: Expect forward test to fail for MeP.
Expect relax test to fail for MeP.
* gas/mep/relocs.d: Update expected disassembly.
* lib/ld-lib.exp (check_gc_sections_available): Add MeP to list of
targets which do not support garbage collection.
* ld-srec/srec.exp (run_srec_test): Expect tests to fail for MeP.
* ld-elf/group8a.d: Likewise.
* ld-elf/group8b.d: Likewise.
* ld-elf/group9a.d: Likewise.
* ld-elf/group9b.d: Likewise.
* binutils-all/objdump.W: Do not assume that high and low PC
addresses will have been computed.
sequence containing an unsupported reloc type.
(enum options): Replace computed #define's constants for option
numbers with this enum.
(struct md_longopts): Use the enum. Allow OPTION_32 in a non-ELF
environment.
(md_parse_option): Allow -32 in a non-ELF environment.
* gas/lib/gas-defs.exp: Update description of run_dump_test proc.
* gas/mips/dli.d: Pass -64 to gas.
* gas/mips/mips64-mips3d-incl.d: Likewise.
* gas/mips/octeon.d: Likewise.
* gas/mips/sb1-ext-mdmx.d: Likewise.
* gas/mips/sb1-ext-ps.d: Likewise.
* gas/mips/e32el-rel2.s: Pass -march=mips3 to gas.
Update expected relocs.
* gas/mips/ld-ilocks-addr32.d: Do not run for tx39 targets.
* gas/mips/mips.exp: Remove 'ilocks' variable.
Add ecoff targets to 'addr32' variable.
Set 'no_mips16' for ecoff targets.
Do not run div-ilocks or mul-ilocks test variants.
* gas/mips/mips16-intermix.d: Use nm instead of objdump so that
the symbol table output is sorted. Update expecetd output.
gas/
* config/tc-arm.c (attributes_set_explicitly): New array.
(s_arm_eabi_attribute): Check return value from s_vendor_attribute.
(cpu_arch): Add ARM_ARCH_V5T.
(aeabi_set_attribute_int): New function.
(aeabi_set_attribute_string): New function.
(aeabi_set_public_attributes): Set attributes according to the user's
intentions, rather than the actual state of the binary.
Use aeabi_set_attribute_int and aeabi_set_attribute_string instead of
bfd_elf_add_proc_attr_int and bfd_elf_add_proc_attr_string.
Support WMMXv2. Use attribute names instead of numbers.
* read.c (s_vendor_attribute): Change return type to int.
Return the tag number that was set.
* read.h (s_vendor_attribute): Change return type to int.
gas/testsuite/
* gas/arm/attr-cpu-directive.d: New file.
* gas/arm/attr-cpu-directive.s: New file.
* gas/arm/attr-default.d: New file.
* gas/arm/attr-march-all.d: New file.
* gas/arm/attr-march-armv1.d: New file.
* gas/arm/attr-march-armv2.d: New file.
* gas/arm/attr-march-armv2a.d: New file.
* gas/arm/attr-march-armv2s.d: New file.
* gas/arm/attr-march-armv3.d: New file.
* gas/arm/attr-march-armv3m.d: New file.
* gas/arm/attr-march-armv4.d: New file.
* gas/arm/attr-march-armv4t.d: New file.
* gas/arm/attr-march-armv4txm.d: New file.
* gas/arm/attr-march-armv4xm.d: New file.
* gas/arm/attr-march-armv5.d: New file.
* gas/arm/attr-march-armv5t.d: New file.
* gas/arm/attr-march-armv5te.d: New file.
* gas/arm/attr-march-armv5tej.d: New file.
* gas/arm/attr-march-armv5texp.d: New file.
* gas/arm/attr-march-armv5txm.d: New file.
* gas/arm/attr-march-armv6-m.d: New file.
* gas/arm/attr-march-armv6.d: New file.
* gas/arm/attr-march-armv6j.d: New file.
* gas/arm/attr-march-armv6k.d: New file.
* gas/arm/attr-march-armv6kt2.d: New file.
* gas/arm/attr-march-armv6t2.d: New file.
* gas/arm/attr-march-armv6z.d: New file.
* gas/arm/attr-march-armv6zk.d: New file.
* gas/arm/attr-march-armv6zkt2.d: New file.
* gas/arm/attr-march-armv6zt2.d: New file.
* gas/arm/attr-march-armv7-a.d: New file.
* gas/arm/attr-march-armv7-m.d: New file.
* gas/arm/attr-march-armv7-r.d: New file.
* gas/arm/attr-march-armv7.d: New file.
* gas/arm/attr-march-armv7a.d: New file.
* gas/arm/attr-march-armv7m.d: New file.
* gas/arm/attr-march-armv7r.d: New file.
* gas/arm/attr-march-iwmmxt.d: New file.
* gas/arm/attr-march-iwmmxt2.d: New file.
* gas/arm/attr-march-xscale.d: New file.
* gas/arm/attr-mcpu.d: New file.
* gas/arm/attr-mfpu-arm1020e.d: New file.
* gas/arm/attr-mfpu-arm1020t.d: New file.
* gas/arm/attr-mfpu-arm1136jf-s.d: New file.
* gas/arm/attr-mfpu-arm1136jfs.d: New file.
* gas/arm/attr-mfpu-arm7500fe.d: New file.
* gas/arm/attr-mfpu-fpa.d: New file.
* gas/arm/attr-mfpu-fpa10.d: New file.
* gas/arm/attr-mfpu-fpa11.d: New file.
* gas/arm/attr-mfpu-fpe.d: New file.
* gas/arm/attr-mfpu-fpe2.d: New file.
* gas/arm/attr-mfpu-fpe3.d: New file.
* gas/arm/attr-mfpu-maverick.d: New file.
* gas/arm/attr-mfpu-neon-fp16.d: New file.
* gas/arm/attr-mfpu-neon.d: New file.
* gas/arm/attr-mfpu-softfpa.d: New file.
* gas/arm/attr-mfpu-softvfp+vfp.d: New file.
* gas/arm/attr-mfpu-softvfp.d: New file.
* gas/arm/attr-mfpu-vfp.d: New file.
* gas/arm/attr-mfpu-vfp10-r0.d: New file.
* gas/arm/attr-mfpu-vfp10.d: New file.
* gas/arm/attr-mfpu-vfp3.d: New file.
* gas/arm/attr-mfpu-vfp9.d: New file.
* gas/arm/attr-mfpu-vfpv2.d: New file.
* gas/arm/attr-mfpu-vfpv3-d16.d: New file.
* gas/arm/attr-mfpu-vfpv3.d: New file.
* gas/arm/attr-mfpu-vfpxd.d: New file.
* gas/arm/attr-order.d: Update Tag_ARM_ISA_use and Tag_THUMB_ISA_use.
* gas/arm/attr-override-cpu-directive.d: New file.
* gas/arm/attr-override-cpu-directive.s: New file.
* gas/arm/attr-override-mcpu.d: New file.
* gas/arm/attr-override-mcpu.s: New file.
* gas/arm/blank.s: New file.
* gas/arm/eabi_attr_1.d: Update Tag_ARM_ISA_use and Tag_THUMB_ISA_use.
ld/testsuite/
* ld-arm/attr-merge-3.attr: Update following gas change.
* ld-arm/attr-merge-2.attr: Update Tag_ARM_ISA_use and
Tag_THUMB_ISA_use following gas changes.
* ld-arm/attr-merge-4.attr: Likewise.
* ld-arm/attr-merge-5.attr: Likewise.
* ld-arm/attr-merge-arch-1.attr: Likewise.
* ld-arm/attr-merge-arch-2.attr: Likewise.
* ld-arm/attr-merge-unknown-2.d: Likewise.
* ld-arm/attr-merge-unknown-2r.d: Likewise.
* ld-arm/attr-merge-unknown-3.d: Likewise.
* ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-00.d: Likewise.
* ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-02.d: Likewise.
* ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-04.d: Likewise.
* ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-20.d: Likewise.
* ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-22.d: Likewise.
* ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-40.d: Likewise.
* ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-44.d: Likewise.
* ld-arm/attr-merge.attr: Likewise.
Daniel Jacobowitz <dan@codesourcery.com>
gas/
* config/tc-arm.c (arm_copy_symbol_attributes): New function.
* config/tc-arm.h (arm_copy_symbol_attributes): New prototype.
(CONVERT_SYMBOLIC_ATTRIBUTE): New define.
* read.c (s_vendor_attribute): Add support for symbolic tag names.
Improve string parser.
* doc/c-arm.texi (ARM Machine Directives): Document
.eabi_attribute symbolic tag names.
gas/testsuite/
* gas/arm/attr-syntax.d: New file.
* gas/arm/attr-syntax.s: New file.
Julian Brown <julian@codesourcery.com>
bfd/
* elf-bfd.h (NUM_KNOWN_OBJ_ATTRIBUTES): Set to 71 to include all known
ARM attributes in ABI 2.07.
* elf32-arm.c (get_secondary_compatible_arch): New function.
(set_secondary_compatible_arch): New function.
(tag_cpu_arch_combine): New function.
(elf32_arm_copy_one_eabi_other_attribute): Delete function.
(elf32_arm_copy_eabi_other_attribute_list): Delete function.
(elf32_arm_merge_eabi_attributes): Rename order_312 to order_021 to
make it fit with order_01243.
Add support for Tag_also_compatible_with,
Tag_CPU_unaligned_access, Tag_T2EE_use, Tag_Virtualization_use,
Tag_MPextension_use, Tag_nodefaults and Tag_conformance.
Improve/tidy up support for Tag_CPU_raw_name, Tag_CPU_name,
Tag_CPU_arch, Tag_ABI_HardFP_use, Tag_VFP_HP_extension,
Tag_ABI_FP_denormal, Tag_ABI_PCS_GOT_use, Tag_ABI_align8_needed,
Tag_VFP_arch and Tag_ABI_FP_16bit_format.
Rework the way unknown attributes are handled.
Defer errors until all attributes have been processed.
gas/
* config/tc-arm.c (cpu_arch): Change ARM_ARCH_V6M to 11.
include/elf/
* arm.h (TAG_CPU_ARCH_V6_M, TAG_CPU_ARCH_V6S_M): New defines.
(MAX_TAG_CPU_ARCH, TAG_CPU_ARCH_V4T_PLUS_V6_M): New defines.
(Tag_NEON_arch): Rename to Tag_Advanced_SIMD_arch to match ARM ABI
version 2.07.
(Tag_undefined39, Tag_nodefaults): New enum values.
(Tag_also_compatible_with, Tag_T2EE_use): Likewise.
(Tag_conformance, Tag_Virtualization_use): Likewise.
(Tag_undefined69, Tag_MPextension_use): Likewise.
EF_IA_64_ARCHVER_1): New macros. Minor reformatting.
* bfd/Makefile.am (BFD32_BACKENDS): Add new object vmsutil.lo
(BFD32_BACKENDS_CFILES): Add new file vmsutil.c
(vmsutil.lo): Add dependency rule
* bfd/Makefile.in: Regenerate
* bfd/config.bfd (ia64*-*-*vms*): Add case.
* bfd/configure.in (bfd_elf64_ia64_vms_vec): Add case.
* bfd/configure: Regenerate
* bfd/vmsutil.[ch]: New files
* bfd/elf-bfd.h (struct bfd_elf_special_section): Change type of
attr to bfd_vma.
* bfd/elfxx-ia64.c (elfNN_vms_post_process_headers,
elfNN_vms_section_processing, elfNN_vms_final_write_processing,
elfNN_vms_close_and_cleanup, elfNN_vms_section_from_shdr,
elfNN_vms_object_p): New functions
* bfd/targets.c (bfd_elf64_ia64_vms_vec): New target.
* gas/configure.tgt(ia64-*-*vms*): New target.
* gas/dwarf2dbg.h (dwarf2_loc_mark_labels): Make extern.
* gas/tc.h (md_number_to_chars): Declare iff undefined.
* gas/config/obj-elf.c (obj_elf_change_section): Change type of
arg attr to bfd_vma.
(obj_elf_parse_section_letters): Return a bfd_vma. Change type of
variables attr, md_attr to bfd_vma.
(obj_elf_section_word): Likewise.
(obj_elf_section): Change type of variable attr to bfd_vma
* gas/config/obj-elf.h (obj_elf_change_section): Change type of
arg attr to bfd_vma
* gas/config/tc-ia64.c (bfdver.h,time.h): Include.
(ia64_elf_section_letter): Now returns a bfd_vma.
Handle VMS specific attributes.
(ia64_elf_section_flags): Arg attr now a bfd_vma.
(ia64_init): Don't turn on dependency checking for VMS.
(ia64_target_format): Check for VMS flag bit.
(do_alias): Hande decc$ functions.
(get_vms_time): New function.
(ia64_vms_note): New function.
* gas/config/tc-ia64.h (ia64_elf_section_letter): Now returns a bfd_vma.
(ia64_elf_section_flags): Arg attr now a bfd_vma.
(tc_init_after_args): Define for VMS.
* gas/config/tc-alpha.c (alpha_elf_section_letter): Return a bfd_vma.
(alpha_elf_section_flags): Change type of arg attr to bfd_vma.
* gas/config/tc-alpha.h: Likewise.
* gas/config/tc-i386.c (x86_64_section_letter): Return a bfd_vma.
(x86_64_section_word): Return a bfd_vma.
* gas/config/tc-i386.h: Likewise.
* gas/config/tc-ip2k.c (ip2k_elf_section_flags): Change type of arg
attr to bfd_vma.
* gas/config/tc-ip2k.h: Likewise.
* gas/config/tc-mep.c (mep_elf_section_letter): Return a bfd_vma.
(mep_elf_section_flags): Change type of arg attr to bfd_vma.
* gas/config/tc-mep.h: Likewise.
* gas/config/tc-ppc.c (ppc_section_letter): Return a bfd_vma.
(ppc_section_word): Return a bfd_vma.
(ppc_section_flags): Change type of arg attr to bfd_vma.
* gas/config/tc-ppc.h: Likewise.
* gas/config/te-vms.h (DWARF2_DIR_SHOULD_END_WITH_SEPARATOR,
DWAR2_FILE_TIME_NAME, DWARF2_FILE_SIZE_NAME, DWARF2_FILEN_NAME):
New file with new macros
* gas/dwarf2dbg.c (get_filenum, out_file_list): Default and call new
macros.
* elf32-spu.c (struct spu_link_hash_table): Add init, line_size_log2,
num_lines_log2.
(struct got_entry): Add br_addr.
(struct call_info): Add priority.
(struct function_info): Add lr_store and sp_adjust.
(spu_elf_setup): Init line_size_log2 and num_lines_log2.
(spu_elf_find_overlays): For soft-icache, mark any section within cache
area as an overlay, and check that no other overlays exist. Look up
icache overlay manager entry sym.
(BRA_STUBS, BRA, BRASL): Define.
(enum _stub_type): Replace ovl_stub with call_ovl_stub and br*_ovl_stub.
(needs_ovl_stub): Adjust for soft-icache. Return priority encoded
in branch insn.
(count_stub, build_stub): Support soft-icache.
(build_spuear_stubs, process_stubs): Adjust build_stub call.
(spu_elf_size_stubs): Size soft-icache stubs.
(overlay_index): New function.
(spu_elf_build_stubs): Make static. Support soft-icache.
(spu_elf_check_vma): Don't turn off auto_overlay if soft-icache.
(find_function_stack_adjust): Save lr store and stack adjust insn
offsets.
(maybe_insert_function): Adjust find_function_stack_adjust call.
(mark_functions_via_relocs): Retrieve priority.
(remove_cycles): Only warn about pruned arcs when stack_analysis.
(sort_calls): Sort by priority first.
(mark_overlay_section): Ignore .ovl.init.
(sum_stack): Only print when stack_analysis.
(print_one_overlay_section): New function, extracted from..
(spu_elf_auto_overlay): ..here. Support soft-icache overlays.
(spu_elf_stack_analysis): Only print when htab->stack_analysis.
(spu_elf_final_link): Call spu_elf_stack_analysis for lrlive
analysis. Call spu_elf_build_stubs.
(spu_elf_relocate_section): For soft-icache encode overlay index
into addresses.
(spu_elf_output_symbol_hook): Support soft-icache.
(spu_elf_modify_program_headers: Likewise.
* elf32-spu.h (struct spu_elf_params): Add lrlive_analysis. Rename
num_regions to num_lines. Add line_size and max_branch.
(enum _ovly_flavour): Add ovly_soft_icache.
(spu_elf_build_stubs): Delete.
gas/
* config/tc-spu.c (md_pseudo_table): Add "brinfo".
(brinfo): New var.
(md_assemble): Poke brinfo into branch instructions.
(spu_brinfo): New function.
(md_apply_fix): Don't assume insn fields start off at zero, mask
them to remove possible brinfo.
ld/
* emultempl/spuelf.em (params): Init new fields.
(num_lines_set, line_size_set, icache_mgr, icache_mgr_stream): New vars.
(spu_place_special_section): Adjust placement for soft-icache. Pad
soft-icache section to a fixed size. Clear addr_tree.
(spu_elf_load_ovl_mgr): Support soft-icache. Map overlay manager
sections a little more intelligently.
(gld${EMULATION_NAME}_finish): Don't call spu_elf_build_stubs.
(OPTION_SPU_NUM_LINES): Rename from OPTION_SPU_NUM_REGIONS.
(OPTION_SPU_SOFT_ICACHE, OPTION_SPU_LINE_SIZE): Define.
(OPTION_SPU_LRLIVE): Define.
(PARSE_AND_LIST_LONGOPTS): Add new soft-icache options.
(PARSE_AND_LIST_OPTIONS): Likewise.
(PARSE_AND_LIST_ARGS_CASES): Handle them.
* emultempl/spu_icache.S: Dummy file.
* emultempl/spu_icache.o_c: Regenerate.
* Makefile.am (eelf32_spu.c): Depend on spu_icache.o_c.
(spu_icache.o_c): Add rule to build.
(CLEANFILES): Zap temp files.
(EXTRA_DIST): Add spu_icache.o_c.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-spu/ovl.d: Allow for absolute branches in stubs.
* ld-spu/ovl2.d: Likewise.
* config/tc-ppc.c (ppc_setup_opcodes): Remove PPC_OPCODE_NOPOWER4 test.
Test the new "deprecated" opcode field.
include/opcode/
* ppc.h (struct powerpc_opcode): New field "deprecated".
(PPC_OPCODE_NOPOWER4): Delete.
opcodes/
* ppc-opc.c (PPCNONE): Define.
(NOPOWER4): Delete.
(powerpc_opcodes): Initialize the new "deprecated" field.
BFD_RELOC_CRIS_32_IE, in the test whether the relocation fits.
(get_3op_or_dip_prefix_op): Handle TLS/PIC decoration for the
"double indirect" addressing mode.
(cris_get_reloc_suffix): Add entry for :IE for BFD_RELOC_CRIS_32_IE.
(cris_number_to_imm, tc_gen_reloc): Handle BFD_RELOC_CRIS_32_IE.
* common.h (STT_IFUNC): Define.
elfcpp/
* elfcpp.h (enum STT): Add STT_IFUNC.
bfd/
* syms.c (struct bfd_symbol): Add new flag BSF_INDIRECT_FUNCTION.
Remove redundant flag BFD_FORT_COMM_DEFAULT_VALUE. Renumber flags
to remove gaps.
(bfd_print_symbol_vandf): Return 'i' for BSF_INDIRECT_FUNCTION.
(bfd_decode_symclass): Likewise.
* elf.c (swap_out_syms): Translate BSF_INDIRECT_FUNCTION into
STT_IFUNC.
(elf_find_function): Treat STT_IFUNC in the same way as STT_FUNC.
(_bfd_elf_is_function_type): Likewise.
* elf32-arm.c (arm_elf_find_function): Likewise.
(elf32_arm_adjust_dynamic_symbol): Likewise.
(elf32_arm_swap_symbol_in): Likewise.
(elf32_arm_additional_program_headers): Likewise.
* elf32-i386.c (is_indirect_symbol): New function.
(elf_i386_check_relocs): Also generate dynamic relocs for
relocations against STT_IFUNC symbols.
(allocate_dynrelocs): Likewise.
(elf_i386_relocate_section): Likewise.
* elf64-x86-64.c (is_indirect_symbol): New function.
(elf64_x86_64_check_relocs): Also generate dynamic relocs for
relocations against STT_IFUNC symbols.
(allocate_dynrelocs): Likewise.
(elf64_x86_64_relocate_section): Likewise.
* elfcode.h (elf_slurp_symbol_table): Translate STT_IFUNC into
BSF_INDIRECT_FUNCTION.
* elflink.c (_bfd_elf_adjust_dynamic_reloc_section): Add support
for STT_IFUNC symbols.
(get_ifunc_reloc_section_name): New function.
(_bfd_elf_make_ifunc_reloc_section): New function.
* elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs field.
* bfd-in2.h: Regenerate.
gas/
* config/obj-elf.c (obj_elf_type): Add support for STT_IFUNC type.
* doc/as.texinfo: Document new feature.
* NEWS: Mention new feature.
gas/testsuite/
* gas/elf/type.s: Add test of STT_IFUNC symbol type.
* gas/elf/type.e: Update expected disassembly.
* gas/elf/elf.exp: Update grep of symbol types.
ld/
* NEWS: Mention new feature.
* pe-dll.c (process_def_file): Replace use of redundant
BFD_FORT_COMM_DEFAULT_VALUE with 0.
* scripttempl/elf.sc: Add .rel.ifunc.dyn and .rela.ifunc.dyn
sections.
ld/testsuite/
* ld-mips-elf/reloc-1-n32.d: Updated expected output for reloc
descriptions.
* ld-mips-elf/reloc-1-n64.d: Likewise.
* ld-i386/ifunc.d: New test.
* ld-i386/ifunc.s: Source file for the new test.
* ld-i386/i386.exp: Run the new test.
* config/tc-cr16.c (md_pseudo_table): Add "4byte" directive to
md_pseudo_table and accept @c prefix, same as long directive.
(cr16_cons_fix_new): Initialize rtype to BFD_RELOC_UNUSED.
config/tc-cr16.c (tc_gen_reloc): Declare a variable of type
bfd_reloc_code_real_type and set it for GOT related relocations.
(md_undefined_symbol): Defined
(process_label_constant): Added checks for GOT/got and cGOT/cGOT
prefixes with constant label and set the appropriate relocation type.
* doc/c-cr16.texi (cr16-operand specifiers): Add got/GOT and cgot/cGOT.
* xtensa-isa.c (xtensa_state_is_shared_or): New function.
2008-11-21 Sterling Augustine <sterling@tensilica.com>
* xtensa-isa-internal.h (XTENSA_STATE_IS_SHARED_OR): New flag.
* xtensa-isa.h (xtensa_state_is_shared_or): New prototype.
2008-11-21 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (check_t1_t2_reads_and_writes): Call
xtensa_state_is_shared_or to allow multiple opcodes within a
single FLIX bundle to write to these special states.
for FP instructions.
testsuite/
* gas/mips/mips1-fp.s, testsuite/gas/mips/mips1-fp.d,
testsuite/gas/mips/mips1-fp.l: New tests.
* gas/mips/mips.exp: Run them.
* config/tc-xtensa.c (xtensa_j_opcode): New.
(xg_instruction_matches_option_term): Handle "FREEREG" option.
(xg_build_to_insn): Likewise. Update renamed tls_reloc reference.
(md_begin): Initialize xtensa_j_opcode.
(md_assemble): Update renamed tls_reloc reference. Handle "j.l".
(xg_assemble_vliw_tokens): Save free_reg info in the frag.
(tinsn_immed_from_frag): Get free_reg info back out of the frag.
(vinsn_to_insnbuf): Update renamed tls_reloc references.
Distinguish extra argument for "FREEREG" from extra TLS argument.
* config/tc-xtensa.h (struct xtensa_frag_type): Add free_reg field.
* config/xtensa-istack.h (struct tinsn_struct): Rename tls_reloc
field to extra_arg.
* config/xtensa-relax.c (widen_spec_list): Add rules to relax "j.l".
(build_transition): Handle "FREEREG" operand.
* config/xtensa-relax.h (enum op_type): Add OP_FREEREG.
2008-11-04 Bob Wilson <bob.wilson@acm.org>
* gas/xtensa/all.exp: Run jlong test.
* gas/xtensa/jlong.d: New.
* gas/xtensa/jlong.s: New.
* read.c (pseudo_set): Don't allow global register symbol only
if TC_GLOBAL_REGISTER_SYMBOL_OK is undefined.
* symbols.c (S_SET_EXTERNAL): Likewise.
* config/tc-mmix.h (TC_GLOBAL_REGISTER_SYMBOL_OK): Defined.
* doc/internals.texi: Document TC_GLOBAL_REGISTER_SYMBOL_OK.
to, besides PIC, also imply TLS or to say "relocation specifier" or
similar.
(RELOC_SUFFIX_CHAR): Rename from PIC_SUFFIX_CHAR. Change all callers.
(cris_get_reloc_suffix): Rename from cris_get_pic_suffix. Change all
callers. Also handle TLS relocs.
(cris_get_specified_reloc_size): Rename from cris_get_pic_reloc_size.
Change all callers. Also handle TLS relocs.
(tls): New constant.
(cris_process_instruction): Check for non-PIC TLS relocations and
adjust message when emitting error message about relocation not
fitting.
(get_autoinc_prefix_or_indir_op): Also check for relocation suffix
when tls is true.
(get_3op_or_dip_prefix_op): Ditto.
(cris_number_to_imm, tc_gen_reloc): Handle TLS relocs like PIC relocs.
do not match it class and if necessary update the class.
(null_error_handler): New function. Suppresses the generation of
bfd error messages.
* coff64-rs6000.c (bfd_xcoff_backend_data): Update comment.
* config/tc-tic4x.c (tic4x_globl): Call S_SET_EXTERNAL as well as
S_SET_STORAGE_CLASS.
relocs with no symbol.
* config/tc-mmix.c (md_assemble): Mark fake symbol on
BFD_RELOC_MMIX_BASE_PLUS_OFFSET as OK for use by relocs.
(mmix_md_end): Likewise mark mmix reg contents section symbol.
* config/tc-mips.h (DWARF2_FDE_RELOC_SIZE): Define.
gas/testsuite/
* gas/mips/cfi-n64-1.s, gas/mips/cfi-n64-1.d: New test.
* gas/mips/mips.exp: Run it.
alignment field of the .lcomm directive to be optional.
(pe_lcomm): New function. Pass pe_lcomm_internal to
s_comm_internal.
(md_pseudo_table): Implement .lcomm directive for COFF based
targets.
* doc/c-i386.texi (i386-Directives): New node. Used to document
the .lcomm directive.
2008-08-28 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (md_assemble): Force number of displacement
operands to zero when processing string instruction.
(i386_index_check): Special-case string instruction operands. Don't
fudge address prefix if there already was a memory operand. Fix
error message to correctly reflect the addressing mode used.
(i386_att_operand): Fix comment.
(i386_intel_operand): Snapshot, clear, and restore base and index
reg for each operand processed. Increment count of memory operands
later.
gas/testsuite/
2008-08-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/string-bad.{l,s}, gas/i386/string-ok.{d,e,s}: New.
* gas/i386/i386.exp: Run new tests.
R_PARISC_SEGREL32 and R_PARISC_SEGREL64.
* som.c (som_fixup_formats): Add R_DATA_GPREL fixup.
(som_hppa_howto_table): Likewise.
(hppa_som_gen_reloc_type): In case R_HPPA_GOTOFF, detect R_DATA_GPREL
final type.
(som_write_fixups): Handle R_DATA_GPREL.
* config/tc-hppa.c (is_SB_relative): New macro.
(fix_new_hppa): Remove $segrel$ marker.
(cons_fix_new_hppa): Set reloc type R_PARISC_SEGREL32 if expression is
segment relative.
* config/tc-hppa.h (tc_frob_symbol): Check for $segrel$.
(output_cie, output_fde): Use it.
(DWARF2_EH_FRAME_READ_ONLY): New.
(cfi_finish): Use it.
* config/tc-hppa.h (DWARF2_FDE_RELOC_SIZE): Set to 8 for 64-bit.
(DWARF2_CIE_DATA_ALIGNMENT): Change sign.
(DWARF2_EH_FRAME_READ_ONLY): New.
* config/tc-hppa.c (tc_gen_reloc): Generate pc-relative relocations
from the results of DIFF_EXPR_OK manipulation.
