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1073 commits

Author SHA1 Message Date
Doug Evans
340d8e209e * sim-core.c (sim_core_signal): Use CIA_ADDR to fetch value. 1997-11-18 23:59:29 +00:00
Doug Evans
e5ce1670c1 * Make-common.in (SIM_NEW_COMMON_OBJS): New variable. 
* sim-base.h (CIA_ADDR): Provide default definition.
 1997-11-18 23:55:33 +00:00
Doug Evans
590fc16693 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). 1997-11-18 23:46:14 +00:00
Doug Evans
486740ce01 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). 1997-11-18 23:40:40 +00:00
Doug Evans
d5d9a1e155 * sim-main.h (CIA_ADDR): Define. 
* Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 1997-11-18 23:36:46 +00:00
Doug Evans
38377b3a48 * Make-common.in (srccom): New variable. 1997-11-18 07:14:20 +00:00
Doug Evans
9b51b3ddd3 Tweak comment. 1997-11-17 23:17:31 +00:00
Doug Evans
f7abc1ca0c * Make-common.in (DEP, COMMON_DEP_CFLAGS): Define. 
(LIB_OBJS): Add syscall.o.
	(gentmap): Pass $(NL_TARGET) to $(CC).
	(syscall.o): Add rule for.
	(sim_main_headers): Add $(SIM_EXTRA_DEPS).
	(sim-bits.o): Depend on $(sim-n-bits_h).
	(sim-load.o): Depend on callback.h.

	* Make-common.in (cgen-*.o): Update dependencies, mem-ops.h renamed to
	cgen-mem.h, sem-ops.h renamed to cgen-ops.h.
	* cgen-mem.h, cgen-ops.h: New files.

	* aclocal.m4 (--enable-sim-scache): Pass -DWITH_SCACHE=0 for "=no".

	* Makefile.in (nltvals.def): Depend on gennltvals.sh.
	Rewrite build rule.
	* callback.c: #include string.h or strings.h.
	#include sys/types.h and sys/stat.h.
	(cb_init_syscall_map,cb_init_errno_map,cb_init_open_map): Declare.
	(enosys): New function.
	(os_get_errno,os_open): Update.
	(os_stat,os_fstat): New functions.
	(os_init): Initialize syscall_map, errno_map, open_map.
	(default_callback): Add entries for os_stat, os_fstat, syscall_map,
	errno_map, open_map, signal_map, stat_map.
	(cb_read_target_syscall_maps): New function.
	(cb_target_to_host_syscall): New function.
	(cb_host_to_target_errno): Renamed from host_to_target_errno.
	(cb_target_to_host_open): Renamed from target_to_host_open.
	(store): New function.
	(cb_host_to_target_stat): New function.
	* gentmap.c (sys_tdefs): New global.
	(gen_targ_vals_h): Output target syscall numbers.
	(gen_targ_map_c): Update.  Output target syscall translation map.
	* gentvals.sh: New first argument `target'.  Preface table with
	#ifdef NL_TARGET_$target if non-null target passed.
	* gennltvals.sh: New file.
	* nltvals.def: Regenerated.
 1997-11-17 23:09:08 +00:00
Andrew Cagney
891703e5e8 Test SUBI omsn 1997-11-17 22:36:19 +00:00
Doug Evans
cf02c13ce2 (sim_core_signal): Add missing "\n" in message. 
Forgot to check in yesterday.
 1997-11-14 21:52:04 +00:00
Andrew Cagney
f23e93dab0 * mips.igen: Tag vr5000 instructions. 
(ANDI): Was missing mipsIV model, fix assembler syntax.
        (do_c_cond_fmt): New function.
        (C.cond.fmt): Handle mips I-III which do not support CC field
        separatly.
        (bc1): Handle mips IV which do not have a delaed FCC separatly.
        (SDR): Mask paddr when BigEndianMem, not the converse as specified
        in IV3.2 spec.
        (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
        vr5000 which saves LO in a GPR separatly.
        * configure.in (enable-sim-igen): For vr5000, select vr5000
        specific instructions.
        * configure: Re-generate.
 1997-11-14 08:27:38 +00:00
Doug Evans
9e8a900adf * sim-base.h (sim_state_base): Move `magic' to end of struct. 
* sim-base.h (sim_state_base): Add member trace_data.
	(STATE_TRACE_DATA): New macro.
	* sim-trace.h (TRACE_DEBUG_IDX,TRACE_debug): New macros.
	({WITH_,}TRACE_DEBUG_P): New macros.
	(STATE_TRACE_FLAGS,STRACE_P,STRACE_DEBUG_P): New macros.
	(_sim_cpu): Delete forward reference.
	(debug_printf): Update.
	* sim-trace.c (OPTION_TRACE_DEBUG): Define.
	(trace_options): Add --trace-debug.
	(set_trace_options): Handle it.
	(trace_option_handler): Likewise.
	(trace_install): Init state trace_data struct.
	(trace_uninstall): Close state trace file.
	* sim-events.c (ETRACE): Only print source file and number if
	--trace-debug.
	* sim-n-core.h (sim_core_trace_M): Likewise.

	* sim-core.c (sim_core_signal): Add missing "\n" in message.
 1997-11-13 21:18:14 +00:00
Felix Lee
c7e3f734a7 * sim-n-core.h (sim_core_read_unaligned_N): illegal empty 
initializer.
	* sim-types.h (unsigned128,signed128): fix typo for MSVC.
 1997-11-13 18:45:21 +00:00
Doug Evans
5dcf955d46 * Make-common.in (BUILT_SRC_FROM_COMMON): Remove files no longer 
built this way.
	(sim-config.o): Remove non-existent $(sim-nconfig_h) dependency.
	(clean): Don't delete $(BUILT_SRC_FROM_COMMON) if building in
	source tree.
 1997-11-12 20:29:53 +00:00
Doug Evans
15f5035c7d * aclocal.m4 (SIM_AC_OPTION_SCACHE): Fix typo. 
Updating of configure's left for later.
 1997-11-12 20:19:34 +00:00
Jeff Law
fc615b0b1e * simops.c (call:16 call:32): Stack adjustment is determined solely 
by the imm8 field.
 1997-11-11 17:37:04 +00:00
Andrew Cagney
a94c5493a7 Make the signess of compares between GPR's explicit using a cast to 
signed_word.
 1997-11-11 12:31:24 +00:00
Andrew Cagney
030843d7f8 Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1, 
SWXC1MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1, MULT, MULTU, BEQZ, ...MTHI,
MFHI instructions.
Trace nullified instruction.
 1997-11-11 07:50:13 +00:00
Andrew Cagney
f445a8902d * sim-events.c (sim_events_process): Re-compute the time - 
update_time_from_event - as each event is processed. Reverses
        previous change.
 1997-11-11 07:48:05 +00:00
Andrew Cagney
87192c630a * simops.c (OP_4201): "rachi". Sign extend bit 40 of ACC. Sign 
extend bit 44 all constants.
(OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro.
 1997-11-10 22:40:14 +00:00
Andrew Cagney
51624b4bf6 Test rachi instruction. 1997-11-10 08:27:15 +00:00
Andrew Cagney
8cb060b6b0 * callback.c (os_poll_quit): Replace _WIN32 with _MSC_VER. 1997-11-10 02:08:50 +00:00
Andrew Cagney
95469cebdd Replace global IPC with function argument cia or current instruction 
address.
Pass cia into calls to sim_engine_stop so that breakpoints et.al. work.
 1997-11-06 14:24:57 +00:00
Andrew Cagney
549bf95051 Fix computation of sim_events_time when sim_events_slip is loosing it. 1997-11-06 14:14:33 +00:00
Andrew Cagney
7ce8b9178c IGEN likes to cache the current instruction address (CIA). Change the 
MIPS simulator so that correctly writes the value of CIA back int PC
(the global previously used) when the simulation halts.
Fix implementation of DELAY_SLOT and NULLIFY_NEXT_INSTRUCTION macros.
 1997-11-06 09:16:16 +00:00
Andrew Cagney
864519b9fd Allow separate single character and long options. 
Avoid overflow of options buffer.
Provide examples of sim-options use.
 1997-11-06 05:00:09 +00:00
Andrew Cagney
44b8585a3d Add option --enable-sim-igen to mips configuration. Allows user to 
attempt a build of an older MIPS simulator using igen.
 1997-11-05 09:43:34 +00:00
Andrew Cagney
63be8febf7 Rewrite the MIPS simulator's memory model so that it uses the generic 
common/sim-core.

Add support for 3, 5, 6, 7 byte transfers to sim core.
 1997-11-05 08:17:26 +00:00
Andrew Cagney
22de994d0e Delete -l and -n options, didn't do anything. 
Rename option trace to dinero-trace & dinero-file - -t clashed with
common options.
Enable common trace options.
 1997-11-05 01:08:12 +00:00
Andrew Cagney
525d929e49 Rewrite sim_monitor (implements read, write, open, et.al. system 
calls) and sim_open so that they uses the virtual memory data transfer
functions sim_read & sim_write.  This eliminates all code (other than
in load_memory & store_memory) that makes assumptions about the
implementation of the underlying memory model.
 1997-11-05 00:08:14 +00:00
Andrew Cagney
a26ecda4ec * sim-endian.h (U16_8): Implement 
* sim-endian.c (sim_endian_split_16, sim_endian_join_16): New functions
* sim-endian.h (VL8_16, VH8_16): Implement.
* sim-memopt.c (memory_option_handler): Typecast 64bit value to long in printf.
  (memory_option_handler): Only zalloc modulo bytes when non-zero.
  (memory_option_handler): Skip comma in alias address list
 1997-11-04 23:59:41 +00:00
Brendan Kehoe
3b5bd034f5 * gen-idecode.c (print_jump_until_stop_body): Use `#if 0' instead of 
`#ifdef 0' around this.
 1997-11-04 17:36:37 +00:00
Michael Meissner
5aa52e3d26 do not assume NULL is an integer constant 1997-11-04 13:19:49 +00:00
Gavin Romig-Koch
0425cfb3af Correct r5900 sanitization. 1997-11-04 05:50:22 +00:00
Andrew Cagney
fcc86d82f7 Make memory regions layered (just like existing device regions) so 
that overlapping regions can be defined.
Allow the layer (level) of a memory region to be specified as part of
an address parameter to memory options.
Update simulators.
 1997-10-31 08:49:10 +00:00
Nick Clifton
d3e9ca1a88 Patches to support generating an executing environment. 
Patches from Tony Thompson at ARM:  athompso@arm.com
 1997-10-30 21:52:16 +00:00
Doug Evans
d048b52dbb * sim-core.h (sim_core_write_8): Define. 1997-10-30 21:45:12 +00:00
Gavin Romig-Koch
6205f37913 * gencode.c: Add tx49 configury and insns. 
* configure.in: Add tx49 configury.
	* configure: Update.
 1997-10-29 19:42:49 +00:00
Andrew Cagney
01b9cd49ca common/sim-bits.h: Document ROTn macro. 
igen/{igen.c,ld-insns.h}: Document mnemonic string formats.
mips/Makefile.in: Add dependencies for files included by mips.igen
mips/vr5400.igen: checkpoint vr5400 instructions.
 1997-10-29 04:02:30 +00:00
Andrew Cagney
89d0973831 Add support for 16 byte quantities to sim-endian macro H2T. 
Add model-filter field to option, include, model anf function igen records
 1997-10-28 07:10:36 +00:00
Andrew Cagney
a86809d323 Implement sim_core_{read,write}_word using sim_core_{read,write}_<N>. 1997-10-28 02:13:09 +00:00
Doug Evans
084219a513 * sem-ops.h (U{DIV,MOD}[BHSD]I): Use unsigned division. 1997-10-27 20:45:56 +00:00
Doug Evans
c3e3e4ad2f * sim-endian.h: Disable 16 byte support. 
So things will build.
 1997-10-27 19:47:24 +00:00
Doug Evans
374b95c1b0 * sim-n-endian.h: Add TAGS entrys for 16 byte versions. 1997-10-27 19:25:59 +00:00
Doug Evans
2fc2f8d8a4 Fix typo. 1997-10-27 19:25:05 +00:00
Andrew Cagney
16bd5d6e52 Separate r5900 specifoc and mips16 instructions. 
Add support for this to configure (vr5400 target only)
 1997-10-27 07:55:24 +00:00
Andrew Cagney
90ad43b2de Add mips64vr5400 to configuration list 
Mark mipsIV instructions as being implemented by the vr5400.
Sanitize.
 1997-10-27 06:42:13 +00:00
Andrew Cagney
e2880fadf3 Add include-file support to igen. 1997-10-27 06:30:35 +00:00
Andrew Cagney
f45dd42b32 Add 128 bit transfers to sim core. 1997-10-27 03:00:12 +00:00
Gavin Romig-Koch
635ae9cb7c * sim/mips/gencode.c (build_instruction): Follow sim_write's lead in using 
BigEndianMem instead of !ByteSwapMem.
 1997-10-25 20:53:46 +00:00