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sim: bfin/msp430: drop run-sim.h include This header is used only with run.o, and both of these use nrun.o.
2015-03-23 04:08:25 +00:00
2015-03-23 Mike Frysinger <vapier@gentoo.org>
* sim-main.h: Delete run-sim.h include.
sim: rename tconfig.in to tconfig.h Rather than manually include tconfig.h when we think we'll need it (which is error prone as it can define symbols we expect from config.h), have it be included directly by config.h. Since we know we have to include that header everywhere already, this will make sure tconfig.h isn't missed. It should also be fine as tconfig.h is supposed to be simple and only set up a few core defines for the target. This allows us to stop symlinking it in place all the time and just use it straight out of the respective source directory.
2015-03-15 03:41:25 +00:00
2015-03-16 Mike Frysinger <vapier@gentoo.org>
* aclocal.m4, config.in, configure: Regenerate.
* tconfig.in: Rename file ...
* tconfig.h: ... here.
sim: dv-sockser: push module init prototype down Pull out the duplicated dv_sockser_install prototype from the tconfig.in files and put it in the one place it gets used -- sim-module.c. This is still arguably incorrect, but it's better than the status quo where the tconfig.in has to include header files and duplicate the dv-sockser func. The tconfig header is meant to be simple and contain a target defines.
2015-03-15 06:55:08 +00:00
2015-03-15 Mike Frysinger <vapier@gentoo.org>
* tconfig.in: Delete includes.
[HAVE_DV_SOCKSER]: Delete.
sim: bfin: fix signed warning Fix the type of the local var to match the function it is passed to.
2015-03-15 00:54:49 +00:00
2015-03-14 Mike Frysinger <vapier@gentoo.org>
* bfin-sim.c (decode_dsp32alu_0): Change v to bu32.
sim: make nrun the default run program We want people to stop using the run.c frontend, but it's hard to notice when it's still set as the default. Lets flip things so nrun.c is the default, and users of run.c will get an error by default. We turn that error into a warning for existing sims so we don't break them -- this is mostly meant for people starting new ports.
2015-02-19 08:46:01 +00:00
2015-03-14 Mike Frysinger <vapier@gentoo.org>
* Makefile.in (SIM_RUN_OBJS): Delete.
sim: bfin: fix up linux-fixed-code.h generation more [PR sim/13160] Add a trailing semi-colon to the sed print command as the BSD sed implementation wants it. It's a nop otherwise and works fine on GNU/etc... implementations too.
2015-03-10 05:41:48 +00:00
2015-03-10 Mike Frysinger <vapier@gentoo.org>
PR sim/13160
* Makefile.in ($(srcdir)/linux-fixed-code.h): Put a ; after the
print sed command for BSD compatibility.
sim: bfin: fix up linux-fixed-code.h generation [PR sim/10143] The use of $< ends up picking the wrong object out of the depend list. Specify the input name directly to avoid fragility. On BSD systems, we need to make sure all options come before the non-options (i.e. the files). Reported-by: Chris Johns <chrisj@rtems.org> URL: https://sourceware.org/bugzilla/show_bug.cgi?id=13160
2015-03-09 03:53:48 +00:00
2015-03-08 Mike Frysinger <vapier@gentoo.org>
sim: bfin: fix bug reference
2015-03-09 17:26:51 +00:00
PR sim/13160
sim: bfin: fix up linux-fixed-code.h generation [PR sim/10143] The use of $< ends up picking the wrong object out of the depend list. Specify the input name directly to avoid fragility. On BSD systems, we need to make sure all options come before the non-options (i.e. the files). Reported-by: Chris Johns <chrisj@rtems.org> URL: https://sourceware.org/bugzilla/show_bug.cgi?id=13160
2015-03-09 03:53:48 +00:00
* Makefile.in ($(srcdir)/linux-fixed-code.h): Specify the asm input
directly rather than use $<. Move the file name to the end of the
sed command to be POSIX compliant.
Fix --diable-shared --enable-plugins build breakage Directories that don't use libtool need to add -ldl (on most *nix hosts) to provide dlopen for libbfd. config/ * plugins.m4 (AC_PLUGINS): If plugins are enabled, add -ldl to LIBS via AC_SEARCH_LIBS. gdb/ * acinclude.m4 (GDB_AC_CHECK_BFD): Don't add -ldl. * config.in: Regenerate. sim/ppc/ * configure.ac: Invoke AC_PLUGINS. * config.in: Regenerate. and regen lots of configure files.
2014-08-19 12:29:56 +00:00
2014-08-19 Alan Modra <amodra@gmail.com>
* configure: Regenerate.
Regenerate sim configury.
2014-08-15 22:46:40 +00:00
2014-08-15 Roland McGrath <mcgrathr@google.com>
* configure: Regenerate.
* config.in: Regenerate.
sim: convert old style prototypes Most of these prototypes have been killed off, but we have a few left in the sim tree. Clean them up so we can enable the -W flag for it.
2014-02-20 03:29:37 +00:00
2014-03-04 Mike Frysinger <vapier@gentoo.org>
* configure: Regenerate.
Regenerate sim configure files to pick up support for powerpc64le in libtool.m4.
2013-09-23 00:32:27 +00:00
2013-09-23 Alan Modra <amodra@gmail.com>
* configure: Regenerate.
sim: bfin: note missing parallel handling of SEARCH The SEARCH insn is an oddball when it comes to parallel usage. It places a big limit on what other insns it can run in parallel with, but we don't currently track the amount of state needed to verify this (since no other insn really requires this). Add a note for now in case we get around to it.
2013-06-24 02:06:32 +00:00
2013-06-23 Mike Frysinger <vapier@gentoo.org>
* bfin-sim.c (decode_dsp32alu_0): Add note about broken handling of
SEARCH with parallel insns.
sim: bfin: handle invalid HLs encoding in dsp shift insns For many of the 32bit dsp shift related insns, we were just ignoring the HLs field. The hardware does not though and will reject the insn if it's set incorrectly. Update the sim to match.
2013-06-24 02:03:03 +00:00
2013-06-23 Mike Frysinger <vapier@gentoo.org>
* bfin-sim.c (decode_dsp32shift_0): Make sure HLs is 0 after last
insn that uses it.
(decode_dsp32shiftimm_0): Likewise.
Require HLs be less than 2 for accumulator shift insns.
sim: bfin: stricter insn decoding We wrote a test case that tries every single 32bit opcode on the hardware and compared it to the sim. There were a bunch of places in the sim where we weren't strict enough (requiring certain parts of the opcode be set) so we were treating a lot of invalid opcodes as valid ones. This sprinkles out a lot additional checks in the dsp32alu class. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-19 03:12:26 +00:00
2013-06-18 Mike Frysinger <vapier@gentoo.org>
* bfin-sim.c (decode_dsp32alu_0): Check more opcode fields before
decoding various insns.
sim: bfin: add flush/HWERR todo
2013-06-17 04:43:22 +00:00
2013-06-17 Mike Frysinger <vapier@gentoo.org>
* TODO: Add more notes.
sim: bfin: only regen linux-fixed-code.h in maintainer mode Since many people don't have a Blackfin toolchain available, only try to regenerate the header file when in maintainer mode. This file rarely changes, and when it does, we commit the generated output, so there's almost never a need to run directly on an end system.
2013-06-10 02:25:35 +00:00
2013-06-09 Mike Frysinger <vapier@gentoo.org>
* Makefile.in ($(srcdir)/linux-fixed-code.h): Add
@MAINTAINER_MODE_TRUE@ as the first item in the dependency list.
sim: use AM_MAINTAINER_MODE I noticed the sim code is using an old implementation of the maintainer logic. I cut it over to the new macro (like gdb has been doing). In practice, it makes no difference currently as nothing in the sim tree uses it, but I have a follow up commit for the Blackfin tree that needs it.
2013-06-05 01:42:13 +00:00
2013-06-03 Mike Frysinger <vapier@gentoo.org>
* aclocal.m4, configure: Regenerate.
gdb Freddie Chopin <freddie_chopin@op.pl> PR build/15414: * configure: Rebuild. * configure.ac (build_warnings): Do not use -Wformat-nonliteral with -Wno-format. sim/common * acinclude.m4 (SIM_AC_OPTION_WARNINGS): Do not use -Wformat-nonliteral with -Wno-format. sim/bfin * configure: Rebuild. sim/cr16 * configure: Rebuild. sim/cris * configure: Rebuild. sim/d10v * configure: Rebuild. sim/igen * configure: Rebuild. sim/m68hc11 * configure: Rebuild. sim/mips * configure: Rebuild. sim/mn10300 * configure: Rebuild. sim/v850 * configure: Rebuild.
2013-05-10 16:10:40 +00:00
2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
* configure: Rebuild.
sim: rewrite SIM_AC_OPTION_HARDWARE a bit to simplify things There's no need to put the majority of the logic into the 3rd arg of the AC_ARG_ENABLE. Coupled with the lack of indentation, it makes it hard to follow, error prone to update, and duplicates code (with the 4th arg). So pull the logic out of the 3rd arg and outside of the AC_ARG_ENABLE macro. This allows us to gut the 4th arg entirely, merge with the code that followed the macro, and fix bugs related to the new dv-sockser in the process. Hopefully building the various sims with the default sim-hardware settings, as well as with explicit --{dis,en}able-sim-hardware flags, should all just work now.
2013-03-26 18:00:04 +00:00
2013-03-26 Mike Frysinger <vapier@gentoo.org>
* aclocal.m4, configure: Regenerate.
2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com> * configure.ac: Use $SIM_DV_SOCKSER_O. * configure: Regenerated.
2013-03-23 15:08:07 +00:00
2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
* configure.ac: Use $SIM_DV_SOCKSER_O.
* configure: Regenerated.
Revert GPL version change in sim/bfin/aclocal.m4 sim/bfin/ChangeLog: * aclocal.m4: Revert the previous change changing the license from GPL v2 or later to GPL v3 or later (this file was generated).
2012-12-20 05:01:54 +00:00
2012-12-20 Joel Brobecker <brobecker@adacore.com>
* aclocal.m4: Revert the previous change changing
the license from GPL v2 or later to GPL v3 or later
(this file was generated).
Revert GPL version change in linux-fixed-code.s. sim/bfin/ChangeLog: * linux-fixed-code.s: Revert the previous change changing the license from GPL v2 or later to GPL v3 or later.
2012-12-20 04:18:53 +00:00
2012-12-20 Joel Brobecker <brobecker@adacore.com>
* linux-fixed-code.s: Revert the previous change changing
the license from GPL v2 or later to GPL v3 or later.
sim: bfin: set bfrom alias field to correct size When the sim is built w/out the bfroms, we end up passing a length of 0 when mapping the rom region which the core sim code rejects. So add an alias field equal to the length to avoid that error. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-01 03:31:55 +00:00
2012-07-31 Mike Frysinger <vapier@gentoo.org>
* machs.c (bf54x_roms): Pass 0x1000 to alias field of BFROM, and
0x10000 to the alias field of BFROMA.
(bf561_roms): Pass 0x1000 to alias field of BFROM.
(bf59x_roms): Pass 0x10000 to alias field of BFROMA.
sim: bfin: update return value in bfin_reg_{fetch,store} The latest gdb sim-remote.c really wants a return value from the fetch/store register functions, so update the Blackfin sim to avoid the warnings/errors. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-01 03:22:32 +00:00
2012-07-31 Mike Frysinger <vapier@gentoo.org>
* machs.c (bfin_reg_fetch): Change return 0 to return -1, and
return -1 to return 4.
(bfin_reg_store): Likewise.
Define PACKAGE macro in all sims' config.h. Some of the common includes in include/gdb such as callback.h include bfd.h. But there was a recent change in bfd-in.h to require that config.h be included before bfd.h can be included: /* PR 14072: Ensure that config.h is included first. */ #if !defined PACKAGE && !defined PACKAGE_VERSION #error config.h must be included before this header #endif PACKAGE_VERSION is always defined by default by the AC_INIT autoconf macro, but PACKAGE isn't. This patch updates the SIM_AC_COMMON macro to define it, and then regenerates all configure scripts and config.in files. sim/common/changeLog: * acinclude.m4 (SIM_AC_COMMON): Define PACKAGE. * config.in, configure: Regenerate. sim/ChangeLog: * configure: Regenerate. sim/arm/ChangeLog: * config.in, configure: Regenerate. sim/avr/ChangeLog: * config.in, configure: Regenerate. sim/bfin/ChangeLog: * config.in, configure: Regenerate. sim/cr16/ChangeLog: * config.in, configure: Regenerate. sim/cris/ChangeLog: * config.in, configure: Regenerate. sim/d10v/ChangeLog: * config.in, configure: Regenerate. sim/erc32/ChangeLog: * config.in, configure: Regenerate. sim/frv/ChangeLog: * config.in, configure: Regenerate. sim/h8300/ChangeLog: * config.in, configure: Regenerate. sim/iq2000/ChangeLog: * config.in, configure: Regenerate. sim/lm32/ChangeLog: * config.in, configure: Regenerate. sim/m32c/ChangeLog: * config.in, configure: Regenerate. sim/m32r/ChangeLog: * config.in, configure: Regenerate. sim/m68hc11/ChangeLog: * config.in, configure: Regenerate. sim/mcore/ChangeLog: * config.in, configure: Regenerate. sim/microblaze/ChangeLog: * config.in, configure: Regenerate. sim/mips/ChangeLog: * config.in, configure: Regenerate. sim/mn10300/ChangeLog: * config.in, configure: Regenerate. sim/moxie/ChangeLog: * config.in, configure: Regenerate. sim/ppc/ChangeLog: * configure: Regenerate. sim/rl78/ChangeLog: * config.in, configure: Regenerate. sim/rx/ChangeLog: * config.in, configure: Regenerate. sim/sh/ChangeLog: * config.in, configure: Regenerate. sim/sh64/ChangeLog: * config.in, configure: Regenerate. sim/v850/ChangeLog: * config.in, configure: Regenerate. sim/testsuite/ChangeLog: * configure: Regenerate.
2012-06-15 17:20:10 +00:00
2012-06-15 Joel Brobecker <brobecker@adacore.com>
* config.in, configure: Regenerate.
sim: bfin: new PINT model Newer BF54x parts feature an updated GPIO block where all the interrupt handling is split off, so create a new model for the pin interrupts. This is missing the port forwarding aspects, but at least the register interface should be there. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 06:13:06 +00:00
2012-04-09 Mike Frysinger <vapier@gentoo.org>
* configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_pint.
* configure: Regenerate.
* dv-bfin_pint.c, dv-bfin_pint.h: New device model.
* machs.c (bf542_dev): Add PINT register blocks.
(bf544_dev, bf547_dev): Likewise.
(PINT_PIQS): Define.
(bf54x_port): Add pint/gpio routing.
* machs.h (BFIN_MMR_PINT_SIZE): Define.
sim: bfin: new GPIO model Newer BF54x parts feature an updated GPIO block, so create a new model for it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 06:11:41 +00:00
2012-04-09 Mike Frysinger <vapier@gentoo.org>
* configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_gpio2.
* configure: Regenerate.
* dv-bfin_gpio2.c, dv-bfin_gpio2.h: New device model.
* machs.c (bf54x_mem): Delete GPIO mem stub.
(bf542_dev): Add GPIO register blocks.
(bf544_dev, bf547_dev): Likewise.
* machs.h (BFIN_MMR_GPIO2_SIZE): Define.
sim: bfin: fix ASTAT issues in immediate shifts More ASTAT directed fixes, but this time at the dsp32shift insns. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 05:56:32 +00:00
2012-04-09 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32shift_0): Extract the sign for ASHIFT
and LSHIFT, and set ASTAT based on the before/after values.
Rename "val" to "acc" to be consistent with other code branches.
sim: bfin: fix ASTAT/correctness issues with arithmetic shifts This improves some of the arithmetic shifts to better match the hardware (especially wrt ASTAT behavior). We hit areas where the published documentation is thin so we have to rely on tests run on the hardware to figure out how things should behave. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 05:52:38 +00:00
2012-04-09 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (sgn_extend): New helper.
(decode_dsp32shiftimm_0): Call lshift when newimmag is more
than 16, otherwise call ashiftrt. Set ASTAT fields as needed.
For accumulator shifts, call new sgn_extend helper.
sim: bfin: more parallel insn checks Now that we keep track of the exact parallel insn slot we're in, we can make sure that the current insn being decoded is valid for that slot. This brings us much closer to the hardware in flagging invalid parallel insn combinations. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 03:59:10 +00:00
2012-04-08 Mike Frysinger <vapier@gentoo.org>
* bfin-sim.c (illegal_instruction_or_combination): New helper.
(decode_ProgCtrl_0): Call illegal_instruction_or_combination instead
of illegal_instruction.
(decode_PushPopReg_0, decode_CCflag_0, decode_CC2dreg_0,
decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
decode_dspLDST_0, decode_LDST_0, _interp_insn_bfin): Likewise.
(decode_PushPopMultiple_0): Call illegal_instruction_combination when
PARALLEL_GROUP is not BFIN_PARALLEL_NONE.
(decode_CCflag_0, decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0,
decode_COMPI2opD_0, decode_COMPI2opP_0): Likewise.
(decode_CC2stat_0): Check PARALLEL_GROUP before cbit.
(decode_LDSTpmod_0): Call illegal_instruction_combination when
PARALLEL_GROUP is BFIN_PARALLEL_GROUP2.
(decode_dagMODim_0, decode_dagMODik_0, decode_LDST_0,
decode_LDSTiiFP_0, decode_LDSTii_0): Likewise.
sim: bfin: keep track of the exact position of parallel insns Some insns need to know which slot they're in to determine whether they are valid. So add an enum for each slot, and check that rather than the overall insn len. This makes tracking things in the code much clearer. However, this code is functionally the same, so a follow up patch will leverage this more to properly flag invalid parallel insn combos. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 03:49:30 +00:00
2012-04-08 Mike Frysinger <vapier@gentoo.org>
* bfin-sim.h (bfin_parallel_group): New enum.
(bfin_cpu_state): Add new "group" member.
(PARALLEL_GROUP): Define.
* bfin-sim.c (decode_ProgCtrl_0): Change INSN_LEN check to
PARALLEL_GROUP.
(decode_CaCTRL_0, decode_PushPopReg_0, decode_ccMV_0, decode_CCflag_0,
decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
decode_LOGI2op_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
decode_CALLa_0, decode_linkage_0): Likewise.
(_interp_insn_bfin): Set PARALLEL_GROUP.
(interp_insn_bfin): Likewise.
sim: bfin: drop excess space in negation insn The amod1 helper includes a leading space so it can expand into the empty string when need be, which means the caller need not add spacing itself. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-08 20:48:20 +00:00
2012-04-08 Mike Frysinger <vapier@gentoo.org>
* bfin-sim.c (decode_dsp32alu_0): Delete extra space in TRACE_INSN.
sim: bfin: throw VEC_ILGAL_I with 32bit insn in group1/group2 slots Parallel insns can only do one 32bit, then two 16bits. So if we see a 2nd 32bit insn after the first 32bit in a parallel insn, abort. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-01 04:31:46 +00:00
2012-04-01 Mike Frysinger <vapier@gentoo.org>
* bfin-sim.c (_interp_insn_bfin): Call illegal_instruction_combination
when INSN_LEN is non-zero before 32bit decode.
sim: bfin: simplify field width processing and fix build warnings This fix the build time warning: warning: format not a string literal, argument types not checked [-Wformat-nonliteral] Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-01 04:23:40 +00:00
2012-04-01 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (fmtconst): Replace decimal handling with a single
sprintf call and the '*' field width.
sim: bfin: fix unused bfrom handling for BF535 machs.c: In function 'bfin_model_cpu_init': machs.c:1657:1: warning: 'bfrom' may be used uninitialized in this function [-Wuninitialized] Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-01 04:21:03 +00:00
2012-04-01 Mike Frysinger <vapier@gentoo.org>
* machs.c (bfin_model_map_bfrom): Return when mnum is 535.
sim: bfin: fix build warning/style with auxvt_size Fix warning about mixing decls and code by moving auxvt_size decl down to the scope where it is used. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-01 02:39:12 +00:00
2012-04-01 Mike Frysinger <vapier@gentoo.org>
* interp.c (bfin_user_init): Move auxvt_size decl from top to
inside of auxvt check.
sim: bfin: fix typo in BF54x SIC init The current code triggers a warning: dv-bfin_sic.c: In function 'bfin_sic_finish': dv-bfin_sic.c:930:41: warning: operation on 'sic-><U78e8>.bf54x.iwr1' may be undefined [-Wsequence-point] This points out the IWR2 register was not being setup because of a typo. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-31 18:48:20 +00:00
2012-03-31 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_sic.c (bfin_sic_finish): Change iwr1 to iwr2.
sim: bfin: include devices.h to fix build warnings The place where these funcs get defined do not include the header that declares their prototypes. Add that to fix -Wmissing-prototypes: devices.c:59:1: warning: no previous prototype for 'dv_bfin_mmr_invalid' devices.c:66:1: warning: no previous prototype for 'dv_bfin_mmr_require' devices.c:99:1: warning: no previous prototype for 'dv_bfin_mmr_check' devices.c:159:14: warning: no previous prototype for 'dv_get_bus_num' Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-31 18:44:43 +00:00
2012-03-31 Mike Frysinger <vapier@gentoo.org>
* devices.c: Include devices.h.
[PATCH] sim: make sure to include strsignal prototype Before POSIX standardized strsignal(), old systems would hide the prototype unless the normal extension defines were enabled. So use the AC_USE_SYSTEM_EXTENSIONS helper for that. Then make sure we include string.h ourselves in nrun.c rather than relying on implicit includes via other sim headers. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-24 05:38:43 +00:00
2012-03-24 Mike Frysinger <vapier@gentoo.org>
* aclocal.m4, config.in, configure: Regenerate.
sim: bfin: fix corner case Logical shift issues From: Robin Getz <robin.getz@analog.com> Overflow with shift operations happens independently of saturation, but we have the logic merged. Extend the lshift function so that callers can tell it when to handle each independently, and then do so when it's needed. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 05:06:23 +00:00
2012-03-19 Robin Getz <robin.getz@analog.com>
Mike Frysinger <vapier@gentoo.org>
* bfin-sim.c (lshift): Add an overflow flag. Delete now unused
i, j, and tmp vars. Add a new v_i var. Split the overflow logic
out from the saturate logic. Do not set V ASTAT bits when working
with accumulators.
(decode_ALU2op_0): Add new argument to lshift call.
(decode_LOGI2op_0, decode_dsp32shift_0, decode_dsp32shiftimm_0):
Likewise.
sim: bfin: ebiu_amc: push down hardcoded base addresses To make it easier to support ebiu banks at other addresses, move the base to a runtime parameter rather than structure. Future work will make this more dynamic, but I'm waiting for more details first. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 03:09:20 +00:00
2012-03-18 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_ebiu_amc.c (struct bfin_ebiu_amc): Add bank_base.
(bfin_ebiu_amc_write_amgctl): Replace BFIN_EBIU_AMC_BASE with
amc->bank_base.
(bfin_ebiu_amc_finish): Assign BFIN_EBIU_AMC_BASE to amc->bank_base.
sim: bfin: use ARRAY_SIZE Rather than hardcode the constant, use ARRAY_SIZE to get it. Should be no functional changes here. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 01:16:25 +00:00
2012-03-18 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_ebiu_amc.c (bfin_ebiu_amc_attach_address_callback): Use
ARRAY_SIZE rather than hardcoded constant.
sim: bfin: drop old linux/mii.h workarounds We had some workarounds for old linux/mii.h headers, but it breaks with newer ones. So tweak the checks a bit to work with newer ones. We'll worry about older systems once someone complains. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-04 19:56:57 +00:00
2012-02-04 Mike Frysinger <vapier@gentoo.org>
* config.in: Regenerate.
* configure: Likewise.
* configure.ac: Add linux/types.h to AC_CHECK_HEADERS.
* dv-eth_phy.c: Check for HAVE_LINUX_TYPES_H, and delete __u16 and
_LINUX_TYPES_H defines.
sim: bfin: lookup target strings when tracing system calls Parsing target addresses is hard if not generally useless, so use the new cb_get_string function to lookup the associated strings as well. Now the trace output is quickly useful instead of just marginally so. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-12-03 19:05:15 +00:00
2011-12-03 Mike Frysinger <vapier@gentoo.org>
* interp.c (bfin_syscall): Increase _tbuf storage. Declare new local
tstr buffer. Call cb_get_string on tstr when handling CB_SYS_stat64,
CB_SYS_lstat64, CB_SYS_open, CB_SYS_write, CB_SYS_unlink,
CB_SYS_truncate, CB_SYS_rename, CB_SYS_stat, CB_SYS_lstat. Include
tstr in the tbuf output.
sim: generate build dependencies on the fly Lift the code that GDB is using to generate dependencies on the fly and port it over to the sim. Now people shouldn't have to manually maintain these in their Makefile's. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-12-03 18:23:51 +00:00
2011-12-03 Mike Frysinger <vapier@gentoo.org>
* Makefile.in: Delete all dependency rules.
* aclocal.m4, configure: Regenerate.
sim: dv-cfi: check for log2 support in libm when enabled The dv-cfi model uses log2() internally, so make sure we automatically link in libm when required. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-19 21:28:27 +00:00
2011-10-19 Mike Frysinger <vapier@gentoo.org>
* configure: Regenerate after common/acinclude.m4 update.
sim: rename common/aclocal.m4 to common/acinclude.m4 Automake likes to dump macros automatically used into the aclocal.m4 file, but the common/aclocal.m4 naming prevents that. So rename it to the more normal "acinclude.m4" so the aclocal tool can work. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-18 00:31:00 +00:00
2011-10-17 Mike Frysinger <vapier@gentoo.org>
* configure.ac: Change include to common/acinclude.m4.
* aclocal.m4, configure: Regenerate.
sim: move from common.m4 to SIM_AC_COMMON Now that the sourceware tree generally requires autoconf-2.64, update the sim tree to require that too. This allows us to drop the long standing SIM_AC_COMMON/common.m4 workaround as autoconf 2.64+ seems to work for me. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-18 00:17:24 +00:00
2011-10-17 Mike Frysinger <vapier@gentoo.org>
* configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
call. Replace common.m4 include with SIM_AC_COMMON.
* configure: Regenerate.
sim: bfin: use store buffer for VIT_MAX insns The VIT_MAX insns can be used in parallel, so we need to use the store buffer so we don't clobber the output register before we get a chance to do a memory store with it. Reported-by: Kai Iskratsch <kai@stella.at> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-09-29 03:19:47 +00:00
2011-09-28 Mike Frysinger <vapier@gentoo.org>
* bfin-sim.c (decode_dsp32shift_0): Use STORE() for VIT_MAX insns.
sim: start a unified sim_do_command Since sim_do_command for many people simply calls sim_args_command, start a unified version of it. For people who handle their own options, they could switch to this by using sim_add_option_table instead. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-05 19:06:38 +00:00
2011-07-05 Mike Frysinger <vapier@gentoo.org>
* interp.c (sim_do_command): Delete.
sim: bfin: implement stat_map for virtual environments (libgloss) The stat syscalls cannot work without a stat map, so declare one that matches libgloss for virtual environments. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-01 21:53:03 +00:00
2011-07-01 Mike Frysinger <vapier@gentoo.org>
* interp.c (cb_linux_stat_map_32, cb_linux_stat_map_64): Rename from
stat_map_32 and stat_map_64.
(cb_libgloss_stat_map_32): New stat map.
(stat_map_32, stat_map_64): New stat map pointers.
(bfin_user_init): Assign stat_map_32 to cb_linux_stat_map_32 and
stat_map_64 to cb_linux_stat_map_64.
(bfin_virtual_init): New function.
(sim_create_inferior): Call bfin_virtual_init for all other envs.
sim: bfin: pass up result2/errcode with libgloss syscalls Now that the Blackfin libgloss code extracts the 2nd result and the error code from the R1/R2 registers, have the sim fill them up. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-22 04:21:29 +00:00
2011-06-22 Mike Frysinger <vapier@gentoo.org>
* interp.c (bfin_syscall): Delete old comment. Set dreg 1 to
sc.result2 and dreg 2 to sc.errcode.
sim: bfin: set ASTAT AV/AVS when shifting accumulators overflow The LSHIFT/ASHIFT insns that work with accumulators lacked AV/AVS handling in the ASTAT register, so add it to match the hardware. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 22:03:10 +00:00
2011-06-18 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32shift_0): Clear ASTAT[AV] if val is 0,
else set it. Set ASTAT[AVS] if val is 0. Do this for LSHIFT and
ASHIFT accumulator insns.
sim: bfin: do not touch ASTAT[V] when shifting accumulators If we're shifting accumulators, we don't want to touch the V bit in ASTAT, so add size checks to the ashiftrt/lshiftrt helpers. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 21:59:38 +00:00
2011-06-18 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (ashiftrt): If size is 40, do not call SET_ASTATREG.
(lshiftrt): Likewise.
sim: bfin: do not extend accumulator in LSHIFT insns The logical shift insn does not sign extend before shifting, so we shouldn't either. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 21:58:08 +00:00
2011-06-18 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32shift_0): Use get_unextended_acc
rather than get_extended_acc in LSHIFT insns.
sim: bfin: tweak saturation handling with TFU/FU modes and MM bit This too should have been squashed into an earlier change. It covers a few more cases in the V/VS saturation patch when working with TFU and FU modes of dsp insns. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 21:22:50 +00:00
2011-06-18 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_macfunc): Handle MM when mmod is M_TFU.
Check MM once when mmod is M_FU to match M_TFU better.
sim: bfin: handle large shift values with accumulator shift insns When the shift magnitude exceeds 32 bits, the values rotate around (since the hardware is actually a barrel shifter). So handle this edge case, update the corresponding AV bit in ASTAT which was missing previously, and tweak the AZ setting based on how the hardware behaves. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 20:59:54 +00:00
2011-06-18 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32shiftimm_0): When shift is greater than
32, perform a left shift. Update the corresponding AV bit. Set
AZ when the low 32bits are also zero.
sim: bfin: handle odd shift values with shift insns The shift magnitude is a 5-bit signed value. When it is between 0 and 15, then we do the requested shift, but when it is outside of that, we have to do the opposite. That means we flip between lshift and ashiftrt to match the hardware. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 20:59:24 +00:00
2011-06-18 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32shiftimm_0): With left shift vector insns,
call lshift only when count is positive. Otherwise, call ashiftrt.
With arithmetic right shift insns, call ashiftrt when the value is
small enough, otherwise call lshift.
sim: bfin: fix M_IH saturation size This reverts the previous commit and does it right. This change got lost in the shuffle of patches I have pending. Basically the logic is to change the 32bit saturation (and then masked to 16bits) to a proper 16bit saturation. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 20:10:57 +00:00
2011-06-18 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (extract_mult): Call saturate_s16 directly when
mmod is M_IH rather than computing the result by hand.
sim: bfin: handle V/VS saturation in dsp mac insns Some saturation cases with dsp mac insns were not setting the V flag. So implement that part and split up the logic between the dual macs. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 20:04:32 +00:00
2011-06-18 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_macfunc): Add nosat_acc to track acc value
before saturation, set sat when more cases saturate, and set the
overflow bit based on these results. For M_TFU, M_IU, M_FU, and
M_W32, change the max values compared against.
(decode_dsp32mac_0): Delete v_i and add v_0 and v_1. Pass v_1
when processing MAC1 and pass v_0 when processing MAC0. Combine
the results into the V/VS ASTAT bits.
sim: bfin: handle the MM flag in M_IU/M_TFU modes with dsp insns Our handling of the M_IU/M_TFU modes are missing signed saturation when the MM flag is set, so add it to match the hardware behavior. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 19:44:14 +00:00
2011-06-18 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (extract_mult): Call saturate_s32 when MM is set
and mmod is M_IU. Call saturate_s16 when MM is set and mmod
is M_TFU.
sim: bfin: fix sign extension in dsp insns with MM flag After testing the hardware with all the different dsp flags, the MM flag triggers sign extension in all modes. So drop the limited use of it, and the local custom helper that was also extending unsigned values. We also can see that the flag checks in the mult/mac insns have the same behavior with sign extending, so add a helper func to keep the logic the same in both places. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 19:42:55 +00:00
2011-06-18 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_multfunc): Call new is_macmod_signed, and
allow MM to sign extend all the time.
(decode_macfunc): Likewise. Drop sign extension of unsigned
values.
sim: bfin: fix accumulator edge case saturation When the accumulator saturates, it needs to be greater than, but not equal to, the largest unsigned value as this is what the hardware does. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 17:27:01 +00:00
2011-06-18 Robin Getz <robin.getz@analog.com>
sim: bfin: fix inverted changelog entry
2011-06-18 18:09:35 +00:00
* bfin-sim.c (saturate_s40_astat): Change ">=" to ">".
sim: bfin: fix accumulator edge case saturation When the accumulator saturates, it needs to be greater than, but not equal to, the largest unsigned value as this is what the hardware does. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 17:27:01 +00:00
(decode_macfunc): Likewise when mmod is M_IH.
sim: bfin: use freeargv for freeing argvs Since the argv array was allocated with dupargv, it needs to be freed with freeargv to avoid leaks. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 17:20:38 +00:00
2011-06-18 Mike Frysinger <vapier@gentoo.org>
* interp.c (sim_create_inferior): Change free to freeargv.
sim: bfin: add support for glued SIC interrupt lines The BF537 family glues a bunch of peripherals into single interrupt lines that run into the SIC. To model this same behavior in the sim, we need to use the glue-or device, and in order to use that, we need to tweak things a bit in the mach code to allow declaring of these new devices. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-04 17:18:04 +00:00
2011-06-04 Mike Frysinger <vapier@gentoo.org>
* machs.c (bf534_dev, bf537_dev): Add glue-or devices.
(bf537_port): Define applicable devices with PORT to the glue-or
devices instead of SIC.
(bfin_model_hw_tree_init): Drop old sim_hw_parse call for bfin_sic.
Only parse reg/type when the device has an address. Move the call
to dv_bfin_hw_port_parse up before slash check.
sim: bfin: push SIC mappings to device tree The machs.c file is the best place for holding cpu-specific details, so restructure the way the SIC manages its ports to do just that. Now the SIC's have a standard set of input pins and the different line routing from peripherals is kept in the device tree only. This better models the hardware where the SIC doesn't care about the exact peripheral that is sending it stuff, just which input pin it gets it on. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-04 17:11:19 +00:00
2011-06-04 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_sic.c (ENC, DEC_PIN, DEC_SIC): Move above the
BFIN_SIC_TO_CEC_PORTS definition.
(SIC_PORTS): New define.
(bfin_sic_50x_ports, bfin_sic_51x_ports, bfin_sic_52x_ports,
bfin_sic_533_ports, bfin_sic_537_ports, bfin_sic_538_ports,
bfin_sic_54x_ports, bfin_sic_561_ports, bfin_sic_59x_ports):
Delete old layouts.
(bfin_sic1_ports, bfin_sic2_ports, bfin_sic3_ports,
bfin_sic_561_ports): Define new layouts with SIC_PORTS().
(bfin_sic_finish): Change reference to bfin_sic_50x_ports,
bfin_sic_51x_ports, bfin_sic_52x_ports, and bfin_sic_538_ports
to bfin_sic2_ports. Change reference to bfin_sic_533_ports,
bfin_sic_537_ports, and bfin_sic_59x_ports to bfin_sic1_ports.
Change reference to bfin_sic_54x_ports to bfin_sic3_ports.
* machs.c (bfin_port_layout): New structure.
(bfin_model_data): Add new "port" and "port_count" members.
(PORT, SIC): New defines.
(bf000_port, bf50x_port, bf51x_port, bf52x_port, bf533_port,
bf537_port, bf538_port, bf54x_port, bf561_port, bf592_port):
Move and redefine port layout from dv-bfin_sic.c to here.
(bf504_port, bf506_port, bf512_port, bf514_port, bf516_port,
bf518_port, bf522_port, bf523_port, bf524_port, bf525_port,
bf526_port, bf527_port, bf531_port, bf532_port, bf534_port,
bf536_port, bf539_port, bf542_port, bf544_port, bf547_port,
bf548_port, bf549_port): New defines.
(bfin_model_data): Link in new bfin_port_layout.port member.
(dv_bfin_hw_port_parse): New function.
(dv_bfin_hw_parse): Call new dv_bfin_hw_port_parse function.
(bfin_model_hw_tree_init): Replace calls to sim_hw_parse for
bfin_sic links with new dv_bfin_hw_port_parse function.
sim: bfin: dma: fix indentation
2011-06-03 05:03:31 +00:00
2011-06-03 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_dma.c (bfin_dma_io_write_buffer): Fix indentation.
sim: bfin: switch to new syscall trace level Now that the common code supports the syscall trace level, change the Blackfin code from using the event level to the syscall level. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-26 00:14:43 +00:00
2011-05-25 Mike Frysinger <vapier@gentoo.org>
* sim-main.h (TRACE_SYSCALL): Change EVENTS to SYSCALL.
sim: bfin: move model data into machs.h Pull the model data (register addresses/sizes) out of the different model files and into the machs.h header. The models themselves don't care about where they're mapped, only the mach code does. This allows us to keep the model headers from being included in the mach code which can cause issues with model-specific names colliding. Such as when a newer device model is created, but with incompatible register names/layouts. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 12:54:19 +00:00
2011-05-25 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_cec.h (BFIN_COREMMR_CEC_{BASE,SIZE}): Move to ...
* dv-bfin_ctimer.h (BFIN_COREMMR_CTIMER_{BASE,SIZE}): Move to ...
* dv-bfin_dma.h (BFIN_MMR_DMA_SIZE): Move to ...
* dv-bfin_dmac.h (BFIN_MMR_DMAC{0,1}_BASE): Move to ...
* dv-bfin_ebiu_amc.h (BF{IN,50X,54X}_MMR_EBIU_AMC_SIZE): Move to ...
* dv-bfin_ebiu_ddrc.h (BFIN_MMR_EBIU_DDRC_SIZE): Move to ...
* dv-bfin_ebiu_sdc.h (BFIN_MMR_EBIU_SDC_SIZE): Move to ...
* dv-bfin_emac.h (BFIN_MMR_EMAC_{BASE,SIZE}): Move to ...
* dv-bfin_eppi.h (BFIN_MMR_EPPI_SIZE): Move to ...
* dv-bfin_evt.h (BFIN_COREMMR_EVT_{BASE,SIZE}): Move to ...
* dv-bfin_gpio.h (BFIN_MMR_GPIO_SIZE): Move to ...
* dv-bfin_gptimer.h (BFIN_MMR_GPTIMER_SIZE): Move to ...
* dv-bfin_jtag.h (BFIN_COREMMR_JTAG_{BASE,SIZE}): Move to ...
* dv-bfin_mmu.h (BFIN_COREMMR_MMU_{BASE,SIZE}): Move to ...
* dv-bfin_nfc.h (BFIN_MMR_NFC_SIZE): Move to ...
* dv-bfin_otp.h (BFIN_MMR_OTP_SIZE): Move to ...
* dv-bfin_pfmon.h (BFIN_COREMMR_PFMON_{BASE,SIZE}): Move to ...
* dv-bfin_pll.h (BFIN_MMR_PLL_{BASE,SIZE}): Move to ...
* dv-bfin_ppi.h (BFIN_MMR_PPI_SIZE): Move to ...
* dv-bfin_rtc.h (BFIN_MMR_RTC_SIZE): Move to ...
* dv-bfin_sic.h (BFIN_MMR_SIC_{BASE,SIZE}): Move to ...
* dv-bfin_spi.h (BFIN_MMR_SPI_SIZE): Move to ...
* dv-bfin_trace.h (BFIN_COREMMR_TRACE_{BASE,SIZE}): Move to ...
* dv-bfin_twi.h (BFIN_MMR_TWI_SIZE): Move to ...
* dv-bfin_uart.h (BFIN_MMR_UART_SIZE): Move to ...
* dv-bfin_uart2.h (BFIN_MMR_UART2_SIZE): Move to ...
* dv-bfin_wdog.h (BFIN_MMR_WDOG_SIZE): Move to ...
* dv-bfin_wp.h (BFIN_COREMMR_WP_{BASE,SIZE}): Move to ...
* machs.h: ... here.
* machs.c: Delete all dv-bfin_*.h includes except for cec/dmac.
sim: bfin: add a performance monitor stub No counters get updated, but there is enough here for software to poke things and work. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 12:41:29 +00:00
2011-05-25 Mike Frysinger <vapier@gentoo.org>
* Makefile.in (dv-bfin_pfmon.o): New target.
* configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_pfmon.
* configure: Regenerated.
* dv-bfin_pfmon.c, dv-bfin_pfmon.h: New files.
* machs.c: Add include new bfin_pfmon.h.
(bfin_core_dev): Add pfmon.
sim: bfin: add bf526-0.2/bf54x-0.4 rom regions Add regions for the on-chip roms on some newer Blackfin parts. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 12:35:05 +00:00
2011-05-25 Mike Frysinger <vapier@gentoo.org>
* machs.c (bf526_roms): Add a region with rev of 2.
(bf54x_roms): Add regions with rev of 4.
* bfroms/all.h: Include new bf526-0.2.h, bf54x-0.4.h, and
bf54x_l1-0.4.h headers.
* bfroms/bf526-0.2.h, bfroms/bf54x-0.4.h, bfroms/bf54x_l1-0.4.h:
New header files.
sim: bfin: allow pushing of SP The hardware respects this insn, and some code (like the on-chip bootrom) uses it, so allow it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-14 16:00:37 +00:00
2011-05-14 Mike Frysinger <vapier@gentoo.org>
* bfin-sim.c (decode_PushPopReg_0): Delete (grp == 1 && reg == 6)
check for SP reg.
sim: bfin: implement loop back support in the UARTs The UART has a LOOP_ENA bit in its MCR register where writes to the THR go to the RBR. Implement support for this mode. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-14 15:59:09 +00:00
2011-05-14 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_uart.c (bfin_uart_write_byte): Add a mcr arg. Declare a
local uart. When LOOP_ENA is set in mcr, write to the saved byte
and count fields of the uart.
(bfin_uart_io_write_buffer): Pass uart->mcr to bfin_uart_write_byte
and bfin_uart_get_next_byte.
(bfin_uart_get_next_byte): Add a mcr arg. Move uart->saved_count
check first, and skip the remaining code when LOOP_ENA is set in mcr.
* dv-bfin_uart.h (bfin_uart_write_byte): Add an mcr argument.
(bfin_uart_get_next_byte): Likewise.
(XOFF, MRTS, RFIT, RFRT, LOOP_ENA, FCPOL, ARTS, ACTS): Define.
* dv-bfin_uart2.c (bfin_uart_io_write_buffer): Padd uart->mcr when
calling bfin_uart_write_byte and bfin_uart_get_next_byte.
sim: bfin: fix UART LSR read-only bit saturation A few bits in the newer UART LSR register are not sticky, so make sure we clear them when returning updated status rather than leaving them always set. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-09 18:14:01 +00:00
2011-05-09 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_uart2.c (bfin_uart_io_read_buffer): Clear DR/THRE/TEMT bits
from uart->lsr before setting them.
sim: bfin: constify dmac pmap arrays Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-27 21:29:03 +00:00
2011-04-27 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_dmac.c (bfin_dmac): Constify pmap array.
(bfin_dmac_50x_pmap, bfin_dmac_51x_pmap, bfin_dmac_52x_pmap,
bfin_dmac_533_pmap, bfin_dmac_537_pmap, bfin_dmac0_538_pmap,
bfin_dmac1_538_pmap, bfin_dmac0_54x_pmap, bfin_dmac1_54x_pmap,
bfin_dmac0_561_pmap, bfin_dmac1_561_pmap, bfin_dmac_59x_pmap):
Likewise.
sim: gpio: add output support Make all of the pins bidirectional, and support sending signals when software drives the pins as outputs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-26 05:47:14 +00:00
2011-04-26 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_gpio.c (bfin_gpio_forward_ouput): New function.
(bfin_gpio_io_write_buffer): Store the current port state into
"data", and call bfin_gpio_forward_ouput when the data or dir
MMRs are updated.
(bfin_gpio_ports): Change p0..p15 to bidirect_port.
sim: gpio: update mask a/b signals better When the mask a/b MMRs are written, the output signal might change levels (as pins are [un]masked), so make sure we update the output level. Further, make sure we handle edge ints correctly by first sending a high signal followed by a low signal. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-26 05:46:02 +00:00
2011-04-26 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_gpio.c (bfin_gpio): Add "int_state" member.
(bfin_gpio_forward_int, bfin_gpio_forward_ints): New functions.
(bfin_gpio_io_write_buffer): Call bfin_gpio_forward_int when the
mask a or mask b MMRs are written.
(bfin_gpio_port_event): When handling edge gpios, set the bit in
int_state, call bfin_gpio_forward_ints, and then clear the bit.
When handling level gpios, clear/set the bit in int_state rather
than returning immediately. Call bfin_gpio_forward_ints instead
of checking mask[ab] and calling HW_TRACE/hw_port_event directly.
sim: bfin: use store buffer with more 32bit insns A bunch of 32bit insns were not using the store buffer, so when they were used in parallel insns, they would incorrectly clobber a register early. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-16 17:37:55 +00:00
2011-04-16 Mike Frysinger <vapier@gentoo.org>
* bfin-sim.c (decode_dsp32alu_0): Call STORE instead of SET_DREG for
BYTEOP2P, BYTEOP3P, BYTEOP1P, BYTEOP16P, BYTEOP16M, BYTEPACK, and
BYTEUNPACK.
(decode_dsp32shift_0): Call STORE instead of SET_DREG for PACK,
BITMUX, EXTRACT, DEPOSIT, ALIGN8, ALIGN16, and ALIGN24.
sim: bfin: handle implicit DISALGNEXCPT with video insns When most video related insns are used in parallel with Ireg loads, the DISALGNEXCPT insn behavior is implicitly in effect. Reported-by: Anton Shokurov <shokurov.anton.v@yandex.ru> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-15 01:21:21 +00:00
2011-04-14 Mike Frysinger <vapier@gentoo.org>
* bfin-sim.c (decode_dsp32alu_0): Set DIS_ALGN_EXPT when handling
BYTEOP2P, BYTEOP3P, SAA, BYTEOP1P, BYTEOP16P, BYTEOP16M, BYTEPACK,
and BYTEUNPACK insns.
sim: bfin: respect the port level on signals to the SIC The SIC latches ints from peripherals to the CEC, but the peripherals need to be able to tell the SIC when to stop. So use the incoming level to figure out when to set the int bits and when to clear it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 05:23:26 +00:00
2011-04-11 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_sic.c (bfin_sic_port_event): New helper function.
(bfin_sic_52x_port_event, bfin_sic_537_port_event,
bfin_sic_54x_port_event, bfin_sic_561_port_event): Include level
in the trace output, and call the new bfin_sic_port_event func.
sim: bfin: add missing GPIO pin 15 Each GPIO block has 16 pins, and I only added 15 in the original port list. So add the missing 16th. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 05:22:23 +00:00
2011-04-11 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_gpio.c (bfin_gpio_ports): Add p15.
sim: bfin: add OTP output port This doesn't currently generate any interrupts (as there doesn't appear to be any documentation to *when* it would even do so), but since the HRM does say an interrupt line exists between the OTP and the SIC, add one for completeness sake. This will make a follow up patch easier. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-01 22:32:04 +00:00
2011-04-01 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_otp.c (bfin_otp_ports): Declare.
(bfin_otp_finish): Call set_hw_ports with bfin_otp_ports.
sim: bfin: regen configure to include new cfi device
2011-03-29 18:39:51 +00:00
2011-03-29 Mike Frysinger <vapier@gentoo.org>
* configure: Regenerate after common/aclocal.m4 changes.
sim: bfin: fix sign extension with 16bit acc add insns The current implementation attempts to handle the 16bit sign extension itself. Unfortunately, it gets it right in some cases. So rather than fix that logic, just drop it in favor of using 16bit signed casts. Now gcc will take care of getting the logic right. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-29 01:41:49 +00:00
2011-03-28 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32alu_0): Cast high 16bits of A0.W to bs16
and add to casted low 16bits of A0.L and store in val0. Cast high
16bits of A1.W to bs16 and add to casted low 16bits of A1.L and
store in val1. Delete bit checks of val0 and val1.
sim: bfin: handle saturation with RND12 sub insns The current handling of the subtraction insn with the RND12 modifier works when saturation isn't involved. So add handling for this edge case to match the hardware. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-27 04:03:05 +00:00
2011-03-26 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32alu_0): Set result to 0x7FFFFFFF when
the result was 0x80000000 for RND12 subtraction.
sim: bfin: add missing VS set with add/sub insns The 16bit add/sub insns missed setting the VS bit in ASTAT whenever the V bit was also set. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-26 06:02:41 +00:00
2011-03-26 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32alu_0): Set VS when V is set.
sim: bfin: add hw tracing to gpio/sic port events Makes it a lot easier to find out what's going on with interrupt lines if the ports have tracing output. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-25 00:13:57 +00:00
2011-03-24 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_gpio.c (bfin_gpio_port_event): Call HW_TRACE at every
major code flow point.
* dv-bfin_sic.c (bfin_sic_forward_interrupts): Call HW_TRACE just
before calling hw_port_event on ourselves.
(bfin_sic_52x_port_event, bfin_sic_537_port_event,
bfin_sic_54x_port_event, bfin_sic_561_port_event): Call HW_TRACE
at the start of the function.
sim: bfin: fix GPIO logic bugs when processing events We need the DIR bit cleared, not set, in order for the pin to be treated as an input. When looking up the data value, we need to shift the "level" value over by "my_port" rather than "bit" as the latter has already been shifted over. We also should normalize the "level" coming in from the outside worlds to the set of {0,1} since those are the only values that matter to GPIOs. We need the BOTH bit set, not cleared, in order for the pin to trigger on both edges. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-25 00:13:23 +00:00
2011-03-24 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_gpio.c (bfin_gpio_port_event): Split dir/inen bit checking.
Normalize "level" to 0/1 values. Shift "level" over by "my_port".
Invert port->both bit check.
sim: bfin: fix clear/set/toggle GPIO handling The clear/set/toggle MMRs aren't backed by "real" data; they implicitly perform bit operations on the associated data register. So when we go to process writes to them, we need to adjust the pointer accordingly so that the actual backing data is modified. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-25 00:12:47 +00:00
2011-03-24 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_gpio.c (bfin_gpio_io_write_buffer): Subtract 2 from the
valuep pointer for clear MMRs, 4 for set MMRs, and 6 for toggle MMRs.
sim: bfin: document SIC limitation Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:18:17 +00:00
2011-03-23 Mike Frysinger <vapier@gentoo.org>
* TODO: Document some known SIC issues.
sim: bfin: fix inverted W1C logic When I originally wrote the w1c helper funcs, I used it in a few places. Then I forgot how it worked and when I later documented it, I described the 3rd arg in the exact opposite way it is actually used. This error propagated to a bunch of devices registers that were not explicitly tested (a bunch of the devices are stubs which merely exist to say "no device is connected" to make device drivers happy). So once the documentation is unscrewed, fix all of the broken call sites. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:17:14 +00:00
2011-03-23 Mike Frysinger <vapier@gentoo.org>
* devices.h (dv_w1c): Fix typos in documentation of "bits" arg.
* dv-bfin_cec.c (bfin_cec_io_write_buffer): Pass 0xffee to dv_w1c_4.
* dv-bfin_emac.c (bfin_emac_io_write_buffer): Pass 0xe1 to dv_w1c_4
for systat MMR and -1 to dv_w1c_4 for [rt]x_stky/mmc_[rt]irqs MMRs.
* dv-bfin_eppi.c (bfin_eppi_io_write_buffer): Pass 0x1ff to dv_w1c_2.
* dv-bfin_gpio.c (bfin_gpio_io_write_buffer): Invert bits to dv_w1c_2.
* dv-bfin_jtag.c (bfin_jtag_io_write_buffer): Invert bits to dv_w1c_4.
* dv-bfin_nfc.c (bfin_nfc_io_write_buffer): Invert bits to dv_w1c_2.
* dv-bfin_otp.c (bfin_otp_io_write_buffer): Invert bits to dv_w1c_2.
* dv-bfin_ppi.c (bfin_ppi_io_write_buffer): Invert bits to dv_w1c_2.
* dv-bfin_rtc.c (bfin_rtc_io_write_buffer): Invert bits to dv_w1c_2.
* dv-bfin_spi.c (bfin_spi_io_write_buffer): Invert bits to dv_w1c_2.
* dv-bfin_twi.c (bfin_twi_io_write_buffer): Invert bits to dv_w1c_2.
* dv-bfin_uart2.c (bfin_uart_io_write_buffer): Invert bits to dv_w1c_2.
sim: bfin: define more UART LSR bits We'll need these bits in an upcoming patch, so map out the whole LSR MMR now. Fix up indentation style while we're here. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:16:50 +00:00
2011-03-23 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_uart.h (TFI, BI, FE, PE, OE): Define.
sim: bfin: fix typo in TWI stat reg Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:16:22 +00:00
2011-03-23 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_twi.h (LOSTARB): Rename from LOSTARG.
sim: bfin: update VIT_MAX behavior to match hardware when Acc.X bits are set The Blackfin PRM says that the top 8 bits of the accumulator must be cleared when using the VIT_MAX insn, so the sim has followed this spec. Matching the hardware behavior though when the high bits are not cleared is easy to do and doesn't break existing behavior, so go for it. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:14:20 +00:00
2011-03-23 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32shift_0): Set acc0 to the unextended
value for the VIT_MAX insn, and mask off the result when done.
sim: bfin: always do 16bit sign extension with the SEARCH insn The Blackfin PRM does not cover this case, but the hardware is clear: even if the search criteria is not met (and thus a new 16bit value is loaded up into the accumulator), the accumulator undergoes 16bit sign extension. So simply reload the low signed 16bits in that case. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:13:32 +00:00
2011-03-23 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32alu_0): Set A1 to a1_lo when up_hi is false,
and set A0 to a0_lo when up_lo is false.
sim: bfin: update AV and AC ASTAT bits with acc negation The Acc=-Acc insn can overflow or carry with edge values, so make sure we update the ASTAT bits accordingly to match the hardware. Also fix a thinko where we always updated AC0 even when working with A1 regs. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:12:16 +00:00
2011-03-23 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32alu_0): Call saturate_s40_astat instead of
saturate_s40, and use the v parameter to update the AV bit. Set the
AC bit only when the final result is 0.
sim: bfin: fix thinko in SIC pin encoding When encoding the SIC/pin info into unique input port ids, I used bases of 100 when I meant to use 0x100. Rather than simply fix the decoding math in the different functions, create a few helper macros to simplify the SIC/pin encoding and decoding steps. This makes the resulting tables nice & clear. And now that pins are clear, the 533 and 537 port_event handlers may easily be merged into one. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:11:08 +00:00
2011-03-23 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_sic.c (ENC, DEC_PIN, DEC_SIC): Define.
(bfin_sic_50x_ports, bfin_sic_51x_ports, bfin_sic_52x_ports,
bfin_sic_533_ports, bfin_sic_537_ports, bfin_sic_538_ports,
bfin_sic_54x_ports, bfin_sic_561_ports, bfin_sic_59x_ports):
Encode ids with the ENC macro.
(bfin_sic_52x_port_event, bfin_sic_537_port_event,
bfin_sic_54x_port_event, bfin_sic_561_port_event): Set idx
from my_port with DEC_SIC, and set bit from my_port with DEC_PIN.
(bfin_sic_533_port_event): Delete.
(bfin_sic_finish): Call set_hw_port_event with
bfin_sic_537_port_event for BF533 and BF59x targets.
sim: bfin: allow byteop[123]p src regs to be the same The hardware allows the byteop[123]p insns to use the same src reg pair, so remove the combination check in the sim. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:08:15 +00:00
2011-03-23 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32alu_0): Drop the src0/src1 check for
BYTEOP1P, BYTEOP2P, and BYTEOP3P insns.
sim: bfin: fix thinko in bfin_gpio bus addresses The bus addresses have to be valid numbers, so 'g' and 'h' won't work. Oddly, the common code silently ignored this which is why I didn't notice in the first place. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:07:33 +00:00
2011-03-23 Mike Frysinger <vapier@gentoo.org>
* machs.c (bf50x_dev, bf512_dev, bf516_dev, bf522_dev, bf526_dev,
bf533_dev, bf534_dev, bf537_dev, bf538_dev, bf561_dev, bf592_dev):
Change bfin_gpio addresses from f/g/h to 5/6/7.
(bfin_model_hw_tree_init): Add the bfin_gpio address base to 'a'.
sim: bfin: check for kill/pread If the host system (like Windows) doesn't support these functions, then make sure we don't use them. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-17 19:03:30 +00:00
2011-03-17 Mike Frysinger <vapier@gentoo.org>
* configure.ac (AC_CHECK_FUNCS): Check for kill and pread.
* configure: Regenerate.
* config.in: Regenerate.
* interp.c (bfin_syscall): Check for HAVE_{KILL,PREAD} before using
kill or pread.
sim: bfin: add GPIO device simulation This takes care of the MMR interface and pushing up interrupts. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 21:01:45 +00:00
2011-03-15 Mike Frysinger <vapier@gentoo.org>
* Makefile.in (dv-bfin_gpio.o): New target.
* configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_gpio.
* configure: Regenerate.
* dv-bfin_gpio.c, dv-bfin_gpio.h: New files.
* machs.c: Include dv-bfin_gpio.h.
(bf50x_mem, bf51x_mem, bf52x_mem, bf531_mem, bf532_mem, bf533_mem,
bf534_mem, bf536_mem, bf537_mem, bf538_mem, bf561_mem, bf592_mem):
Delete GPIO memory stubs.
(bf50x_dev, bf512_dev, bf516_dev, bf522_dev, bf526_dev, bf533_dev,
bf534_dev, bf537_dev, bf538_dev, bf561_dev, bf592_dev): Add GPIO
peripheral devices.
(bfin_model_hw_tree_init): Hook up GPIO interrupts to SIC.
sim: bfin: fix brace style
2011-03-15 20:44:11 +00:00
2011-03-15 Mike Frysinger <vapier@gentoo.org>
* bfroms/bf50x-0.0.h, bfroms/bf51x-0.0.h, bfroms/bf51x-0.1.h,
bfroms/bf51x-0.2.h, bfroms/bf526-0.0.h, bfroms/bf526-0.1.h,
bfroms/bf527-0.0.h, bfroms/bf527-0.1.h, bfroms/bf527-0.2.h,
bfroms/bf533-0.1.h, bfroms/bf533-0.2.h, bfroms/bf533-0.3.h,
bfroms/bf537-0.0.h, bfroms/bf537-0.1.h, bfroms/bf537-0.3.h,
bfroms/bf538-0.0.h, bfroms/bf54x-0.0.h, bfroms/bf54x-0.1.h,
bfroms/bf54x-0.2.h, bfroms/bf54x_l1-0.0.h, bfroms/bf54x_l1-0.1.h,
bfroms/bf54x_l1-0.2.h, bfroms/bf561-0.5.h, bfroms/bf59x-0.0.h,
bfroms/bf59x_l1-0.1.h, dv-bfin_cec.c, dv-bfin_ctimer.c,
dv-bfin_dma.c, dv-bfin_dmac.c, dv-bfin_ebiu_amc.c,
dv-bfin_ebiu_ddrc.c, dv-bfin_ebiu_sdc.c, dv-bfin_emac.c,
dv-bfin_eppi.c, dv-bfin_evt.c, dv-bfin_gptimer.c, dv-bfin_jtag.c,
dv-bfin_mmu.c, dv-bfin_nfc.c, dv-bfin_otp.c, dv-bfin_pll.c,
dv-bfin_ppi.c, dv-bfin_rtc.c, dv-bfin_sic.c, dv-bfin_spi.c,
dv-bfin_trace.c, dv-bfin_twi.c, dv-bfin_uart.c, dv-bfin_uart2.c,
dv-bfin_wdog.c, dv-bfin_wp.c, dv-eth_phy.c, gui.c,
linux-fixed-code.h, linux-targ-map.h, machs.c, Makefile.in: Fix style.
sim: bfin: handle AZ updates with 16bit adds/subs We weren't updating AZ when doing a 16bit add or sub insn. Implement it. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:10:40 +00:00
2011-03-15 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32alu_0): Set AZ based on val for 16bit adds
and subs.
sim: bfin: skip acc/ASTAT updates for moves No point in moving unchanged acc values to the acc regs, and avoid updating the acc ASTAT bits when only reading. This fixes incorrect changing of the ASTAT bits when they're only being read. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:10:12 +00:00
2011-03-15 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_macfunc): Move acc STOREs behind op != 3 check.
sim: bfin: handle AN (negative overflows) in dsp mult insns The current dsp mult handler does not take care of overflows which turn values negative (and thus set AN in ASTAT). So implement it. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:09:39 +00:00
2011-03-15 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_macfunc): New neg parameter. Set when the
high bit is set after extract_mult.
(decode_dsp32mac_0): Declare n_1 and n_0. Pass to the decode_macfunc
functions. Use these to update the AN bit.
sim: bfin: handle V overflows in dsp mult insns The current dsp mult handler does not take care of overflows and updating the V ASTAT bit. So implement it. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:09:09 +00:00
2011-03-15 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32mult_0): Declare v_i0 and v_i1. Pass to
the extract_mult functions. Include these when updating the V, VS,
and V_COPY bits.
sim: bfin: decode ASTAT on failure When testing ASTAT regs, specific bit differences carry a lot more meaning than when checking the value of a data register. So automatically decode the bits of the two values and print things out so that people don't have to manually do it themselves every time. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:08:27 +00:00
2011-03-15 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (astat_names): New global bit array.
(decode_CC2stat_0): Delete local astat_name and astat_names.
(decode_psedodbg_assert_0): Move hardcoded offset into a variable.
Print out ASTAT bit values when checking an ASTAT register.
sim: bfin: handle saturation with fract multiplications The saturation behavior with fract modes differs from non-fract modes. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:04:04 +00:00
2010-03-15 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (extract_mult): Handle M_IU.
sim: bfin: forgot to cvs add the changelog
2011-03-14 22:24:30 +00:00
2011-03-05 Mike Frysinger <vapier@gentoo.org>
* Makefile.in, TODO, aclocal.m4, bfin-sim.c, bfin-sim.h,
bfroms/all.h, bfroms/bf50x-0.0.h, bfroms/bf51x-0.0.h,
bfroms/bf51x-0.1.h, bfroms/bf51x-0.2.h, bfroms/bf526-0.0.h,
bfroms/bf526-0.1.h, bfroms/bf527-0.0.h, bfroms/bf527-0.1.h,
bfroms/bf527-0.2.h, bfroms/bf533-0.1.h, bfroms/bf533-0.2.h,
bfroms/bf533-0.3.h, bfroms/bf537-0.0.h, bfroms/bf537-0.1.h,
bfroms/bf537-0.3.h, bfroms/bf538-0.0.h, bfroms/bf54x-0.0.h,
bfroms/bf54x-0.1.h, bfroms/bf54x-0.2.h, bfroms/bf54x_l1-0.0.h,
bfroms/bf54x_l1-0.1.h, bfroms/bf54x_l1-0.2.h, bfroms/bf561-0.5.h,
bfroms/bf59x-0.0.h, bfroms/bf59x_l1-0.1.h, config.in, configure,
configure.ac, devices.c, devices.h, dv-bfin_cec.c, dv-bfin_cec.h,
dv-bfin_ctimer.c, dv-bfin_ctimer.h, dv-bfin_dma.c, dv-bfin_dma.h,
dv-bfin_dmac.c, dv-bfin_dmac.h, dv-bfin_ebiu_amc.c, dv-bfin_ebiu_amc.h,
dv-bfin_ebiu_ddrc.c, dv-bfin_ebiu_ddrc.h, dv-bfin_ebiu_sdc.c,
dv-bfin_ebiu_sdc.h, dv-bfin_emac.c, dv-bfin_emac.h, dv-bfin_eppi.c,
dv-bfin_eppi.h, dv-bfin_evt.c, dv-bfin_evt.h, dv-bfin_gptimer.c,
dv-bfin_gptimer.h, dv-bfin_jtag.c, dv-bfin_jtag.h, dv-bfin_mmu.c,
dv-bfin_mmu.h, dv-bfin_nfc.c, dv-bfin_nfc.h, dv-bfin_otp.c,
dv-bfin_otp.h, dv-bfin_pll.c, dv-bfin_pll.h, dv-bfin_ppi.c,
dv-bfin_ppi.h, dv-bfin_rtc.c, dv-bfin_rtc.h, dv-bfin_sic.c,
dv-bfin_sic.h, dv-bfin_spi.c, dv-bfin_spi.h, dv-bfin_trace.c,
dv-bfin_trace.h, dv-bfin_twi.c, dv-bfin_twi.h, dv-bfin_uart.c,
dv-bfin_uart.h, dv-bfin_uart2.c, dv-bfin_uart2.h, dv-bfin_wdog.c,
dv-bfin_wdog.h, dv-bfin_wp.c, dv-bfin_wp.h, dv-eth_phy.c, gui.c,
gui.h, insn_list.def, interp.c, linux-fixed-code.h, linux-fixed-code.s,
linux-targ-map.h, machs.c, machs.h, proc_list.def, sim-main.h,
tconfig.in: New Blackfin port.
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