2013-12-04 00:40:24 +00:00
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2013-12-07 Mike Frysinger <vapier@gentoo.org>
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* epiphany.opc: Remove +x file mode.
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2013-03-08 17:25:12 +00:00
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2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
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PR binutils/15241
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* lm32.cpu (Control and status registers): Add CFG2, PSW,
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TLBVADDR, TLBPADDR and TLBBADVADDR.
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2012-11-30 Oleg Raikhman <oleg@adapteva.com>
Joern Rennecke <joern.rennecke@embecosm.com>
cpu:
* epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
(load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
(testset-insn): Add NO_DIS attribute to t.l.
(store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
(move-insns): Add NO-DIS attribute to cmov.l.
(op-mmr-movts): Add NO-DIS attribute to movts.l.
(op-mmr-movfs): Add NO-DIS attribute to movfs.l.
(op-rrr): Add NO-DIS attribute to .l.
(shift-rrr): Add NO-DIS attribute to .l.
(op-shift-rri): Add NO-DIS attribute to i32.l.
(bitrl, movtl): Add NO-DIS attribute.
(op-iextrrr): Add NO-DIS attribute to .l
(op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
(op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
opcodes:
* epiphany-desc.c, epiphany-desc.h, epiphany-opc.c: Regenerate.
2012-11-30 17:54:58 +00:00
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2012-11-30 Oleg Raikhman <oleg@adapteva.com>
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Joern Rennecke <joern.rennecke@embecosm.com>
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* epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
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(load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
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(testset-insn): Add NO_DIS attribute to t.l.
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(store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
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(move-insns): Add NO-DIS attribute to cmov.l.
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(op-mmr-movts): Add NO-DIS attribute to movts.l.
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(op-mmr-movfs): Add NO-DIS attribute to movfs.l.
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(op-rrr): Add NO-DIS attribute to .l.
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(shift-rrr): Add NO-DIS attribute to .l.
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(op-shift-rri): Add NO-DIS attribute to i32.l.
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(bitrl, movtl): Add NO-DIS attribute.
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(op-iextrrr): Add NO-DIS attribute to .l
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(op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
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(op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
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2012-02-27 06:57:57 +00:00
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2012-02-27 Alan Modra <amodra@gmail.com>
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* mt.opc (print_dollarhex): Trim values to 32 bits.
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2011-12-15 10:21:51 +00:00
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2011-12-15 Nick Clifton <nickc@redhat.com>
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* frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
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hosts.
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2011-10-26 12:46:04 +00:00
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2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
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* epiphany.opc (parse_branch_addr): Fix type of valuep.
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Cast value before printing it as a long.
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(parse_postindex): Fix type of valuep.
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bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
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2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
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* cpu/epiphany.cpu: New file.
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* cpu/epiphany.opc: New file.
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2011-08-22 15:25:07 +00:00
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2011-08-22 Nick Clifton <nickc@redhat.com>
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* fr30.cpu: Newly contributed file.
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* fr30.opc: Likewise.
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* ip2k.cpu: Likewise.
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* ip2k.opc: Likewise.
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* mep-avc.cpu: Likewise.
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* mep-avc2.cpu: Likewise.
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* mep-c5.cpu: Likewise.
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* mep-core.cpu: Likewise.
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* mep-default.cpu: Likewise.
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* mep-ext-cop.cpu: Likewise.
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* mep-fmax.cpu: Likewise.
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* mep-h1.cpu: Likewise.
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* mep-ivc2.cpu: Likewise.
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* mep-rhcop.cpu: Likewise.
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* mep-sample-ucidsp.cpu: Likewise.
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* mep.cpu: Likewise.
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* mep.opc: Likewise.
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* openrisc.cpu: Likewise.
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* openrisc.opc: Likewise.
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* xstormy16.cpu: Likewise.
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* xstormy16.opc: Likewise.
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2010-10-08 14:00:50 +00:00
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2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
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* frv.opc: #undef DEBUG.
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2010-07-03 04:09:56 +00:00
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2010-07-03 DJ Delorie <dj@delorie.com>
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* m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
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* m32r.cpu (HASH-PREFIX): Delete.
(duhpo, dshpo): New pmacros.
(simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
(uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
attribute, define with dshpo.
(uimm24): Delete HASH-PREFIX attribute.
* m32r.opc (CGEN_PRINT_NORMAL): Delete.
(print_signed_with_hash_prefix): New function.
(print_unsigned_with_hash_prefix): New function.
* xc16x.cpu (dowh): New pmacro.
(upof16): Define with dowh, specify print handler.
(qbit, qlobit, qhibit): Ditto.
(upag16): Ditto.
* xc16x.opc (CGEN_PRINT_NORMAL): Delete.
(print_with_dot_prefix): New functions.
(print_with_pof_prefix, print_with_pag_prefix): New functions.
2010-02-12 04:38:21 +00:00
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2010-02-11 Doug Evans <dje@sebabeach.org>
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* m32r.cpu (HASH-PREFIX): Delete.
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(duhpo, dshpo): New pmacros.
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(simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
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(uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
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attribute, define with dshpo.
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(uimm24): Delete HASH-PREFIX attribute.
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* m32r.opc (CGEN_PRINT_NORMAL): Delete.
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(print_signed_with_hash_prefix): New function.
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(print_unsigned_with_hash_prefix): New function.
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* xc16x.cpu (dowh): New pmacro.
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(upof16): Define with dowh, specify print handler.
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(qbit, qlobit, qhibit): Ditto.
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(upag16): Ditto.
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* xc16x.opc (CGEN_PRINT_NORMAL): Delete.
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(print_with_dot_prefix): New functions.
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(print_with_pof_prefix, print_with_pag_prefix): New functions.
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* desc-cpu.scm (cgen-desc.h): Don't print virtual enums.
* sid-cpu.scm (cgen-desc.h): Ditto.
* enum.scm (enum-builtin!): New function.
* read.scm (reader-install-builtin!): Call it.
* rtl-c.scm (s-convop): Delete, replaced with ...
(s-int-convop, s-float-convop): ... new fns.
(ext, zext, trunc): Update.
(fext, ftrunc, float, ufloat, fix, ufix): Update.
* rtx-funcs.scm (fext, ftrunc, float, ufloat, fix, ufix): New parameter
`how'.
* cpu/mep-fmax.cpu (fcvtsw): Update.
* cpu/sh.cpu (h-fsd, h-fmov): Update.
* doc/rtl.texi (float-convop): Update.
* frv.cpu (floating-point-conversion): Update call to fp conv op.
(floating-point-dual-conversion, ne-floating-point-dual-conversion,
conditional-floating-point-conversion, ne-floating-point-conversion,
float-parallel-mul-add-double-semantics): Ditto.
2010-01-25 03:50:44 +00:00
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2010-01-24 Doug Evans <dje@sebabeach.org>
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* frv.cpu (floating-point-conversion): Update call to fp conv op.
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(floating-point-dual-conversion, ne-floating-point-dual-conversion,
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conditional-floating-point-conversion, ne-floating-point-conversion,
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float-parallel-mul-add-double-semantics): Ditto.
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cpu/
* m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
(f-dsp-40-u20, f-dsp-40-u24): Ditto.
opcodes/
* cgen-ibld.in: #include "cgen/basic-modes.h".
* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
* xstormy16-ibld.c: Regenerate.
2010-01-06 05:30:19 +00:00
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2010-01-05 Doug Evans <dje@sebabeach.org>
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* m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
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(f-dsp-40-u20, f-dsp-40-u24): Ditto.
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2010-01-02 18:37:59 +00:00
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2010-01-02 Doug Evans <dje@sebabeach.org>
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* m32c.opc (parse_signed16): Fix typo.
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2009-12-11 13:42:17 +00:00
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2009-12-11 Nick Clifton <nickc@redhat.com>
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* frv.opc: Fix shadowed variable warnings.
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* m32c.opc: Fix shadowed variable warnings.
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Must use VOID expression in VOID context.
* xc16x.cpu (mov4): Fix mode of `sequence'.
(mov9, mov10): Ditto.
(movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
(callr, callseg, calls, trap, rets, reti): Ditto.
(jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
(atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
(exts, exts1, extsr, extsr1, prior): Ditto.
2009-11-14 19:48:57 +00:00
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2009-11-14 Doug Evans <dje@sebabeach.org>
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Must use VOID expression in VOID context.
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* xc16x.cpu (mov4): Fix mode of `sequence'.
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(mov9, mov10): Ditto.
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(movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
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(callr, callseg, calls, trap, rets, reti): Ditto.
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(jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
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(atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
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(exts, exts1, extsr, extsr1, prior): Ditto.
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2009-10-24 00:17:08 +00:00
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2009-10-23 Doug Evans <dje@sebabeach.org>
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* m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
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cgen-ops.h -> cgen/basic-ops.h.
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2009-09-25 14:07:07 +00:00
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2009-09-25 Alan Modra <amodra@bigpond.net.au>
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* m32r.cpu (stb-plus): Typo fix.
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* m32r.cpu (sth-plus): Fix address mode and calculation.
(stb-plus): Ditto.
(clrpsw): Fix mask calculation.
(bset, bclr, btst): Make mode in bit calculation match expression.
* xc16x.cpu (rtl-version): Set to 0.8.
(gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
make uppercase. Remove unnecessary name-prefix spec.
(grb-names, conditioncode-names, extconditioncode-names): Ditto.
(grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
(reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
(h-cr): New hardware.
(muls): Comment out parts that won't compile, add fixme.
(mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
(scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
(bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
2009-09-23 22:30:55 +00:00
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2009-09-23 Doug Evans <dje@sebabeach.org>
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* m32r.cpu (sth-plus): Fix address mode and calculation.
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(stb-plus): Ditto.
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(clrpsw): Fix mask calculation.
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(bset, bclr, btst): Make mode in bit calculation match expression.
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* xc16x.cpu (rtl-version): Set to 0.8.
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(gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
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make uppercase. Remove unnecessary name-prefix spec.
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(grb-names, conditioncode-names, extconditioncode-names): Ditto.
|
|
|
|
|
|
(grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
|
|
|
|
|
|
(reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
|
|
|
|
|
|
(h-cr): New hardware.
|
|
|
|
|
|
(muls): Comment out parts that won't compile, add fixme.
|
|
|
|
|
|
(mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
|
|
|
|
|
|
(scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
|
|
|
|
|
|
(bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
|
|
|
|
|
|
|
2009-07-16 17:53:25 +00:00
|
|
|
|
2009-07-16 Doug Evans <dje@sebabeach.org>
|
|
|
|
|
|
|
|
|
|
|
|
* cpu/simplify.inc (*): One line doc strings don't need \n.
|
|
|
|
|
|
(df): Invoke define-full-ifield instead of claiming it's an alias.
|
|
|
|
|
|
(dno): Define.
|
|
|
|
|
|
(dnop): Mark as deprecated.
|
|
|
|
|
|
|
2009-06-22 00:53:25 +00:00
|
|
|
|
2009-06-22 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c.opc (parse_lab_5_3): Use correct enum.
|
|
|
|
|
|
|
2009-01-07 01:09:24 +00:00
|
|
|
|
2009-01-07 Hans-Peter Nilsson <hp@axis.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
|
|
|
|
|
|
(DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
|
|
|
|
|
|
(media-arith-sat-semantics): Explicitly sign- or zero-extend
|
|
|
|
|
|
arguments of "operation" to DI using "mode" and the new pmacros.
|
|
|
|
|
|
|
2009-01-03 17:51:12 +00:00
|
|
|
|
2009-01-03 Hans-Peter Nilsson <hp@axis.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cris.cpu (cris-implemented-writable-specregs-v32): Correct size
|
|
|
|
|
|
of number 2, PID.
|
|
|
|
|
|
|
2008-12-23 19:10:25 +00:00
|
|
|
|
2008-12-23 Jon Beniston <jon@beniston.com>
|
|
|
|
|
|
|
|
|
|
|
|
* lm32.cpu: New file.
|
|
|
|
|
|
* lm32.opc: New file.
|
|
|
|
|
|
|
2008-01-29 03:50:23 +00:00
|
|
|
|
2008-01-29 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
|
|
|
|
|
|
to source.
|
|
|
|
|
|
|
2007-10-22 16:04:43 +00:00
|
|
|
|
2007-10-22 Hans-Peter Nilsson <hp@axis.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cris.cpu (movs, movu): Use result of extension operation when
|
|
|
|
|
|
updating flags.
|
|
|
|
|
|
|
2007-07-05 09:49:03 +00:00
|
|
|
|
2007-07-04 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cris.cpu: Update copyright notice to refer to GPLv3.
|
|
|
|
|
|
* frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
|
|
|
|
|
|
m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
|
|
|
|
|
|
sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
|
|
|
|
|
|
xc16x.opc: Likewise.
|
|
|
|
|
|
* iq2000.cpu: Fix copyright notice to refer to FSF.
|
|
|
|
|
|
|
2007-04-30 13:21:52 +00:00
|
|
|
|
2007-04-30 Mark Salter <msalter@sadr.localdomain>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu (spr-names): Support new coprocessor SPR registers.
|
|
|
|
|
|
|
2007-04-20 13:05:18 +00:00
|
|
|
|
2007-04-20 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* xc16x.cpu: Restore after accidentally overwriting this file with
|
|
|
|
|
|
xc16x.opc.
|
|
|
|
|
|
|
2007-03-29 23:56:39 +00:00
|
|
|
|
2007-03-29 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c.cpu (Imm-8-s4n): Fix print hook.
|
|
|
|
|
|
(Lab-24-8, Lab-32-8, Lab-40-8): Fix.
|
|
|
|
|
|
(arith-jnz-imm4-dst-defn): Make relaxable.
|
|
|
|
|
|
(arith-jnz16-imm4-dst-defn): Fix encodings.
|
|
|
|
|
|
|
2007-03-21 02:53:50 +00:00
|
|
|
|
2007-03-20 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
|
|
|
|
|
|
mem20): New.
|
|
|
|
|
|
(src16-16-20-An-relative-*): New.
|
|
|
|
|
|
(dst16-*-20-An-relative-*): New.
|
|
|
|
|
|
(dst16-16-16sa-*): New
|
|
|
|
|
|
(dst16-16-16ar-*): New
|
|
|
|
|
|
(dst32-16-16sa-Unprefixed-*): New
|
|
|
|
|
|
(jsri): Fix operands.
|
|
|
|
|
|
(setzx): Fix encoding.
|
|
|
|
|
|
|
2007-03-08 06:56:20 +00:00
|
|
|
|
2007-03-08 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* m32r.opc: Formatting.
|
|
|
|
|
|
|
2006-05-22 09:07:20 +00:00
|
|
|
|
2006-05-22 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
|
|
|
|
|
|
|
2006-04-10 21:19:14 +00:00
|
|
|
|
2006-04-10 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c.opc (parse_unsigned_bitbase): Take a new parameter which
|
|
|
|
|
|
decides if this function accepts symbolic constants or not.
|
|
|
|
|
|
(parse_signed_bitbase): Likewise.
|
|
|
|
|
|
(parse_unsigned_bitbase8): Pass the new parameter.
|
|
|
|
|
|
(parse_unsigned_bitbase11): Likewise.
|
|
|
|
|
|
(parse_unsigned_bitbase16): Likewise.
|
|
|
|
|
|
(parse_unsigned_bitbase19): Likewise.
|
|
|
|
|
|
(parse_unsigned_bitbase27): Likewise.
|
|
|
|
|
|
(parse_signed_bitbase8): Likewise.
|
|
|
|
|
|
(parse_signed_bitbase11): Likewise.
|
|
|
|
|
|
(parse_signed_bitbase19): Likewise.
|
|
|
|
|
|
|
2006-03-14 00:29:59 +00:00
|
|
|
|
2006-03-13 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
2006-03-14 04:20:53 +00:00
|
|
|
|
* m32c.cpu (Bit3-S): New.
|
|
|
|
|
|
(btst:s): New.
|
|
|
|
|
|
* m32c.opc (parse_bit3_S): New.
|
|
|
|
|
|
|
2006-03-14 00:29:59 +00:00
|
|
|
|
* m32c.cpu (decimal-subtraction16-insn): Add second operand.
|
|
|
|
|
|
(btst): Add optional :G suffix for MACH32.
|
|
|
|
|
|
(or.b:S): New.
|
|
|
|
|
|
(pop.w:G): Add optional :G suffix for MACH16.
|
|
|
|
|
|
(push.b.imm): Fix syntax.
|
|
|
|
|
|
|
2006-03-11 02:23:19 +00:00
|
|
|
|
2006-03-10 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c.cpu (mul.l): New.
|
|
|
|
|
|
(mulu.l): New.
|
|
|
|
|
|
|
2006-03-03 15:57:43 +00:00
|
|
|
|
2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
|
|
|
|
|
|
|
|
|
|
|
|
* xc16x.opc (parse_hash): Return NULL if the input was parsed or
|
|
|
|
|
|
an error message otherwise.
|
|
|
|
|
|
(parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
|
|
|
|
|
|
Fix up comments to correctly describe the functions.
|
|
|
|
|
|
|
[include/elf]
* m32c.h: Add relax relocs.
[cpu]
* m32c.cpu (RL_TYPE): New attribute, with macros.
(Lab-8-24): Add RELAX.
(unary-insn-defn-g, binary-arith-imm-dst-defn,
binary-arith-imm4-dst-defn): Add 1ADDR attribute.
(binary-arith-src-dst-defn): Add 2ADDR attribute.
(jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
attribute.
(jsri16, jsri32): Add 1ADDR attribute.
(jsr32.w, jsr32.a): Add JUMP attribute.
[opcodes]
* m32c-desc.c: Regenerate with linker relaxation attributes.
* m32c-desc.h: Likewise.
* m32c-dis.c: Likewise.
* m32c-opc.c: Likewise.
[gas]
* config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
(tc_gen_reloc): Don't define.
* config/tc-m32c.c (rl_for, relaxable): New convenience macros.
(OPTION_LINKRELAX): New.
(md_longopts): Add it.
(m32c_relax): New.
(md_parse_options): Set it.
(md_assemble): Emit relaxation relocs as needed.
(md_convert_frag): Emit relaxation relocs as needed.
(md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
(m32c_apply_fix): New.
(tc_gen_reloc): New.
(m32c_force_relocation): Force out jump relocs when relaxing.
(m32c_fix_adjustable): Return false if relaxing.
[bfd]
* elf32-m32c.c (m32c_elf_howto_table): Add relaxation relocs.
(m32c_elf_relocate_section): Don't relocate them.
(compare_reloc): New.
(relax_reloc): Remove.
(m32c_offset_for_reloc): New.
(m16c_addr_encodings): New.
(m16c_jmpaddr_encodings): New.
(m32c_addr_encodings): New.
(m32c_elf_relax_section): Relax jumps and address displacements.
(m32c_elf_relax_delete_bytes): Adjust for internal syms. Fix up
short jumps.
* reloc.c: Add m32c relax relocs.
* libbfd.h: Regenerate.
2006-02-24 22:10:36 +00:00
|
|
|
|
2006-02-24 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c.cpu (RL_TYPE): New attribute, with macros.
|
|
|
|
|
|
(Lab-8-24): Add RELAX.
|
|
|
|
|
|
(unary-insn-defn-g, binary-arith-imm-dst-defn,
|
|
|
|
|
|
binary-arith-imm4-dst-defn): Add 1ADDR attribute.
|
|
|
|
|
|
(binary-arith-src-dst-defn): Add 2ADDR attribute.
|
|
|
|
|
|
(jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
|
|
|
|
|
|
jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
|
|
|
|
|
|
attribute.
|
|
|
|
|
|
(jsri16, jsri32): Add 1ADDR attribute.
|
|
|
|
|
|
(jsr32.w, jsr32.a): Add JUMP attribute.
|
|
|
|
|
|
|
2006-02-17 14:36:28 +00:00
|
|
|
|
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
|
|
|
|
|
|
Anil Paranjape <anilp1@kpitcummins.com>
|
|
|
|
|
|
Shilin Shakti <shilins@kpitcummins.com>
|
|
|
|
|
|
|
|
|
|
|
|
* xc16x.cpu: New file containing complete CGEN specific XC16X CPU
|
|
|
|
|
|
description.
|
|
|
|
|
|
* xc16x.opc: New file containing supporting XC16C routines.
|
|
|
|
|
|
|
2006-02-10 12:05:12 +00:00
|
|
|
|
2006-02-10 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
|
|
|
|
|
|
|
2006-01-06 23:25:53 +00:00
|
|
|
|
2006-01-06 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c.cpu (mov.w:q): Fix mode.
|
|
|
|
|
|
(push32.b.imm): Likewise, for the comment.
|
|
|
|
|
|
|
Second part of ms1 to mt renaming.
* bfd/archures.c (bfd_arch_mt): Renamed.
(bfd_mt_arch): Renamed.
(bfd_archures_list): Adjusted.
* bfd/bfd-in2.h: Rebuilt.
* bfd/config.bfd (mt): Remove special case targ_archs.
(mt-*-elf): Rename bfd_elf32_mt_vec.
* bfd/configure: Rebuilt.
* bfd/configure.in (bfd_elf32_mt_vec): Renamed.
(selarchs) Remove mt special case.
* bfd/cpu-mt.c (arch_info_struct): Adjust.
(bfd_mt_arch): Renamed, adjust.
* bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela,
mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section,
mt_elf_howto_table): Renamed, adjusted.
(mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs,
elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags,
mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data,
mt_elf_print_private_bfd_data): Renamed, adjusted.
(TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE,
ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section,
bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook,
elf_backend_gc_sweep_hook, elf_backend_check_relocs,
eld_backend_object_p, bfd_elf32_bfd_set_private_flags,
bfd_elf32_bfd_copy_private_bfd_data,
bfd_elf32_bfd_merge_private_bfd_data,
bfd_elf32_bfd_print_private_bfd_data): Adjusted.
* bfd/libbfd.h: Regenerated.
* bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16,
BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT,
BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed.
* bfd/targets.c (bfd_elf32_mt_vec): Renamed.
(_bfd_target_vector): Adjusted.
* binutils/readelf.c (guess_is_rela): Use EM_MT.
(dump_relocations, get_machine_name): Adjust.
* cpu/mt.cpu (define-arch, define-isa): Set name to mt.
(define-mach): Adjust.
* cpu/mt.opc (CGEN_ASM_HASH): Update.
(mt_asm_hash, mt_cgen_insn_supported): Renamed.
(parse_loopsize, parse_imm16): Adjust.
* gas/configure: Rebuilt.
* gas/configure.in (mt): Remove special case.
* gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change
#includes.
(mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures):
Rename, adjust.
(md_parse_option, md_show_usage, md_begin, md_assemble,
md_cgen_lookup_reloc, md_atof): Adjust.
(mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust.
* gas/config/tc-mt.h (TC_MT): Rename.
(LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust.
(md_apply_fix): Adjust.
(mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename.
(TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust.
* gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust.
(mt_register_name, mt_register_type, mt_register_reggroup_p,
mt_return_value, mt_skip_prologue, mt_breapoint_from_pc,
mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align,
mt_registers_info, mt_push_dummy_call, mt_unwind_cache,
mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id,
mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address,
mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init,
_initialize_mt_tdep): Rename & adjust.
* include/dis-asm.h (print_insn_mt): Renamed.
* include/elf/common.h (EM_MT): Renamed.
* include/elf/mt.h: Rename relocs, cpu & other defines.
* ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust.
* opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
(stamp-mt): Adjust rule.
(mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
adjust.
* opcodes/Makefile.in: Rebuilt.
* opcodes/configure: Rebuilt.
* opcodes/configure.in (bfd_mt_arch): Rename & adjust.
* opcodes/disassemble.c (ARCH_mt): Renamed.
(disassembler): Adjust.
* opcodes/mt-asm.c: Renamed, rebuilt.
* opcodes/mt-desc.c: Renamed, rebuilt.
* opcodes/mt-desc.h: Renamed, rebuilt.
* opcodes/mt-dis.c: Renamed, rebuilt.
* opcodes/mt-ibld.c: Renamed, rebuilt.
* opcodes/mt-opc.c: Renamed, rebuilt.
* opcodes/mt-opc.h: Renamed, rebuilt.
* sid/Makefile.in: Rebuilt.
* sid/aclocal.m4: Rebuilt.
* sid/configure: Rebuilt.
* sid/sid.spec: Adjust.
* sid/bsp/Makefile.am: Adjust.
* sid/bsp/Makefile.in: Rebuilt.
* sid/bsp/aclocal.m4: Rebuilt.
* sid/bsp/configrun-sid.in: Adjust.
* sid/bsp/pregen/Makefile.in: Rebuilt.
* sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt.
* sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt.
* sid/bsp/pregen/pregen-configs.in: Adjust.
* sid/component/aclocal.m4: Rebuilt.
* sid/component/configure: Rebuilt.
* sid/component/tconfig.in: Adjust.
* sid/component/bochs/aclocal.m4: Rebuilt.
* sid/component/cache/Makefile.in: Rebuilt.
* sid/component/cgen-cpu/Makefile.in: Rebuilt.
* sid/component/cgen-cpu/aclocal.m4: Rebuilt.
* sid/component/cgen-cpu/compCGEN.cxx: Adjust.
* sid/component/cgen-cpu/configure: Rebuilt.
* sid/component/cgen-cpu/configure.in: Rebult.
* sid/component/cgen-cpu/mt/Makefile.am: Adjust.
* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
* sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust.
* sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt.
* sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt.
* sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt.
* sid/component/cgen-cpu/mt/mt.cxx: Adjust.
* sid/component/cgen-cpu/mt/mt.h: Adjust.
* sid/component/consoles/Makefile.in: Rebuilt.
* sid/component/families/aclocal.m4: Rebuilt.
* sid/component/families/configure: Rebuilt.
* sid/component/gdb/Makefile.in: Rebuilt.
* sid/component/gloss/Makefile.in: Rebuilt.
* sid/component/glue/Makefile.in: Rebuilt.
* sid/component/ide/Makefile.in: Rebuilt.
* sid/component/interrupt/Makefile.in: Rebuilt.
* sid/component/lcd/Makefile.in: Rebuilt.
* sid/component/lcd/testsuite/Makefile.in: Rebuilt.
* sid/component/loader/Makefile.am: Rebuilt.
* sid/component/loader/Makefile.in: Rebuilt.
* sid/component/mapper/Makefile.in: Rebuilt.
* sid/component/mapper/testsuite/Makefile.in: Rebuilt.
* sid/component/memory/Makefile.in: Rebuilt.
* sid/component/mmu/Makefile.in: Rebuilt.
* sid/component/parport/Makefile.in: Rebuilt.
* sid/component/profiling/Makefile.in: Rebuilt.
* sid/component/rtc/Makefile.in: Rebuilt.
* sid/component/sched/Makefile.in: Rebuilt.
* sid/component/testsuite/Makefile.in: Rebuilt.
* sid/component/timers/aclocal.m4: Rebuilt.
* sid/component/timers/configure: Rebuilt.
* sid/component/uart/Makefile.in: Rebuilt.
* sid/component/uart/testsuite/Makefile.in: Rebuilt.
* sid/config/config.sub: Adjust.
* sid/config/info.tcl.in: Adjust.
* sid/config/sidtargets.m4: Adjust.
* sid/doc/Makefile.in: Rebuilt.
* sid/main/dynamic/Makefile.am: Rebuilt.
* sid/main/dynamic/Makefile.in: Rebuilt.
* sid/main/dynamic/aclocal.m4: Rebuilt.
* sid/main/dynamic/configure: Rebuilt.
2005-12-16 10:23:12 +00:00
|
|
|
|
2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
Second part of ms1 to mt renaming.
|
|
|
|
|
|
* mt.cpu (define-arch, define-isa): Set name to mt.
|
|
|
|
|
|
(define-mach): Adjust.
|
|
|
|
|
|
* mt.opc (CGEN_ASM_HASH): Update.
|
|
|
|
|
|
(mt_asm_hash, mt_cgen_insn_supported): Renamed.
|
|
|
|
|
|
(parse_loopsize, parse_imm16): Adjust.
|
|
|
|
|
|
|
2005-12-14 03:30:07 +00:00
|
|
|
|
2005-12-13 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c.cpu (jsri): Fix order so register names aren't treated as
|
|
|
|
|
|
symbols.
|
|
|
|
|
|
(indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
|
|
|
|
|
|
indexwd, indexws): Fix encodings.
|
|
|
|
|
|
|
2005-12-12 11:25:08 +00:00
|
|
|
|
2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mt.cpu: Rename from ms1.cpu.
|
|
|
|
|
|
* mt.opc: Rename from ms1.opc.
|
|
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|
|
|
|
2005-12-06 21:48:28 +00:00
|
|
|
|
2005-12-06 Hans-Peter Nilsson <hp@axis.com>
|
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|
|
|
|
|
|
|
|
|
|
* cris.cpu (simplecris-common-writable-specregs)
|
|
|
|
|
|
(simplecris-common-readable-specregs): Split from
|
|
|
|
|
|
simplecris-common-specregs. All users changed.
|
|
|
|
|
|
(cris-implemented-writable-specregs-v0)
|
|
|
|
|
|
(cris-implemented-readable-specregs-v0): Similar from
|
|
|
|
|
|
cris-implemented-specregs-v0.
|
|
|
|
|
|
(cris-implemented-writable-specregs-v3)
|
|
|
|
|
|
(cris-implemented-readable-specregs-v3)
|
|
|
|
|
|
(cris-implemented-writable-specregs-v8)
|
|
|
|
|
|
(cris-implemented-readable-specregs-v8)
|
|
|
|
|
|
(cris-implemented-writable-specregs-v10)
|
|
|
|
|
|
(cris-implemented-readable-specregs-v10)
|
|
|
|
|
|
(cris-implemented-writable-specregs-v32)
|
|
|
|
|
|
(cris-implemented-readable-specregs-v32): Similar.
|
|
|
|
|
|
(bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
|
|
|
|
|
|
insns and specializations.
|
|
|
|
|
|
|
bfd:
Add ms2.
* archures.c (bfd_mach_ms2): Define.
* cpu-ms1.c (arch_info_struct): Add ms2 stanza.
* elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
(ms1_elf_merge_private_bfd_data): Remove unused variables. Add
correct merging logic, with workaround.
(ms1_elf_print_private_bfd_data): Add ms2 case.
* reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
* libbfd.h: Regenerated.
* bfd-in2.h: Regenerated.
cpu:
Add ms2
* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
model.
(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
f-cb2incr, f-rc3): New fields.
(LOOP): New instruction.
(JAL-HAZARD): New hazard.
(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
New operands.
(mul, muli, dbnz, iflush): Enable for ms2
(jal, reti): Has JAL-HAZARD.
(ldctxt, ldfb, stfb): Only ms1.
(fbcb): Only ms1,ms1-003.
(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
fbcbincrs, mfbcbincrs): Enable for ms2.
(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
* ms1.opc (parse_loopsize): New.
(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
(print_pcrel): New.
gas:
Add ms2.
* config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
(ms1_architectures): Add ms2.
(md_parse_option): Add ms2.
(md_show_usage): Add ms2.
(md_assemble): Add JAL_HAZARD detection logic.
(md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
* doc/c-ms1.texi: New.
* doc/all.texi: Add MS1.
* doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
* doc/Makefile.in: Rebuilt.
* doc/Makefile: Rebuilt.
gas/testsuite:
Add ms2.
* gas/ms1/allinsn.d: Adjust pcrel disassembly.
* gas/ms1/errors.exp: Fix target triplet.
* gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
* gas/ms1/ms1-16-003.s: Tweak label.
* gas/ms1/ms1.exp: Adjust target triplet. Add ms2 test.
* gas/ms1/ms2.d, gas/ms1/ms2.s: New.
* gas/ms1/relocs.d: Adjust expected machine name and pcrel
disassembly.
* gas/ms1/relocs.exp: Adjust target triplet.
include:
Add ms2.
* elf/ms1.h (EF_MS1_CPU_MS2): New.
opcodes:
Add ms2.
* ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
ms1-opc.c, ms1-opc.h: Regenerated.
2005-11-08 11:15:13 +00:00
|
|
|
|
2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
Add ms2
|
|
|
|
|
|
* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
|
|
|
|
|
|
model.
|
|
|
|
|
|
(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
|
|
|
|
|
|
f-cb2incr, f-rc3): New fields.
|
|
|
|
|
|
(LOOP): New instruction.
|
|
|
|
|
|
(JAL-HAZARD): New hazard.
|
|
|
|
|
|
(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
|
|
|
|
|
|
New operands.
|
|
|
|
|
|
(mul, muli, dbnz, iflush): Enable for ms2
|
|
|
|
|
|
(jal, reti): Has JAL-HAZARD.
|
|
|
|
|
|
(ldctxt, ldfb, stfb): Only ms1.
|
|
|
|
|
|
(fbcb): Only ms1,ms1-003.
|
|
|
|
|
|
(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
|
|
|
|
|
|
fbcbincrs, mfbcbincrs): Enable for ms2.
|
|
|
|
|
|
(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
|
|
|
|
|
|
* ms1.opc (parse_loopsize): New.
|
|
|
|
|
|
(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
|
|
|
|
|
|
(print_pcrel): New.
|
|
|
|
|
|
|
2005-10-28 19:33:06 +00:00
|
|
|
|
2005-10-28 Dave Brolley <brolley@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
Contribute the following change:
|
|
|
|
|
|
2003-09-24 Dave Brolley <brolley@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
|
|
|
|
|
|
CGEN_ATTR_VALUE_TYPE.
|
|
|
|
|
|
* m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
|
|
|
|
|
|
Use cgen_bitset_intersect_p.
|
|
|
|
|
|
|
* m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
(arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
imm operand is needed.
(adjnz, sbjnz): Pass the right operands.
(unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
unary-insn): Add -g variants for opcodes that need to support :G.
(not.BW:G, push.BW:G): Call it.
(stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
stzx16-imm8-imm8-abs16): Fix operand typos.
* m32c.opc (m32c_asm_hash): Support bnCND.
(parse_signed4n, print_signed4n): New.
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
2005-10-27 23:54:17 +00:00
|
|
|
|
2005-10-27 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
|
|
|
|
|
|
(arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
|
|
|
|
|
|
arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
|
|
|
|
|
|
imm operand is needed.
|
|
|
|
|
|
(adjnz, sbjnz): Pass the right operands.
|
|
|
|
|
|
(unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
|
|
|
|
|
|
unary-insn): Add -g variants for opcodes that need to support :G.
|
|
|
|
|
|
(not.BW:G, push.BW:G): Call it.
|
|
|
|
|
|
(stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
|
|
|
|
|
|
stzx16-imm8-imm8-abs16): Fix operand typos.
|
|
|
|
|
|
* m32c.opc (m32c_asm_hash): Support bnCND.
|
|
|
|
|
|
(parse_signed4n, print_signed4n): New.
|
|
|
|
|
|
|
2005-10-26 14:59:12 +00:00
|
|
|
|
2005-10-26 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
|
|
|
|
|
|
(mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
|
|
|
|
|
|
mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
|
|
|
|
|
|
dsp8[sp] is signed.
|
|
|
|
|
|
(mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
|
|
|
|
|
|
(mov.BW:S r0,r1): Fix typo r1l->r1.
|
|
|
|
|
|
(tst): Allow :G suffix.
|
|
|
|
|
|
* m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
|
|
|
|
|
|
|
2005-10-26 07:49:05 +00:00
|
|
|
|
2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
|
|
|
|
|
|
|
2005-10-25 18:52:02 +00:00
|
|
|
|
2005-10-25 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
|
|
|
|
|
|
making one a macro of the other.
|
|
|
|
|
|
|
[cpu]
* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
(indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
indexld, indexls): .w variants have `1' bit.
(rot32.b): QI, not SI.
(rot32.w): HI, not SI.
(xchg16): HI for .w variant.
[opcodes]
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
2005-10-22 00:03:13 +00:00
|
|
|
|
2005-10-21 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
|
|
|
|
|
|
(indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
|
|
|
|
|
|
indexld, indexls): .w variants have `1' bit.
|
|
|
|
|
|
(rot32.b): QI, not SI.
|
|
|
|
|
|
(rot32.w): HI, not SI.
|
|
|
|
|
|
(xchg16): HI for .w variant.
|
|
|
|
|
|
|
2005-10-19 14:44:17 +00:00
|
|
|
|
2005-10-19 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32r.opc (parse_slo16): Fix bad application of previous patch.
|
|
|
|
|
|
|
2005-10-18 07:53:17 +00:00
|
|
|
|
2005-10-18 Andreas Schwab <schwab@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* m32r.opc (parse_slo16): Better version of previous patch.
|
|
|
|
|
|
|
2005-10-14 08:33:27 +00:00
|
|
|
|
2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
|
|
|
|
|
|
size.
|
|
|
|
|
|
|
2005-07-26 03:21:53 +00:00
|
|
|
|
2005-07-25 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c.opc (parse_unsigned8): Add %dsp8().
|
|
|
|
|
|
(parse_signed8): Add %hi8().
|
|
|
|
|
|
(parse_unsigned16): Add %dsp16().
|
|
|
|
|
|
(parse_signed16): Add %lo16() and %hi16().
|
|
|
|
|
|
(parse_lab_5_3): Make valuep a bfd_vma *.
|
|
|
|
|
|
|
2005-07-19 10:01:32 +00:00
|
|
|
|
2005-07-18 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
|
|
|
|
|
|
components.
|
|
|
|
|
|
(f-lab32-jmp-s): Fix insertion sequence.
|
|
|
|
|
|
(Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
|
|
|
|
|
|
(Dsp-40-s8): Make parameter be signed.
|
|
|
|
|
|
(Dsp-40-s16): Likewise.
|
|
|
|
|
|
(Dsp-48-s8): Likewise.
|
|
|
|
|
|
(Dsp-48-s16): Likewise.
|
|
|
|
|
|
(Imm-13-u3): Likewise. (Despite its name!)
|
|
|
|
|
|
(BitBase16-16-s8): Make the parameter be unsigned.
|
|
|
|
|
|
(BitBase16-8-u11-S): Likewise.
|
|
|
|
|
|
(Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
|
|
|
|
|
|
jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
|
|
|
|
|
|
relaxation.
|
|
|
|
|
|
|
|
|
|
|
|
* m32c.opc: Fix formatting.
|
|
|
|
|
|
Use safe-ctype.h instead of ctype.h
|
|
|
|
|
|
Move duplicated code sequences into a macro.
|
|
|
|
|
|
Fix compile time warnings about signedness mismatches.
|
|
|
|
|
|
Remove dead code.
|
|
|
|
|
|
(parse_lab_5_3): New parser function.
|
|
|
|
|
|
|
2005-07-16 18:43:55 +00:00
|
|
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2005-07-16 Jim Blandy <jimb@redhat.com>
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* m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
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to represent isa sets.
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2005-07-15 20:31:17 +00:00
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2005-07-15 Jim Blandy <jimb@redhat.com>
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* m32c.cpu, m32c.opc: Fix copyright.
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ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* configure.in: Add cases for Renesas m32c.
* configure: Regenerated.
bfd/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for m32c-*-elf (Renesas m32c and m16c).
* Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
(ALL_MACHINES_CFILES): Add cpu-m32c.c.
(BFD32_BACKENDS): Add elf32-m32c.lo.
(BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
(cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
* Makefile.in: Regenerated.
* archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
arch and mach codes.
(bfd_m32c_arch): New arch info object.
(bfd_archures_list): List bfd_m32c_arch.
* bfd-in2.h: Regenerated.
* config.bfd: Add case for the m32c.
* configure.in: Add case for the m32c.
* configure: Regenerated.
* cpu-m32c.c, elf32-m32c.c: New files.
* libbfd.h: Regenerated.
* targets.c (bfd_elf32_m32c_vec): Declare.
(_bfd_target_vector): List bfd_elf32_m32c_vec.
binutils/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* readelf.c: #include "elf/m32c.h"
(guess_is_rela, dump_relocations, get_machine_name): Add cases for
EM_M32C.
* Makefile.am (readelf.o): Update dependencies.
* Makefile.in: Regenerated.
cpu/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
gas/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C.
* Makefile.am (CPU_TYPES): List m32c.
(TARGET_CPU_CFILES): List config/tc-m32c.c.
(TARGET_CPU_HFILES): List config/tc-m32c.h.
* configure.in: Add case for m32c.
* configure.tgt: Add cases for m32c and m32c-*-elf.
* configure: Regenerated.
* config/tc-m32c.c, config/tc-m32c.h: New files.
* doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set M32C.
* doc/as.texinfo: Add text for the M32C-specific options and line
comment characters, and refer to c-m32c.texi.
* doc/c-m32c.texi: New file.
include/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* dis-asm.h (print_insn_m32c): New declaration.
include/elf/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for Renesas M32C and M16C.
* common.h (EM_M32C): New machine number.
* m32c.h: New file.
ld/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
(eelf32m32c.c): New target.
* Makefile.in: Regenerated.
* configure.tgt: Add case for m32c-*-elf.
* emulparams/elf32m32c.sh: New file.
opcodes/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
* m32c-desc.h, m32c-opc.h: New.
* Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
(CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
m32c-opc.c.
(ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
m32c-ibld.lo, m32c-opc.lo.
(CLEANFILES): List stamp-m32c.
(M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
(CGEN_CPUS): Add m32c.
(m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
(m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
(m32c_opc_h): New variable.
(stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
(m32c-opc.lo): New rules.
* Makefile.in: Regenerated.
* configure.in: Add case for bfd_m32c_arch.
* configure: Regenerated.
* disassemble.c (ARCH_m32c): New.
[ARCH_m32c]: #include "m32c-desc.h".
(disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
(disassemble_init_for_target) [ARCH_m32c]: Same.
* cgen-ops.h, cgen-types.h: New files.
* Makefile.am (HFILES): List them.
* Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
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2005-07-14 Jim Blandy <jimb@redhat.com>
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* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
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2005-07-14 13:59:51 +00:00
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2005-07-14 Alan Modra <amodra@bigpond.net.au>
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* ms1.opc (print_dollarhex): Correct format string.
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2005-07-06 08:18:52 +00:00
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2005-07-06 Alan Modra <amodra@bigpond.net.au>
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* iq2000.cpu: Include from binutils cpu dir.
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2005-07-05 15:07:46 +00:00
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2005-07-05 Nick Clifton <nickc@redhat.com>
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* iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
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unsigned in order to avoid compile time warnings about sign
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conflicts.
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* ms1.opc (parse_*): Likewise.
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(parse_imm16): Use a "void *" as it is passed both signed and
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unsigned arguments.
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2005-07-01 11:16:33 +00:00
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2005-07-01 Nick Clifton <nickc@redhat.com>
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* frv.opc: Update to ISO C90 function declaration style.
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* iq2000.opc: Likewise.
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* m32r.opc: Likewise.
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* sh.opc: Likewise.
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2005-06-15 15:33:07 +00:00
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2005-06-15 Dave Brolley <brolley@redhat.com>
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Contributed by Red Hat.
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* ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
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* ms1.opc: New file. Written by Stan Cox.
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2005-05-10 10:21:13 +00:00
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2005-05-10 Nick Clifton <nickc@redhat.com>
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* Update the address and phone number of the FSF organization in
|
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|
the GPL notices in the following files:
|
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cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
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m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
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sh64-media.cpu, simplify.inc
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2005-02-24 13:36:46 +00:00
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2005-02-24 Alan Modra <amodra@bigpond.net.au>
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* frv.opc (parse_A): Warning fix.
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2005-02-23 16:04:40 +00:00
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|
2005-02-23 Nick Clifton <nickc@redhat.com>
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* frv.opc: Fixed compile time warnings about differing signed'ness
|
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of pointers passed to functions.
|
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* m32r.opc: Likewise.
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2005-02-11 16:09:30 +00:00
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|
2005-02-11 Nick Clifton <nickc@redhat.com>
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* iq2000.opc (parse_jtargq10): Change type of valuep argument to
|
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|
'bfd_vma *' in order avoid compile time warning message.
|
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2005-01-28 01:50:18 +00:00
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2005-01-28 Hans-Peter Nilsson <hp@axis.com>
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* cris.cpu (mstep): Add missing insn.
|
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2005-01-25 20:22:41 +00:00
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2005-01-25 Alexandre Oliva <aoliva@redhat.com>
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2004-11-10 Alexandre Oliva <aoliva@redhat.com>
|
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* frv.cpu: Add support for TLS annotations in loads and calll.
|
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|
* frv.opc (parse_symbolic_address): New.
|
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(parse_ldd_annotation): New.
|
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(parse_call_annotation): New.
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(parse_ld_annotation): New.
|
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|
(parse_ulo16, parse_uslo16): Use parse_symbolic_address.
|
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|
Introduce TLS relocations.
|
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|
(parse_d12, parse_s12, parse_u12): Likewise.
|
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|
|
(parse_uhi16): Likewise. Fix constant checking on 64-bit host.
|
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|
(parse_call_label, print_at): New.
|
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|
2004-12-21 04:37:58 +00:00
|
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|
2004-12-21 Mikael Starvik <starvik@axis.com>
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* cris.cpu (cris-set-mem): Correct integral write semantics.
|
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2004-11-29 11:52:11 +00:00
|
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|
2004-11-29 Hans-Peter Nilsson <hp@axis.com>
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* cris.cpu: New file.
|
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2004-11-15 14:30:12 +00:00
|
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|
2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
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* iq2000.cpu: Added quotes around macro arguments so that they
|
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|
will work with newer versions of guile.
|
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2004-10-27 09:30:09 +00:00
|
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|
2004-10-27 Nick Clifton <nickc@redhat.com>
|
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|
* iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
|
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|
wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
|
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operand.
|
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* iq2000.cpu (dnop index): Rename to _index to avoid complications
|
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|
with guile.
|
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|
2004-08-27 09:32:02 +00:00
|
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|
2004-08-27 Richard Sandiford <rsandifo@redhat.com>
|
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* frv.cpu (cfmovs): Change UNIT attribute to FMALL.
|
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2004-05-15 13:10:30 +00:00
|
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|
2004-05-15 Nick Clifton <nickc@redhat.com>
|
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|
|
* iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
|
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|
2004-03-30 09:29:19 +00:00
|
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|
2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
|
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|
|
* m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
|
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|
2004-03-01 10:11:46 +00:00
|
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|
|
2004-03-01 Richard Sandiford <rsandifo@redhat.com>
|
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* frv.cpu (define-arch frv): Add fr450 mach.
|
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|
|
(define-mach fr450): New.
|
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|
|
(define-model fr450): New. Add profile units to every fr450 insn.
|
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|
|
(define-attr UNIT): Add MDCUTSSI.
|
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|
|
(define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
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|
(define-attr AUDIO): New boolean.
|
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|
(f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
|
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|
|
(f-LRA-null, f-TLBPR-null): New fields.
|
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|
(scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
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|
|
(tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
|
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|
|
(LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
|
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|
|
(LRA-null, TLBPR-null): New macros.
|
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|
|
(iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
|
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|
(load-real-address): New macro.
|
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|
|
(lrai, lrad, tlbpr): New instructions.
|
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|
|
(media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
|
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|
|
(mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
|
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(mdcutssi): Change UNIT attribute to MDCUTSSI.
|
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|
|
(media-low-clear-semantics, media-scope-limit-semantics)
|
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|
|
(media-quad-limit, media-quad-shift): New macros.
|
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|
|
(mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
|
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|
|
* frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
|
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|
|
(frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
|
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|
(frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
|
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|
(fr450_unit_mapping): New array.
|
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|
|
(fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
|
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|
|
for new MDCUTSSI unit.
|
|
|
|
|
|
(fr450_check_insn_major_constraints): New function.
|
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|
|
(check_insn_major_constraints): Use it.
|
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|
2004-03-01 09:42:33 +00:00
|
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|
2004-03-01 Richard Sandiford <rsandifo@redhat.com>
|
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|
|
* frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
|
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|
|
(scutss): Change unit to I0.
|
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|
|
|
(calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
|
|
|
|
|
|
(mqsaths): Fix FR400-MAJOR categorization.
|
|
|
|
|
|
(media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
|
|
|
|
|
|
(media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
|
|
|
|
|
|
* frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
|
|
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|
|
|
combinations.
|
|
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|
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|
|
cpu/
* frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
(rstb, rsth, rst, rstd, rstq): Delete.
(rstbf, rsthf, rstf, rstdf, rstqf): Delete.
gas/testsuite/
* gas/frv/allinsn.s (rstb, rsth, rst, rstd, rstq): Replace with nops.
(rstbf, rsthf, rstf, rstdf, rstqf): Likewise.
* gas/frv/allinsn.d: Update accordingly.
opcodes/
* frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
sim/frv/
* decode.c, decode.h, model.c, sem.c: Regenerate.
sim/testsuite/
* sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete.
* sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
2004-03-01 09:26:33 +00:00
|
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|
|
2004-03-01 Richard Sandiford <rsandifo@redhat.com>
|
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|
|
|
|
|
|
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|
|
* frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
|
|
|
|
|
|
(rstb, rsth, rst, rstd, rstq): Delete.
|
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|
|
|
(rstbf, rsthf, rstf, rstdf, rstqf): Delete.
|
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|
|
2004-02-23 16:46:46 +00:00
|
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|
|
2004-02-23 Nick Clifton <nickc@redhat.com>
|
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|
|
* Apply these patches from Renesas:
|
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|
2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
|
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|
|
* cpu/m32r.opc (my_print_insn): Fixed incorrect output when
|
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|
|
disassembling codes for 0x*2 addresses.
|
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|
2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
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* cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
|
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|
2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
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* cpu/m32r.cpu : Add new model m32r2.
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Add new instructions.
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Replace occurrances of 'Mitsubishi' with 'Renesas'.
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Changed PIPE attr of push from O to OS.
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Care for Little-endian of M32R.
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* cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
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Care for Little-endian of M32R.
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(parse_slo16): signed extension for value.
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2004-02-20 16:23:01 +00:00
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2004-02-20 Andrew Cagney <cagney@redhat.com>
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2004-02-20 16:26:45 +00:00
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* m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
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Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
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2004-02-20 16:23:01 +00:00
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* sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
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written by Ben Elliston.
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2004-01-14 10:05:00 +00:00
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2004-01-14 Richard Sandiford <rsandifo@redhat.com>
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* frv.cpu (UNIT): Add IACC.
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(iacc-multiply-r-r): Use it.
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* frv.opc (fr400_unit_mapping): Add entry for IACC.
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(fr500_unit_mapping, fr550_unit_mapping): Likewise.
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2004-01-06 19:18:37 +00:00
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2004-01-06 Alexandre Oliva <aoliva@redhat.com>
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2003-12-19 Alexandre Oliva <aoliva@redhat.com>
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* frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
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cut&paste errors in shifting/truncating numerical operands.
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2003-08-08 Alexandre Oliva <aoliva@redhat.com>
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* frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
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(parse_uslo16): Likewise.
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(parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
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(parse_d12): Parse gotoff12 and gotofffuncdesc12.
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(parse_s12): Likewise.
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2003-08-04 Alexandre Oliva <aoliva@redhat.com>
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* frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
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(parse_uslo16): Likewise.
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(parse_uhi16): Parse gothi and gotfuncdeschi.
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(parse_d12): Parse got12 and gotfuncdesc12.
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(parse_s12): Likewise.
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2003-10-10 19:29:38 +00:00
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2003-10-10 Dave Brolley <brolley@redhat.com>
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* frv.cpu (dnpmop): New p-macro.
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(GRdoublek): Use dnpmop.
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(CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
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(store-double-r-r): Use (.sym regtype doublek).
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(r-store-double): Ditto.
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(store-double-r-r-u): Ditto.
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(conditional-store-double): Ditto.
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(conditional-store-double-u): Ditto.
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(store-double-r-simm): Ditto.
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(fmovs): Assign to UNIT FMALL.
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2003-10-08 17:53:40 +00:00
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|
2003-10-06 Dave Brolley <brolley@redhat.com>
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* frv.cpu, frv.opc: Add support for fr550.
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|
2003-09-24 19:04:54 +00:00
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|
2003-09-24 Dave Brolley <brolley@redhat.com>
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* frv.cpu (u-commit): New modelling unit for fr500.
|
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|
(mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
|
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|
(commit-r): Use u-commit model for fr500.
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|
(commit): Ditto.
|
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|
(conditional-float-binary-op): Take profiling data as an argument.
|
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|
|
Update callers.
|
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|
(ne-float-binary-op): Ditto.
|
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|
2003-09-19 18:59:13 +00:00
|
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|
2003-09-19 Michael Snyder <msnyder@redhat.com>
|
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|
* frv.cpu (nldqi): Delete unimplemented instruction.
|
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|
2003-09-12 22:04:22 +00:00
|
|
|
|
2003-09-12 Dave Brolley <brolley@redhat.com>
|
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|
|
* frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
|
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|
|
(clear-ne-flag-r): Pass insn profiling in as an argument. Call
|
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|
|
frv_ref_SI to get input register referenced for profiling.
|
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|
|
(clear-ne-flag-all): Pass insn profiling in as an argument.
|
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|
|
(clrgr,clrfr,clrga,clrfa): Add profiling information.
|
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|
2003-09-11 20:53:33 +00:00
|
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|
2003-09-11 Michael Snyder <msnyder@redhat.com>
|
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|
|
* frv.cpu: Typographical corrections.
|
|
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|
|
2003-09-09 22:27:28 +00:00
|
|
|
|
2003-09-09 Dave Brolley <brolley@redhat.com>
|
|
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|
|
* frv.cpu (media-dual-complex): Change UNIT to FMALL.
|
|
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|
|
(conditional-media-dual-complex, media-quad-complex): Likewise.
|
|
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|
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|
|
2003-09-04 22:46:10 +00:00
|
|
|
|
2003-09-04 Dave Brolley <brolley@redhat.com>
|
|
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|
|
|
|
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|
|
* frv.cpu (register-transfer): Pass in all attributes in on argument.
|
|
|
|
|
|
Update all callers.
|
|
|
|
|
|
(conditional-register-transfer): Ditto.
|
|
|
|
|
|
(cache-preload): Ditto.
|
|
|
|
|
|
(floating-point-conversion): Ditto.
|
|
|
|
|
|
(floating-point-neg): Ditto.
|
|
|
|
|
|
(float-abs): Ditto.
|
|
|
|
|
|
(float-binary-op-s): Ditto.
|
|
|
|
|
|
(conditional-float-binary-op): Ditto.
|
|
|
|
|
|
(ne-float-binary-op): Ditto.
|
|
|
|
|
|
(float-dual-arith): Ditto.
|
|
|
|
|
|
(ne-float-dual-arith): Ditto.
|
|
|
|
|
|
|
2003-09-03 Dave Brolley <brolley@redhat.com>
* frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
* frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
MCLRACC-1.
(A): Removed operand.
(A0,A1): New operands replace operand A.
(mnop): Now a real insn
(mclracc): Removed insn.
(mclracc-0, mclracc-1): New insns replace mclracc.
(all insns): Use new UNIT attributes.
2003-09-03 23:03:45 +00:00
|
|
|
|
2003-09-03 Dave Brolley <brolley@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
|
|
|
|
|
|
* frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
|
|
|
|
|
|
MCLRACC-1.
|
|
|
|
|
|
(A): Removed operand.
|
|
|
|
|
|
(A0,A1): New operands replace operand A.
|
|
|
|
|
|
(mnop): Now a real insn
|
|
|
|
|
|
(mclracc): Removed insn.
|
|
|
|
|
|
(mclracc-0, mclracc-1): New insns replace mclracc.
|
|
|
|
|
|
(all insns): Use new UNIT attributes.
|
|
|
|
|
|
|
2003-08-21 13:37:01 +00:00
|
|
|
|
2003-08-21 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
|
|
|
|
|
|
and u-media-dual-btoh with output parameter.
|
|
|
|
|
|
(cmbtoh): Add profiling hack.
|
|
|
|
|
|
|
2003-08-20 15:40:02 +00:00
|
|
|
|
2003-08-19 Michael Snyder <msnyder@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu: Fix typo, Frintkeven -> FRintkeven
|
|
|
|
|
|
|
2003-06-10 21:24:48 +00:00
|
|
|
|
2003-06-10 Doug Evans <dje@sebabeach.org>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu: Add IDOC attribute.
|
|
|
|
|
|
|
2003-06-06 21:49:30 +00:00
|
|
|
|
2003-06-06 Andrew Cagney <cagney@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
Contributed by Red Hat.
|
|
|
|
|
|
* iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
|
|
|
|
|
|
Stan Cox, and Frank Ch. Eigler.
|
|
|
|
|
|
* iq2000.opc: New file. Written by Ben Elliston, Frank
|
|
|
|
|
|
Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
|
|
|
|
|
|
* iq2000m.cpu: New file. Written by Jeff Johnston.
|
|
|
|
|
|
* iq10.cpu: New file. Written by Jeff Johnston.
|
|
|
|
|
|
|
2003-06-05 16:04:20 +00:00
|
|
|
|
2003-06-05 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu (FRintieven): New operand. An even-numbered only
|
|
|
|
|
|
version of the FRinti operand.
|
|
|
|
|
|
(FRintjeven): Likewise for FRintj.
|
|
|
|
|
|
(FRintkeven): Likewise for FRintk.
|
|
|
|
|
|
(mdcutssi, media-dual-word-rotate-r-r, mqsaths,
|
|
|
|
|
|
media-quad-arith-sat-semantics, media-quad-arith-sat,
|
|
|
|
|
|
conditional-media-quad-arith-sat, mdunpackh,
|
|
|
|
|
|
media-quad-multiply-semantics, media-quad-multiply,
|
|
|
|
|
|
conditional-media-quad-multiply, media-quad-complex-i,
|
|
|
|
|
|
media-quad-multiply-acc-semantics, media-quad-multiply-acc,
|
|
|
|
|
|
conditional-media-quad-multiply-acc, munpackh,
|
|
|
|
|
|
media-quad-multiply-cross-acc-semantics, mdpackh,
|
|
|
|
|
|
media-quad-multiply-cross-acc, mbtoh-semantics,
|
|
|
|
|
|
media-quad-cross-multiply-cross-acc-semantics,
|
|
|
|
|
|
media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
|
|
|
|
|
|
media-quad-cross-multiply-acc-semantics, cmbtoh,
|
|
|
|
|
|
media-quad-cross-multiply-acc, media-quad-complex, mhtob,
|
|
|
|
|
|
media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
|
|
|
|
|
|
cmhtob): Use new operands.
|
|
|
|
|
|
* frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
|
2005-07-14 13:59:51 +00:00
|
|
|
|
(parse_even_register): New function.
|
2003-06-05 16:04:20 +00:00
|
|
|
|
|
2003-06-03 17:15:25 +00:00
|
|
|
|
2003-06-03 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
|
|
|
|
|
|
immediate value not unsigned.
|
|
|
|
|
|
|
2003-06-03 15:41:12 +00:00
|
|
|
|
2003-06-03 Andrew Cagney <cagney@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
Contributed by Red Hat.
|
|
|
|
|
|
* frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
|
|
|
|
|
|
and Eric Christopher.
|
|
|
|
|
|
* frv.opc: New file. Written by Catherine Moore, and Dave
|
|
|
|
|
|
Brolley.
|
|
|
|
|
|
* simplify.inc: New file. Written by Doug Evans.
|
|
|
|
|
|
|
2003-05-03 00:44:23 +00:00
|
|
|
|
2003-05-02 Andrew Cagney <cagney@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* New file.
|
|
|
|
|
|
|
|
|
|
|
|
|
2012-12-10 12:48:03 +00:00
|
|
|
|
Copyright (C) 2003-2012 Free Software Foundation, Inc.
|
|
|
|
|
|
|
|
|
|
|
|
Copying and distribution of this file, with or without modification,
|
|
|
|
|
|
are permitted in any medium without royalty provided the copyright
|
|
|
|
|
|
notice and this notice are preserved.
|
|
|
|
|
|
|
2003-05-03 00:44:23 +00:00
|
|
|
|
Local Variables:
|
|
|
|
|
|
mode: change-log
|
|
|
|
|
|
left-margin: 8
|
|
|
|
|
|
fill-column: 74
|
|
|
|
|
|
version-control: never
|
|
|
|
|
|
End:
|
