FRV: Use a signed 6-bit immediate value not unsigned for mdrotli insn.
Use maintainer mode to regenerate ports.
This commit is contained in:
Nick Clifton
parent
27b1cc72b8
commit
7579829884
17 changed files with 971 additions and 604 deletions
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@ -1,3 +1,8 @@
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2003-06-03 Nick Clifton <nickc@redhat.com>
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* frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
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immediate value not unsigned.
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2003-06-03 Andrew Cagney <cagney@redhat.com>
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Contributed by Red Hat.
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@ -6660,16 +6660,16 @@
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(dni name
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(comment)
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((UNIT FM0) (MACH fr400) (FR400-MAJOR M-2))
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(.str name "$pack $FRinti,$u6,$FRintk")
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(+ pack FRintk op FRinti ope u6)
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(.str name "$pack $FRinti,$s6,$FRintk")
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(+ pack FRintk op FRinti ope s6)
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(if (orif (register-unaligned FRinti 2)
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(register-unaligned FRintk 2))
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(c-call VOID "@cpu@_media_register_not_aligned")
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(sequence ()
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(set FRintk (operation FRinti (and u6 #x1f)))
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(set FRintk (operation FRinti (and s6 #x1f)))
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(set (nextreg h-fr_int FRintk 1)
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(operation (nextreg h-fr_int FRinti 1)
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(and u6 #x1f)))))
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(and s6 #x1f)))))
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((fr400 (unit u-media-3-quad)))
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)
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)
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@ -1,3 +1,21 @@
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2003-06-03 Nick Clifton <nickc@redhat.com>
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* frv-desc.c: Regenerate.
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* frv-opc.c: Regenerate.
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* aclocal.m4: Regenerate.
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* config.in: Regenerate.
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* configure: Regenerate.
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* iq2000-asm.c: Regenerate.
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* iq2000-desc.c: Regenerate.
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* iq2000-desc.h: Regenerate.
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* iq2000-dis.c: Regenerate.
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* iq2000-ibld.c: Regenerate.
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* iq2000-opc.c: Regenerate.
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* iq2000-opc.h: Regenerate.
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* po/POTFILES.in: Regenerate.
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* po/opcodes.pot: Regenerate.
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2003-05-23 Jason Eckhardt <jle@rice.edu>
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* i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3.
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18
opcodes/aclocal.m4
vendored
18
opcodes/aclocal.m4
vendored
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@ -35,6 +35,24 @@ AC_SUBST(bfdlibdir)
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AC_SUBST(bfdincludedir)
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])
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#serial 1
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# This test replaces the one in autoconf.
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# Currently this macro should have the same name as the autoconf macro
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# because gettext's gettext.m4 (distributed in the automake package)
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# still uses it. Otherwise, the use in gettext.m4 makes autoheader
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# give these diagnostics:
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# configure.in:556: AC_TRY_COMPILE was called before AC_ISC_POSIX
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# configure.in:556: AC_TRY_RUN was called before AC_ISC_POSIX
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undefine([AC_ISC_POSIX])
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AC_DEFUN([AC_ISC_POSIX],
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[
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dnl This test replaces the obsolescent AC_ISC_POSIX kludge.
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AC_CHECK_LIB(cposix, strerror, [LIBS="$LIBS -lcposix"])
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]
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)
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# Do all the work for Automake. This macro actually does too much --
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# some checks are only needed if your package does certain things.
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# But this isn't really a big deal.
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@ -25,9 +25,6 @@
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/* Define to `long' if <sys/types.h> doesn't define. */
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#undef off_t
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/* Define if you need to in order for stat and other things to work. */
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#undef _POSIX_SOURCE
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/* Define to `unsigned' if <sys/types.h> doesn't define. */
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#undef size_t
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@ -109,12 +106,6 @@
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/* Define if you have the <sys/param.h> header file. */
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#undef HAVE_SYS_PARAM_H
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/* Define if you have the <sys/stat.h> header file. */
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#undef HAVE_SYS_STAT_H
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/* Define if you have the <sys/types.h> header file. */
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#undef HAVE_SYS_TYPES_H
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/* Define if you have the <unistd.h> header file. */
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#undef HAVE_UNISTD_H
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762
opcodes/configure
vendored
762
opcodes/configure
vendored
File diff suppressed because it is too large
Load diff
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@ -5497,7 +5497,7 @@ static const CGEN_IBASE frv_cgen_insn_table[MAX_INSNS] =
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FRV_INSN_MSRAHI, "msrahi", "msrahi", 32,
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{ 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
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},
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/* mdrotli$pack $FRinti,$u6,$FRintk */
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/* mdrotli$pack $FRinti,$s6,$FRintk */
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{
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FRV_INSN_MDROTLI, "mdrotli", "mdrotli", 32,
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{ 0, { (1<<MACH_FR400), UNIT_FM0, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
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@ -1033,6 +1033,10 @@ static const CGEN_IFMT ifmt_mcuti = {
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32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_ACC40SI) }, { F (F_OPE1) }, { F (F_S6) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_mdrotli = {
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32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_S6) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_mcmpsh = {
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32, 32, 0x79fc0fc0, { { F (F_PACK) }, { F (F_COND_NULL) }, { F (F_FCCK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } }
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};
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@ -5008,11 +5012,11 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
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{ { MNEM, OP (PACK), ' ', OP (FRINTI), ',', OP (U6), ',', OP (FRINTK), 0 } },
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& ifmt_mrotli, { 0x1ec02c0 }
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},
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/* mdrotli$pack $FRinti,$u6,$FRintk */
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/* mdrotli$pack $FRinti,$s6,$FRintk */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, OP (PACK), ' ', OP (FRINTI), ',', OP (U6), ',', OP (FRINTK), 0 } },
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& ifmt_mrotli, { 0x1e002c0 }
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{ { MNEM, OP (PACK), ' ', OP (FRINTI), ',', OP (S6), ',', OP (FRINTK), 0 } },
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& ifmt_mdrotli, { 0x1e002c0 }
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},
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/* mcplhi$pack $FRinti,$u6,$FRintk */
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{
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@ -385,15 +385,15 @@ iq2000_cgen_parse_operand (cd, opindex, strp, fields)
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case IQ2000_OPERAND_EXECODE :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, &fields->f_excode);
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break;
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case IQ2000_OPERAND_F_INDEX :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_F_INDEX, &fields->f_index);
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break;
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case IQ2000_OPERAND_HI16 :
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errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, &fields->f_imm);
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break;
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case IQ2000_OPERAND_IMM :
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errmsg = parse_imm (cd, strp, IQ2000_OPERAND_IMM, &fields->f_imm);
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break;
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case IQ2000_OPERAND_INDEX :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_INDEX, &fields->f_index);
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break;
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case IQ2000_OPERAND_JMPTARG :
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{
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bfd_vma value;
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@ -477,9 +477,6 @@ iq2000_cgen_init_asm (cd)
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iq2000_cgen_init_ibld_table (cd);
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cd->parse_handlers = & iq2000_cgen_parse_handlers[0];
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cd->parse_operand = iq2000_cgen_parse_operand;
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#ifdef CGEN_ASM_INIT_HOOK
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CGEN_ASM_INIT_HOOK
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#endif
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}
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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@ -23,7 +23,6 @@ with this program; if not, write to the Free Software Foundation, Inc.,
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*/
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#include "sysdep.h"
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#include <ctype.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include "ansidecl.h"
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@ -33,6 +32,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
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#include "iq2000-opc.h"
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#include "opintl.h"
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#include "libiberty.h"
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#include "xregex.h"
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/* Attributes. */
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@ -122,7 +122,7 @@ const CGEN_ATTR_TABLE iq2000_cgen_insn_attr_table[] =
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/* Instruction set variants. */
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static const CGEN_ISA iq2000_cgen_isa_table[] = {
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{ "iq2000", 32, 32, 32, 32 },
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{ "iq2000", 32, 32, 23, 32 },
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{ 0, 0, 0, 0, 0 }
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};
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@ -255,6 +255,9 @@ const CGEN_IFLD iq2000_cgen_ifld_table[] =
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{ IQ2000_F_CP_GRP, "f-cp-grp", 0, 32, 7, 2, { 0, { (1<<MACH_BASE) } } },
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{ IQ2000_F_FUNC, "f-func", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
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{ IQ2000_F_IMM, "f-imm", 0, 32, 15, 16, { 0, { (1<<MACH_BASE) } } },
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{ IQ2000_F_RD_RS, "f-rd-rs", 0, 0, 0, 0,{ 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
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{ IQ2000_F_RD_RT, "f-rd-rt", 0, 0, 0, 0,{ 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
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{ IQ2000_F_RT_RS, "f-rt-rs", 0, 0, 0, 0,{ 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
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{ IQ2000_F_JTARG, "f-jtarg", 0, 32, 15, 16, { 0|A(ABS_ADDR), { (1<<MACH_BASE) } } },
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{ IQ2000_F_JTARGQ10, "f-jtargq10", 0, 32, 20, 21, { 0|A(ABS_ADDR), { (1<<MACH_BASE) } } },
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{ IQ2000_F_OFFSET, "f-offset", 0, 32, 15, 16, { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
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@ -295,21 +298,21 @@ const CGEN_MAYBE_MULTI_IFLD IQ2000_F_RT_RS_MULTI_IFIELD [];
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const CGEN_MAYBE_MULTI_IFLD IQ2000_F_RD_RS_MULTI_IFIELD [] =
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{
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{ 0, { (void *) &(iq2000_cgen_ifld_table[5])} },
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{ 0, { (void *) &(iq2000_cgen_ifld_table[3])} },
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{0,{0}}
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_RD] } },
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_RS] } },
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{ 0, { (const PTR) 0 } }
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};
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const CGEN_MAYBE_MULTI_IFLD IQ2000_F_RD_RT_MULTI_IFIELD [] =
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{
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{ 0, { (void *) &(iq2000_cgen_ifld_table[5])} },
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{ 0, { (void *) &(iq2000_cgen_ifld_table[4])} },
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{0,{0}}
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_RD] } },
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_RT] } },
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{ 0, { (const PTR) 0 } }
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};
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const CGEN_MAYBE_MULTI_IFLD IQ2000_F_RT_RS_MULTI_IFIELD [] =
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{
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{ 0, { (void *) &(iq2000_cgen_ifld_table[4])} },
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{ 0, { (void *) &(iq2000_cgen_ifld_table[3])} },
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{0,{0}}
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_RT] } },
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_RS] } },
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{ 0, { (const PTR) 0 } }
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};
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/* The operand table. */
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@ -329,133 +332,136 @@ const CGEN_OPERAND iq2000_cgen_operand_table[] =
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{
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/* pc: program counter */
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{ "pc", IQ2000_OPERAND_PC, HW_H_PC, 0, 0,
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{ 0, { (void *) &(iq2000_cgen_ifld_table[0])} },
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_NIL] } },
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{ 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
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/* rs: register Rs */
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{ "rs", IQ2000_OPERAND_RS, HW_H_GR, 25, 5,
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{ 0, { (void *) &(iq2000_cgen_ifld_table[3])} },
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_RS] } },
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{ 0, { (1<<MACH_BASE) } } },
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/* rt: register Rt */
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{ "rt", IQ2000_OPERAND_RT, HW_H_GR, 20, 5,
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{ 0, { (void *) &(iq2000_cgen_ifld_table[4])} },
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_RT] } },
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{ 0, { (1<<MACH_BASE) } } },
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/* rd: register Rd */
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{ "rd", IQ2000_OPERAND_RD, HW_H_GR, 15, 5,
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{ 0, { (void *) &(iq2000_cgen_ifld_table[5])} },
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_RD] } },
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{ 0, { (1<<MACH_BASE) } } },
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/* rd-rs: register Rd from Rs */
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{ "rd-rs", IQ2000_OPERAND_RD_RS, HW_H_GR, 15, 10,
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{ 2, { (void *) &(IQ2000_F_RD_RS_MULTI_IFIELD[0])} },
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{ 2, { (const PTR) &IQ2000_F_RD_RS_MULTI_IFIELD[0] } },
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{ 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
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/* rd-rt: register Rd from Rt */
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{ "rd-rt", IQ2000_OPERAND_RD_RT, HW_H_GR, 15, 10,
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{ 2, { (void *) &(IQ2000_F_RD_RT_MULTI_IFIELD[0])} },
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{ 2, { (const PTR) &IQ2000_F_RD_RT_MULTI_IFIELD[0] } },
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{ 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
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/* rt-rs: register Rt from Rs */
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{ "rt-rs", IQ2000_OPERAND_RT_RS, HW_H_GR, 20, 10,
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{ 2, { (void *) &(IQ2000_F_RT_RS_MULTI_IFIELD[0])} },
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{ 2, { (const PTR) &IQ2000_F_RT_RS_MULTI_IFIELD[0] } },
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{ 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
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/* shamt: shift amount */
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{ "shamt", IQ2000_OPERAND_SHAMT, HW_H_UINT, 10, 5,
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{ 0, { (void *) &(iq2000_cgen_ifld_table[6])} },
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_SHAMT] } },
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{ 0, { (1<<MACH_BASE) } } },
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/* imm: immediate */
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{ "imm", IQ2000_OPERAND_IMM, HW_H_UINT, 15, 16,
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{ 0, { (void *) &(iq2000_cgen_ifld_table[11])} },
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_IMM] } },
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{ 0, { (1<<MACH_BASE) } } },
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/* offset: pc-relative offset */
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{ "offset", IQ2000_OPERAND_OFFSET, HW_H_IADDR, 15, 16,
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{ 0, { (void *) &(iq2000_cgen_ifld_table[14])} },
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_OFFSET] } },
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{ 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
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/* baseoff: base register offset */
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{ "baseoff", IQ2000_OPERAND_BASEOFF, HW_H_IADDR, 15, 16,
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{ 0, { (void *) &(iq2000_cgen_ifld_table[11])} },
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_IMM] } },
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{ 0, { (1<<MACH_BASE) } } },
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/* jmptarg: jump target */
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{ "jmptarg", IQ2000_OPERAND_JMPTARG, HW_H_IADDR, 15, 16,
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{ 0, { (void *) &(iq2000_cgen_ifld_table[12])} },
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_JTARG] } },
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{ 0|A(ABS_ADDR), { (1<<MACH_BASE) } } },
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/* mask: mask */
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{ "mask", IQ2000_OPERAND_MASK, HW_H_UINT, 9, 4,
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{ 0, { (void *) &(iq2000_cgen_ifld_table[18])} },
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_MASK] } },
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{ 0, { (1<<MACH_BASE) } } },
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/* maskq10: iq10 mask */
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{ "maskq10", IQ2000_OPERAND_MASKQ10, HW_H_UINT, 10, 5,
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{ 0, { (void *) &(iq2000_cgen_ifld_table[19])} },
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_MASKQ10] } },
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{ 0, { (1<<MACH_BASE) } } },
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/* maskl: mask left */
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{ "maskl", IQ2000_OPERAND_MASKL, HW_H_UINT, 4, 5,
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{ 0, { (void *) &(iq2000_cgen_ifld_table[20])} },
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{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_MASKL] } },
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{ 0, { (1<<MACH_BASE) } } },
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/* count: count */
|
||||
{ "count", IQ2000_OPERAND_COUNT, HW_H_UINT, 15, 7,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[15])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_COUNT] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* index: index */
|
||||
{ "index", IQ2000_OPERAND_INDEX, HW_H_UINT, 8, 9,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[17])} },
|
||||
/* f-index: index */
|
||||
{ "f-index", IQ2000_OPERAND_F_INDEX, HW_H_UINT, 8, 9,
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_INDEX] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* execode: execcode */
|
||||
{ "execode", IQ2000_OPERAND_EXECODE, HW_H_UINT, 25, 20,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[21])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_EXCODE] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* bytecount: byte count */
|
||||
{ "bytecount", IQ2000_OPERAND_BYTECOUNT, HW_H_UINT, 7, 8,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[16])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_BYTECOUNT] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* cam-y: cam global opn y */
|
||||
{ "cam-y", IQ2000_OPERAND_CAM_Y, HW_H_UINT, 2, 3,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[29])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_CAM_Y] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* cam-z: cam global mask z */
|
||||
{ "cam-z", IQ2000_OPERAND_CAM_Z, HW_H_UINT, 5, 3,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[28])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_CAM_Z] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* cm-3func: CM 3 bit fn field */
|
||||
{ "cm-3func", IQ2000_OPERAND_CM_3FUNC, HW_H_UINT, 5, 3,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[30])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_CM_3FUNC] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* cm-4func: CM 4 bit fn field */
|
||||
{ "cm-4func", IQ2000_OPERAND_CM_4FUNC, HW_H_UINT, 5, 4,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[31])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_CM_4FUNC] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* cm-3z: CM 3 bit Z field */
|
||||
{ "cm-3z", IQ2000_OPERAND_CM_3Z, HW_H_UINT, 1, 2,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[32])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_CM_3Z] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* cm-4z: CM 4 bit Z field */
|
||||
{ "cm-4z", IQ2000_OPERAND_CM_4Z, HW_H_UINT, 2, 3,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[33])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_CM_4Z] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* base: base register */
|
||||
{ "base", IQ2000_OPERAND_BASE, HW_H_GR, 25, 5,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[3])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_RS] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* maskr: mask right */
|
||||
{ "maskr", IQ2000_OPERAND_MASKR, HW_H_UINT, 25, 5,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[3])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_RS] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* bitnum: bit number */
|
||||
{ "bitnum", IQ2000_OPERAND_BITNUM, HW_H_UINT, 20, 5,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[4])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_RT] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* hi16: high 16 bit immediate */
|
||||
{ "hi16", IQ2000_OPERAND_HI16, HW_H_UINT, 15, 16,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[11])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_IMM] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* lo16: 16 bit signed immediate, for low */
|
||||
{ "lo16", IQ2000_OPERAND_LO16, HW_H_UINT, 15, 16,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[11])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_IMM] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* mlo16: negated 16 bit signed immediate */
|
||||
{ "mlo16", IQ2000_OPERAND_MLO16, HW_H_UINT, 15, 16,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[11])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_IMM] } },
|
||||
{ 0, { (1<<MACH_BASE) } } },
|
||||
/* jmptargq10: iq10 21-bit jump offset */
|
||||
{ "jmptargq10", IQ2000_OPERAND_JMPTARGQ10, HW_H_IADDR, 20, 21,
|
||||
{ 0, { (void *) &(iq2000_cgen_ifld_table[13])} },
|
||||
{ 0, { (const PTR) &iq2000_cgen_ifld_table[IQ2000_F_JTARGQ10] } },
|
||||
{ 0|A(ABS_ADDR), { (1<<MACH_BASE) } } },
|
||||
{ 0, 0, 0, 0, 0, {0, {0}}, {0, {0}} }
|
||||
/* sentinel */
|
||||
{ 0, 0, 0, 0, 0,
|
||||
{ 0, { (const PTR) 0 } },
|
||||
{ 0, { 0 } } }
|
||||
};
|
||||
|
||||
#undef A
|
||||
|
|
@ -1161,14 +1167,14 @@ static const CGEN_IBASE iq2000_cgen_insn_table[MAX_INSNS] =
|
|||
IQ2000_INSN_PKRL, "pkrl", "pkrl", 32,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT)|A(USES_RD), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* pkrlr1 $rt,$index,$count */
|
||||
/* pkrlr1 $rt,$count */
|
||||
{
|
||||
IQ2000_INSN_PKRLR1, "pkrlr1", "pkrlr1", 32,
|
||||
IQ2000_INSN_PKRLR1, "pkrlr1", "pkrlr1", 23,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* pkrlr30 $rt,$index,$count */
|
||||
/* pkrlr30 $rt,$count */
|
||||
{
|
||||
IQ2000_INSN_PKRLR30, "pkrlr30", "pkrlr30", 32,
|
||||
IQ2000_INSN_PKRLR30, "pkrlr30", "pkrlr30", 23,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* rb $rd,$rt */
|
||||
|
|
@ -1176,14 +1182,14 @@ static const CGEN_IBASE iq2000_cgen_insn_table[MAX_INSNS] =
|
|||
IQ2000_INSN_RB, "rb", "rb", 32,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT)|A(USES_RD), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* rbr1 $rt,$index,$count */
|
||||
/* rbr1 $rt,$count */
|
||||
{
|
||||
IQ2000_INSN_RBR1, "rbr1", "rbr1", 32,
|
||||
IQ2000_INSN_RBR1, "rbr1", "rbr1", 23,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* rbr30 $rt,$index,$count */
|
||||
/* rbr30 $rt,$count */
|
||||
{
|
||||
IQ2000_INSN_RBR30, "rbr30", "rbr30", 32,
|
||||
IQ2000_INSN_RBR30, "rbr30", "rbr30", 23,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* rfe */
|
||||
|
|
@ -1196,14 +1202,14 @@ static const CGEN_IBASE iq2000_cgen_insn_table[MAX_INSNS] =
|
|||
IQ2000_INSN_RX, "rx", "rx", 32,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT)|A(USES_RD), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* rxr1 $rt,$index,$count */
|
||||
/* rxr1 $rt,$count */
|
||||
{
|
||||
IQ2000_INSN_RXR1, "rxr1", "rxr1", 32,
|
||||
IQ2000_INSN_RXR1, "rxr1", "rxr1", 23,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* rxr30 $rt,$index,$count */
|
||||
/* rxr30 $rt,$count */
|
||||
{
|
||||
IQ2000_INSN_RXR30, "rxr30", "rxr30", 32,
|
||||
IQ2000_INSN_RXR30, "rxr30", "rxr30", 23,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* sleep */
|
||||
|
|
@ -1261,24 +1267,24 @@ static const CGEN_IBASE iq2000_cgen_insn_table[MAX_INSNS] =
|
|||
IQ2000_INSN_WBU, "wbu", "wbu", 32,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT)|A(USES_RD), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* wbr1 $rt,$index,$count */
|
||||
/* wbr1 $rt,$count */
|
||||
{
|
||||
IQ2000_INSN_WBR1, "wbr1", "wbr1", 32,
|
||||
IQ2000_INSN_WBR1, "wbr1", "wbr1", 23,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* wbr1u $rt,$index,$count */
|
||||
/* wbr1u $rt,$count */
|
||||
{
|
||||
IQ2000_INSN_WBR1U, "wbr1u", "wbr1u", 32,
|
||||
IQ2000_INSN_WBR1U, "wbr1u", "wbr1u", 23,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* wbr30 $rt,$index,$count */
|
||||
/* wbr30 $rt,$count */
|
||||
{
|
||||
IQ2000_INSN_WBR30, "wbr30", "wbr30", 32,
|
||||
IQ2000_INSN_WBR30, "wbr30", "wbr30", 23,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* wbr30u $rt,$index,$count */
|
||||
/* wbr30u $rt,$count */
|
||||
{
|
||||
IQ2000_INSN_WBR30U, "wbr30u", "wbr30u", 32,
|
||||
IQ2000_INSN_WBR30U, "wbr30u", "wbr30u", 23,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* wx $rd,$rt */
|
||||
|
|
@ -1291,24 +1297,24 @@ static const CGEN_IBASE iq2000_cgen_insn_table[MAX_INSNS] =
|
|||
IQ2000_INSN_WXU, "wxu", "wxu", 32,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT)|A(USES_RD), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* wxr1 $rt,$index,$count */
|
||||
/* wxr1 $rt,$count */
|
||||
{
|
||||
IQ2000_INSN_WXR1, "wxr1", "wxr1", 32,
|
||||
IQ2000_INSN_WXR1, "wxr1", "wxr1", 23,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* wxr1u $rt,$index,$count */
|
||||
/* wxr1u $rt,$count */
|
||||
{
|
||||
IQ2000_INSN_WXR1U, "wxr1u", "wxr1u", 32,
|
||||
IQ2000_INSN_WXR1U, "wxr1u", "wxr1u", 23,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* wxr30 $rt,$index,$count */
|
||||
/* wxr30 $rt,$count */
|
||||
{
|
||||
IQ2000_INSN_WXR30, "wxr30", "wxr30", 32,
|
||||
IQ2000_INSN_WXR30, "wxr30", "wxr30", 23,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* wxr30u $rt,$index,$count */
|
||||
/* wxr30u $rt,$count */
|
||||
{
|
||||
IQ2000_INSN_WXR30U, "wxr30u", "wxr30u", 32,
|
||||
IQ2000_INSN_WXR30U, "wxr30u", "wxr30u", 23,
|
||||
{ 0|A(YIELD_INSN)|A(USES_RT), { (1<<MACH_IQ2000) } }
|
||||
},
|
||||
/* ldw $rt,$lo16($base) */
|
||||
|
|
@ -2181,7 +2187,7 @@ iq2000_cgen_cpu_close (cd)
|
|||
CGEN_CPU_DESC cd;
|
||||
{
|
||||
unsigned int i;
|
||||
CGEN_INSN *insns;
|
||||
const CGEN_INSN *insns;
|
||||
|
||||
if (cd->macro_insn_table.init_entries)
|
||||
{
|
||||
|
|
@ -2189,7 +2195,7 @@ iq2000_cgen_cpu_close (cd)
|
|||
for (i = 0; i < cd->macro_insn_table.num_init_entries; ++i, ++insns)
|
||||
{
|
||||
if (CGEN_INSN_RX ((insns)))
|
||||
regfree(CGEN_INSN_RX (insns));
|
||||
regfree (CGEN_INSN_RX (insns));
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -2199,7 +2205,7 @@ iq2000_cgen_cpu_close (cd)
|
|||
for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
|
||||
{
|
||||
if (CGEN_INSN_RX (insns))
|
||||
regfree(CGEN_INSN_RX (insns));
|
||||
regfree (CGEN_INSN_RX (insns));
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
||||
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
|
||||
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
|
||||
|
||||
This file is part of the GNU Binutils and/or GDB, the GNU debugger.
|
||||
|
||||
|
|
@ -42,7 +42,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
|
|||
#define CGEN_INSN_LSB0_P 1
|
||||
|
||||
/* Minimum size of any insn (in bytes). */
|
||||
#define CGEN_MIN_INSN_SIZE 4
|
||||
#define CGEN_MIN_INSN_SIZE 3
|
||||
|
||||
/* Maximum size of any insn (in bytes). */
|
||||
#define CGEN_MAX_INSN_SIZE 4
|
||||
|
|
@ -255,7 +255,7 @@ typedef enum cgen_operand_type {
|
|||
, IQ2000_OPERAND_RD_RS, IQ2000_OPERAND_RD_RT, IQ2000_OPERAND_RT_RS, IQ2000_OPERAND_SHAMT
|
||||
, IQ2000_OPERAND_IMM, IQ2000_OPERAND_OFFSET, IQ2000_OPERAND_BASEOFF, IQ2000_OPERAND_JMPTARG
|
||||
, IQ2000_OPERAND_MASK, IQ2000_OPERAND_MASKQ10, IQ2000_OPERAND_MASKL, IQ2000_OPERAND_COUNT
|
||||
, IQ2000_OPERAND_INDEX, IQ2000_OPERAND_EXECODE, IQ2000_OPERAND_BYTECOUNT, IQ2000_OPERAND_CAM_Y
|
||||
, IQ2000_OPERAND_F_INDEX, IQ2000_OPERAND_EXECODE, IQ2000_OPERAND_BYTECOUNT, IQ2000_OPERAND_CAM_Y
|
||||
, IQ2000_OPERAND_CAM_Z, IQ2000_OPERAND_CM_3FUNC, IQ2000_OPERAND_CM_4FUNC, IQ2000_OPERAND_CM_3Z
|
||||
, IQ2000_OPERAND_CM_4Z, IQ2000_OPERAND_BASE, IQ2000_OPERAND_MASKR, IQ2000_OPERAND_BITNUM
|
||||
, IQ2000_OPERAND_HI16, IQ2000_OPERAND_LO16, IQ2000_OPERAND_MLO16, IQ2000_OPERAND_JMPTARGQ10
|
||||
|
|
|
|||
|
|
@ -4,7 +4,8 @@
|
|||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
- the resultant file is machine generated, cgen-dis.in isn't
|
||||
|
||||
Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
|
||||
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002
|
||||
Free Software Foundation, Inc.
|
||||
|
||||
This file is part of the GNU Binutils and GDB, the GNU debugger.
|
||||
|
||||
|
|
@ -31,6 +32,7 @@ along with this program; if not, write to the Free Software Foundation, Inc.,
|
|||
#include "dis-asm.h"
|
||||
#include "bfd.h"
|
||||
#include "symcat.h"
|
||||
#include "libiberty.h"
|
||||
#include "iq2000-desc.h"
|
||||
#include "iq2000-opc.h"
|
||||
#include "opintl.h"
|
||||
|
|
@ -127,15 +129,15 @@ iq2000_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)
|
|||
case IQ2000_OPERAND_EXECODE :
|
||||
print_normal (cd, info, fields->f_excode, 0, pc, length);
|
||||
break;
|
||||
case IQ2000_OPERAND_F_INDEX :
|
||||
print_normal (cd, info, fields->f_index, 0, pc, length);
|
||||
break;
|
||||
case IQ2000_OPERAND_HI16 :
|
||||
print_normal (cd, info, fields->f_imm, 0, pc, length);
|
||||
break;
|
||||
case IQ2000_OPERAND_IMM :
|
||||
print_normal (cd, info, fields->f_imm, 0, pc, length);
|
||||
break;
|
||||
case IQ2000_OPERAND_INDEX :
|
||||
print_normal (cd, info, fields->f_index, 0, pc, length);
|
||||
break;
|
||||
case IQ2000_OPERAND_JMPTARG :
|
||||
print_address (cd, info, fields->f_jtarg, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -35,9 +35,9 @@ along with this program; if not, write to the Free Software Foundation, Inc.,
|
|||
#include "opintl.h"
|
||||
#include "safe-ctype.h"
|
||||
|
||||
#undef min
|
||||
#undef min
|
||||
#define min(a,b) ((a) < (b) ? (a) : (b))
|
||||
#undef max
|
||||
#undef max
|
||||
#define max(a,b) ((a) > (b) ? (a) : (b))
|
||||
|
||||
/* Used by the ifield rtx function. */
|
||||
|
|
@ -605,15 +605,15 @@ iq2000_cgen_insert_operand (cd, opindex, fields, buffer, pc)
|
|||
case IQ2000_OPERAND_EXECODE :
|
||||
errmsg = insert_normal (cd, fields->f_excode, 0, 0, 25, 20, 32, total_length, buffer);
|
||||
break;
|
||||
case IQ2000_OPERAND_F_INDEX :
|
||||
errmsg = insert_normal (cd, fields->f_index, 0, 0, 8, 9, 32, total_length, buffer);
|
||||
break;
|
||||
case IQ2000_OPERAND_HI16 :
|
||||
errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
|
||||
break;
|
||||
case IQ2000_OPERAND_IMM :
|
||||
errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
|
||||
break;
|
||||
case IQ2000_OPERAND_INDEX :
|
||||
errmsg = insert_normal (cd, fields->f_index, 0, 0, 8, 9, 32, total_length, buffer);
|
||||
break;
|
||||
case IQ2000_OPERAND_JMPTARG :
|
||||
{
|
||||
long value = fields->f_jtarg;
|
||||
|
|
@ -788,15 +788,15 @@ iq2000_cgen_extract_operand (cd, opindex, ex_info, insn_value, fields, pc)
|
|||
case IQ2000_OPERAND_EXECODE :
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 20, 32, total_length, pc, & fields->f_excode);
|
||||
break;
|
||||
case IQ2000_OPERAND_F_INDEX :
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 9, 32, total_length, pc, & fields->f_index);
|
||||
break;
|
||||
case IQ2000_OPERAND_HI16 :
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
|
||||
break;
|
||||
case IQ2000_OPERAND_IMM :
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
|
||||
break;
|
||||
case IQ2000_OPERAND_INDEX :
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 9, 32, total_length, pc, & fields->f_index);
|
||||
break;
|
||||
case IQ2000_OPERAND_JMPTARG :
|
||||
{
|
||||
long value;
|
||||
|
|
@ -961,15 +961,15 @@ iq2000_cgen_get_int_operand (cd, opindex, fields)
|
|||
case IQ2000_OPERAND_EXECODE :
|
||||
value = fields->f_excode;
|
||||
break;
|
||||
case IQ2000_OPERAND_F_INDEX :
|
||||
value = fields->f_index;
|
||||
break;
|
||||
case IQ2000_OPERAND_HI16 :
|
||||
value = fields->f_imm;
|
||||
break;
|
||||
case IQ2000_OPERAND_IMM :
|
||||
value = fields->f_imm;
|
||||
break;
|
||||
case IQ2000_OPERAND_INDEX :
|
||||
value = fields->f_index;
|
||||
break;
|
||||
case IQ2000_OPERAND_JMPTARG :
|
||||
value = fields->f_jtarg;
|
||||
break;
|
||||
|
|
@ -1075,15 +1075,15 @@ iq2000_cgen_get_vma_operand (cd, opindex, fields)
|
|||
case IQ2000_OPERAND_EXECODE :
|
||||
value = fields->f_excode;
|
||||
break;
|
||||
case IQ2000_OPERAND_F_INDEX :
|
||||
value = fields->f_index;
|
||||
break;
|
||||
case IQ2000_OPERAND_HI16 :
|
||||
value = fields->f_imm;
|
||||
break;
|
||||
case IQ2000_OPERAND_IMM :
|
||||
value = fields->f_imm;
|
||||
break;
|
||||
case IQ2000_OPERAND_INDEX :
|
||||
value = fields->f_index;
|
||||
break;
|
||||
case IQ2000_OPERAND_JMPTARG :
|
||||
value = fields->f_jtarg;
|
||||
break;
|
||||
|
|
@ -1198,15 +1198,15 @@ iq2000_cgen_set_int_operand (cd, opindex, fields, value)
|
|||
case IQ2000_OPERAND_EXECODE :
|
||||
fields->f_excode = value;
|
||||
break;
|
||||
case IQ2000_OPERAND_F_INDEX :
|
||||
fields->f_index = value;
|
||||
break;
|
||||
case IQ2000_OPERAND_HI16 :
|
||||
fields->f_imm = value;
|
||||
break;
|
||||
case IQ2000_OPERAND_IMM :
|
||||
fields->f_imm = value;
|
||||
break;
|
||||
case IQ2000_OPERAND_INDEX :
|
||||
fields->f_index = value;
|
||||
break;
|
||||
case IQ2000_OPERAND_JMPTARG :
|
||||
fields->f_jtarg = value;
|
||||
break;
|
||||
|
|
@ -1309,15 +1309,15 @@ iq2000_cgen_set_vma_operand (cd, opindex, fields, value)
|
|||
case IQ2000_OPERAND_EXECODE :
|
||||
fields->f_excode = value;
|
||||
break;
|
||||
case IQ2000_OPERAND_F_INDEX :
|
||||
fields->f_index = value;
|
||||
break;
|
||||
case IQ2000_OPERAND_HI16 :
|
||||
fields->f_imm = value;
|
||||
break;
|
||||
case IQ2000_OPERAND_IMM :
|
||||
fields->f_imm = value;
|
||||
break;
|
||||
case IQ2000_OPERAND_INDEX :
|
||||
fields->f_index = value;
|
||||
break;
|
||||
case IQ2000_OPERAND_JMPTARG :
|
||||
fields->f_jtarg = value;
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
||||
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
|
||||
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
|
||||
|
||||
This file is part of the GNU Binutils and/or GDB, the GNU debugger.
|
||||
|
||||
|
|
@ -166,7 +166,7 @@ static const CGEN_IFMT ifmt_lulck = {
|
|||
};
|
||||
|
||||
static const CGEN_IFMT ifmt_pkrlr1 = {
|
||||
32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_RS) }, { F (F_RT) }, { F (F_COUNT) }, { F (F_INDEX) }, { 0 } }
|
||||
23, 23, 0xffe00000, { { F (F_OPCODE) }, { F (F_RS) }, { F (F_RT) }, { F (F_COUNT) }, { 0 } }
|
||||
};
|
||||
|
||||
static const CGEN_IFMT ifmt_rfe = {
|
||||
|
|
@ -1070,16 +1070,16 @@ static const CGEN_OPCODE iq2000_cgen_insn_opcode_table[MAX_INSNS] =
|
|||
{ { MNEM, ' ', OP (RD), ',', OP (RT), 0 } },
|
||||
& ifmt_chkhdr, { 0x4c200007 }
|
||||
},
|
||||
/* pkrlr1 $rt,$index,$count */
|
||||
/* pkrlr1 $rt,$count */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (INDEX), ',', OP (COUNT), 0 } },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } },
|
||||
& ifmt_pkrlr1, { 0x4fa00000 }
|
||||
},
|
||||
/* pkrlr30 $rt,$index,$count */
|
||||
/* pkrlr30 $rt,$count */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (INDEX), ',', OP (COUNT), 0 } },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } },
|
||||
& ifmt_pkrlr1, { 0x4fe00000 }
|
||||
},
|
||||
/* rb $rd,$rt */
|
||||
|
|
@ -1088,16 +1088,16 @@ static const CGEN_OPCODE iq2000_cgen_insn_opcode_table[MAX_INSNS] =
|
|||
{ { MNEM, ' ', OP (RD), ',', OP (RT), 0 } },
|
||||
& ifmt_chkhdr, { 0x4c200004 }
|
||||
},
|
||||
/* rbr1 $rt,$index,$count */
|
||||
/* rbr1 $rt,$count */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (INDEX), ',', OP (COUNT), 0 } },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } },
|
||||
& ifmt_pkrlr1, { 0x4f000000 }
|
||||
},
|
||||
/* rbr30 $rt,$index,$count */
|
||||
/* rbr30 $rt,$count */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (INDEX), ',', OP (COUNT), 0 } },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } },
|
||||
& ifmt_pkrlr1, { 0x4f400000 }
|
||||
},
|
||||
/* rfe */
|
||||
|
|
@ -1112,16 +1112,16 @@ static const CGEN_OPCODE iq2000_cgen_insn_opcode_table[MAX_INSNS] =
|
|||
{ { MNEM, ' ', OP (RD), ',', OP (RT), 0 } },
|
||||
& ifmt_chkhdr, { 0x4c200006 }
|
||||
},
|
||||
/* rxr1 $rt,$index,$count */
|
||||
/* rxr1 $rt,$count */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (INDEX), ',', OP (COUNT), 0 } },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } },
|
||||
& ifmt_pkrlr1, { 0x4f800000 }
|
||||
},
|
||||
/* rxr30 $rt,$index,$count */
|
||||
/* rxr30 $rt,$count */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (INDEX), ',', OP (COUNT), 0 } },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } },
|
||||
& ifmt_pkrlr1, { 0x4fc00000 }
|
||||
},
|
||||
/* sleep */
|
||||
|
|
@ -1190,28 +1190,28 @@ static const CGEN_OPCODE iq2000_cgen_insn_opcode_table[MAX_INSNS] =
|
|||
{ { MNEM, ' ', OP (RD), ',', OP (RT), 0 } },
|
||||
& ifmt_chkhdr, { 0x4c200001 }
|
||||
},
|
||||
/* wbr1 $rt,$index,$count */
|
||||
/* wbr1 $rt,$count */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (INDEX), ',', OP (COUNT), 0 } },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } },
|
||||
& ifmt_pkrlr1, { 0x4e000000 }
|
||||
},
|
||||
/* wbr1u $rt,$index,$count */
|
||||
/* wbr1u $rt,$count */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (INDEX), ',', OP (COUNT), 0 } },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } },
|
||||
& ifmt_pkrlr1, { 0x4e200000 }
|
||||
},
|
||||
/* wbr30 $rt,$index,$count */
|
||||
/* wbr30 $rt,$count */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (INDEX), ',', OP (COUNT), 0 } },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } },
|
||||
& ifmt_pkrlr1, { 0x4e400000 }
|
||||
},
|
||||
/* wbr30u $rt,$index,$count */
|
||||
/* wbr30u $rt,$count */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (INDEX), ',', OP (COUNT), 0 } },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } },
|
||||
& ifmt_pkrlr1, { 0x4e600000 }
|
||||
},
|
||||
/* wx $rd,$rt */
|
||||
|
|
@ -1226,28 +1226,28 @@ static const CGEN_OPCODE iq2000_cgen_insn_opcode_table[MAX_INSNS] =
|
|||
{ { MNEM, ' ', OP (RD), ',', OP (RT), 0 } },
|
||||
& ifmt_chkhdr, { 0x4c200003 }
|
||||
},
|
||||
/* wxr1 $rt,$index,$count */
|
||||
/* wxr1 $rt,$count */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (INDEX), ',', OP (COUNT), 0 } },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } },
|
||||
& ifmt_pkrlr1, { 0x4e800000 }
|
||||
},
|
||||
/* wxr1u $rt,$index,$count */
|
||||
/* wxr1u $rt,$count */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (INDEX), ',', OP (COUNT), 0 } },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } },
|
||||
& ifmt_pkrlr1, { 0x4ea00000 }
|
||||
},
|
||||
/* wxr30 $rt,$index,$count */
|
||||
/* wxr30 $rt,$count */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (INDEX), ',', OP (COUNT), 0 } },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } },
|
||||
& ifmt_pkrlr1, { 0x4ec00000 }
|
||||
},
|
||||
/* wxr30u $rt,$index,$count */
|
||||
/* wxr30u $rt,$count */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (INDEX), ',', OP (COUNT), 0 } },
|
||||
{ { MNEM, ' ', OP (RT), ',', OP (COUNT), 0 } },
|
||||
& ifmt_pkrlr1, { 0x4ee00000 }
|
||||
},
|
||||
/* ldw $rt,$lo16($base) */
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
|
||||
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
||||
|
||||
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
|
||||
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
|
||||
|
||||
This file is part of the GNU Binutils and/or GDB, the GNU debugger.
|
||||
|
||||
|
|
|
|||
|
|
@ -16,8 +16,8 @@ d10v-dis.c
|
|||
d10v-opc.c
|
||||
d30v-dis.c
|
||||
d30v-opc.c
|
||||
dis-buf.c
|
||||
disassemble.c
|
||||
dis-buf.c
|
||||
dlx-dis.c
|
||||
fr30-asm.c
|
||||
fr30-desc.c
|
||||
|
|
@ -48,12 +48,12 @@ ia64-dis.c
|
|||
ia64-gen.c
|
||||
ia64-opc-a.c
|
||||
ia64-opc-b.c
|
||||
ia64-opc.c
|
||||
ia64-opc-d.c
|
||||
ia64-opc-f.c
|
||||
ia64-opc.h
|
||||
ia64-opc-i.c
|
||||
ia64-opc-m.c
|
||||
ia64-opc.c
|
||||
ia64-opc.h
|
||||
ip2k-asm.c
|
||||
ip2k-desc.c
|
||||
ip2k-desc.h
|
||||
|
|
@ -87,9 +87,9 @@ m68k-opc.c
|
|||
m88k-dis.c
|
||||
mcore-dis.c
|
||||
mcore-opc.h
|
||||
mips16-opc.c
|
||||
mips-dis.c
|
||||
mips-opc.c
|
||||
mips16-opc.c
|
||||
mmix-dis.c
|
||||
mmix-opc.c
|
||||
ns32k-dis.c
|
||||
|
|
@ -111,11 +111,11 @@ ppc-opc.c
|
|||
s390-dis.c
|
||||
s390-mkopc.c
|
||||
s390-opc.c
|
||||
sh-dis.c
|
||||
sh-opc.h
|
||||
sh64-dis.c
|
||||
sh64-opc.c
|
||||
sh64-opc.h
|
||||
sh-dis.c
|
||||
sh-opc.h
|
||||
sparc-dis.c
|
||||
sparc-opc.c
|
||||
sysdep.h
|
||||
|
|
@ -137,6 +137,7 @@ xstormy16-dis.c
|
|||
xstormy16-ibld.c
|
||||
xstormy16-opc.c
|
||||
xstormy16-opc.h
|
||||
xtensa-dis.c
|
||||
z8k-dis.c
|
||||
z8k-opc.h
|
||||
z8kgen.c
|
||||
z8k-opc.h
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
msgid ""
|
||||
msgstr ""
|
||||
"Project-Id-Version: PACKAGE VERSION\n"
|
||||
"POT-Creation-Date: 2002-02-08 03:24-0200\n"
|
||||
"POT-Creation-Date: 2003-06-03 14:31+0100\n"
|
||||
"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
|
||||
"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
|
||||
"Language-Team: LANGUAGE <LL@li.org>\n"
|
||||
|
|
@ -26,47 +26,47 @@ msgstr ""
|
|||
msgid "Illegal limm reference in last instruction!\n"
|
||||
msgstr ""
|
||||
|
||||
#: arm-dis.c:502
|
||||
#: arm-dis.c:554
|
||||
msgid "<illegal precision>"
|
||||
msgstr ""
|
||||
|
||||
#: arm-dis.c:1012
|
||||
#: arm-dis.c:1162
|
||||
#, c-format
|
||||
msgid "Unrecognised register name set: %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: arm-dis.c:1019
|
||||
#: arm-dis.c:1169
|
||||
#, c-format
|
||||
msgid "Unrecognised disassembler option: %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: arm-dis.c:1191
|
||||
#: arm-dis.c:1343
|
||||
msgid ""
|
||||
"\n"
|
||||
"The following ARM specific disassembler options are supported for use with\n"
|
||||
"the -M switch:\n"
|
||||
msgstr ""
|
||||
|
||||
#: avr-dis.c:118 avr-dis.c:128
|
||||
#: avr-dis.c:117 avr-dis.c:127
|
||||
msgid "undefined"
|
||||
msgstr ""
|
||||
|
||||
#: avr-dis.c:180
|
||||
#: avr-dis.c:179
|
||||
msgid "Internal disassembler error"
|
||||
msgstr ""
|
||||
|
||||
#: avr-dis.c:228
|
||||
#: avr-dis.c:227
|
||||
#, c-format
|
||||
msgid "unknown constraint `%c'"
|
||||
msgstr ""
|
||||
|
||||
#: cgen-asm.c:346 fr30-ibld.c:195 m32r-ibld.c:195 openrisc-ibld.c:195
|
||||
#: xstormy16-ibld.c:195
|
||||
#: cgen-asm.c:348 fr30-ibld.c:195 frv-ibld.c:195 ip2k-ibld.c:195
|
||||
#: iq2000-ibld.c:195 m32r-ibld.c:195 openrisc-ibld.c:195 xstormy16-ibld.c:195
|
||||
#, c-format
|
||||
msgid "operand out of range (%ld not between %ld and %ld)"
|
||||
msgstr ""
|
||||
|
||||
#: cgen-asm.c:367
|
||||
#: cgen-asm.c:369
|
||||
#, c-format
|
||||
msgid "operand out of range (%lu not between %lu and %lu)"
|
||||
msgstr ""
|
||||
|
|
@ -87,110 +87,128 @@ msgstr ""
|
|||
msgid "Address 0x%x is out of bounds.\n"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-asm.c:323 m32r-asm.c:325 openrisc-asm.c:244 xstormy16-asm.c:231
|
||||
#: fr30-asm.c:323 frv-asm.c:595 ip2k-asm.c:574 iq2000-asm.c:460 m32r-asm.c:325
|
||||
#: openrisc-asm.c:244 xstormy16-asm.c:284
|
||||
#, c-format
|
||||
msgid "Unrecognized field %d while parsing.\n"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-asm.c:373 m32r-asm.c:375 openrisc-asm.c:294 xstormy16-asm.c:281
|
||||
#: fr30-asm.c:373 frv-asm.c:645 ip2k-asm.c:624 iq2000-asm.c:513 m32r-asm.c:375
|
||||
#: openrisc-asm.c:294 xstormy16-asm.c:334
|
||||
msgid "missing mnemonic in syntax string"
|
||||
msgstr ""
|
||||
|
||||
#. We couldn't parse it.
|
||||
#: fr30-asm.c:509 fr30-asm.c:513 fr30-asm.c:600 fr30-asm.c:702 m32r-asm.c:511
|
||||
#: m32r-asm.c:515 m32r-asm.c:602 m32r-asm.c:704 openrisc-asm.c:430
|
||||
#: openrisc-asm.c:434 openrisc-asm.c:521 openrisc-asm.c:623
|
||||
#: xstormy16-asm.c:417 xstormy16-asm.c:421 xstormy16-asm.c:508
|
||||
#: xstormy16-asm.c:610
|
||||
#: fr30-asm.c:509 fr30-asm.c:513 fr30-asm.c:600 fr30-asm.c:702 frv-asm.c:781
|
||||
#: frv-asm.c:785 frv-asm.c:872 frv-asm.c:974 ip2k-asm.c:760 ip2k-asm.c:764
|
||||
#: ip2k-asm.c:851 ip2k-asm.c:953 iq2000-asm.c:649 iq2000-asm.c:653
|
||||
#: iq2000-asm.c:740 iq2000-asm.c:842 m32r-asm.c:511 m32r-asm.c:515
|
||||
#: m32r-asm.c:602 m32r-asm.c:704 openrisc-asm.c:430 openrisc-asm.c:434
|
||||
#: openrisc-asm.c:521 openrisc-asm.c:623 xstormy16-asm.c:470
|
||||
#: xstormy16-asm.c:474 xstormy16-asm.c:561 xstormy16-asm.c:663
|
||||
msgid "unrecognized instruction"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-asm.c:556 m32r-asm.c:558 openrisc-asm.c:477 xstormy16-asm.c:464
|
||||
#: fr30-asm.c:556 frv-asm.c:828 ip2k-asm.c:807 iq2000-asm.c:696 m32r-asm.c:558
|
||||
#: openrisc-asm.c:477 xstormy16-asm.c:517
|
||||
#, c-format
|
||||
msgid "syntax error (expected char `%c', found `%c')"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-asm.c:566 m32r-asm.c:568 openrisc-asm.c:487 xstormy16-asm.c:474
|
||||
#: fr30-asm.c:566 frv-asm.c:838 ip2k-asm.c:817 iq2000-asm.c:706 m32r-asm.c:568
|
||||
#: openrisc-asm.c:487 xstormy16-asm.c:527
|
||||
#, c-format
|
||||
msgid "syntax error (expected char `%c', found end of instruction)"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-asm.c:594 m32r-asm.c:596 openrisc-asm.c:515 xstormy16-asm.c:502
|
||||
#: fr30-asm.c:594 frv-asm.c:866 ip2k-asm.c:845 iq2000-asm.c:734 m32r-asm.c:596
|
||||
#: openrisc-asm.c:515 xstormy16-asm.c:555
|
||||
msgid "junk at end of line"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-asm.c:701 m32r-asm.c:703 openrisc-asm.c:622 xstormy16-asm.c:609
|
||||
#: fr30-asm.c:701 frv-asm.c:973 ip2k-asm.c:952 iq2000-asm.c:841 m32r-asm.c:703
|
||||
#: openrisc-asm.c:622 xstormy16-asm.c:662
|
||||
msgid "unrecognized form of instruction"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-asm.c:713 m32r-asm.c:715 openrisc-asm.c:634 xstormy16-asm.c:621
|
||||
#: fr30-asm.c:713 frv-asm.c:985 ip2k-asm.c:964 iq2000-asm.c:853 m32r-asm.c:715
|
||||
#: openrisc-asm.c:634 xstormy16-asm.c:674
|
||||
#, c-format
|
||||
msgid "bad instruction `%.50s...'"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-asm.c:716 m32r-asm.c:718 openrisc-asm.c:637 xstormy16-asm.c:624
|
||||
#: fr30-asm.c:716 frv-asm.c:988 ip2k-asm.c:967 iq2000-asm.c:856 m32r-asm.c:718
|
||||
#: openrisc-asm.c:637 xstormy16-asm.c:677
|
||||
#, c-format
|
||||
msgid "bad instruction `%.50s'"
|
||||
msgstr ""
|
||||
|
||||
#. Default text to print if an instruction isn't recognized.
|
||||
#: fr30-dis.c:39 m32r-dis.c:39 mmix-dis.c:282 openrisc-dis.c:39
|
||||
#: xstormy16-dis.c:39
|
||||
#: fr30-dis.c:41 frv-dis.c:41 ip2k-dis.c:41 iq2000-dis.c:39 m32r-dis.c:41
|
||||
#: mmix-dis.c:284 openrisc-dis.c:41 xstormy16-dis.c:41
|
||||
msgid "*unknown*"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-dis.c:318 m32r-dis.c:249 openrisc-dis.c:136 xstormy16-dis.c:169
|
||||
#: fr30-dis.c:320 frv-dis.c:362 ip2k-dis.c:329 iq2000-dis.c:190 m32r-dis.c:251
|
||||
#: openrisc-dis.c:138 xstormy16-dis.c:171
|
||||
#, c-format
|
||||
msgid "Unrecognized field %d while printing insn.\n"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-ibld.c:166 m32r-ibld.c:166 openrisc-ibld.c:166 xstormy16-ibld.c:166
|
||||
#: fr30-ibld.c:166 frv-ibld.c:166 ip2k-ibld.c:166 iq2000-ibld.c:166
|
||||
#: m32r-ibld.c:166 openrisc-ibld.c:166 xstormy16-ibld.c:166
|
||||
#, c-format
|
||||
msgid "operand out of range (%ld not between %ld and %lu)"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-ibld.c:179 m32r-ibld.c:179 openrisc-ibld.c:179 xstormy16-ibld.c:179
|
||||
#: fr30-ibld.c:179 frv-ibld.c:179 ip2k-ibld.c:179 iq2000-ibld.c:179
|
||||
#: m32r-ibld.c:179 openrisc-ibld.c:179 xstormy16-ibld.c:179
|
||||
#, c-format
|
||||
msgid "operand out of range (%lu not between 0 and %lu)"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-ibld.c:730 m32r-ibld.c:659 openrisc-ibld.c:633 xstormy16-ibld.c:678
|
||||
#: fr30-ibld.c:730 frv-ibld.c:820 ip2k-ibld.c:607 iq2000-ibld.c:713
|
||||
#: m32r-ibld.c:659 openrisc-ibld.c:633 xstormy16-ibld.c:678
|
||||
#, c-format
|
||||
msgid "Unrecognized field %d while building insn.\n"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-ibld.c:937 m32r-ibld.c:792 openrisc-ibld.c:735 xstormy16-ibld.c:826
|
||||
#: fr30-ibld.c:937 frv-ibld.c:1103 ip2k-ibld.c:684 iq2000-ibld.c:890
|
||||
#: m32r-ibld.c:792 openrisc-ibld.c:735 xstormy16-ibld.c:826
|
||||
#, c-format
|
||||
msgid "Unrecognized field %d while decoding insn.\n"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-ibld.c:1086 m32r-ibld.c:902 openrisc-ibld.c:815 xstormy16-ibld.c:939
|
||||
#: fr30-ibld.c:1086 frv-ibld.c:1348 ip2k-ibld.c:761 iq2000-ibld.c:1024
|
||||
#: m32r-ibld.c:902 openrisc-ibld.c:815 xstormy16-ibld.c:939
|
||||
#, c-format
|
||||
msgid "Unrecognized field %d while getting int operand.\n"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-ibld.c:1215 m32r-ibld.c:992 openrisc-ibld.c:875 xstormy16-ibld.c:1032
|
||||
#: fr30-ibld.c:1215 frv-ibld.c:1573 ip2k-ibld.c:818 iq2000-ibld.c:1138
|
||||
#: m32r-ibld.c:992 openrisc-ibld.c:875 xstormy16-ibld.c:1032
|
||||
#, c-format
|
||||
msgid "Unrecognized field %d while getting vma operand.\n"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-ibld.c:1349 m32r-ibld.c:1090 openrisc-ibld.c:944 xstormy16-ibld.c:1134
|
||||
#: fr30-ibld.c:1349 frv-ibld.c:1807 ip2k-ibld.c:880 iq2000-ibld.c:1261
|
||||
#: m32r-ibld.c:1090 openrisc-ibld.c:944 xstormy16-ibld.c:1134
|
||||
#, c-format
|
||||
msgid "Unrecognized field %d while setting int operand.\n"
|
||||
msgstr ""
|
||||
|
||||
#: fr30-ibld.c:1471 m32r-ibld.c:1176 openrisc-ibld.c:1001
|
||||
#: xstormy16-ibld.c:1224
|
||||
#: fr30-ibld.c:1471 frv-ibld.c:2029 ip2k-ibld.c:930 iq2000-ibld.c:1372
|
||||
#: m32r-ibld.c:1176 openrisc-ibld.c:1001 xstormy16-ibld.c:1224
|
||||
#, c-format
|
||||
msgid "Unrecognized field %d while setting vma operand.\n"
|
||||
msgstr ""
|
||||
|
||||
#: h8300-dis.c:384
|
||||
#: h8300-dis.c:407
|
||||
#, c-format
|
||||
msgid "Hmmmm %x"
|
||||
msgstr ""
|
||||
|
||||
#: h8300-dis.c:395
|
||||
#: h8300-dis.c:418
|
||||
#, c-format
|
||||
msgid "Don't understand %x \n"
|
||||
msgstr ""
|
||||
|
|
@ -206,10 +224,185 @@ msgstr ""
|
|||
msgid "%02x\t\t*unknown*"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:1649
|
||||
#: i386-dis.c:1650
|
||||
msgid "<internal disassembler error>"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:295
|
||||
#, c-format
|
||||
msgid "%s: Error: "
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:308
|
||||
#, c-format
|
||||
msgid "%s: Warning: "
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:494 ia64-gen.c:728
|
||||
#, c-format
|
||||
msgid "multiple note %s not handled\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:605
|
||||
msgid "can't find ia64-ic.tbl for reading\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:810
|
||||
#, c-format
|
||||
msgid "can't find %s for reading\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1034
|
||||
#, c-format
|
||||
msgid ""
|
||||
"most recent format '%s'\n"
|
||||
"appears more restrictive than '%s'\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1045
|
||||
#, c-format
|
||||
msgid "overlapping field %s->%s\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1236
|
||||
#, c-format
|
||||
msgid "overwriting note %d with note %d (IC:%s)\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1435
|
||||
#, c-format
|
||||
msgid "don't know how to specify %% dependency %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1457
|
||||
#, c-format
|
||||
msgid "Don't know how to specify # dependency %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1496
|
||||
#, c-format
|
||||
msgid "IC:%s [%s] has no terminals or sub-classes\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1499
|
||||
#, c-format
|
||||
msgid "IC:%s has no terminals or sub-classes\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1508
|
||||
#, c-format
|
||||
msgid "no insns mapped directly to terminal IC %s [%s]"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1511
|
||||
#, c-format
|
||||
msgid "no insns mapped directly to terminal IC %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1522
|
||||
#, c-format
|
||||
msgid "class %s is defined but not used\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1533
|
||||
#, c-format
|
||||
msgid "Warning: rsrc %s (%s) has no chks%s\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1537
|
||||
#, c-format
|
||||
msgid "rsrc %s (%s) has no regs\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:2436
|
||||
#, c-format
|
||||
msgid "IC note %d in opcode %s (IC:%s) conflicts with resource %s note %d\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:2464
|
||||
#, c-format
|
||||
msgid "IC note %d for opcode %s (IC:%s) conflicts with resource %s note %d\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:2478
|
||||
#, c-format
|
||||
msgid "opcode %s has no class (ops %d %d %d)\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:2789
|
||||
#, c-format
|
||||
msgid "unable to change directory to \"%s\", errno = %s\n"
|
||||
msgstr ""
|
||||
|
||||
#. We've been passed a w. Return with an error message so that
|
||||
#. cgen will try the next parsing option.
|
||||
#: ip2k-asm.c:92
|
||||
msgid "W keyword invalid in FR operand slot."
|
||||
msgstr ""
|
||||
|
||||
#. Invalid offset present.
|
||||
#: ip2k-asm.c:122
|
||||
msgid "offset(IP) is not a valid form"
|
||||
msgstr ""
|
||||
|
||||
#. Found something there in front of (DP) but it's out
|
||||
#. of range.
|
||||
#: ip2k-asm.c:175
|
||||
msgid "(DP) offset out of range."
|
||||
msgstr ""
|
||||
|
||||
#. Found something there in front of (SP) but it's out
|
||||
#. of range.
|
||||
#: ip2k-asm.c:221
|
||||
msgid "(SP) offset out of range."
|
||||
msgstr ""
|
||||
|
||||
#: ip2k-asm.c:241
|
||||
msgid "illegal use of parentheses"
|
||||
msgstr ""
|
||||
|
||||
#: ip2k-asm.c:248
|
||||
msgid "operand out of range (not between 1 and 255)"
|
||||
msgstr ""
|
||||
|
||||
#. Something is very wrong. opindex has to be one of the above.
|
||||
#: ip2k-asm.c:273
|
||||
msgid "parse_addr16: invalid opindex."
|
||||
msgstr ""
|
||||
|
||||
#: ip2k-asm.c:353
|
||||
msgid "Byte address required. - must be even."
|
||||
msgstr ""
|
||||
|
||||
#: ip2k-asm.c:362
|
||||
msgid "cgen_parse_address returned a symbol. Literal required."
|
||||
msgstr ""
|
||||
|
||||
#: ip2k-asm.c:420
|
||||
#, c-format
|
||||
msgid "%operator operand is not a symbol"
|
||||
msgstr ""
|
||||
|
||||
#: ip2k-asm.c:474
|
||||
msgid "Attempt to find bit index of 0"
|
||||
msgstr ""
|
||||
|
||||
#: iq2000-asm.c:110 iq2000-asm.c:141
|
||||
msgid "immediate value cannot be register"
|
||||
msgstr ""
|
||||
|
||||
#: iq2000-asm.c:120 iq2000-asm.c:151
|
||||
msgid "immediate value out of range"
|
||||
msgstr ""
|
||||
|
||||
#: iq2000-asm.c:180
|
||||
msgid "21-bit offset out of range"
|
||||
msgstr ""
|
||||
|
||||
#: iq2000-asm.c:205 iq2000-asm.c:235 iq2000-asm.c:272 iq2000-asm.c:305
|
||||
msgid "missing `)'"
|
||||
msgstr ""
|
||||
|
||||
#: m10200-dis.c:199
|
||||
#, c-format
|
||||
msgid "unknown\t0x%02x"
|
||||
|
|
@ -235,21 +428,99 @@ msgstr ""
|
|||
msgid "<function code %d>"
|
||||
msgstr ""
|
||||
|
||||
#: m88k-dis.c:255
|
||||
#: m88k-dis.c:746
|
||||
#, c-format
|
||||
msgid "# <dis error: %08x>"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:290
|
||||
#: mips-dis.c:699
|
||||
msgid "# internal error, incomplete extension sequence (+)"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:742
|
||||
#, c-format
|
||||
msgid "# internal error, undefined extension sequence (+%c)"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:1000
|
||||
#, c-format
|
||||
msgid "# internal error, undefined modifier(%c)"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:1154
|
||||
#: mips-dis.c:1751
|
||||
#, c-format
|
||||
msgid "# internal disassembler error, unrecognised modifier (%c)"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:1763
|
||||
msgid ""
|
||||
"\n"
|
||||
"The following MIPS specific disassembler options are supported for use\n"
|
||||
"with the -M switch (multiple options should be separated by commas):\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:1767
|
||||
msgid ""
|
||||
"\n"
|
||||
" gpr-names=ABI Print GPR names according to specified ABI.\n"
|
||||
" Default: based on binary being disassembled.\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:1771
|
||||
msgid ""
|
||||
"\n"
|
||||
" fpr-names=ABI Print FPR names according to specified ABI.\n"
|
||||
" Default: numeric.\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:1775
|
||||
msgid ""
|
||||
"\n"
|
||||
" cp0-names=ARCH Print CP0 register names according to\n"
|
||||
" specified architecture.\n"
|
||||
" Default: based on binary being disassembled.\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:1780
|
||||
msgid ""
|
||||
"\n"
|
||||
" hwr-names=ARCH Print HWR names according to specified \n"
|
||||
"\t\t\t architecture.\n"
|
||||
" Default: based on binary being disassembled.\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:1785
|
||||
msgid ""
|
||||
"\n"
|
||||
" reg-names=ABI Print GPR and FPR names according to\n"
|
||||
" specified ABI.\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:1789
|
||||
msgid ""
|
||||
"\n"
|
||||
" reg-names=ARCH Print CP0 register and HWR names according to\n"
|
||||
" specified architecture.\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:1793
|
||||
msgid ""
|
||||
"\n"
|
||||
" For the options above, the following values are supported for \"ABI\":\n"
|
||||
" "
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:1798 mips-dis.c:1806 mips-dis.c:1808
|
||||
msgid "\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:1800
|
||||
msgid ""
|
||||
"\n"
|
||||
" For the options above, The following values are supported for \"ARCH\":\n"
|
||||
" "
|
||||
msgstr ""
|
||||
|
||||
#: mmix-dis.c:34
|
||||
#, c-format
|
||||
msgid "Bad case %d (%s) in %s:%d\n"
|
||||
|
|
@ -264,7 +535,7 @@ msgstr ""
|
|||
msgid "(unknown)"
|
||||
msgstr ""
|
||||
|
||||
#: mmix-dis.c:517
|
||||
#: mmix-dis.c:519
|
||||
#, c-format
|
||||
msgid "*unknown operands type: %d*"
|
||||
msgstr ""
|
||||
|
|
@ -275,76 +546,96 @@ msgstr ""
|
|||
#. * aoffsetp by since whatever generated this is broken
|
||||
#. * anyway!
|
||||
#.
|
||||
#: ns32k-dis.c:628
|
||||
#: ns32k-dis.c:631
|
||||
msgid "$<undefined>"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:765 ppc-opc.c:798
|
||||
#: ppc-opc.c:818 ppc-opc.c:851
|
||||
msgid "invalid conditional option"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:800
|
||||
#: ppc-opc.c:853
|
||||
msgid "attempt to set y bit when using + or - modifier"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:832 ppc-opc.c:884
|
||||
#: ppc-opc.c:881
|
||||
msgid "offset not a multiple of 2"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:883
|
||||
msgid "offset greater than 62"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:904 ppc-opc.c:954 ppc-opc.c:1006
|
||||
msgid "offset not a multiple of 4"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:857
|
||||
#: ppc-opc.c:906
|
||||
msgid "offset greater than 124"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:927
|
||||
msgid "offset not a multiple of 8"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:929
|
||||
msgid "offset greater than 248"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:979
|
||||
msgid "offset not between -2048 and 2047"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:882
|
||||
#: ppc-opc.c:1004
|
||||
msgid "offset not between -8192 and 8191"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:910
|
||||
#: ppc-opc.c:1032
|
||||
msgid "ignoring least significant bits in branch offset"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:944 ppc-opc.c:981
|
||||
#: ppc-opc.c:1066 ppc-opc.c:1103
|
||||
msgid "illegal bitmask"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:1054
|
||||
#: ppc-opc.c:1176
|
||||
msgid "value out of range"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:1130
|
||||
#: ppc-opc.c:1252
|
||||
msgid "index register in load range"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:1146
|
||||
#: ppc-opc.c:1268
|
||||
msgid "invalid register operand when updating"
|
||||
msgstr ""
|
||||
|
||||
#. Mark as non-valid instruction
|
||||
#: sparc-dis.c:750
|
||||
#. Mark as non-valid instruction.
|
||||
#: sparc-dis.c:760
|
||||
msgid "unknown"
|
||||
msgstr ""
|
||||
|
||||
#: sparc-dis.c:825
|
||||
#: sparc-dis.c:835
|
||||
#, c-format
|
||||
msgid "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"
|
||||
msgstr ""
|
||||
|
||||
#: sparc-dis.c:836
|
||||
#: sparc-dis.c:846
|
||||
#, c-format
|
||||
msgid "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"
|
||||
msgstr ""
|
||||
|
||||
#: sparc-dis.c:885
|
||||
#: sparc-dis.c:895
|
||||
#, c-format
|
||||
msgid "Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n"
|
||||
msgstr ""
|
||||
|
||||
#: v850-dis.c:224
|
||||
#: v850-dis.c:221
|
||||
#, c-format
|
||||
msgid "unknown operand shift: %x\n"
|
||||
msgstr ""
|
||||
|
||||
#: v850-dis.c:236
|
||||
#: v850-dis.c:233
|
||||
#, c-format
|
||||
msgid "unknown pop reg: %d\n"
|
||||
msgstr ""
|
||||
|
|
@ -398,30 +689,42 @@ msgstr ""
|
|||
msgid "immediate value must be even"
|
||||
msgstr ""
|
||||
|
||||
#: xstormy16-asm.c:74
|
||||
#: xstormy16-asm.c:76
|
||||
msgid "Bad register in preincrement"
|
||||
msgstr ""
|
||||
|
||||
#: xstormy16-asm.c:79
|
||||
#: xstormy16-asm.c:81
|
||||
msgid "Bad register in postincrement"
|
||||
msgstr ""
|
||||
|
||||
#: xstormy16-asm.c:81
|
||||
#: xstormy16-asm.c:83
|
||||
msgid "Bad register name"
|
||||
msgstr ""
|
||||
|
||||
#: xstormy16-asm.c:85
|
||||
#: xstormy16-asm.c:87
|
||||
msgid "Label conflicts with register name"
|
||||
msgstr ""
|
||||
|
||||
#: xstormy16-asm.c:89
|
||||
#: xstormy16-asm.c:91
|
||||
msgid "Label conflicts with `Rx'"
|
||||
msgstr ""
|
||||
|
||||
#: xstormy16-asm.c:91
|
||||
#: xstormy16-asm.c:93
|
||||
msgid "Bad immediate expression"
|
||||
msgstr ""
|
||||
|
||||
#: xstormy16-asm.c:120
|
||||
#: xstormy16-asm.c:115
|
||||
msgid "No relocation for small immediate"
|
||||
msgstr ""
|
||||
|
||||
#: xstormy16-asm.c:125
|
||||
msgid "Small operand was not an immediate number"
|
||||
msgstr ""
|
||||
|
||||
#: xstormy16-asm.c:164
|
||||
msgid "Operand is not a symbol"
|
||||
msgstr ""
|
||||
|
||||
#: xstormy16-asm.c:172
|
||||
msgid "Syntax error: No trailing ')'"
|
||||
msgstr ""
|
||||
|
|
|
|||
Loading…
Reference in a new issue