2004-02-20 Andrew Cagney <cagney@redhat.com>
* m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
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Andrew Cagney
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2004-02-20 Andrew Cagney <cagney@redhat.com>
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* m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
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Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
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* sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
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written by Ben Elliston.
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2127
cpu/m32r.cpu
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2127
cpu/m32r.cpu
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File diff suppressed because it is too large
Load diff
302
cpu/m32r.opc
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302
cpu/m32r.opc
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/* M32R opcode support. -*- C -*-
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Copyright 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
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Contributed by Red Hat Inc; developed under contract from
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Mitsubishi Electric Corporation.
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This file is part of the GNU Binutils.
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Contributed by Red Hat Inc; developed under contract from Fujitsu.
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This file is part of the GNU Binutils.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* This file is an addendum to m32r.cpu. Heavy use of C code isn't
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appropriate in .cpu files, so it resides here. This especially applies
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to assembly/disassembly where parsing/printing can be quite involved.
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Such things aren't really part of the specification of the cpu, per se,
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so .cpu files provide the general framework and .opc files handle the
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nitty-gritty details as necessary.
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Each section is delimited with start and end markers.
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<arch>-opc.h additions use: "-- opc.h"
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<arch>-opc.c additions use: "-- opc.c"
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<arch>-asm.c additions use: "-- asm.c"
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<arch>-dis.c additions use: "-- dis.c"
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<arch>-ibd.h additions use: "-- ibd.h"
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*/
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/* -- opc.h */
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#undef CGEN_DIS_HASH_SIZE
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#define CGEN_DIS_HASH_SIZE 256
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#undef CGEN_DIS_HASH
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#define X(b) (((unsigned char *) (b))[0] & 0xf0)
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#define CGEN_DIS_HASH(buffer, value) \
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(X (buffer) | \
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(X (buffer) == 0x40 || X (buffer) == 0xe0 || X (buffer) == 0x60 || X (buffer) == 0x50 ? 0 \
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: X (buffer) == 0x70 || X (buffer) == 0xf0 ? (((unsigned char *) (buffer))[0] & 0xf) \
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: X (buffer) == 0x30 ? ((((unsigned char *) (buffer))[1] & 0x70) >> 4) \
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: ((((unsigned char *) (buffer))[1] & 0xf0) >> 4)))
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/* -- */
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/* -- asm.c */
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static const char * parse_hash
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PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
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static const char * parse_hi16
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PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
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static const char * parse_slo16
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PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
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static const char * parse_ulo16
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PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
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/* Handle '#' prefixes (i.e. skip over them). */
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static const char *
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parse_hash (cd, strp, opindex, valuep)
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CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
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const char **strp;
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int opindex ATTRIBUTE_UNUSED;
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unsigned long *valuep ATTRIBUTE_UNUSED;
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{
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if (**strp == '#')
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++*strp;
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return NULL;
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}
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/* Handle shigh(), high(). */
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static const char *
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parse_hi16 (cd, strp, opindex, valuep)
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CGEN_CPU_DESC cd;
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const char **strp;
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int opindex;
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unsigned long *valuep;
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{
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const char *errmsg;
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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if (**strp == '#')
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++*strp;
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if (strncasecmp (*strp, "high(", 5) == 0)
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{
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*strp += 5;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
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&result_type, &value);
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if (**strp != ')')
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return "missing `)'";
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++*strp;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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value >>= 16;
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*valuep = value;
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return errmsg;
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}
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else if (strncasecmp (*strp, "shigh(", 6) == 0)
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{
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*strp += 6;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
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&result_type, &value);
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if (**strp != ')')
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return "missing `)'";
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++*strp;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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value = (value >> 16) + (value & 0x8000 ? 1 : 0);
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*valuep = value;
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return errmsg;
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}
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return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
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}
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/* Handle low() in a signed context. Also handle sda().
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The signedness of the value doesn't matter to low(), but this also
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handles the case where low() isn't present. */
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static const char *
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parse_slo16 (cd, strp, opindex, valuep)
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CGEN_CPU_DESC cd;
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const char **strp;
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int opindex;
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long *valuep;
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{
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const char *errmsg;
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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if (**strp == '#')
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++*strp;
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if (strncasecmp (*strp, "low(", 4) == 0)
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{
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*strp += 4;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
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&result_type, &value);
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if (**strp != ')')
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return "missing `)'";
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++*strp;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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value &= 0xffff;
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*valuep = value;
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return errmsg;
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}
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if (strncasecmp (*strp, "sda(", 4) == 0)
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{
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*strp += 4;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16,
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NULL, &value);
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if (**strp != ')')
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return "missing `)'";
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++*strp;
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*valuep = value;
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return errmsg;
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}
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return cgen_parse_signed_integer (cd, strp, opindex, valuep);
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}
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/* Handle low() in an unsigned context.
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The signedness of the value doesn't matter to low(), but this also
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handles the case where low() isn't present. */
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static const char *
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parse_ulo16 (cd, strp, opindex, valuep)
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CGEN_CPU_DESC cd;
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const char **strp;
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int opindex;
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unsigned long *valuep;
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{
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const char *errmsg;
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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if (**strp == '#')
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++*strp;
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if (strncasecmp (*strp, "low(", 4) == 0)
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{
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*strp += 4;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
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&result_type, &value);
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if (**strp != ')')
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return "missing `)'";
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++*strp;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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value &= 0xffff;
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*valuep = value;
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return errmsg;
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}
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return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
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}
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/* -- */
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/* -- dis.c */
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static void print_hash PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));
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static int my_print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));
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/* Immediate values are prefixed with '#'. */
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#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \
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do \
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{ \
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if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \
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(*info->fprintf_func) (info->stream, "#"); \
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} \
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while (0)
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/* Handle '#' prefixes as operands. */
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static void
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print_hash (cd, dis_info, value, attrs, pc, length)
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CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
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PTR dis_info;
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long value ATTRIBUTE_UNUSED;
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unsigned int attrs ATTRIBUTE_UNUSED;
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bfd_vma pc ATTRIBUTE_UNUSED;
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int length ATTRIBUTE_UNUSED;
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{
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disassemble_info *info = (disassemble_info *) dis_info;
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(*info->fprintf_func) (info->stream, "#");
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}
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#undef CGEN_PRINT_INSN
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#define CGEN_PRINT_INSN my_print_insn
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static int
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my_print_insn (cd, pc, info)
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CGEN_CPU_DESC cd;
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bfd_vma pc;
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disassemble_info *info;
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{
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char buffer[CGEN_MAX_INSN_SIZE];
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char *buf = buffer;
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int status;
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int buflen = (pc & 3) == 0 ? 4 : 2;
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/* Read the base part of the insn. */
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status = (*info->read_memory_func) (pc, buf, buflen, info);
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if (status != 0)
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{
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(*info->memory_error_func) (status, pc, info);
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return -1;
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}
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/* 32 bit insn? */
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if ((pc & 3) == 0 && (buf[0] & 0x80) != 0)
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return print_insn (cd, pc, info, buf, buflen);
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/* Print the first insn. */
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if ((pc & 3) == 0)
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{
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if (print_insn (cd, pc, info, buf, 2) == 0)
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(*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
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buf += 2;
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}
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if (buf[0] & 0x80)
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{
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/* Parallel. */
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(*info->fprintf_func) (info->stream, " || ");
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buf[0] &= 0x7f;
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}
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else
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(*info->fprintf_func) (info->stream, " -> ");
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/* The "& 3" is to pass a consistent address.
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Parallel insns arguably both begin on the word boundary.
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Also, branch insns are calculated relative to the word boundary. */
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if (print_insn (cd, pc & ~ (bfd_vma) 3, info, buf, 2) == 0)
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(*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
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return (pc & 3) ? 2 : 4;
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}
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/* -- */
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