forked from mirrors/qmk_firmware
237 lines
13 KiB
Markdown
237 lines
13 KiB
Markdown
# Audio Driver :id=audio-driver
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The [Audio feature](feature_audio.md) breaks the hardware specifics out into separate, exchangeable driver units, with a common interface to the audio-"core" - which itself handles playing songs and notes while tracking their progress in an internal state, initializing/starting/stopping the driver as needed.
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Not all MCUs support every available driver, either the platform-support is not there (yet?) or the MCU simply does not have the required hardware peripheral.
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## AVR :id=avr
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Boards built around an Atmega32U4 can use two sets of PWM capable pins, each driving a separate speaker.
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The possible configurations are:
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| | Timer3 | Timer1 |
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|--------------|-------------|--------------|
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| one speaker | C4,C5 or C6 | |
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| one speaker | | B4, B5 or B7 |
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| two speakers | C4,C5 or C6 | B4, B5 or B7 |
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Currently there is only one/default driver for AVR based boards, which is automatically configured to:
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```make
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AUDIO_DRIVER = pwm_hardware
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```
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## ARM :id=arm
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For Arm based boards, QMK depends on ChibiOS - hence any MCU supported by the later is likely usable, as long as certain hardware peripherals are available.
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Supported wiring configurations, with their ChibiOS/MCU peripheral requirement are listed below;
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piezo speakers are marked with :one: for the first/primary and :two: for the secondary.
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| driver | GPTD6<br>Tim6 | GPTD7<br>Tim7 | GPTD8<br>Tim8 | PWMD1<sup>1</sup><br>Tim1_Ch1 |
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|--------------|------------------------------------------|------------------------|---------------|-------------------------------|
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| dac_basic | A4+DACD1 = :one: | A5+DACD2 = :one: | state | |
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| | A4+DACD1 = :one: + Gnd | A5+DACD2 = :two: + Gnd | state | |
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| | A4+DACD1 = :two: + Gnd | A5+DACD2 = :one: + Gnd | state | |
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| | A4+DACD1 = :one: + Gnd | | state | |
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| | | A5+DACD2 = :one: + Gnd | state | |
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| dac_additive | A4+DACD1 = :one: + Gnd | | | |
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| | A5+DACD2 = :one: + Gnd | | | |
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| | A4+DACD1 + A5+DACD2 = :one: <sup>2</sup> | | | |
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| pwm_software | state-update | | | any = :one: |
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| pwm hardware | state-update | | | A8 = :one: <sup>3</sup> |
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<sup>1</sup>: the routing and alternate functions for PWM differ sometimes between STM32 MCUs, if in doubt consult the data-sheet
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<sup>2</sup>: one piezo connected to A4 and A5, with AUDIO_PIN_ALT_AS_NEGATIVE set
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<sup>3</sup>: TIM1_CH1 = A8 on STM32F103C8, other combinations are possible, see Data-sheet. configured with: AUDIO_PWM_DRIVER and AUDIO_PWM_CHANNEL
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### DAC basic :id=dac-basic
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The default driver for ARM boards, in absence of an overriding configuration.
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This driver needs one Timer per enabled/used DAC channel, to trigger conversion; and a third timer to trigger state updates with the audio-core.
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Additionally, in the board config, you'll want to make changes to enable the DACs, GPT for Timers 6, 7 and 8:
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```c
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//halconf.h:
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#define HAL_USE_DAC TRUE
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#define HAL_USE_GPT TRUE
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#include_next <halconf.h>
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```
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```c
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// mcuconf.h:
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#include_next <mcuconf.h>
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#undef STM32_DAC_USE_DAC1_CH1
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#define STM32_DAC_USE_DAC1_CH1 TRUE
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#undef STM32_DAC_USE_DAC1_CH2
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#define STM32_DAC_USE_DAC1_CH2 TRUE
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#undef STM32_GPT_USE_TIM6
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#define STM32_GPT_USE_TIM6 TRUE
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#undef STM32_GPT_USE_TIM7
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#define STM32_GPT_USE_TIM7 TRUE
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#undef STM32_GPT_USE_TIM8
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#define STM32_GPT_USE_TIM8 TRUE
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```
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?> Note: DAC1 (A4) uses TIM6, DAC2 (A5) uses TIM7, and the audio state timer uses TIM8 (configurable).
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You can also change the timer used for the overall audio state by defining the driver. For instance:
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```c
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#define AUDIO_STATE_TIMER GPTD9
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```
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### DAC additive :id=dac-additive
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only needs one timer (GPTD6, Tim6) to trigger the DAC unit to do a conversion; the audio state updates are in turn triggered during the DAC callback.
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Additionally, in the board config, you'll want to make changes to enable the DACs, GPT for Timer 6:
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```c
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//halconf.h:
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#define HAL_USE_DAC TRUE
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#define HAL_USE_GPT TRUE
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#include_next <halconf.h>
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```
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```c
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// mcuconf.h:
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#include_next <mcuconf.h>
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#undef STM32_DAC_USE_DAC1_CH1
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#define STM32_DAC_USE_DAC1_CH1 TRUE
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#undef STM32_DAC_USE_DAC1_CH2
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#define STM32_DAC_USE_DAC1_CH2 TRUE
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#undef STM32_GPT_USE_TIM6
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#define STM32_GPT_USE_TIM6 TRUE
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```
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### DAC Config
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| Define | Defaults | Description |
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| -------------------------------- | -------------------------- | --------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
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| `AUDIO_DAC_SAMPLE_MAX` | `4095U` | Highest value allowed. Lower value means lower volume. And 4095U is the upper limit, since this is limited to a 12 bit value. Only effects non-pregenerated samples. |
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| `AUDIO_DAC_OFF_VALUE` | `AUDIO_DAC_SAMPLE_MAX / 2` | The value of the DAC when not playing anything. Some setups may require a high (`AUDIO_DAC_SAMPLE_MAX`) or low (`0`) value here. |
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| `AUDIO_MAX_SIMULTANEOUS_TONES` | __see next table__ | The number of tones that can be played simultaneously. A value that is too high may freeze the controller or glitch out when too many tones are being played. |
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| `AUDIO_DAC_SAMPLE_RATE` | __see next table__ | Effective bit rate of the DAC (in hertz), higher limits simultaneous tones, and lower sacrifices quality. |
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| `AUDIO_DAC_BUFFER_SIZE` | __see next table__ | Number of samples generated every refill. Too few may cause excessive CPU load; too many may cause freezes, RAM or flash exhaustion or lags during matrix scanning. |
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There are a number of predefined quality settings that you can use, with "sane minimum" being the default. You can use custom values by simply defining the sample rate, number of simultaneous tones and buffer size, instead of using one of the listed presets.
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| Define | Sample Rate | Simultaneous tones | Buffer size |
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| --------------------------------- | ----------- | ------------------- | ----------- |
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| `AUDIO_DAC_QUALITY_VERY_LOW` | `11025U` | `8` | `64U` |
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| `AUDIO_DAC_QUALITY_LOW` | `22050U` | `4` | `128U` |
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| `AUDIO_DAC_QUALITY_HIGH` | `44100U` | `2` | `256U` |
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| `AUDIO_DAC_QUALITY_VERY_HIGH` | `88200U` | `1` | `256U` |
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| `AUDIO_DAC_QUALITY_SANE_MINIMUM` | `16384U` | `8` | `64U` |
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#### Notes on buffer size :id=buffer-size
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By default, the buffer size attempts to keep to these constraints:
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* The interval between buffer refills can't be too short, since the microcontroller would then only be servicing buffer refills and would freeze up.
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* On the additive driver, the interval between buffer refills can't be too long, since matrix scanning would suffer lengthy pauses every so often, which would delay key presses or releases or lose some short taps altogether.
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* The interval between buffer refills is kept to a minimum, which allows notes to stop as soon as possible after they should.
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* For greater compatibility, the buffer size should be a power of 2.
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* The buffer size being too large causes resource exhaustion leading to build failures or freezing at runtime: RAM usage (on the additive driver) or flash usage (on the basic driver).
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You can lower the buffer size if you need a bit more space in your firmware, or raise it if your keyboard freezes up.
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```c
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/* zero crossing (or approach, whereas zero == DAC_OFF_VALUE, which can be configured to anything from 0 to DAC_SAMPLE_MAX)
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* ============================*=*========================== AUDIO_DAC_SAMPLE_MAX
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* * *
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* * *
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* ---------------------------------------------------------
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* * * } AUDIO_DAC_SAMPLE_MAX/100
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* --------------------------------------------------------- AUDIO_DAC_OFF_VALUE
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* * * } AUDIO_DAC_SAMPLE_MAX/100
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* ---------------------------------------------------------
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* *
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* * *
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* * *
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* =====*=*================================================= 0x0
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*/
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```
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### PWM hardware :id=pwm-hardware
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This driver uses the ChibiOS-PWM system to produce a square-wave on specific output pins that are connected to the PWM hardware.
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The hardware directly toggles the pin via its alternate function. See your MCU's data-sheet for which pin can be driven by what timer - looking for TIMx_CHy and the corresponding alternate function.
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A configuration example for the STM32F103C8 would be:
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```c
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//halconf.h:
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#define HAL_USE_PWM TRUE
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#define HAL_USE_PAL TRUE
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#include_next <halconf.h>
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```
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```c
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// mcuconf.h:
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#include_next <mcuconf.h>
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#undef STM32_PWM_USE_TIM1
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#define STM32_PWM_USE_TIM1 TRUE
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```
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If we now target pin A8, looking through the data-sheet of the STM32F103C8, for the timers and alternate functions
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- TIM1_CH1 = PA8 <- alternate0
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- TIM1_CH2 = PA9
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- TIM1_CH3 = PA10
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- TIM1_CH4 = PA11
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with all this information, the configuration would contain these lines:
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```c
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//config.h:
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#define AUDIO_PIN A8
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#define AUDIO_PWM_DRIVER PWMD1
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#define AUDIO_PWM_CHANNEL 1
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```
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ChibiOS uses GPIOv1 for the F103, which only knows of one alternate function.
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On 'larger' STM32s, GPIOv2 or GPIOv3 are used; with them it is also necessary to configure `AUDIO_PWM_PAL_MODE` to the correct alternate function for the selected pin, timer and timer-channel.
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You can also use the Complementary output (`TIMx_CHyN`) for PWM on supported controllers. To enable this functionality, you will need to make the following changes:
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```c
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// config.h:
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#define AUDIO_PWM_COMPLEMENTARY_OUTPUT
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```
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### PWM software :id=pwm-software
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This driver uses the PWM callbacks from PWMD1 with TIM1_CH1 to toggle the selected AUDIO_PIN in software.
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During the same callback, with AUDIO_PIN_ALT_AS_NEGATIVE set, the AUDIO_PIN_ALT is toggled inversely to AUDIO_PIN. This is useful for setups that drive a piezo from two pins (instead of one and Gnd).
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You can also change the timer used for software PWM by defining the driver. For instance:
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```c
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#define AUDIO_STATE_TIMER GPTD8
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```
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### Testing Notes :id=testing-notes
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While not an exhaustive list, the following table provides the scenarios that have been partially validated:
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| | DAC basic | DAC additive | PWM hardware | PWM software |
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| ------------------------ | ------------------ | ------------------ | ------------------ | ------------------ |
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| Atmega32U4 | :o: | :o: | :heavy_check_mark: | :o: |
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| RP2040 | :x: | :x: | :heavy_check_mark: | ? |
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| STM32F103C8 (bluepill) | :x: | :x: | :heavy_check_mark: | :heavy_check_mark: |
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| STM32F303CCT6 (proton-c) | :heavy_check_mark: | :heavy_check_mark: | ? | :heavy_check_mark: |
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| STM32F405VG | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
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| L0xx | :x: (no Tim8) | ? | ? | ? |
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:heavy_check_mark: : works and was tested
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:o: : does not apply
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:x: : not supported by MCU
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*Other supported ChibiOS boards and/or pins may function, it will be highly chip and configuration dependent.*
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