* mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
move/branch operations to the bottom so that VR5400 multimedia
instructions take precedence in disassembly.
gas/testsuite/
* gas/mips/vr5400.d: Update for a correct disassembly of
"racm.ob".
no associated relocation.
(mips_ip): Cancel the expression after use for the Q format
specifier.
(parse_relocation): Return no relocation for unsupported
operators.
(my_getSmallExpression): Return no relocation if no relocation
operators are used.
* mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
ISA-specific "break" encoding.
gas/testsuite/
* gas/mips/mips32.s: Adjust for the unified "break" syntax. Add
another "break" case. Update the comment accordingly.
* gas/mips/set-arch.s: Likewise.
* gas/mips/mips32.d: Adjust for the new output.
* gas/mips/set-arch.d: Likewise.
bfd:
* elf32-sh.c: Include ../opcodes/sh-opc.h .
* Makefile.am: Ran make dep-am .
* Makefile.in: Ran make dep-in .
gas:
* config/tc-sh.c (md_assemble): Change isspace to ISSPACE.
(md_parse_option): Remove redundant -isa testing.
Make bfd_arch variable const.
(md_show_usage): Make bfd_arch variable const.
* bfd/cofflink.c (_bfd_coff_generic_relocate_section): Resolve PE weak
externals properly.
* src/gas/config/obj-coff.c (obj_coff_weak): New .weak syntax for PE weak
externals.
* binutils/doc/binutils.texi (nm): Clarify weak symbol description.
* gas/config/tc-i386.c (tc_gen_reloc): Use addend for weak symbols in TE_PE.
* gas/doc/as.texinfo (Weak): Document PE weak symbols.
* ld/ld.texinfo (WIN32): Document PE weak symbols.
(reloc_needs_lo_p): Only return true if HAVE_IN_PLACE_ADDENDS.
(mips_frob_file): Rework so that only a single pass through the
relocs is needed. Allow %lo()s to have higher offsets than their
corresponding %hi()s or %got()s.
testsuite/
* gas/mips/elf{,el}-rel.d: Adjust so that the earliest %hi() matches
the earliest %lo().
* gas/mips/elf-rel11.d: Don't expect the relocs to be reordered.
* gas/mips/elf-rel20.[sd]: New test.
* gas/mips/mips.exp: Run it.
Actually add these files:
2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
* testsuite/gas/sh/arch: New directory.
* testsuite/gas/sh/arch/arch.exp: New test script.
* testsuite/gas/sh/arch/arch_expected.txt: New file.
* testsuite/gas/sh/arch/sh.s: New file.
* testsuite/gas/sh/arch/sh2.s: New file.
* testsuite/gas/sh/arch/sh-dsp.s: New file.
* testsuite/gas/sh/arch/sh2e.s: New file.
* testsuite/gas/sh/arch/sh3-nommu.s: New file.
* testsuite/gas/sh/arch/sh3.s: New file.
* testsuite/gas/sh/arch/sh3-dsp.s: New file.
* testsuite/gas/sh/arch/sh3e.s: New file.
* testsuite/gas/sh/arch/sh4-nommu-nofpu.s: New file.
* testsuite/gas/sh/arch/sh4-nofpu.s: New file.
* testsuite/gas/sh/arch/sh4.s: New file.
* testsuite/gas/sh/arch/sh4a-nofpu.s: New file.
* testsuite/gas/sh/arch/sh4al-dsp.s: New file.
ld/testsuite:
Actually add these files:
2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
* testsuite/ld-sh/arch/arch.exp: New test script.
* testsuite/ld-sh/arch/arch_expected.txt: New file.
* testsuite/ld-sh/arch/sh.s: New file.
* testsuite/ld-sh/arch/sh2.s: New file.
* testsuite/ld-sh/arch/sh-dsp.s: New file.
* testsuite/ld-sh/arch/sh2e.s: New file.
* testsuite/ld-sh/arch/sh3-nommu.s: New file.
* testsuite/ld-sh/arch/sh3.s: New file.
* testsuite/ld-sh/arch/sh3-dsp.s: New file.
* testsuite/ld-sh/arch/sh3e.s: New file.
* testsuite/ld-sh/arch/sh4-nommu-nofpu.s: New file.
* testsuite/ld-sh/arch/sh4-nofpu.s: New file.
* testsuite/ld-sh/arch/sh4.s: New file.
* testsuite/ld-sh/arch/sh4a-nofpu.s: New file.
* testsuite/ld-sh/arch/sh4al-dsp.s: New file.
* testsuite/ld-sh/arch/sh4a.s: New file.
* i386.h (i386_optab): Remove fildd, fistpd and fisttpd.
opcodes/
* i386-dis.c (x_mode): Comment.
(two_source_ops): File scope.
(float_mem): Correct fisttpll and fistpll.
(float_mem_mode): New table.
(dofloat): Use it.
(OP_E): Correct intel mode PTR output.
(ptr_reg): Use open_char and close_char.
(PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
operands. Set two_source_ops.
gas/testsuite/
* gas/i386/prescott.s: Remove fisttpd and fisttpq.
* gas/i386/prescott.d: Update.
* ia64-gen.c (in_iclass): Handle more postinc st
and ld variants.
* ia64-asmtab.c: Rebuilt.
gas/testsuite/
* gas/ia64/dv-raw-err.s: Add some new postinc tests.
* gas/ia64/dv-raw-err.l: Updated.
bfd:
* Makefile.am: Regenerate dependencies.
* Makefile.in: Regenerate.
* archures.c: Add bfd_mach_sh3_nommu .
* bfd-in2.h: Regenerate.
* cpu-sh.c: Add sh3-nommu architecture.
(bfd_to_arch_table): Create new table.
(sh_get_arch_from_bfd_mach): Create new function.
(sh_get_arch_up_from_bfd_mach): Create new function.
(sh_merge_bfd_arch): Create new function.
* elf32-sh.c (sh_ef_bfd_table): Add table.
(sh_elf_check_relocs): Replace switch statement with
use of sh_ef_bfd_table .
(sh_elf_get_flags_from_mach): Add new function.
(sh_find_elf_flags): Likewise.
(sh_elf_copy_private_data): Replace most of non-elf contents
with a call to sh_merge_bfd_arch() .
gas:
* Makefile.am: Regenerate dependecies.
* Makefile.in: Regenerate.
* config/tc-sh.c (valid_arch): Make unsigned.
(preset_target_arch): Likewise.
(md_begin): Use new architecture flags system.
(get_specific): Likewise.
(assemble_ppi): Likewise.
(md_assemble): Likewise. Also fix error check for bad opcodes.
(md_parse_option): Likewise. Also generate -isa values according
to the table in bfd/cpu-sh.c instead of just constants. Also
allow <arch>-up ISA variants.
(sh_elf_final_processing): Replace if-else chain with a call to
sh_find_elf_flags().
* testsuite/gas/sh/arch: New directory.
* testsuite/gas/sh/arch/arch.exp: New test script.
* testsuite/gas/sh/arch/arch_expected.txt: New file.
* testsuite/gas/sh/arch/sh.s: New file.
* testsuite/gas/sh/arch/sh2.s: New file.
* testsuite/gas/sh/arch/sh-dsp.s: New file.
* testsuite/gas/sh/arch/sh2e.s: New file.
* testsuite/gas/sh/arch/sh3-nommu.s: New file.
* testsuite/gas/sh/arch/sh3.s: New file.
* testsuite/gas/sh/arch/sh3-dsp.s: New file.
* testsuite/gas/sh/arch/sh3e.s: New file.
* testsuite/gas/sh/arch/sh4-nommu-nofpu.s: New file.
* testsuite/gas/sh/arch/sh4-nofpu.s: New file.
* testsuite/gas/sh/arch/sh4.s: New file.
* testsuite/gas/sh/arch/sh4a-nofpu.s: New file.
* testsuite/gas/sh/arch/sh4al-dsp.s: New file.
* testsuite/gas/sh/arch/sh4a.s: New file.
include/elf:
* sh.h (EF_SH_HAS_DSP): Remove.
(EF_SH_HAS_FP): Remove.
(EF_SH_MERGE_MACH): Remove.
(EF_SH4_NOFPU): Convert to decimal.
(EF_SH4A_NOFPU): Likewise.
(EF_SH4_NOMMU_NOFPU): Likewise.
(EF_SH3_NOMMU): Add new macro.
(EF_SH_BFD_TABLE): Likewise.
(sh_find_elf_flags): Add prototype.
(sh_elf_get_flags_from_mach): Likewise.
opcodes:
* sh-dis.c (target_arch): Make unsigned.
(print_insn_sh): Replace (most of) switch with a call to
sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
* sh-opc.h: Redefine architecture flags values.
Add sh3-nommu architecture.
Reorganise <arch>_up macros so they make more visual sense.
(SH_MERGE_ARCH_SET): Define new macro.
(SH_VALID_BASE_ARCH_SET): Likewise.
(SH_VALID_MMU_ARCH_SET): Likewise.
(SH_VALID_CO_ARCH_SET): Likewise.
(SH_VALID_ARCH_SET): Likewise.
(SH_MERGE_ARCH_SET_VALID): Likewise.
(SH_ARCH_SET_HAS_FPU): Likewise.
(SH_ARCH_SET_HAS_DSP): Likewise.
(SH_ARCH_UNKNOWN_ARCH): Likewise.
(sh_get_arch_from_bfd_mach): Add prototype.
(sh_get_arch_up_from_bfd_mach): Likewise.
(sh_get_bfd_mach_from_arch_set): Likewise.
(sh_merge_bfd_arc): Likewise.
ld:
* testsuite/ld-sh/arch/arch.exp: New test script.
* testsuite/ld-sh/arch/arch_expected.txt: New file.
* testsuite/ld-sh/arch/sh.s: New file.
* testsuite/ld-sh/arch/sh2.s: New file.
* testsuite/ld-sh/arch/sh-dsp.s: New file.
* testsuite/ld-sh/arch/sh2e.s: New file.
* testsuite/ld-sh/arch/sh3-nommu.s: New file.
* testsuite/ld-sh/arch/sh3.s: New file.
* testsuite/ld-sh/arch/sh3-dsp.s: New file.
* testsuite/ld-sh/arch/sh3e.s: New file.
* testsuite/ld-sh/arch/sh4-nommu-nofpu.s: New file.
* testsuite/ld-sh/arch/sh4-nofpu.s: New file.
* testsuite/ld-sh/arch/sh4.s: New file.
* testsuite/ld-sh/arch/sh4a-nofpu.s: New file.
* testsuite/ld-sh/arch/sh4al-dsp.s: New file.
* testsuite/ld-sh/arch/sh4a.s: New file.
2004-04-30 H.J. Lu <hongjiu.lu@intel.com>
* config/obj-elf.c (get_section): New function.
(obj_elf_change_section): Support multiple sections with same
name.
gas/testsuite/
2004-04-30 H.J. Lu <hongjiu.lu@intel.com>
* gas/elf/elf.exp: Remove group1, add group1a and group1b for
section group.
* gas/elf/group1a.d: New file.
* gas/elf/group1b.d: Likewise.
* gas/elf/group1.e: Removed.
dup_common fields.
(setup_sections): Use som_subspace_dictionary_record struct instead
subspace_dictionary_record. Set SEC_LINK_ONCE if subspace is
is_comdat, is_common or dup_common.
(som_prep_headers): Use som_subspace_dictionary_record struct. Set
is_comdat, is_common and dup_common in section subspace_dict from
copy_data.
(som_begin_writing): Use som_subspace_dictionary_record struct.
(som_finish_writing): Likewise.
(som_bfd_derive_misc_symbol_info): Add support to set is_comdat,
is_common and dup_common flags in info for symbol. Add comment
regarding linker support for these fields. Slightly reorganize
function.
(som_build_and_write_symbol_table): Set is_comdat, is_common and
dup_common fields in symbol table from symbol info.
(bfd_som_set_subsection_attributes): Add comdat, common and dup_common
arguments. Set corresponding fields in copy_data. Change all callers.
(som_bfd_ar_write_symbol_stuff): Set dup_common flag in library
symbol table.
(som_vec): Add SEC_LINK_ONCE to applicable section flags.
* som.h (som_subspace_dictionary_record): Define.
(som_copyable_section_data_struct): Add is_comdat, is_common and
dup_common fields.
(som_section_data_struct): Use som_subspace_dictionary_record struct
instead of subspace_dictionary_record.
(bfd_boolean bfd_som_set_subsection_attributes): Adjust prototype.
* config/obj-som.c (obj_som_init_stab_section): Add new arguments in
call to obj_set_subsection_attributes.
(obj_som_init_stab_section): Likewise.
* config/tc-hppa.c (default_subspace_dict): Add comdat field.
(pa_def_subspaces): Provide comdat default.
(pa_subspace): Handle new "comdat" parameter. Set SEC_LINK_ONCE and
not SEC_IS_COMMON if section is comdat, common or dup_common. Update
calls to create_new_subspace and update_subspace to pass comdat flag.
(create_new_subspace, update_subspace): Add new comdat argument. Use
it in calls to obj_set_subsection_attributes.
* doc/c-hppa.texi (.subspa, .nsubspa): Document new comdat parameter
and use of comdat, common and dup_comm parameters.
* elf32-sh.c (sh_elf_plt_sym_val): New function.
(elf_backend_plt_sym_val): Define.
opcodes/
* sh-dis.c (print_insn_sh): Print the value in constant pool
as a symbol if it looks like a symbol.
gas/testsuite/
* gas/sh/pcrel2.d: Update.
* gas/sh/tlsd.d: Update.
* gas/sh/tlsnopic.d: Update.
* gas/sh/tlspic.d: Update.
ld/testsuite/
* ld-sh/tlsbin-1.d: Update
* ld-sh/tlspic-1.d: Update.
(load_address, macro): Use load_delay_nop() to build a nop
which can be omitted with gpr_interlocks.
* gas/mips/lb-xgot-ilocks.d: Remove nops in load delay slot.
* gas/mips/mips-abi32-pic.d: Likewise.
* gas/mips/mips-abi32-pic2.d: Likewise.
* gas/mips/mips-gp32-fp32-pic.d: Likewise.
* gas/mips/mips-gp32-fp64-pic.d: Likewise.
* gas/mips/mips-gp64-fp32-pic.d: Likewise.
* gas/mips/mips-gp64-fp64-pic.d: Likewise.
* gas/mips/relax-swap1-mips2.d: Likewise.
* gas/mips/lb-svr4pic-ilocks.d: New test.
* gas/mips/mips.exp: Run it.
2004-04-20 Chris Demetriou <cgd@broadcom.com>
* NEWS: Note that MIPS -membedded-pic option is deprecated.
[ ld/ChangeLog ]
2004-04-20 Chris Demetriou <cgd@broadcom.com>
* NEWS: Note that MIPS --embedded-relocs option is deprecated.
* elf32-xtensa.c (elf_xtensa_check_relocs): Remove code to read
literal tables and check for relocs outside of literal pools.
(elf_xtensa_make_sym_local): Don't clear ELF_LINK_NON_GOT_REF flag.
(elf_xtensa_fix_refcounts): Don't check ELF_LINK_NON_GOT_REF or
set DF_TEXTREL.
(elf_xtensa_size_dynamic_sections): Don't add DT_TEXTREL entry.
(elf_xtensa_relocate_section): Read literal tables and check for
dynamic relocations in read-only sections and not in literal pools.
gas/ChangeLog:
* config/tc-xtensa.c (xtensa_post_relax_hook): Create literal
tables even when use_literal_section flag is not set.
--mul-bug-abort and the default behavior.
* config/tc-cris.c (cris_insn_kind): New member CRIS_INSN_MUL.
(err_for_dangerous_mul_placement): New variable.
(STATE_MUL, OPTION_MULBUG_ABORT_ON, OPTION_MULBUG_ABORT_OFF): New
macros.
(md_cris_relax_table): Have placeholder for STATE_MUL.
(md_longopts): New options --mul-bug-abort and --no-mul-bug-abort.
(cris_relax_frag) <case ENCODE_RELAX (STATE_MUL, STATE_BYTE)>: New
case doing nothing.
(md_estimate_size_before_relax) <case ENCODE_RELAX (STATE_MUL,
STATE_BYTE)>: Ditto.
(md_convert_frag) <ENCODE_RELAX (STATE_MUL, STATE_BYTE)>: Check
alignment and position of this frag, emit error message if
suspicious.
(md_assemble): For a multiply insn and when checking it,
transform the current frag into a special frag for that purpose.
(md_parse_option) <case OPTION_MULBUG_ABORT_OFF, case
OPTION_MULBUG_ABORT_ON>: Handle new options.
(xtensa_move_literals): Call mark_literal_frags for all literal
segments, including init and fini literal segments.
(xtensa_post_relax_hook): Swap use of xt_insn_sec and xt_literal_sec.
R_PARISC_PCREL32 and R_PARISC_PCREL64 relocations.
* tc-hppa.c (cons_fix_new_hppa): Check for PC relative base type.
(pa_comm): Set BSF_OBJECT in symbol flags.
(M, Mp): Use OP_M.
(None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
(GRPPADLCK): Define.
(dis386): Use NOP_Fixup on "nop".
(dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
(twobyte_has_modrm): Set for 0xa7.
(padlock_table): Delete. Move to..
(grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
and clflush.
(print_insn): Revert PADLOCK_SPECIAL code.
(OP_E): Delete sfence, lfence, mfence checks.
* gas/i386/katmai.d: Revert last change.
* i386-dis.c (grps): Use clflush by default for 0x0fae/7.
(OP_E): Twiddle clflush to sfence here.
gas/testsuite/
* gas/i386/katmai.d: Adjust for clflush change.
* config/tc-ia64.c (dot_align): New.
(ia64_do_align): Make it static.
(md_pseudo_table): Use "dot_align" for "align".
(ia64_md_do_align): Don't set align_frag here.
(ia64_handle_align): Add a stop bit to the previous bundle if
needed.
* config/tc-ia64.h (ia64_do_align): Removed.
opcodes:
* sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
* sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
accordingly.
bfd:
* archures.c: Add bfd_mach_sh4_nommu_nofpu.
* cpu-sh.c: Ditto.
* elf32-sh.c: Ditto.
* bfd-in2.h: Regenerate.
include/elf:
* sh.h: Add EF_SH4_NOMMU_NOFPU.
gas:
* config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and
-isa=sh4-nommu-nofpu options. Adjust help messages accordingly.
(sh_elf_final_processing): Output BFD type sh4_nofpu if that is
the most general type or the user specifically requested it.
(md_assemble): Add a new error message for when an instruction
is understood, but is not allowed due to an -isa option.
* config/tc-ia64.c (align_frag): New.
(md_assemble): Set the tc_frag_data field in align_frag for
IA64_OPCODE_FIRST instructions.
(ia64_md_do_align): Set align_frag.
(ia64_handle_align): Add a stop bit if needed.
* config/tc-ia64.h (TC_FRAG_TYPE): New.
(TC_FRAG_INIT): New.
gas:
* tc-sh.c (build_Mytes): Add REG_N_D and REG_N_B01
nibble types to assembler.
opcodes:
* sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
ensure that double registers have even numbers.
Add REG_N_B01 for nn01 (binary 01) nibble to ensure
that reserved instruction 0xfffd does not decode the same
as 0xfdfd (ftrv).
* sh-opc.h: Add REG_N_D nibble type and use it whereever
REG_N refers to a double register.
Add REG_N_B01 nibble type and use it instead of REG_NM
in ftrv.
Adjust the bit patterns in a few comments.
* dwarf2dbg.c (DWARF2_ADDR_SIZE): Remove trailing ';'
* read.h (SKIP_WHITESPACE): Turn into an expression.
* read.c (read_a_source_file): A pseudo is removed by having a
NULL handler.
testsuite:
* gas/macros/test2.s: Lowercase it.
* config/tc-ia64.c (output_endp): New.
(count_bits): Delete.
(ia64_flush_insns, process_one_record, optimize_unw_records): Handle
endp unwind records.
(fixup_unw_records): Handle endp unwind records. Delete code for
shortening prologue regions not followed by a body record.
(dot_endp): Call add_unwind_entry to emit endp unwind record.
* config/tc-ia64.h (unw_record_type): Add endp.
* config/tc-ia64.c (ia64_convert_frag): Call md_number_to_chars to
fill padding bytes with zeroes.
(emit_one_bundle): New locals last_ptr, end_ptr. Rewrite code that
sets unwind_record slot_number and slot_frag fields.
* config/tc-mips.c (hilo_interlocks): Change definition
so that MIPS32, MIPS64 and later ISAs are included, along with
the already-included machines. Update comments.
* gas/mips/relax-swap1.s: Add extra space at end, so the
disassembly will consistently have "..." at its end.
* gas/mips/relax-swap2.s: Likewise.
* gas/mips/relax-swap1-mips2.d: Expect "..." at end of disassembly.
(RELAX_FIRST, RELAX_SECOND): Turn into 8-bit quantities.
(RELAX_USE_SECOND): Bump to 0x10000.
(RELAX_SECOND_LONGER, RELAX_NOMACRO, RELAX_DELAY_SLOT): New flags.
(mips_macro_warning): New variable.
(md_assemble): Wrap macro expansion in macro_start() and macro_end().
(s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Likewise.
(relax_close_frag): Set mips_macro_warning.first_frag. Adjust use
of RELAX_ENCODE.
(append_insn): Update mips_macro_warning.sizes.
(macro_start, macro_warning, macro_end): New functions.
(macro_build): Don't emit warnings here.
(macro_build_lui, md_estimate_size_before_relax): ...or here.
(md_convert_frag): Check for cases where one macro alternative
needs a warning and the other doesn't. Emit a warning if the
longer sequence was chosen.
* config/tc-mips.c (RELAX_ENCODE): Take three arguments: the size of
the first sequence, the size of the second sequence, and a flag
that says whether we should warn.
(RELAX_OLD, RELAX_NEW, RELAX_RELOC[123]): Delete.
(RELAX_FIRST, RELAX_SECOND): New.
(mips_relax): New variable.
(relax_close_frag, relax_start, relax_switch, relax_end): New fns.
(append_insn): Remove "place" argument. Use mips_relax.sequence
rather than "place" to check whether we're expanding the second
alternative of a relaxable macro. Remove redundant check for
branch relaxation. If generating a normal insn, and there
is not enough room in the current frag, call relax_close_frag()
to close it. Update mips_relax.sizes[]. Emit fixups for the
second version of a relaxable macro. Record the first relaxable
fixup in mips_relax. Remove tc_gen_reloc workaround.
(macro_build): Remove all uses of "place". Use mips_relax.sequence
in the same way as in append_insn.
(mips16_macro_build): Remove "place" argument.
(macro_build_lui): As for macro_build. Don't drop the add_symbol
when generating the second version of a relaxable macro.
(load_got_offset, add_got_offset): New functions.
(load_address, macro): Use new relaxation machinery. Remove
tc_gen_reloc workarounds.
(md_estimate_size_before_relax): Set RELAX_USE_SECOND if the second
version of a relaxable macro is needed. Return -RELAX_SECOND if the
first version is needed.
(tc_gen_reloc): Remove relaxation handling.
(md_convert_frag): Go through the fixups for a relaxable macro and
mark those that belong to the unneeded alternative as done. If the
second alternative is needed, adjust the fixup addresses to account
for the deleted first alternative.
testsuite/
* gas/mips/elf-rel19.[sd]: New test.
* gas/mips/mips.exp: Run it.
* config/tc-mips.c (append_insn): Properly detect variant frags
that preclude swapping of relaxed branches. Correctly swap
instructions between frags when dealing with relaxed branches.
gas/testsuite/
* gas/mips/relax-swap1-mips1.d: New test for branch relaxation
with swapping for MIPS1.
* gas/mips/relax-swap1-mips2.d: New test for branch relaxation
with swapping for MIPS2.
* gas/mips/relax-swap1.l: Stderr output for the new tests.
* gas/mips/relax-swap1.s: Source for the new tests.
* gas/mips/relax-swap2.d: New test for branch likely relaxation
with swapping.
* gas/mips/relax-swap2.l: Stderr output for the new test.
* gas/mips/relax-swap2.s: Source for the new test.
* gas/mips/mips.exp: Run the new tests.
* config/tc-mips.c (macro_build_jalr): When adding an R_MIPS_JALR
reloc, reserve space for the delay slot as well as the jalr itself.
gas/testsuite/
* gas/mips/elf-rel18.[sd]: New test.
* gas/mips/mips.exp: Run it.
(cop_interlocks): Check ISA level.
(cop_mem_interlocks): Define.
(reg_needs_delay): Check cop_interlocks rather than
ISA_HAS_COPROC_DELAYS.
(append_insn): Likewise. Use cop_mem_interlocks rather than
directly checking mips_opts.isa.
(mips_emit_delays): Likewise.
* config/tc-ia64.c (unwind): Move next_slot_number and
next_slot_frag to ...
(unw_rec_list): Here.
(free_list_records): Removed.
(output_unw_records): Likewise.
(generate_unwind_image): Make it void.
(alloc_record): Initialize next_slot_number and next_slot_frag.
(slot_index): Take .org, .space and .align into account.
(fixup_unw_records): Don't set slot_number to 0. Use
list->next_slot_number and list->next_slot_frag instead of
unwind.next_slot_number and unwind.next_slot_frag.
(ia64_convert_frag): New.
(generate_unwind_image): Generate a rs_machine_dependent frag
for unwind record.
(emit_one_bundle): Use list->next_slot_number and
list->next_slot_frag instead of unwind.next_slot_number and
unwind.next_slot_frag.
* config/tc-ia64.h (md_convert_frag): Defined as
ia64_convert_frag.
(md_estimate_size_before_relax): Defined as (f)->fr_var.
* lib/gas-defs.exp (is_elf_format): Match frv-uclinux.
2003-09-18 Alexandre Oliva <aoliva@redhat.com>
* gas/frv/fdpic.s, gas/frv/fdpic.d: Renamed from ucpic*.
2003-09-15 Alexandre Oliva <aoliva@redhat.com>
* gas/frv/ucpic.s, gas/frv/ucpic.d: Use gr15 as PIC register. Use
gprel12 for rodata symbol and gotoff12 for sdata symbol.
2003-08-08 Alexandre Oliva <aoliva@redhat.com>
* gas/frv/ucpic.d: Test gotoff and gotofffuncdesc.
2003-08-04 Alexandre Oliva <aoliva@redhat.com>
* gas/frv/ucpic.d, gas/frv/ucpic.s: New.
* gas/frv/allinsns.exp: Run it.
* elf32-mips.c (elf_mips_howto_table_rel): Replace all uses of
mips_elf_generic_reloc with _bfd_mips_elf_generic_reloc. Use
_bfd_mips_elf_hi16_reloc for R_MIPS_HI16 and R_MIPS_GNU_REL_HI16,
_bfd_mips_elf_lo16_reloc for R_MIPS_LO16 and R_MIPS_GNU_REL_LO16,
and _bfd_mips_elf_got16_reloc for R_MIPS_GOT16. Change rightshift
to 16 for R_MIPS_HI16 and R_MIPS_GNU_REL_HI16.
(mips_elf_generic_reloc, struct mips_hi16, mips_elf_hi16_reloc)
(mips_elf_lo16_reloc, mips_elf_got16_reloc): Delete.
(_bfd_mips_elf32_gprel16_reloc): Remove special case.
(mips_elf_gprel32_reloc, mips32_64bit_reloc): Likewise.
* elf64-mips.c (mips_elf64_howto_table_rel): Replace all uses of
mips_elf_generic_reloc with _bfd_mips_elf_generic_reloc. Use
_bfd_mips_elf_hi16_reloc for R_MIPS_HI16, _bfd_mips_elf_lo16_reloc
for R_MIPS_LO16 and _bfd_mips_elf_got16_reloc for R_MIPS_GOT16.
Change R_MIPS_HI16's rightshift to 16.
(mips_elf64_howto_table_rela): Replace all uses of
mips_elf_generic_reloc with _bfd_mips_elf_generic_reloc.
Use _bfd_mips_elf_generic_reloc for R_MIPS_GOT16 as well.
(mips_elf64_hi16_reloc, mips_elf64_got16_reloc): Delete.
(mips_elf64_shift6_reloc): Remove special case. Use
_bfd_mips_elf_generic_reloc instead of returning bfd_reloc_continue.
* elfn32-mips.c (prev_reloc_section): Delete.
(prev_reloc_address, prev_reloc_addend): Delete.
(elf_mips_howto_table_rel, elf_mips_howto_table_rela): As for
elf64-mips.c
(GET_RELOC_ADDEND, SET_RELOC_ADDEND): Delete.
(mips_elf_generic_reloc, struct mips_hi16, mips_elf_hi16_reloc)
(mips_elf_lo16_reloc, mips_elf_got16_reloc): Delete.
(mips_elf_gprel16_reloc): Delete use of GET_RELOC_ADDEND.
(mips_elf_literal_reloc, mips_elf_gprel32_reloc): Likewise.
(mips16_jump_reloc, mips16_gprel_reloc): Likewise.
(mips_elf_shift6_reloc): Likewise. Delete use of SET_RELOC_ADDEND.
* elfxx-mips.c (_bfd_mips_elf_gprel16_with_gp): Use
_bfd_relocate_contents to install an in-place addend.
(mips_hi16): New structure.
(mips_hi16_list): Moved from elf32-mips.c.
(_bfd_mips_elf_hi16_reloc, _bfd_mips_elf_got16_reloc): New functions.
(_bfd_mips_elf_lo16_reloc, _bfd_mips_elf_generic_reloc): New functions.
(mips_elf_calculate_relocation): Assume addend is unshifted.
(_bfd_mips_elf_relocate_section): Don't apply the howto rightshift
on top of the usual high-part shift. Don't shift the addend right
before calling mips_elf_calculate_relocation.
* elfxx-mips.h (_bfd_mips_elf_hi16_reloc): Declare.
(_bfd_mips_elf_got16_reloc, _bfd_mips_elf_lo16_reloc): Declare.
(_bfd_mips_elf_generic_reloc): Declare.
gas/
* config/tc-mips.c (mips_need_elf_addend_fixup): Delete.
(md_apply_fix3): Remove bfd_install_relocation workarounds.
(tc_gen_reloc): Likewise. Factor handling of pc-relative relocations
and treat fx_addnumber as relative to the relocation address.
gas/testsuite/
* gas/mips/mips16-jalx.d: Use -mabi=o64.
* gas/mips/mips16.d: Likewise.
* gas/mips/elf-rel17.[sd]: New test.
* gas/mips/mips.exp: Run it.
(ctrl_table): Add "flags" keyword and some comments.
(flag_table): Convert to uppercase.
(get_flags_operand): Be case insensitive.
(get_interrupt_operand): Be case insensitive. Support notation
where the inperrupt arguments are separated by commas.
(get_operands): Check whether get_flags_operand consumed all
arguments. Return failure if get_ctrl_operand didn't recognize a
valid control register.
(get_specific): Add case CLASS_CTRL: Test for valid control
register for ldctlb opcode.
(build_bytes): Check for valid control registers.
(s_comm): Split out code to..
(s_comm_internal): ..here. Tidy error returns. Rearrange so that
"name" from input line may be used in more places. Merge code
testing for valid size from elf_common. Merge code from
s_lcomm_internal. Call comm_parse_extra.
(bss_alloc): New function, split out of s_lcomm_internal and
elf_common.
(parse_align): Likewise.
(s_lcomm_internal): Rewrite.
(s_lcomm, s_lcomm_bytes): Use s_comm_internal.
* read.h (bss_alloc, parse_align, s_comm_internal): Declare.
* config/obj-elf.c (elf_common): Split out code to..
(elf_common_parse): ..here. Remove code common to s_comm_internal,
parse_align and bss_alloc. Rearrange and Tidy.
* config/tc-alpha.h (TC_IMPLICIT_LCOMM_ALIGNMENT): Define.
* ppc-opc.c (MO): Make optional.
(RAO, RSO, SHO): New optional forms of RA, RS, SH operands.
(tlbwe): Accept for both PPC403 and BOOKE. Make all operands optional.
gas:
* tc-ppc.c (md_assemble): Rewrite comment about optional operands
to indicate that 'all or none' is also handled. Pluralize a
word in another comment.
gas/testsuite:
* gas/ppc/booke.s: Add two more forms of the mbar instruction
and three forms of the tlbwe instruction.
* gas/ppc/booke.d: Update to match.
* config/tc-mips.c (macro): Switch misordered call to frag_grow()
and setting of tc_fr_offset.
gas/testsuite/
* gas/mips/elf-rel16.[sd]: New test.
* gas/mips/mips.exp: Run it.
* gas/mips/elf-rel-xgot-n32.d: Fix addends for "lw $5,dl1+34($5)".
* gas/mips/elf-rel-xgot-n64.d: Likewise.
* config/tc-sh.c: Add support for sh4a and no-fpu variants,
with appropriate additions to md_show_usage.
* testsuite/gas/sh/basic.exp: Call tests for sh4a.
* testsuite/gas/sh/{err-sh4a-fp.s, err-sh4a.s,
err-sh4al-dsp.s, sh4a-dsp.d, sh4a-dsp.s, sh4a-fp.d,
sh4a-fp.s, sh4a.d, sh4a.s, sh4al-dsp.d, sh4al-dsp.s:
New files, tests for sh4a and related variants.
* doc/c-sh.texi: Document new -isa options.
* doc/c-sh64.texi: Ditto.
* NEWS: Mention new support for sh4a.
