Commit graph

1556 commits

Author SHA1 Message Date
Jason Molenda
5fe24ce03a Fix sanitize tag. The proper keyword is "start-sanitize-*", not
"begin-sanitize-*".
1998-04-21 17:55:06 +00:00
Doug Evans
581fd0423c * sim/m32r/addx.cgs: Test (-1)+(-1)+1. 1998-04-21 17:54:03 +00:00
Doug Evans
aa4677044a * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
try all machs.
1998-04-21 17:52:16 +00:00
Jason Molenda
5569ab1b26 Add sim-main.c to things to keep. 1998-04-21 17:45:28 +00:00
Andrew Cagney
515125b709 Entry about changing sim_open missing from changelog. 1998-04-21 05:25:56 +00:00
Andrew Cagney
97f4d18341 Implement ERET instruction.
Add {signed,unsigned}_address type.
1998-04-21 04:30:27 +00:00
Andrew Cagney
421cbaae98 For new IGEN simulators, rewrite checks validating correct use of the
HI/LO registers.  For old gencode simulator, delete all checks.
1998-04-21 01:17:58 +00:00
Andrew Cagney
98f5dae13b * gen-icache.c (print_icache_extraction): When generating #define
force the expression to the correct type.
1998-04-21 00:11:40 +00:00
Doug Evans
970a8fd6c3 * cpu.c,sem.c,sem-switch.c: Regenerate. From
- cgen/m32r.cpu (h-accum): Add attribute FUN-ACCESS.
	* m32r.c (m32r_h_accum_get,m32r_h_accum_set): New functions.
	#include cgen-ops.h.
	* cpux.c,readx.c,semx.c: Regenerate.
	* m32rx.c (m32r_h_accum_get,m32r_h_accum_set): New functions.
	#include cgen-ops.h.  Delete inclusion of several unnecessary headers.
	(m32r_h_accums_get): Sign extend top 8 bits.
1998-04-20 23:20:22 +00:00
Frank Ch. Eigler
f61321eaaf * Added one new R5900 COP2 test.
Mon Apr 20 18:36:50 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* t-cop2b.c (test01): Additional COP2 tests (QMFC2/QMTC2/LQ/SQ).
	Don't use $1 ($at) register in inline assembly.
1998-04-20 22:59:16 +00:00
Jillian Ye
54a0a7df08 t-pke2.trc t-pke2.vif1expect: Update the testcase to use the
correct registers permitted by gpus.
1998-04-20 21:56:01 +00:00
Doug Evans
d8d0c6a627 * Makefile.in (ULIMIT): New variable.
(sce%.ok): Use it.
	(.run.ok,.run.ko): Ditto.
1998-04-17 21:21:12 +00:00
Frank Ch. Eigler
f8998e7780 * Fixed data mangling problems in R5900 COP2 LQC2/SQC2 instructions. 1998-04-17 19:04:53 +00:00
Frank Ch. Eigler
aa4d43968a * New R5900 COP2 test case. 1998-04-17 19:04:41 +00:00
Frank Ch. Eigler
fc4e5b84c8 * Adapted R5900 COP2 interface code to clarified micro-mode interlock
behavior.
1998-04-16 19:27:55 +00:00
Jillian Ye
73181dfff8 Update the testcase to work with gpu2 lib. 1998-04-16 19:07:57 +00:00
Andrew Cagney
7d93d53871 o CVT.S.W and CVT.W.S were reversed
o When unpacking an r5900 FP value,
  was not treating IEEE-NaN's as very
  large values.
o When packing an r5900 FP result from an infinite
  precision intermediate value was saturating
  to IEEE-MAX instead of r5900-MAX
o The least significant bit of the FP status
  register did not stick to one.
1998-04-16 07:49:58 +00:00
Andrew Cagney
c58fa2cc43 TX19 uses igen by default. 1998-04-15 23:17:16 +00:00
Frank Ch. Eigler
46399a00e8 * Changes to make interp.c compile under mips64r5900-sky-elf target.
Wed Apr 15 12:41:18 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (decode_coproc): Make COP2 branch code compile after
 	igen signature changes.
1998-04-15 19:02:04 +00:00
Andrew Cagney
74025eeea7 Re-fix 32 bit DSRAV instruction.
Fix mips16 BRANCH, unsigned ADD/SUB and SRAV instructions.
1998-04-15 14:04:01 +00:00
Andrew Cagney
ea5d84f5dc Add EXTEND11(). 1998-04-15 13:50:50 +00:00
Andrew Cagney
f3bdd368ea Debug tx19 built from igen sources.
Rework ifetch{16,32} to match the more recent do_load function.
1998-04-15 07:23:28 +00:00
Andrew Cagney
7acc4e98d2 Define EXTEND15(). 1998-04-15 06:45:19 +00:00
Andrew Cagney
93f967158f Define EXTEND4() and EXTEND5(). 1998-04-15 00:06:50 +00:00
John Metzler
5d71b4bc92 Tue Apr 14 16:31:35 1998 John Metzler <jmetzler@cygnus.com>
* sim-memopt.c (parse_addr): Sunos 4.5 does not hane strtol
 	declared so we need this cast to prevent long long addresses
	from being misconfigures. Results in access to unmapped memory.
1998-04-14 23:36:19 +00:00
Doug Evans
489564e28b * sim/m32r/maclh1.cgs: Fix testcase.
* sim/m32r/maclh1-2.cgs: New testcase.
1998-04-14 21:09:35 +00:00
Doug Evans
94a5989b24 * semx.c: Regenerate.
PR 15693.
1998-04-14 21:07:45 +00:00
Doug Evans
b42e7eb361 * Make-common.in (RUNTESTFLAGS): Define.
(check): Pass RUNTESTFLAGS to recursive make.
1998-04-14 20:22:07 +00:00
Ian Carmichael
ac137dc872 * Added interactive debugging for vector units, and a bunch of minor
* things.  See ChangeLog.sky for details.
*
* Modified Files:
*    .Sanitize ChangeLog.sky Makefile.in sky-libvpe.c sky-vu.c
*    sky-vu.h sky-vudis.c sky-vudis.h
* Added Files:
*    sky-indebug.c sky-indebug.h sky-interact.c sky-interact.h
*    sky-console.c sky-console.h
1998-04-14 19:58:36 +00:00
Jillian Ye
c6ae153421 c_gen.pl: Change to use data type "int" instead of "long int" in
function perform_test_read_only.
1998-04-14 16:25:44 +00:00
Andrew Cagney
c0a4c3ba17 Implement 32 bit MIPS16 instructions listed in m16.igen. 1998-04-14 14:34:48 +00:00
Andrew Cagney
7bf341f4a8 * sim-info.c (sim_info): Be verbose when either VERBOSE or STATE_VERBOSE_P. 1998-04-14 05:16:31 +00:00
Andrew Cagney
aba672aac5 * mn10300_sim.h: Declare all functions in op_utils.c using INLINE_SIM_MAIN.
* op_utils.c: Ditto.
* sim-main.c: New file.  Include op_utils.c.
1998-04-14 04:26:04 +00:00
Andrew Cagney
13eaae2fd0 Broke parsing of !<val>!<val> when adding support for =<field>. Fix.
Add support for the -S<suffix> option.
1998-04-14 04:24:47 +00:00
Andrew Cagney
1e23866b9b o Use new !<field>' and =<field>' operators in spec of
MOV and CMP instructions.
o	Enable basic inlining.  Diable use of SIM_MAIN_INLINE.
1998-04-14 00:59:30 +00:00
Andrew Cagney
346a3d6c11 Add support for instruction word conditionals of the form `XXX!YYY'
and XXX=YYY'.  See mn10300 for examples.
1998-04-14 00:00:15 +00:00
Frank Ch. Eigler
1e83118b79 * COP2 testing changes.
[ChangeLog]

Mon Apr 13 16:51:00 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* Makefile.in (*): Added .vuout/.vuexpect/.vuok test targets
	for confirming VU instruction trace.
	(t-cop2): Test COP2 sim using above facility.

	* t-cop2.vuexpect: New file.
1998-04-13 20:55:26 +00:00
Frank Ch. Eigler
96a4eb30da * Fixed a one-character typo in COP2 instruction synthesis.
[ChangeLog]
	Mon Apr 13 16:28:52 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (decode_coproc): Add proper 1000000 bit-string at top
	of VU lower instruction.
1998-04-13 20:31:29 +00:00
Doug Evans
e0a85af6eb * cpu.h,decode.c,decode.h,extract.c,sem.c,sem-switch.c: Regenerate.
* cpux.h,decodex.c,decodex.h,readx.c,semx.c: Regenerate.
Main change is to remove ordinal from format names.
1998-04-11 01:26:47 +00:00
Frank Ch. Eigler
b0b39eb2de * Backed out week-old attempt at enabling quadword memory access on
MIPS sim; added PKE sim code fixes.  No COP2 testing progress today.

[ChangeLog]

Thu Apr  9 16:38:23 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* r5900.igen (LQC,SQC): Adapted code to DOUBLEWORD accesses
	instead of QUADWORD.

	* sim-main.h: Removed attempt at allowing 128-bit access.

[ChangeLog.sky]

Thu Apr  9 16:42:54 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-pke.c (read_pke_pc): Corrected PKE PC calculation
	to word granularity.
1998-04-09 20:56:00 +00:00
Frank Ch. Eigler
e5cccb7177 * Added one PKE test after finding unexpected #### for a block of
code in gcov output.
1998-04-09 20:31:18 +00:00
Jillian Ye
ef23b3efd1 c_gen.pl : Added handling for data from GIF path1/2/3 FIFO. 1998-04-09 17:06:19 +00:00
Ian Carmichael
05c29245c9 * Fixed testcase. 1,$ s/ITOP 412/ITOP 421/ 1998-04-09 03:57:20 +00:00
Ian Carmichael
7dba069e20 * Fixed up blank lines in file. 1998-04-09 03:24:13 +00:00
Ian Carmichael
2fd7c40770 * Temporarily change LOADDRMASK in sky build. 1998-04-09 03:17:43 +00:00
Mark Alexander
ecd4a90b86 * erc32.c (sim_stop): Handle SIGINT gracefully.
* interf.c (sim_open): Don't catch SIGINT; GDB will do that for us.
1998-04-09 02:40:31 +00:00
Mark Alexander
e2324e2944 * exec.c (dispatch_instruction): Change how carry out is calculated
in DIVSCC.  Add emulation of SMULCC, UMUL, and UMULCC.
1998-04-09 01:42:44 +00:00
Frank Ch. Eigler
11c47f314b * R5900 sky COP2 testing continuing. Today only small
VCALLMS-related were found/fixed.

[ChangeLog.sky]

	* sky-vu.c ({read,write}_vu_special_reg): Add CMSAR[01] as special
 	registers for a VU.  Behavior not as mandated.
	({read,write}_vu_{misc,special}_reg): Create sim_io_error upon
	access to unknown register.  Behavior not as mandated.

	* sky-vu.h (anonymous register numbering enum): Add CMSAR[01].

	* sky-libvpe.c (indebug): Cache $ENV{'SKY_DEBUG'}.

[ChangeLog]


	* Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o.

	* interp.c (decode_coproc): Refer to VU CIA as a "special"
	register, not as a "misc" register.  Aha.  Add activity
	assertions after VCALLMS* instructions.
1998-04-08 22:22:58 +00:00
Frank Ch. Eigler
4118c63ccd * COP2 test case update. 1998-04-08 22:10:38 +00:00
Jillian Ye
4cc9cd5474 c_gen.pl: Added subroutine perform_test_read_only 1998-04-08 20:57:28 +00:00
Ian Carmichael
997d07bb70 * Add sky-vudis.h, sky-vudis.c. 1998-04-08 20:14:44 +00:00
Jillian Ye
1430343e6b sce_main.c Fixing address used (line 100): DMA_D1_MADR -> DMA_D1_TADR 1998-04-08 19:46:08 +00:00
Jillian Ye
a41a7ce2fd Update testcase to use the correct include files.
: ----------------------------------------------------------------------
1998-04-08 19:01:01 +00:00
Jillian Ye
b652cad7c0 *** empty log message *** 1998-04-08 18:07:54 +00:00
Jillian Ye
356d8c8c00 Take out sce_testcase from "make check" until they can run more stably.
Added "check_sce" target for driving the Sce_testcases.
1998-04-08 18:03:03 +00:00
Jillian Ye
b03c88a371 Update testcase to compile with the lastest DVP AS 1998-04-08 17:27:47 +00:00
Jillian Ye
2e7f8e7beb Update testcase to compile with latest DVP-AS
: ----------------------------------------------------------------------
1998-04-08 17:15:24 +00:00
Andrew Cagney
8764538f22 Keep sim-main.c and tx.igen 1998-04-07 23:15:53 +00:00
Doug Evans
4b61e1073f Keep sky-gs.[ch] if sky. 1998-04-07 22:54:10 +00:00
Frank Ch. Eigler
0b2289b6b3 * Oops, keep new file. 1998-04-07 22:50:02 +00:00
Frank Ch. Eigler
174ff2242b * R5900 COP2 sim testing in progress. The majority of instructions actually
work!

[ChangeLog.sky]

	* sky-vu.h (vu_device): Represent "macro instruction just stuffed
 	into fetch buffer" condition with new "m" bit.  Rename old "m" to
 	"l".

	* sky-libvpe.c (indebug): Save snapshot of environment value;
 	workaround for suspected memory corruption.
	(fetch_inst): Respect new "m" macro-instruction flag for reporting
 	successful fetch to caller.
	(exec_inst): Disassemble instruction here instead of fetch time.
  	Renamed old "m" -> "l" flag in VU state to track interlock
 	release.
	(vpecallms_cycle): Call exec_inst only if fetch_inst did some
 	work.

	* sky-vu.c (vu_attach, vu[01]_device): Revamped initialization to
 	ensure complete clear of tail part of struct at attach time.
	(vu0_busy): Fix thinko.
	(vu0_macro_issue): Adapt to new "l" flag.
	(vu0_micro_interlock_released): Ditto.
 	(write_vu_special_reg): Ditto.
	(read_vu_special_reg): Compute VBS0/VBS1 bits more explicitly.
  	The other VU status bits are not yet computed.

[ChangeLog]

	* interp.c (decode_coproc): Do not apply superfluous E (end) flag
 	to upper code of generated VU instruction.
1998-04-07 22:47:53 +00:00
Frank Ch. Eigler
0dee6af299 * COP2 testing in progress.
Tue Apr  7 18:31:47 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* t-cop2.s: New test for COP2 function.

	* Makefile.in: Added rule to assemble self-contained R5900 asm tests.
1998-04-07 22:45:56 +00:00
Doug Evans
34c1c9b86a Update. 1998-04-07 22:44:49 +00:00
Jillian Ye
373df64120 Update Makefile.in to use dvp-el-as for SKY testcases.
: ----------------------------------------------------------------------
1998-04-07 21:10:30 +00:00
Ian Carmichael
5faa69dac3 * Added missing ITOP instructions to test40,41,42,43. 1998-04-07 20:20:34 +00:00
Jillian Ye
f8c732a164 sce_main.c : Added "return 0;" to the end of main.
: ----------------------------------------------------------------------
1998-04-07 16:34:29 +00:00
Jillian Ye
5087a6057a sce* : files added for the SCE (feb28) testsuite (modified).
sce*_testN.* corresponds to the original testN/test.*
       *.vuasm    : MICRO code
       *.dvpasm   : DMAtag and VIF code description
       *.out_gif.dat : GIF output values for the corresponding testcase.
sce_main.c : driver file for the SCE testcases
sce_macro.s : SCE provided macro file needed by the SCE (feb28) testcases
refresh.s   : Needed by sce_main.c
Makefile.in : Updated to run make and run the SCE testsuite.

: ----------------------------------------------------------------------
1998-04-07 16:23:41 +00:00
Frank Ch. Eigler
2ebb2a6855 * R5900 COP2 is now ready for testing. Let loose the dogs!
Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (cop_[ls]q): Replaced stub with proper COP2 code.

	* sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
 	for TARGET_SKY.

	* r5900.igen (SQC2): Thinko.
1998-04-07 00:01:31 +00:00
Jillian Ye
0eebcbd7ab c_gen.pl: Added sub-routine perform_test64 to read and verify 64bit register. 1998-04-06 20:49:47 +00:00
Frank Ch. Eigler
ebcfd86a2e * R5900 COP2 function nearly complete. PKE sim now aware of new GPUIF
masking facility for PATH3 transfers.

[ChangeLog.sky]

Sun Apr  5 12:11:45 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-libvpe.c (exec-inst): Added "M" bit detection for upper
 	instruction.

	* sky-pke.c (pke_check_stall): Added more assertions.
	(pke_code_mskpath3): Use new GPUIF M3P control register.

	* sky-pke.h (VU[01]_CIA): New macros that give VU CIA
 	pseudo-register addresses.

	* sky-vu.h (vu_device, VectorUnitState): Merged structs.
	(VectorUnitState.mflag): New field.
	(VU_REG_{CMSAR0,CMSAR1,FBRST}) Added missing control registers.

	* sky-vu.c (vu0_busy): New function.
	(vu0_q_busy): New function.
	(vu0_macro_issue): New function.
	(vu0_micro_interlock_released): New function.
	(vu0_busy_in_{micro,macro}_mode): Deleted stubs.
	(vu0_macro_hazard_check): Deleted stubs.
	(vu_attach): Adapted code to merged device & state struct.
	(read_vu_special_reg): Compute VBS0/VBS1 bits in STAT register.

[ChangeLog]
start-sanitize-sky
Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (*): Adapt code to merged VU device & state structs.
	(decode_coproc): Execute COP2 each macroinstruction without
 	pipelining, by stepping VU to completion state.  Adapted to
	read_vu_*_reg style of register access.

	* mips.igen ([SL]QC2): Removed these COP2 instructions.

	* r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.

	* sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.

end-sanitize-sky
1998-04-05 16:40:03 +00:00
Frank Ch. Eigler
d61cc1d4b1 * Test case patch for more functional GPUIF implementation
Sun Apr  5 12:34:56 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* t-pke3.trc: Modified to confirm parts of GPUIF PATH3-masking
 	functionality.
1998-04-05 16:37:04 +00:00
Andrew Cagney
64ed8b6a8c aclocal.m4: Don't enable inlining when cross-compiling.
mips/*: Tune mips simulator - allow all memory transfer code to be inlined.
1998-04-05 07:16:54 +00:00
Andrew Cagney
278bda4050 Cleanup INLINE support for simulators using common framework.
Make IGEN responsible for co-ordinating inlining of generated files.
By default, aclocal.m4 disabled all inlining.
1998-04-04 12:33:11 +00:00
Jillian Ye
f6f81e4a92 c_gen.pl: Added sub-routine process_data_reg64 to handle 64bit register
writes.
1998-04-03 19:59:11 +00:00
Andrew Cagney
72a08ce565 Don't bother generating trace prefix string when not tracing. 1998-04-03 17:13:40 +00:00
Ron Unrau
c567d0b941 * sim-main.h: add vif registers
* interp.c: incorporate vif register load/store
        * sky-pke.[ch]: add register load/store routines
        * sku-vu.c: P register is float
1998-04-02 21:02:38 +00:00
Andrew Cagney
69d5a56645 Re-do load/store operations so that they work for both 32 and 64 bit
ISAs.
Enable tx39 as igen again.
1998-04-02 19:35:39 +00:00
Andrew Cagney
725fc5d927 For mips get_mem_size call. Force the return of a 32 bit value
regardless of the target's word bitsize.
1998-04-02 03:27:24 +00:00
Ron Unrau
2151467d63 sky-vu.[ch]: prototype decls, cast floats to ints before register transfer
interp.c: integrate VU register read/writes
sim-main.h : track tm-txvu.h
1998-04-01 17:31:24 +00:00
Frank Ch. Eigler
6b0c51c929 * You bop one on the head ... another one appears.
Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
1998-04-01 13:19:07 +00:00
Andrew Cagney
e1fe7a7966 * configure.in (SIM_AC_OPTION_WARNINGS): Add.
configure: Re-generate.
1998-04-01 02:56:05 +00:00
James Lemke
1ff39ecb10 * sky-dma.c: Clarify text in warning msg.
* interp.c: Add global option "float-type".
	* sky-vu.h: Add SIM_DESC sd; to VectorUnitState for accessing
	global options.
1998-03-31 21:46:31 +00:00
Frank Ch. Eigler
6ed00b0607 * Continuing sky R5900 / COP2 work. Added extra sanitize tags to hide
128-bit MIPS part.

[ChangeLog]

Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (decode_coproc): Continuing COP2 work.
  	(cop_[ls]q): Hide 128-bit COP2 more.

	* sim-main.h (COP_[LS]Q): Hide 128-bit COP2 more.

[ChangeLog.sky]

Mon Mar 30 18:44:15 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-libvpe.c: Code too wide - ran indent on SCEI code.

	* sky-vu.h (vu0_busy*, vu0_macro*): New entry points for COP2
 	interface.

	* sky-vu.c (vu0_busy*, vu0_macro*): Stub functions for above.
1998-03-30 23:56:52 +00:00
Gavin Romig-Koch
34f51d8723 * configure.in (mipstx39*-*-*): Use gencode simulator rather
than igen one.
	* configure : Rebuild.
1998-03-30 19:54:15 +00:00
Andrew Cagney
a1e4dc0db4 * run.c (main): Handle all alternatives of enum sim_stop.
(main): Delete unused `asection *s'.
1998-03-30 13:30:10 +00:00
Frank Ch. Eigler
7dd4a46650 * Oops, added #ifdef TARGET_SKY around R5900 COP2 implementation skeleton. 1998-03-29 22:53:31 +00:00
Frank Ch. Eigler
1d33e94615 * Updated test cases to confirm PKE behavior according to new SCEI specs. 1998-03-28 00:36:59 +00:00
Frank Ch. Eigler
b59e0b6815 * Modified sky PKE behavior according to new SCEI specs. 1998-03-28 00:35:43 +00:00
Frank Ch. Eigler
15232df4a3 * Inserted skeleton of R5900 COP2 simulation. Merged old vu[01].[ch] code
into single PKE-style vu.[ch].


[ChangeLog]

Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>

start-sanitize-sky
	* Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.

	* interp.c (sim_{load,store}_register): Use new vu[01]_device
 	static to access VU registers.
	(decode_coproc): Added skeleton of sky COP2 (VU) instruction
 	decoding.  Work in progress.

	* mips.igen (LDCzz, SDCzz): Removed *5900 case for this
 	overlapping/redundant bit pattern.
	(LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
	progress.

	* sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
 	status register.

end-sanitize-sky

	* interp.c (cop_lq, cop_sq): New functions for future 128-bit
 	access to coprocessor registers.

	* sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.

[ChangeLog.sky]

	* sky-engine.c (engine_run): Adapted from vu[01] -> vu merge.

	* sky-hardware.c (register_devices): Ditto

	* sky-pke.c (pke_fifo_*): Made these functions private again, now
 	that the GPUIF code does not use them.

	* sky-pke.h (pke_fifo_*): Removed newly private declarations.

	* sky-vu.c (*): Major rework: merge of old sky-vu0.c and
 	sky-vu1.c.  Management of two VU devices parallels two PKEs.
	Work in progress.

	* sky-vu.h (*): Other half of merge.
	(vu_device): New struct, parallel to pke_device.
1998-03-27 22:00:56 +00:00
Patrick Macdonald
76969284c3 sky-gs.c: initial drop of GS control registers (outstanding questions)
sky-gs.h: initial drop of GS control registers
Makefile.in: added sky-gs.o to sanitized list
sky-gpuif.c (gif_io_write_buffer): correct memset length error, renamed
trace file for gif
1998-03-27 18:36:33 +00:00
Ron Unrau
d44859a2d8 * sky-vu.c: new file to read/write VU registers
* Makefile.in .Sanitize: add sky-vu.c
	* sky-vu.h: define registers as enum, export read/write routines
        * sky-vu[01].[ch]: use register read/write routines in sky-vu.c
        * interp.c: use register read/write routines in sky-vu.c
1998-03-27 14:44:39 +00:00
Andrew Cagney
d8f5304972 Do top level sim-hw module for device tree.
Add to aclocal.m4, update all configure files.
1998-03-27 11:42:16 +00:00
Andrew Cagney
bd85beb90c Clean up m32rx sanitization 1998-03-27 11:33:16 +00:00
Andrew Cagney
82ea14fd9d Define CPU_INDEX. Initialize.
For mips_options, iterate over MAX_NR_PROCESSORS when setting options.
1998-03-27 04:25:45 +00:00
Andrew Cagney
6d133cc9df Add sanitize-am30 markers. Keep details of AM30 implementation of
mn10300 out of the public eye.
Do something with top-level cgen directory.
1998-03-27 03:10:53 +00:00
Andrew Cagney
1b756ba6d5 * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of succeeding
interrupts, clear pending_handler when the handler isn't re-scheduled.
1998-03-26 14:00:18 +00:00
Stu Grossman
abf6ba256a * Makefile.in (tmp-igen): Prefix all usage of move-if-change
script with $(SHELL) to make NT native builds happy.
	* configure:  Regenerate because of change to ../common/aclocal.m4.
1998-03-26 10:18:35 +00:00
Andrew Cagney
51ccd82f7f * configure.in: Make --enable-sim-common the default.
* configure: Re-generate.
* sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction
address into Sate.regs[REG_PC] instead of common struct.
1998-03-26 01:13:38 +00:00
Andrew Cagney
98f1f62cb4 * dv-pal.c (enum hw_pal_address_mask): From Stu Grossman, was 0x2f
needs to be 0x3f.
1998-03-25 23:48:14 +00:00
Joyce Janczyn
d1607ed316 * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value. 1998-03-25 22:43:19 +00:00