sky-vu.[ch]: prototype decls, cast floats to ints before register transfer
interp.c: integrate VU register read/writes sim-main.h : track tm-txvu.h
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08eefd3ef1
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2151467d63
2 changed files with 152 additions and 54 deletions
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@ -73,12 +73,6 @@ code on the hardware.
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#include "sysdep.h"
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/* start-sanitize-sky */
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#ifdef TARGET_SKY
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#include "sky-vu.h"
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#endif
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/* end-sanitize-sky */
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#ifndef PARAMS
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#define PARAMS(x)
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#endif
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@ -310,15 +304,6 @@ static void device_init(SIM_DESC sd) {
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#endif
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}
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/* start-sanitize-sky */
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#ifdef TARGET_SKY
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static struct {
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short i[NUM_VU_INTEGER_REGS];
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int f[NUM_VU_REGS - NUM_VU_INTEGER_REGS];
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} vu_regs[2];
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#endif
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/* end-sanitize-sky */
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/*---------------------------------------------------------------------------*/
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/*-- GDB simulator interface ------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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@ -449,32 +434,11 @@ sim_open (kind, cb, abfd, argv)
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for( rn = 0; rn < NUM_VU_INTEGER_REGS; rn++ ) {
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cpu->register_widths[rn + NUM_R5900_REGS] = 16;
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cpu->register_widths[rn + NUM_R5900_REGS + NUM_VU_REGS] = 16;
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/* Hack for now - to test gdb interface */
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vu_regs[0].i[rn] = rn + 0x100;
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vu_regs[1].i[rn] = rn + 0x200;
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}
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for( rn = NUM_VU_INTEGER_REGS; rn < NUM_VU_REGS; rn++ ) {
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float f;
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int first_vec_reg = NUM_VU_INTEGER_REGS + 8;
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cpu->register_widths[rn + NUM_R5900_REGS] = 32;
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cpu->register_widths[rn + NUM_R5900_REGS + NUM_VU_REGS] = 32;
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/* Hack for now - to test gdb interface */
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if( rn < first_vec_reg ) {
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f = rn - NUM_VU_INTEGER_REGS + 100.0;
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vu_regs[0].f[rn-NUM_VU_INTEGER_REGS] = *((unsigned *) &f);
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f = rn - NUM_VU_INTEGER_REGS + 200.0;
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vu_regs[1].f[rn-NUM_VU_INTEGER_REGS] = *((unsigned *) &f);
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}
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else {
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f = (rn - first_vec_reg)/4 + (rn - first_vec_reg)%4 + 1000.0;
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vu_regs[0].f[rn-NUM_VU_INTEGER_REGS] = *((unsigned *) &f);
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f = (rn - first_vec_reg)/4 + (rn - first_vec_reg)%4 + 2000.0;
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vu_regs[1].f[rn-NUM_VU_INTEGER_REGS] = *((unsigned *) &f);
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}
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}
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#endif
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/* end-sanitize-sky */
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@ -704,18 +668,84 @@ sim_store_register (sd,rn,memory,length)
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rn = rn - NUM_R5900_REGS;
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if (rn < NUM_VU_INTEGER_REGS)
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size = write_vu_int_reg (& vu0_device.state->regs, rn, memory);
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size = write_vu_int_reg (&(vu0_device.state->regs), rn, memory);
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else if( rn < NUM_VU_REGS )
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vu_regs[0].f[rn - NUM_VU_INTEGER_REGS]
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= T2H_4( *(unsigned int *) memory );
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{
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if (rn >= FIRST_VEC_REG)
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{
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rn -= FIRST_VEC_REG;
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size = write_vu_vec_reg (&(vu0_device.state->regs), rn>>2, rn&3,
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memory);
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}
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else switch (rn - NUM_VU_INTEGER_REGS)
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{
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case 0:
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size = write_vu_special_reg (vu0_device.state, VU_REG_CIA,
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memory);
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break;
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case 1:
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size = write_vu_misc_reg (&(vu0_device.state->regs), VU_REG_MR,
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memory);
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break;
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case 2: /* VU0 has no P register */
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break;
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case 3:
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size = write_vu_misc_reg (&(vu0_device.state->regs), VU_REG_MI,
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memory);
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break;
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case 4:
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size = write_vu_misc_reg (&(vu0_device.state->regs), VU_REG_MQ,
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memory);
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break;
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default:
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size = write_vu_acc_reg (&(vu0_device.state->regs),
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rn - (NUM_VU_INTEGER_REGS + 5),
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memory);
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break;
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}
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}
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else {
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rn = rn - NUM_VU_REGS;
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if( rn < NUM_VU_INTEGER_REGS )
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size = write_vu_int_reg (& vu1_device.state->regs, rn, memory);
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size = write_vu_int_reg (&(vu1_device.state->regs), rn, memory);
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else if( rn < NUM_VU_REGS )
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vu_regs[1].f[rn - NUM_VU_INTEGER_REGS]
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= T2H_4( *(unsigned int *) memory );
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{
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if (rn >= FIRST_VEC_REG)
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{
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rn -= FIRST_VEC_REG;
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size = write_vu_vec_reg (&(vu1_device.state->regs),
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rn >> 2, rn & 3, memory);
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}
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else switch (rn - NUM_VU_INTEGER_REGS)
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{
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case 0:
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size = write_vu_special_reg (vu1_device.state, VU_REG_CIA,
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memory);
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break;
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case 1:
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size = write_vu_misc_reg (&(vu1_device.state->regs),
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VU_REG_MR, memory);
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break;
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case 2:
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size = write_vu_misc_reg (&(vu1_device.state->regs),
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VU_REG_MP, memory);
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break;
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case 3:
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size = write_vu_misc_reg (&(vu1_device.state->regs),
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VU_REG_MI, memory);
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break;
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case 4:
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size = write_vu_misc_reg (&(vu1_device.state->regs),
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VU_REG_MQ, memory);
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break;
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default:
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size = write_vu_acc_reg (&(vu1_device.state->regs),
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rn - (NUM_VU_INTEGER_REGS + 5),
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memory);
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break;
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}
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}
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else
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sim_io_eprintf( sd, "Invalid VU register (register store ignored)\n" );
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}
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@ -800,19 +830,86 @@ sim_fetch_register (sd,rn,memory,length)
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rn = rn - NUM_R5900_REGS;
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if (rn < NUM_VU_INTEGER_REGS)
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size = read_vu_int_reg (& vu0_device.state->regs, rn, memory);
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size = read_vu_int_reg (&(vu0_device.state->regs), rn, memory);
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else if (rn < NUM_VU_REGS)
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*((unsigned int *) memory)
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= H2T_4( vu_regs[0].f[rn - NUM_VU_INTEGER_REGS] );
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else
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{
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if (rn >= FIRST_VEC_REG)
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{
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rn -= FIRST_VEC_REG;
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size = read_vu_vec_reg (&(vu0_device.state->regs), rn>>2, rn & 3,
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memory);
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}
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else switch (rn - NUM_VU_INTEGER_REGS)
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{
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case 0:
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size = read_vu_special_reg (vu0_device.state, VU_REG_CIA,
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memory);
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break;
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case 1:
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size = read_vu_misc_reg (&(vu0_device.state->regs), VU_REG_MR,
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memory);
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break;
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case 2: /* VU0 has no P register */
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break;
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case 3:
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size = read_vu_misc_reg (&(vu0_device.state->regs), VU_REG_MI,
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memory);
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break;
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case 4:
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size = read_vu_misc_reg (&(vu0_device.state->regs), VU_REG_MQ,
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memory);
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break;
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default:
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size = read_vu_acc_reg (&(vu0_device.state->regs),
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rn - (NUM_VU_INTEGER_REGS + 5),
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memory);
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break;
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}
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}
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else
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{
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rn = rn - NUM_VU_REGS;
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if (rn < NUM_VU_INTEGER_REGS)
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size = read_vu_int_reg (& vu1_device.state->regs, rn, memory);
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size = read_vu_int_reg (&(vu1_device.state->regs), rn, memory);
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else if (rn < NUM_VU_REGS)
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(*(unsigned int *) memory)
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= H2T_4( vu_regs[1].f[rn - NUM_VU_INTEGER_REGS] );
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{
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if (rn >= FIRST_VEC_REG)
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{
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rn -= FIRST_VEC_REG;
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size = read_vu_vec_reg (&(vu1_device.state->regs),
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rn >> 2, rn & 3, memory);
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}
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else switch (rn - NUM_VU_INTEGER_REGS)
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{
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case 0:
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size = read_vu_special_reg (vu1_device.state, VU_REG_CIA,
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memory);
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break;
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case 1:
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size = read_vu_misc_reg (&(vu1_device.state->regs),
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VU_REG_MR, memory);
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break;
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case 2:
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size = read_vu_misc_reg (&(vu1_device.state->regs),
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VU_REG_MP, memory);
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break;
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case 3:
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size = read_vu_misc_reg (&(vu1_device.state->regs),
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VU_REG_MI, memory);
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break;
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case 4:
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size = read_vu_misc_reg (&(vu1_device.state->regs),
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VU_REG_MQ, memory);
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break;
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default:
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size = read_vu_acc_reg (&(vu1_device.state->regs),
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rn - (NUM_VU_INTEGER_REGS + 5),
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memory);
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break;
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}
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}
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else
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sim_io_eprintf( sd, "Invalid VU register (register fetch ignored)\n" );
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}
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@ -3609,7 +3706,7 @@ decode_coproc (SIM_DESC sd,
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/* compute VU register address */
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if(i_25_21 == 0x01) /* QMFC2 */
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vu_cr_addr = VU0_VF00 + (id * 16);
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vu_cr_addr = VU0_REGISTER_WINDOW_START + (id * 16);
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else /* CFC2 */
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vu_cr_addr = VU0_MST + (id * 16);
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@ -3647,7 +3744,7 @@ decode_coproc (SIM_DESC sd,
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/* compute VU register address */
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if(i_25_21 == 0x05) /* QMTC2 */
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vu_cr_addr = VU0_VF00 + (id * 16);
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vu_cr_addr = VU0_REGISTER_WINDOW_START + (id * 16);
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else /* CTC2 */
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vu_cr_addr = VU0_MST + (id * 16);
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@ -513,10 +513,11 @@ struct _sim_cpu {
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#ifndef TM_TXVU_H
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/* Number of machine registers */
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#define NUM_VU_REGS 153
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#define NUM_VU_INTEGER_REGS 17
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#define NUM_VU_REGS 153
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#define NUM_VU_INTEGER_REGS 16
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#define NUM_R5900_REGS 128
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#define FIRST_VEC_REG 25
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#define NUM_R5900_REGS 128
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#undef NUM_REGS
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#define NUM_REGS (NUM_R5900_REGS + 2*(NUM_VU_REGS))
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