Commit graph

7072 commits

Author SHA1 Message Date
Renlin Li
c7ad08e6e5 [AARCH64] Positively emit symbols for alignment
2015-05-05  Renlin Li  <renlin.li@arm.com>

  gas/
    * config/tc-aarch64.c (aarch64_init_frag): Always generate mapping symbols.

  gas/testsuite/
    * gas/aarch64/mapping_5.d: New.
    * gas/aarch64/mapping_5.s: New.
    * gas/aarch64/mapping_6.d: New.
    * gas/aarch64/mapping_6.s: New.
2015-05-05 17:48:18 +01:00
Nick Clifton
837a17b36c Add support to the MSP430 linker for the automatic placement of code and data into either low or high memory regions.
gas	* config/tc-msp430.c (MAX_OP_LEN): Increase to 4096.
	(msp430_make_init_symbols): New function.
	(msp430_section): Call it.
	(msp430_frob_section): Likewise.

ld	* emulparams/msp430elf.sh (TEMPLATE_NAME): Change to msp430.
	* scripttempl/msp430.sc (.text): Add .lower.text and .either.text.
	(.data): Add .lower.data and .either.data.
	(.bss): Add .lower.bss and .either.bss.
	(.rodata): Add .lower.rodata and .either.rodata.
	* emultempl/msp430.em: New file.  Implements a new orphan
	placement algorithm that divides sections between lower and upper
	memory regions.
	* Makefile.am (emsp430elf.c): Depend upon msp430.em.
	*emsp430X.c): Likewise.
	* Makefine.in: Regenerate.
2015-05-05 13:38:00 +01:00
Max Filippov
b76f99d702 xtensa: optimize trampolines relaxation
Currently every fixup in the current segment is checked when relaxing
trampoline frag. This is very expensive. Make a searchable array of
fixups pointing at potentially oversized jumps at the beginning of every
relaxation pass and only check subset of this cache in the reach of
single jump from the trampoline frag currently being relaxed.

Original profile:

% time    self  children    called     name
-----------------------------------------
        370.16  593.38 12283048/12283048     relax_segment
  98.4  370.16  593.38 12283048         xtensa_relax_frag
         58.91  269.26 2691463834/2699602236     xtensa_insnbuf_from_chars
         68.35   68.17 811266668/813338977     S_GET_VALUE
         36.85   29.51 2684369246/2685538060     xtensa_opcode_decode
         28.34    8.84 2684369246/2685538060     xtensa_format_get_slot
         12.39    5.94 2691463834/2699775044     xtensa_format_decode
          0.03    4.60 4101109/4101109     relax_frag_for_align
          0.18    1.76  994617/994617      relax_frag_immed
          0.07    0.09 24556277/24851220     new_logical_line
          0.06    0.00 12283048/14067410     as_where
          0.04    0.00 7094588/15460506     xtensa_format_num_slots
          0.00    0.00       1/712477      xtensa_insnbuf_alloc
-----------------------------------------

Same data, after optimization:

% time    self  children    called     name
-----------------------------------------
          0.51    7.47 12283048/12283048     relax_segment
  58.0    0.51    7.47 12283048         xtensa_relax_frag
          0.02    4.08 4101109/4101109     relax_frag_for_align
          0.18    1.39  994617/994617      relax_frag_immed
          0.01    0.98     555/555         xtensa_cache_relaxable_fixups
          0.21    0.25 7094588/16693271     xtensa_insnbuf_from_chars
          0.06    0.12 24556277/24851220     new_logical_line
          0.06    0.00 7094588/15460506     xtensa_format_num_slots
          0.02    0.04 7094588/16866079     xtensa_format_decode
          0.05    0.00 12283048/14067410     as_where
          0.00    0.00       1/712477      xtensa_insnbuf_alloc
          0.00    0.00   93808/93808       xtensa_find_first_cached_fixup
-----------------------------------------

2015-05-02  Max Filippov  <jcmvbkbc@gmail.com>
gas/
	* config/tc-xtensa.c (cached_fixupS, fixup_cacheS): New typedefs.
	(struct cached_fixup, struct fixup_cache): New structures.
	(fixup_order, xtensa_make_cached_fixup),
	(xtensa_realloc_fixup_cache, xtensa_cache_relaxable_fixups),
	(xtensa_find_first_cached_fixup, xtensa_delete_cached_fixup),
	(xtensa_add_cached_fixup): New functions.
	(xtensa_relax_frag): Cache fixups pointing at potentially
	oversized jumps at the beginning of every relaxation pass. Only
	check subset of this cache in the reach of single jump from the
	trampoline frag currently being relaxed.
2015-05-05 07:57:33 +03:00
DJ Delorie
d62de9aa69 Fix typos in previous patch.
* config/rl78-parse.y (MULU): Remove ISA_G14.
(MULH, DIVHU, DIVWU, MACHI, MACH): Update error strings.
2015-05-01 15:08:07 -04:00
H.J. Lu
00923338de Remove i386_elf_emit_arch_note
This x86 assembler patch:

https://sourceware.org/ml/binutils/2001-11/msg00344.html

generates a .note section for .arch directive so that GDB can tell which
architecture an i386 binary belongs:

https://sourceware.org/ml/binutils/2001-11/msg00271.html

However, x86 assembly code can have any instructions.  A .note section
doesn't help.  This patch removes it.

gas/

	* config/tc-i386.c (i386_elf_emit_arch_note): Removed.
	* config/tc-i386.h (md_end): Likewise.
	(i386_elf_emit_arch_note): Likewise.

gas/testsuite/

	* gas/i386/i386.exp: Run note.
	* gas/i386/note.d: New file.
	* gas/i386/note.s: Likewise.
2015-05-01 08:29:16 -07:00
H.J. Lu
b633b7258d Support ix86-*-elf*
bfd/

	* config.bfd: Support i[3-7]86-*-elf*.

gas/

	* configure.tgt: Support i386-*-elf*.
2015-05-01 05:02:30 -07:00
DJ Delorie
0952813b0b Make RL78 disassembler and simulator respect ISA for mul/div
[gas]
	* config/rl78-defs.h (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.
	* config/rl78-parse.y (ISA_G10): New.
	(ISA_G13): New.
	(ISA_G14): New.
	(MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them.
	* config/tc-rl78.c (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.

[gdb]
	* rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to
	rl78_decode_opcode

[include]
	* dis-asm.h (print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.
	* opcode/rl78.h (RL78_Dis_Isa): New.
	(rl78_decode_opcode): Add ISA parameter.

[opcodes]
	* disassemble.c (disassembler): Choose suitable disassembler based
	on E_ABI.
	* rl78-decode.opc (rl78_decode_opcode): Take ISA parameter.  Use
	it to decode mul/div insns.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c (print_insn_rl78): Rename to...
	(print_insn_rl78_common): ...this, take ISA parameter.
	(print_insn_rl78): New.
	(print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.

[sim]
	* rl78/cpu.c (g14_multiply): New.
	* rl78/cpu.h (g14_multiply): New.
	* rl78/load.c (rl78_load): Decode ISA completely.
	* rl78/main.c (main): Expand -M to include other ISAs.
	* rl78/rl78.c (decode_opcode): Decode based on ISA.
	* rl78/trace.c (rl78_disasm_fn): New.
	(sim_disasm_init): Reset it.
	(sim_disasm_one): Get correct disassembler for ISA.
2015-04-30 15:25:49 -04:00
H.J. Lu
b49f93f699 Use "else if" on cpu_arch_isa
* config/tc-i386.c (i386_target_format): Use "else if" on
	cpu_arch_isa.
2015-04-30 08:36:17 -07:00
Nick Clifton
8b2d793ce5 GAS ARM: Warn if the user creates a symbol with the same name as an instruction.
PR gas/18347
gas	* config/tc-arm.c (md_undefined_symbol): Issue a warning message
	(if enabled) when the user creates a symbol with the same name as
	an ARM instruction.
	(flag_warn_syms): New static variable.
	(arm_opts): Add mwarn-syms and mno-warn-syms.
	* doc/c-arm.texi (ARM Options): Document the -m[no-]warn-syms
	options.

tests	* gas/arm/pr18347.s: New file: Test case.
	* gas/arm/pr18347.l: New file: Expected assembler output.
	* gas/arm/pr18347.d: New file: Test driver.
2015-04-30 11:17:55 +01:00
Nick Clifton
7ce98c164e Adds documentation of GAS's .zero directive.
PR gas/18353
	* doc/as.texinfo (Zero): Add documentation of the .zero pseudo-op.
2015-04-30 10:13:53 +01:00
Nick Clifton
99b2a2dd3c Fix an internal error in GAS when assembling a bogus piece of source code.
gas	PR 18256
	* config/tc-arm.c (encode_arm_cp_address): Issue an error message
	if the operand is neither a register nor a vector.

tests	* gas/arm/pr18256.s: New file: Test case.
	* gas/arm/pr18256.l: New file: Expected assembler output.
	* gas/arm/pr18256.d: New file: Test driver.
2015-04-29 17:09:05 +01:00
Nick Clifton
5d239759c0 Updates the description of GAS's .set directive, to note that for some targets a symbolic value can only be set once.
* doc/as.texinfo (Set): Note that a symbol cannot be set multiple
	times if the expression is not constant and the target uses linker
	relaxation.
2015-04-29 11:10:45 +01:00
Renlin Li
f9c1b181a7 [ARM]Positively emit symbols for alignment
2015-04-28  Renlin Li  <renlin.li@arm.com>
  gas/
    * config/tc-arm.c (arm_init_frag): Always emit mapping symbols.

  gas/testsuite/
    * gas/arm/thumb2_vpool_be.d: Adjust the desired output.
    * gas/arm/vldconst_be.d: Ditto.
2015-04-28 17:10:26 +01:00
Nick Clifton
da7119c99c Fix compile time warnings about a local variable being used before it is set.
PR 18313
	* cond.c (s_if): Stop compile time warning about stopc being used
	before it is set.
	(s_ifc): Likewise.
2015-04-28 11:22:57 +01:00
Peter Bergner
4fff86c517 opcodes/
* ppc-opc.c (DCBT_EO): New define.
	(powerpc_opcodes) <lbarx>: Enable for POWER8 and later.
	<lharx>: Likewise.
	<stbcx.>: Likewise.
	<sthcx.>: Likewise.
	<waitrsv>: Do not enable for POWER7 and later.
	<waitimpl>: Likewise.
	<dcbt>: Default to the two operand form of the instruction for all
	"old" cpus.  For "new" cpus, use the operand ordering that matches
	whether the cpu is server or embedded.
	<dcbtst>: Likewise.

gas/testsuite/

	* gas/ppc/a2.s: Fixup test case due to dcbt/dcbtst embedded operand
	ordering change.
	* gas/ppc/a2.d: Likewise.
	* gas/ppc/476.d: Likewise.
	* gas/ppc/booke.s: Remove invalid 3 operand dcbt tests.
	* gas/ppc/booke.d: Likewise.
	* gas/ppc/power7.s: Remove lbarx, lharx, stbcx., sthcx., waitrsv
	and waitimpl tests.
	* gas/ppc/power7.d: Likewise.
2015-04-27 11:06:54 -05:00
Renlin Li
eb9d6cc91a [AArch64] Don't try to align insn in non-executale section
2015-04-27  Renlin Li  <renlin.li@arm.com>

  gas/
    * config/tc-aarch64.c (s_aarch64_inst): Don't align code for non-text
    section.
    (md_assemble): Likewise, move the align code outside the loop.
2015-04-27 11:36:12 +01:00
Andreas Krebbel
643f7afb0d S/390: z13 use GNU attribute to indicate vector ABI
bfd/
	* elf-s390-common.c (elf_s390_merge_obj_attributes): New function.
	* elf32-s390.c (elf32_s390_merge_private_bfd_data): Call
	elf_s390_merge_obj_attributes.
	* elf64-s390.c (elf64_s390_merge_private_bfd_data): New function.

binutils/
	* readelf.c (display_s390_gnu_attribute): New function.
	(process_s390_specific): New function.
	(process_arch_specific): Call process_s390_specific.

gas/
	* doc/as.texinfo: Document Tag_GNU_S390_ABI_Vector.

include/elf/
	* s390.h: Define Tag_GNU_S390_ABI_Vector.
2015-04-27 10:32:23 +02:00
Andreas Krebbel
3b78cfe103 S/390: Fixes for z13 instructions.
opcodes/
	* s390-opc.c: New instruction type VV0UU2.
	* s390-opc.txt: Fix instruction types for VFCE, VLDE, VFSQ, WFK,
	and WFC.

gas/testsuite/
	* gas/s390/zarch-z13.d: Fix tests for VFCE, VLDE, VFSQ, WFK, and
	WFC.
  	* gas/s390/zarch-z13.s: Likewise.
2015-04-27 10:29:16 +02:00
Jim Wilson
faade85139 gas thunderx support
gas/
* config/tc-aarch64.c (aarch64_cpus): Add CRC and CRYPTO features
for thunderx.
2015-04-24 13:44:20 -07:00
Richard Earnshaw
7a5c933c7c [ARM]: Don't tail-pad over-aligned functions to the alignment boundary.
2015-04/24  Richard Earnshaw  <rearnsha@arm.com>

	gas/
	* config/tc-arm.h (arm_min): New function.
	(SUB_SEGMENT_ALIGN): Define.

	gas/testsuite/
	* gas/arm/align64.d: Delete trailing padding NOPs.

	ld/testsuite/
	* ld-arm/armthumb-lib.d: Regenerate expected output.
	* ld-arm/armthumb-lib.d: Likewise.
	* ld-arm/armthumb-lib.sym: Likewise.
	* ld-arm/cortex-a8-fix-b-rel-arm.d: Likewise.
	* ld-arm/cortex-a8-fix-b-rel-thumb.d: Likewise.
	* ld-arm/cortex-a8-fix-b.d: Likewise.
	* ld-arm/cortex-a8-fix-bcc-rel-thumb.d: Likewise.
	* ld-arm/cortex-a8-fix-bcc.d: Likewise.
	* ld-arm/cortex-a8-fix-bl-rel-arm.d: Likewise.
	* ld-arm/cortex-a8-fix-bl-rel-plt.d: Likewise.
	* ld-arm/cortex-a8-fix-bl-rel-thumb.d: Likewise.
	* ld-arm/cortex-a8-fix-bl.d: Likewise.
	* ld-arm/cortex-a8-fix-blx-bcond.d: Likewise.
	* ld-arm/cortex-a8-fix-blx-rel-arm.d: Likewise.
	* ld-arm/cortex-a8-fix-blx-rel-thumb.d: Likewise.
	* ld-arm/cortex-a8-fix-blx.d: Likewise.
	* ld-arm/cortex-a8-fix-hdr.d: Likewise.
	* ld-arm/farcall-mixed-app-v5.d: Likewise.
	* ld-arm/farcall-mixed-app.d: Likewise.
	* ld-arm/farcall-mixed-lib-v4t.d: Likewise.
	* ld-arm/farcall-mixed-lib.d: Likewise.
	* ld-arm/mixed-app-v5.d: Likewise.
	* ld-arm/mixed-app.d: Likewise.
	* ld-arm/mixed-lib.d: Likewise.
2015-04-24 15:54:39 +01:00
Matthew Fortune
ece794d9c4 Improve warning messages for la/dla
gas/

	* config/tc-mips.c (macro): State the recommended way of creating
	32-bit or 64-bit addresses.

gas/testsuite/

	* gas/mips/dla-warn.l: New file.
	* gas/mips/dla-warn.s: New file.
	* gas/mips/la-warn.l: New file.
	* gas/mips/la-warn.s: New file.
	* gas/mips/mips.exp: Run new tests.
2015-04-23 22:23:17 +01:00
Matthew Fortune
2ca4ff6d5b Fix r6-branch-constraints test when run with n64 as default ABI
gas/testsuite/

	* gas/mips/mips.exp: Require o32 for r6-branch-constraints.
2015-04-23 21:03:32 +01:00
Jan Beulich
04d824a468 x86: disambiguate disassembly of certain AVX512 insns
Certain conversion operations as well as vfpclassp{d,s} are ambiguous
when the input operand is in memory and no broadcast is being used.
While in Intel mode this gets resolved by printing suitable operand
size modifiers, AT&T mode need mnemonic suffixes to be added.

gas/testsuite/
2015-04-23  Jan Beulich  <jbeulich@suse.com>

	* gas/i386/avx512dq.d: Add 'z' suffix to vfpclassp{d,s} non-
	register, non-broadcast cases.
	* gas/i386/x86-64-avx512dq.d: Likewise.
	* gas/i386/avx512dq_vl.d: Add 'x' and 'y' suffixes to
	vcvt{,u}qq2ps and vfpclassp{d,s} non-register, non-broadcast
	cases.
	* gas/i386/x86-64-avx512dq_vl.d: Likewise.
	* gas/i386/avx512f_vl.d: Add 'x' and 'y' suffixes to
	vcvt{,t}pd2{,u}dq and vcvtpd2ps non-register, non-broadcast
	cases.
	* gas/i386/x86-64-avx512f_vl.d: Likewise.

opcodes/
2015-04-23  Jan Beulich  <jbeulich@suse.com>

	* i386-dis.c (putop): Extend "XY" handling to AVX512. Handle "XZ".
	* i386-dis-evex.h.c (vcvtpd2ps, vcvtqq2ps, vcvttpd2udq,
	vcvtpd2udq, vcvtuqq2ps, vcvttpd2dq, vcvtpd2dq): Add %XY.
	(vfpclasspd, vfpclassps): Add %XZ.
2015-04-23 16:42:40 +02:00
Jan Beulich
af508cb92f x86: don't require operand size specification for AVX512 broadcasts
Certain conversion operations as well as vfpclassp{d,s} are ambiguous
when the input operand is in memory. That ambiguity, however, doesn't
apply when using broadcasts (the destination operand size can be
induced from the broadcast specifier).

gas/
2015-04-23  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (match_mem_size): Also allow no size
	specification when broadcasting.

gas/testsuite/
2015-04-23  Jan Beulich  <jbeulich@suse.com>

	* gas/i386/avx512dq.s: Drop 'z' suffix from vfpclassp{d,s} in
	some AT&T and all Intel cases.
	* gas/i386/x86-64-avx512dq.s: Likewise.
	* gas/i386/avx512dq_vl.s: Drop 'x' and 'y' suffixes from
	vcvt{,u}qq2ps and vfpclassp{d,s} in some AT&T and all Intel
	cases.
	* gas/i386/x86-64-avx512dq_vl.s: Likewise.
	* gas/i386/avx512f_vl.s: Drop 'x' and 'y' suffixes from
	vcvt{,t}pd2{,u}dq and vcvtpd2ps in some AT&T and all Intel
	cases.
	* gas/i386/x86-64-avx512f_vl.s: Likewise.
2015-04-23 16:41:21 +02:00
H.J. Lu
be59ad3d96 Don't hardcode offset of .shstrtab section
There is no requirement on placement of section name section, .shstrtab.
This patch removes hardcoded offsets of .shstrtab sections.

binutils/testsuite/

	* binutils-all/i386/compressed-1b.d: Don't hardcode offset of
	.shstrtab section.
	* binutils-all/i386/compressed-1c.d: Likewise.
	* binutils-all/readelf.s-64: Likewise.
	* binutils-all/x86-64/compressed-1b.d: Likewise.
	* binutils-all/x86-64/compressed-1c.d: Likewise.

gas/testsuite/

	* gas/i386/ilp32/x86-64-unwind.d: Don't hardcode offset of
	.shstrtab section.
	* gas/i386/x86-64-unwind.d: Likewise.
	* gas/ia64/alias-ilp32.d: Likewise.
	* gas/ia64/alias.d: Likewise.
	* gas/ia64/group-1.d: Likewise.
	* gas/ia64/group-2.d: Likewise.
	* gas/ia64/secname-ilp32.d: Likewise.
	* gas/ia64/secname.d: Likewise.
	* gas/ia64/unwind-ilp32.d: Likewise.
	* gas/ia64/unwind.d: Likewise.
	* gas/mmix/bspec-1.d: Likewise.
	* gas/mmix/byte-1.d: Likewise.
	* gas/mmix/loc-1.d: Likewise.
	* gas/mmix/loc-2.d: Likewise.
	* gas/mmix/loc-3.d: Likewise.
	* gas/mmix/loc-4.d: Likewise.
	* gas/mmix/loc-5.d: Likewise.
	* gas/tic6x/scomm-directive-4.d: Likewise.

ld/testsuite/

	* ld-mmix/bspec1.d: Don't hardcode offset of .shstrtab section.
	* ld-mmix/bspec2.d: Likewise.
	* ld-mmix/local1.d: Likewise.
	* ld-mmix/local3.d: Likewise.
	* ld-mmix/local5.d: Likewise.
	* ld-mmix/local7.d: Likewise.
	* ld-mmix/undef-3.d: Likewise.
	* ld-sh/sh64/crangerel1.rd: Likewise.
	* ld-sh/sh64/crangerel2.rd: Likewise.
	* ld-tic6x/common.d: Likewise.
	* ld-tic6x/shlib-1.rd: Likewise.
	* ld-tic6x/shlib-1b.rd: Likewise.
	* ld-tic6x/shlib-1r.rd: Likewise.
	* ld-tic6x/shlib-1rb.rd: Likewise.
	* ld-tic6x/shlib-app-1.rd: Likewise.
	* ld-tic6x/shlib-app-1b.rd: Likewise.
	* ld-tic6x/shlib-app-1r.rd: Likewise.
	* ld-tic6x/shlib-app-1rb.rd: Likewise.
	* ld-tic6x/shlib-noindex.rd: Likewise.
	* ld-tic6x/static-app-1.rd: Likewise.
	* ld-tic6x/static-app-1b.rd: Likewise.
	* ld-tic6x/static-app-1r.rd: Likewise.
	* ld-tic6x/static-app-1rb.rd: Likewise.
	* ld-x86-64/ilp32-4.d: Likewise.
	* ld-x86-64/split-by-file-nacl.rd: Likewise.
	* ld-x86-64/split-by-file.rd: Likewise.
2015-04-20 09:55:47 -07:00
H.J. Lu
d3b47e2bd4 Silence texinfo 5.1 warnings
This patch silences texinfo 5.1 warnings by using @subsection and
sorting entries in Machine Dependencies menu.

	* doc/as.texinfo (Bundle directives): Shorten menu entry and
	use @subsection.
	(CFI directives): Use @subsection.
	(SH-Dependent, SH64-Dependent): Moved after SCORE-Dependent.
	* doc/c-i386.texi (i386-Mnemonics): Use @subsection.
2015-04-20 08:08:42 -07:00
Senthil Kumar Selvaraj
ef7a936968 Fix avr compiler warning
declaration of "link" shadows a global declaration

	* config/tc-avr.c (create_record_for_frag): Rename link to
	prop_rec_link.
2015-04-17 21:01:28 +09:30
H.J. Lu
f24bcbaa5a Handle invalid prefixes for rdrand and rdseed
This patch puts rdrand and rdseed in prefix_table so that invalid
prefixes for rdrand and rdseed are handled properly.

gas/testsuite/

	PR binutils/17898
	* gas/i386/prefix.s: Add rdrand/rdseed prefix tests.
	* gas/i386/prefix.d: Updated.

opcodes/

	PR binutils/17898
	* i386-dis.c (PREFIX_0FC7_REG_6): Renamed to ...
	(PREFIX_MOD_0_0FC7_REG_6): This.
	(PREFIX_MOD_3_0FC7_REG_6): New.
	(PREFIX_MOD_3_0FC7_REG_7): Likewise.
	(prefix_table): Replace PREFIX_0FC7_REG_6 with
	PREFIX_MOD_0_0FC7_REG_6.  Add PREFIX_MOD_3_0FC7_REG_6 and
	PREFIX_MOD_3_0FC7_REG_7.
	(mod_table): Replace PREFIX_0FC7_REG_6 with
	PREFIX_MOD_0_0FC7_REG_6.  Use PREFIX_MOD_3_0FC7_REG_6 and
	PREFIX_MOD_3_0FC7_REG_7.
2015-04-15 09:57:55 -07:00
Renlin Li
f0fba320ab [ARM] Disassembles SSAT and SSAT16 instructions incorrectly for Thumb-2
2015-04-15  Renlin Li  <renlin.li@arm.com>
opcodes/:
    * arm-dis.c (thumb32_opcodes): Define 'D' format control code,
    use it for ssat and ssat16.
    (print_insn_thumb32): Add handle case for 'D' control code.

gas/testsuite/:
    * gas/arm/arch7em.d: Adjust required ssat and ssat16 immediate field.
    * gas/arm/thumb32.d: Likewise.
2015-04-15 17:44:03 +01:00
H.J. Lu
ea556d2590 Mention --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]
binutils/

	* NEWS: Mention
	--compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi].

gas/

	* NEWS: Mention
	--compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi].

ld/

	* NEWS: Mention
	--compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi].
2015-04-15 05:26:41 -07:00
H.J. Lu
0ce398f106 Add --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]
This patch adds --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]
to ld for ELF targets to support generating compressed DWARF debug
sections.  We always generate .zdebug_* section since section names have
been finalized and they can't be changed easily when compression is
being performed.

bfd/

	* bfd-in.h (compressed_debug_section_type): New.
	* compress.c (bfd_compress_section_contents): Add an argument
	for linker write compression and always generate .zdebug_*
	section when linking.
	(bfd_init_section_compress_status): Pass FALSE to
	bfd_compress_section_contents.
	(bfd_compress_section): New function.
	* elf.c (elf_fake_sections): For linking, set SEC_ELF_COMPRESS
	on DWARF debug sections if COMPRESS_DEBUG is set and rename
	section if COMPRESS_DEBUG_GABI_ZLIB isn't set.
	(assign_file_positions_for_non_load_sections): Set sh_offset
	to -1 if SEC_ELF_COMPRESS is set.
	(assign_file_positions_except_relocs): Likwise.
	(_bfd_elf_assign_file_positions_for_relocs): Renamed to ...
	(_bfd_elf_assign_file_positions_for_non_load): This.  Change
	return time to bfd_boolean.  Compress the section if
	SEC_ELF_COMPRESS is set.
	(_bfd_elf_write_object_contents): Updated.
	(_bfd_elf_set_section_contents): Write section contents to
	the buffer if SEC_ELF_COMPRESS is set.
	* merge.c: Include "elf-bfd.h".
	(sec_merge_emit): Add arguments for contents and offset.  Write
	to contents with offset if contents isn't NULL.
	(_bfd_write_merged_section): Write section contents to the
	buffer if SEC_ELF_COMPRESS is set.  Pass contents and
	output_offset to sec_merge_emit.
	* elflink.c (bfd_elf_final_link): Allocate the buffer for
	output section contents if SEC_ELF_COMPRESS is set.
	* section.c (SEC_ELF_COMPRESS): New.
	* bfd-in2.h: Regenerated.

gas/

	* as.h (compressed_debug_section_type): Removed.

include/

	* bfdlink.h (bfd_link_info): Add compress_debug.

ld/

	* ld.texinfo: Document --compress-debug-sections=.
	* ldmain.c (main): Set BFD_COMPRESS on output_bfd if
	COMPRESS_DEBUG is set.  Set BFD_COMPRESS_GABI on output_bfd
	for COMPRESS_DEBUG_GABI_ZLIB.
	* lexsup.c (elf_static_list_options): Add
	--compress-debug-sections=.
	* emultempl/elf32.em (OPTION_COMPRESS_DEBUG): New.
	(xtra_long): Add "compress-debug-sections".
	(gld${EMULATION_NAME}_handle_option): Handle
	OPTION_COMPRESS_DEBUG.

ld/testsuite/

	* ld-elf/compress.exp (build_tests): Add tests for
	--compress-debug-sections=.
	(run_tests): Likewise.
	Add additonal tests for --compress-debug-sections=.
	* ld-elf/gabiend.rt: New file.
	* ld-elf/gabinormal.rt: Likewise.
	* ld-elf/gnubegin.rS: Likewise.
	* ld-elf/gnunormal.rS: Likewise.
	* ld-elf/zlibbegin.rS: Likewise.
	* ld-elf/zlibnormal.rS: Likewise.
2015-04-14 22:01:38 -07:00
Nick Clifton
6ff71e7681 Adds support to the RL78 port for linker relaxation affecting .debug sections.
gas	* config/tc-rl78.h (TC_LINKRELAX_FIXUP): Define.
	(TC_FORCE_RELOCATION_SUB_SAME): Define.
	(DWARF2_USE_FIXED_ADVANCE_PC): Define.

	* gas/lns/lns.exp: Add RL78 to list of targets using
	DW_LNS_fixed_advance_pc.

bfd	* elf32-rl78.c (RL78_OP_REL): New macro.
	(rl78_elf_howto_table): Use it for complex relocs.
	(get_symbol_value): Handle the cases when the info or status
	arguments are NULL.
	(get_romstart): Cache the status returned by get_symbol_value.
	(get_ramstart): Likewise.
	(RL78_STACK_PUSH): Generate an error message if the stack
	overflows.
	(RL78_STACK_POP): Likewise for underflows.
	(rl78_compute_complex_reloc): New function.  Contains the basic
	processing code for all RL78 complex relocs.
	(rl78_special_reloc): New function.  Provides special reloc
	handling for complex relocs.
	(rl78_elf_relocate_section): Use rl78_compute_complex_reloc.
	(rl78_offset_for_reloc): Likewise.

binutils* readelf.c (target_specific_reloc_handling): Add code to handle
	RL78 complex relocs.
2015-04-14 16:23:33 +01:00
Nick Clifton
080bb7bbe9 Add documentation about the interation of the ARM assembler's -EB option and the linker's --be8 option.
PR binutils/18198
	* ld.texinfo (--be8): Add a note about the interaction of this
	option with the assembler's -EB option.

	* doc/c-arm.texi (ARM Options): Add a note about the interaction of
	the -EB option with the linker's --be8 option.
2015-04-10 08:26:07 +01:00
Hans-Peter Nilsson
4b5708f5d9 doc/c-rx.texi: Fix markup typos in last change. 2015-04-09 21:09:02 +02:00
Nick Clifton
3525236c57 Add support to the RX toolchain to restrict the use of string instructions.
bfd	* elf32-rx.c (describe_flags): Report the settings of the string
	insn using bits.
	(rx_elf_merge_private_bfd_data): Handle merging of the string insn
	using bits.

bin	* readelf.c (get_machine_flags): Report the setting of the string
	insn using bits.

gas	* config/tc-rx.c (enum options): Add OPTION_DISALLOW_STRING_INSNS.
	(md_longopts): Add -mno-allow-string-insns.
	(md_parse_option): Handle -mno-allow-string-insns.
	(md_show_usage): Mention -mno-allow-string-insns.
	(rx_note_string_insn_use): New function.  Produces an error
	message if a string insn is used when it is not allowed.
	* config/rx-parse.y (SCMPU): Call rx_note_string_insn_use.
	(SMOVU, SMOVB, SMOVF, SUNTIL, SWHILE, RMPA): Likewise.
	* config/rx-defs.h (rx_note_string_insn_use): Prototype.
	* doc/c-rx.texi: Document -mno-allow-string-insns.

elf	* rx.h (E_FLAG_RX_SINSNS_SET): New bit in e_flags field.
	(E_FLAG_RX_SINSNS_YES): Likewise.
	(E_FLAG_RX_SINSNS_MASK): New define.
2015-04-09 12:48:37 +01:00
H.J. Lu
151411f8af Add SHF_COMPRESSED support to gas and objcopy
This patch adds --compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}
options to gas and objcopy for ELF files. They control how DWARF debug
sections are compressed.  --compress-debug-sections=none is equivalent to
--nocompress-debug-sections.  --compress-debug-sections=zlib and
--compress-debug-sections=zlib-gnu are equivalent to
--compress-debug-sections.  --compress-debug-sections=zlib-gabi compresses
DWARF debug sections with SHF_COMPRESSED from the ELF ABI.  No linker
changes are required to support SHF_COMPRESSED.

bfd/

	* archive.c (_bfd_get_elt_at_filepos): Also copy BFD_COMPRESS_GABI
	bit.
	* bfd.c (bfd::flags): Increase size to 18 bits.
	(BFD_COMPRESS_GABI): New.
	(BFD_FLAGS_SAVED): Add BFD_COMPRESS_GABI.
	(BFD_FLAGS_FOR_BFD_USE_MASK): Likewise.
	(bfd_update_compression_header): New fuction.
	(bfd_check_compression_header): Likewise.
	(bfd_get_compression_header_size): Likewise.
	(bfd_is_section_compressed_with_header): Likewise.
	* compress.c (MAX_COMPRESSION_HEADER_SIZE): New.
	(bfd_compress_section_contents): Return the uncompressed size if
	the full section contents is compressed successfully.  Support
	converting from/to .zdebug* sections.
	(bfd_get_full_section_contents): Call
	bfd_get_compression_header_size to get compression header size.
	(bfd_is_section_compressed): Renamed to ...
	(bfd_is_section_compressed_with_header): This.  Add a pointer
	argument to return compression header size.
	(bfd_is_section_compressed): Use it.
	(bfd_init_section_decompress_status): Call
	bfd_get_compression_header_size to get compression header size.
	Return FALSE if uncompressed section size is 0.
	* elf.c (_bfd_elf_make_section_from_shdr): Support converting
	from/to .zdebug* sections.
	* bfd-in2.h: Regenerated.

binutils/

	* objcopy.c (do_debug_sections): Add compress_zlib,
	compress_gnu_zlib and compress_gabi_zlib.
	(copy_options): Use optional_argument on compress-debug-sections.
	(copy_usage): Update --compress-debug-sections.
	(copy_file): Handle compress_zlib, compress_gnu_zlib and
	compress_gabi_zlib.
	(copy_main): Handle
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.
	* doc/binutils.texi: Document
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.

binutils/testsuite/

	* compress.exp: Add tests for
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.
	* binutils-all/dw2-3.rS: New file.
	* binutils-all/dw2-3.rt: Likewise.
	* binutils-all/libdw2-compressedgabi.out: Likewise.

gas/

	* as.c (show_usage): Update --compress-debug-sections.
	(std_longopts): Use optional_argument on compress-debug-sections.
	(parse_args): Handle
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.
	* as.h (compressed_debug_section_type): New.
	(flag_compress_debug): Change type to compressed_debug_section_type.
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.
	* write.c (compress_debug): Set BFD_COMPRESS_GABI for
	--compress-debug-sections=zlib-gabi.  Call
	bfd_get_compression_header_size to get compression header size.
	Don't rename section name for --compress-debug-sections=zlib-gabi.
	* config/tc-i386.c (compressed_debug_section_type): Set to
	COMPRESS_DEBUG_ZLIB.
	* doc/as.texinfo: Document
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.

gas/testsuite/

	* gas/i386/dw2-compressed-1.d: New file.
	* gas/i386/dw2-compressed-2.d: Likewise.
	* gas/i386/dw2-compressed-3.d: Likewise.
	* gas/i386/x86-64-dw2-compressed-2.d: Likewise.
	* gas/i386/i386.exp: Run dw2-compressed-2, dw2-compressed-1,
	dw2-compressed-3 and x86-64-dw2-compressed-2.

ld/testsuite/

	* ld-elf/compress.exp: Add a test for
	--compress-debug-sections=zlib-gabi.
	(build_tests): Add 2 tests for --compress-debug-sections=zlib-gabi.
	(run_tests): Likewise.
	Verify linker output with zlib-gabi compressed debug input.
	* ld-elf/compressed1a.d: New file.
	* ld-elf/compressed1b.d: Likewise.
	* ld-elf/compressed1c.d: Likewise.
2015-04-08 07:54:09 -07:00
Renlin Li
a97902de74 [AArch64] use subseg_text_p to check .text
2015-04-07  Renlin Li  <renlin.li@arm.com>

gas/
  * config/tc-aarch64.c (mapping_state): Use subseg_text_p.
  (s_aarch64_inst): Likewise.
  (md_assemble): Likewise.
2015-04-07 18:10:33 +01:00
H.J. Lu
dae148f3b9 Remove is_zlib_supported
Since zlib is always supported, there is no need for is_zlib_supported.

binutils/testsuite/

	* binutils-all/compress.exp: Remove is_zlib_supported check.
	* binutils-all/objdump.exp: Likewise.
	* binutils-all/readelf.exp (readelf_compressed_wa_test): Likewise.
	* lib/utils-lib.exp (run_dump_test): Likewise.
	* lib/binutils-common.exp (is_zlib_supported): Removed.

gas/testsuite/

	* lib/gas-defs.exp (run_dump_test): Remove is_zlib_supported check.

ld/testsuite/

	* ld-elf/compress.exp: Remove is_zlib_supported check.
	Fail if --compress-debug-sections doesn't work.
	* lib/ld-lib.exp (run_dump_test): Remove is_zlib_supported check.
2015-04-06 12:19:13 -07:00
H.J. Lu
4aa90cc007 Use bfd_putb64/bfd_getb64
bfd/

	* compress.c (get_uncompressed_size): Removed.
	(bfd_compress_section_contents): Use bfd_putb64 to write
	uncompressed section size.
	(bfd_init_section_decompress_status): Replace
	get_uncompressed_size with bfd_getb64.

gas/

	* write.c (compress_debug): Use bfd_putb64 to write uncompressed
	section size.
2015-04-06 09:02:52 -07:00
H.J. Lu
317974f683 Xfail the compressed debug sections
There is no need to generate compressed debug section if compressed
section size is the same as before compression.  We should xfail the
compressed debug section test if there are no compressed sections

binutils/testsuite/

	* binutils-all/compress.exp (compression_used): New.
	Xfail test if compression didn't make the section smaller.

gas/

2015-04-05  H.J. Lu  <hongjiu.lu@intel.com>

	* write.c (compress_debug): Don't write the zlib header if
	compressed section size is the same as before compression.
2015-04-05 08:15:35 -07:00
Nick Clifton
f66adc4ead Second fix for microblaze gas port's ability to parse constants.
PR gas/18189
	* config/tc-microblaze.c (parse_imm): Use offsetT as the type for
	min and max parameters.  Sign extend values before testing.
2015-04-02 17:13:12 +01:00
Nick Clifton
03e080386e Fixes a bug in the microblaze assembler where it would not complain about constants larger than 32-bits.
PR gas/18189
	* config/tc-microblaze.c (parse_imm): Use offsetT as the type for
	min and max parameters.
2015-04-02 16:10:06 +01:00
Renlin Li
c1baaddf88 [AArch64] Emit DATA_MAP in order within text section
2015-03-27  Renlin Li  <renlin.li@arm.com>

gas/
  * config/tc-aarch64.c (mapping_state): Emit MAP_DATA within text section in order.
  (mapping_state_2): Don't emit MAP_DATA here.
  (s_aarch64_inst): Align frag during state transition.
  (md_assemble): Likewise.
2015-04-02 14:59:45 +01:00
Ed Maste
726e626a7b Remove unused functions in tc-aarch64.c.
* config/tc-aarch64.c (set_error_kind): Delete.
	(set_error_message): Delete.
2015-04-02 14:44:59 +01:00
H.J. Lu
39f3de7c43 Regenerate configure in bfd/binutils/gas/gdb/gold
bfd/

	* configure: Regenerated.

binutils/

	* configure: Regenerated.

gas/

	* configure: Regenerated.

gdb/

	* Makefile.in (top_srcdir): New.
	* configure: Regenerated.

gold/

	* configure: Regenerated.
2015-04-02 05:45:03 -07:00
Evandro Menezes
2412d87834 [AArch64] Add support for the Samsung Exynos M1 processor
2015-03-26  Evandro Menezes  <e.menezes@samsung.com>

gas/
	* config/tc-aarch64.c: Add support for Samsung Exynos M1.
	* doc/c-aarch64.texi (-mcpu=): Add "exynos-m1".
2015-04-01 21:00:41 +00:00
Evandro Menezes
246496bb65 [ARM] Add support for the Samsung Exynos M1 processor
2015-03-26  Evandro Menezes  <e.menezes@samsung.com>

gas/
	* config/tc-arm.c: Add support for Samsung Exynos M1.
	* doc/c-arm.texi (-mcpu=): Add "exynos-m1".
2015-04-01 20:58:16 +00:00
H.J. Lu
afa59b7900 Regenerate configure in bfd/binutils/gas/gdb
bfd/

2015-04-01  H.J. Lu  <hongjiu.lu@intel.com>

	* configure: Regenerated.

binutils/

2015-04-01  H.J. Lu  <hongjiu.lu@intel.com>

	* configure: Regenerated.

gas/

2015-04-01  H.J. Lu  <hongjiu.lu@intel.com>

	* configure: Regenerated.

gdb/

2015-04-01  H.J. Lu  <hongjiu.lu@intel.com>

	* configure: Regenerated.
2015-04-01 04:55:48 -07:00
H.J. Lu
518a69099c Remove the last change on dw2-compress-1.d
The compressed .debug_info section is bigger than the original in 32-bit.
2015-03-31 08:20:55 -07:00
Ed Schouten
6036f48621 Add support for Nuxi CloudABI on x86-64
bfd/

	* config.bfd (targ_defvec): Set to x86_64_elf64_cloudabi_vec
	for x86_64-*-cloudabi*.
	* configure.ac: Handle x86_64_elf64_cloudabi_vec.
	* configure: Regenerated.
	* elf64-x86-64.c (TARGET_LITTLE_SYM): Support x86_64-*-cloudabi*.
	(TARGET_LITTLE_NAME): Likewise.
	(ELF_OSABI): Likewise.
	(elf64_bed): Likewise.
	* targets.c (x86_64_elf64_cloudabi_vec): New.
	(_bfd_target_vector): Add x86_64_elf64_cloudabi_vec.

gas/

	* configure.tgt (fmt): Set to elf for *-*-cloudabi*.

ld/

	* Makefile.am (ALL_64_EMULATION_SOURCES): Add
	eelf_x86_64_cloudabi.c.
	(eelf_x86_64_cloudabi.c): New.
	* configure.tgt (targ_emul): Set to elf_x86_64_cloudabi for
	x86_64-*-cloudabi*.
	* Makefile.in: Regenerated.
	* emulparams/elf_x86_64_cloudabi.sh: New file.
2015-03-31 08:11:08 -07:00