[ARM]: Don't tail-pad over-aligned functions to the alignment boundary.

2015-04/24  Richard Earnshaw  <rearnsha@arm.com>

	gas/
	* config/tc-arm.h (arm_min): New function.
	(SUB_SEGMENT_ALIGN): Define.

	gas/testsuite/
	* gas/arm/align64.d: Delete trailing padding NOPs.

	ld/testsuite/
	* ld-arm/armthumb-lib.d: Regenerate expected output.
	* ld-arm/armthumb-lib.d: Likewise.
	* ld-arm/armthumb-lib.sym: Likewise.
	* ld-arm/cortex-a8-fix-b-rel-arm.d: Likewise.
	* ld-arm/cortex-a8-fix-b-rel-thumb.d: Likewise.
	* ld-arm/cortex-a8-fix-b.d: Likewise.
	* ld-arm/cortex-a8-fix-bcc-rel-thumb.d: Likewise.
	* ld-arm/cortex-a8-fix-bcc.d: Likewise.
	* ld-arm/cortex-a8-fix-bl-rel-arm.d: Likewise.
	* ld-arm/cortex-a8-fix-bl-rel-plt.d: Likewise.
	* ld-arm/cortex-a8-fix-bl-rel-thumb.d: Likewise.
	* ld-arm/cortex-a8-fix-bl.d: Likewise.
	* ld-arm/cortex-a8-fix-blx-bcond.d: Likewise.
	* ld-arm/cortex-a8-fix-blx-rel-arm.d: Likewise.
	* ld-arm/cortex-a8-fix-blx-rel-thumb.d: Likewise.
	* ld-arm/cortex-a8-fix-blx.d: Likewise.
	* ld-arm/cortex-a8-fix-hdr.d: Likewise.
	* ld-arm/farcall-mixed-app-v5.d: Likewise.
	* ld-arm/farcall-mixed-app.d: Likewise.
	* ld-arm/farcall-mixed-lib-v4t.d: Likewise.
	* ld-arm/farcall-mixed-lib.d: Likewise.
	* ld-arm/mixed-app-v5.d: Likewise.
	* ld-arm/mixed-app.d: Likewise.
	* ld-arm/mixed-lib.d: Likewise.
This commit is contained in:
Richard Earnshaw 2015-04-24 15:51:49 +01:00
parent de7669bfa5
commit 7a5c933c7c
28 changed files with 116 additions and 129 deletions

View file

@ -1,3 +1,8 @@
2015-04/24 Richard Earnshaw <rearnsha@arm.com>
* config/tc-arm.h (arm_min): New function.
(SUB_SEGMENT_ALIGN): Define.
2015-04-23 Matthew Fortune <matthew.fortune@imgtec.com>
* config/tc-mips.c (macro): State the recommended way of creating

View file

@ -236,10 +236,19 @@ struct arm_frag_type
#endif
};
static inline int
arm_min (int am_p1, int am_p2)
{
return am_p1 < am_p2 ? am_p1 : am_p2;
}
#define TC_FRAG_TYPE struct arm_frag_type
/* NOTE: max_chars is a local variable from frag_var / frag_variant. */
#define TC_FRAG_INIT(fragp) arm_init_frag (fragp, max_chars)
#define HANDLE_ALIGN(fragp) arm_handle_align (fragp)
#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) \
((!(FRCHAIN)->frch_next && subseg_text_p (SEG)) \
? arm_min (2, get_recorded_alignment (SEG)) : 0)
#define md_do_align(N, FILL, LEN, MAX, LABEL) \
if (FILL == NULL && (N) != 0 && ! need_pass_2 && subseg_text_p (now_seg)) \

View file

@ -1,3 +1,7 @@
2015-04-24 Richard Earnshaw <rearnsha@arm.com>
* gas/arm/align64.d: Delete trailing padding NOPs.
2015-04-23 Matthew Fortune <matthew.fortune@imgtec.com>
* gas/mips/dla-warn.l: New file.

View file

@ -52,18 +52,3 @@ Disassembly of section .text:
00000078 <foo2\+0x34> e1a00000.*nop.*
0000007c <foo2\+0x38> e1a00000.*nop.*
00000080 <foo2\+0x3c> e3a00004.*mov.*r0, #4
00000084 <foo2\+0x40> e1a00000.*nop.*
00000088 <foo2\+0x44> e1a00000.*nop.*
0000008c <foo2\+0x48> e1a00000.*nop.*
00000090 <foo2\+0x4c> e1a00000.*nop.*
00000094 <foo2\+0x50> e1a00000.*nop.*
00000098 <foo2\+0x54> e1a00000.*nop.*
0000009c <foo2\+0x58> e1a00000.*nop.*
000000a0 <foo2\+0x5c> e1a00000.*nop.*
000000a4 <foo2\+0x60> e1a00000.*nop.*
000000a8 <foo2\+0x64> e1a00000.*nop.*
000000ac <foo2\+0x68> e1a00000.*nop.*
000000b0 <foo2\+0x6c> e1a00000.*nop.*
000000b4 <foo2\+0x70> e1a00000.*nop.*
000000b8 <foo2\+0x74> e1a00000.*nop.*
000000bc <foo2\+0x78> e1a00000.*nop.*

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@ -1,3 +1,30 @@
2015-04-24 Richard Earnshaw <rearnsha@arm.com>
* ld-arm/armthumb-lib.d: Regenerate expected output.
* ld-arm/armthumb-lib.d: Likewise.
* ld-arm/armthumb-lib.sym: Likewise.
* ld-arm/cortex-a8-fix-b-rel-arm.d: Likewise.
* ld-arm/cortex-a8-fix-b-rel-thumb.d: Likewise.
* ld-arm/cortex-a8-fix-b.d: Likewise.
* ld-arm/cortex-a8-fix-bcc-rel-thumb.d: Likewise.
* ld-arm/cortex-a8-fix-bcc.d: Likewise.
* ld-arm/cortex-a8-fix-bl-rel-arm.d: Likewise.
* ld-arm/cortex-a8-fix-bl-rel-plt.d: Likewise.
* ld-arm/cortex-a8-fix-bl-rel-thumb.d: Likewise.
* ld-arm/cortex-a8-fix-bl.d: Likewise.
* ld-arm/cortex-a8-fix-blx-bcond.d: Likewise.
* ld-arm/cortex-a8-fix-blx-rel-arm.d: Likewise.
* ld-arm/cortex-a8-fix-blx-rel-thumb.d: Likewise.
* ld-arm/cortex-a8-fix-blx.d: Likewise.
* ld-arm/cortex-a8-fix-hdr.d: Likewise.
* ld-arm/farcall-mixed-app-v5.d: Likewise.
* ld-arm/farcall-mixed-app.d: Likewise.
* ld-arm/farcall-mixed-lib-v4t.d: Likewise.
* ld-arm/farcall-mixed-lib.d: Likewise.
* ld-arm/mixed-app-v5.d: Likewise.
* ld-arm/mixed-app.d: Likewise.
* ld-arm/mixed-lib.d: Likewise.
2015-04-24 Nick Clifton <nickc@redhat.com>
* ld-elf/compressed1d.d: Add notarget for ELF based targets that

View file

@ -31,15 +31,9 @@ Disassembly of section .text:
.* <__real_lib_func2>:
.*: 4770 bx lr
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.* <lib_func2>:
.*: e59fc004 ldr ip, \[pc, #4\] ; .* <lib_func2\+0xc>
.*: e08cc00f add ip, ip, pc
.*: e12fff1c bx ip
.*: ffffffe5 .*
.*: fffffff1 .*

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@ -11,5 +11,5 @@ Symbol table for image:
+.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 __end__
+.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 __bss_start
+.. +..: 00000000 +0 +NOTYPE +GLOBAL +DEFAULT +UND app_func2
+.. +..: .......0 +2 +FUNC +GLOBAL +DEFAULT +6 lib_func2
+.. +..: .......[048c] +2 +FUNC +GLOBAL +DEFAULT +6 lib_func2
+.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 _bss_end__

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@ -6,7 +6,7 @@ Disassembly of section \.text:
00008f00 <targetfn>:
8f00: e12fff1e bx lr
8f04: e320f000 nop \{0\}
#...
00008f08 <_start>:
8f08: bf00 nop
@ -75,7 +75,7 @@ Disassembly of section \.text:
9002: eb01 0002 add\.w r0, r1, r2
9006: f000 b803 b\.w 9010 <__targetfn_from_thumb>
900a: 4770 bx lr
900c: f3af 8000 nop\.w
#...
00009010 <__targetfn_from_thumb>:
9010: 4778 bx pc

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@ -6,8 +6,7 @@ Disassembly of section \.text:
00008f00 <targetfn>:
8f00: 4770 bx lr
8f02: bf00 nop
8f04: f3af 8000 nop\.w
#...
00008f08 <_start>:
8f08: bf00 nop
@ -76,5 +75,5 @@ Disassembly of section \.text:
9002: eb01 0002 add\.w r0, r1, r2
9006: f7ff bf7b b\.w 8f00 <targetfn>
900a: 4770 bx lr
900c: f3af 8000 nop\.w
#...
9010: f7ff bf76 b\.w 8f00 <targetfn>

View file

@ -71,5 +71,5 @@ Disassembly of section \.text:
8ffa: eb01 0002 add\.w r0, r1, r2
8ffe: f000 b803 b\.w 9008 <_start\+0x108>
9002: 4770 bx lr
9004: f3af 8000 nop\.w
#...
9008: f7ff bfeb b\.w 8fe2 <_start\+0xe2>

View file

@ -6,8 +6,7 @@ Disassembly of section \.text:
00008f00 <targetfn>:
8f00: 4770 bx lr
8f02: bf00 nop
8f04: f3af 8000 nop\.w
#...
00008f08 <_start>:
8f08: bf00 nop
@ -76,7 +75,7 @@ Disassembly of section \.text:
9002: eb01 0002 add\.w r0, r1, r2
9006: f53f af7b bmi\.w 8f00 <targetfn>
900a: 4770 bx lr
900c: f3af 8000 nop\.w
#...
9010: d401 bmi\.n 9016 <_start\+0x10e>
9012: f7ff bff6 b\.w 9002 <_start\+0xfa>
9016: f7ff bf73 b\.w 8f00 <targetfn>

View file

@ -71,7 +71,7 @@ Disassembly of section \.text:
8ffa: eb01 0002 add\.w r0, r1, r2
8ffe: f000 b803 b\.w 9008 <_start\+0x108>
9002: 4770 bx lr
9004: f3af 8000 nop\.w
#...
9008: d301 bcc\.n 900e <_start\+0x10e>
900a: f7ff bffa b\.w 9002 <_start\+0x102>
900e: f7ff bfe8 b\.w 8fe2 <_start\+0xe2>

View file

@ -6,7 +6,7 @@ Disassembly of section \.text:
00008f00 <targetfn>:
8f00: e12fff1e bx lr
8f04: e320f000 nop \{0\}
#...
00008f08 <_start>:
8f08: bf00 nop
@ -75,5 +75,5 @@ Disassembly of section \.text:
9002: eb01 0002 add\.w r0, r1, r2
9006: f7ff ef7c blx 8f00 <targetfn>
900a: 4770 bx lr
900c: f3af 8000 nop\.w
#...
9010: eaffffba b 8f00 <targetfn>

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@ -20,7 +20,7 @@ Disassembly of section \.text:
00008f00 <targetfn>:
8f00: 4770 bx lr
8f02: bf00 nop
8f04: f3af 8000 nop\.w
#...
00008f08 <_start>:
8f08: bf00 nop
@ -89,5 +89,5 @@ Disassembly of section \.text:
9002: eb01 0002 add\.w r0, r1, r2
9006: f7ff ef06 blx 8e14 <targetfn@plt>
900a: 4770 bx lr
900c: f3af 8000 nop\.w
#...
9010: eaffff7f b 8e14 <targetfn@plt>

View file

@ -6,8 +6,7 @@ Disassembly of section \.text:
00008f00 <targetfn>:
8f00: 4770 bx lr
8f02: bf00 nop
8f04: f3af 8000 nop\.w
#...
00008f08 <_start>:
8f08: bf00 nop
@ -76,5 +75,5 @@ Disassembly of section \.text:
9002: eb01 0002 add\.w r0, r1, r2
9006: f7ff ff7b bl 8f00 <targetfn>
900a: 4770 bx lr
900c: f3af 8000 nop\.w
#...
9010: f7ff bf76 b\.w 8f00 <targetfn>

View file

@ -71,5 +71,5 @@ Disassembly of section \.text:
8ffa: eb01 0002 add\.w r0, r1, r2
8ffe: f000 f803 bl 9008 <_start\+0x108>
9002: 4770 bx lr
9004: f3af 8000 nop\.w
#...
9008: f7ff bfeb b\.w 8fe2 <_start\+0xe2>

View file

@ -1100,7 +1100,7 @@ Disassembly of section \.text:
9ffa: eb01 0002 add\.w r0, r1, r2
9ffe: f000 e804 blx a008 <bl_insns\+0x108>
a002: 4770 bx lr
a004: f3af 8000 nop\.w
#...
a008: eaffffba b 9ef8 <arm_target>
a00c: d101 bne\.n a012 <bl_insns\+0x112>
a00e: f7fe bff8 b\.w 9002 <_start\+0x102>

View file

@ -6,7 +6,7 @@ Disassembly of section \.text:
00008f00 <targetfn>:
8f00: e12fff1e bx lr
8f04: e320f000 nop \{0\}
#...
00008f08 <_start>:
8f08: bf00 nop
@ -75,5 +75,5 @@ Disassembly of section \.text:
9002: eb01 0002 add\.w r0, r1, r2
9006: f7ff ef7c blx 8f00 <targetfn>
900a: 4770 bx lr
900c: f3af 8000 nop\.w
#...
9010: eaffffba b 8f00 <targetfn>

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@ -6,8 +6,7 @@ Disassembly of section \.text:
00008f00 <targetfn>:
8f00: 4770 bx lr
8f02: bf00 nop
8f04: f3af 8000 nop\.w
#...
00008f08 <_start>:
8f08: bf00 nop
@ -76,5 +75,5 @@ Disassembly of section \.text:
9002: eb01 0002 add\.w r0, r1, r2
9006: f7ff ff7b bl 8f00 <targetfn>
900a: 4770 bx lr
900c: f3af 8000 nop\.w
#...
9010: f7ff bf76 b\.w 8f00 <targetfn>

View file

@ -75,5 +75,5 @@ Disassembly of section \.text:
9002: eb01 0002 add\.w r0, r1, r2
9006: f7ff ef7c blx 8f00 <armfn>
900a: 4770 bx lr
900c: f3af 8000 nop\.w
#...
9010: eaffffba b 8f00 <armfn>

View file

@ -19,6 +19,6 @@ Disassembly of section \.text:
ff6: bf00 nop
ff8: bf00 nop
ffa: ea81 0002 eor.w r0, r1, r2
ffe: f000 b80f b.w 1020 <_start\+0x40>
ffe: f000 b803 b.w 1008 <_start\+0x28>
#...
1020: f7ff bfde b.w fe0 <_start>
1008: f7ff bf.. b.w fe0 <_start>

View file

@ -39,8 +39,7 @@ Disassembly of section .text:
.*: bd00 pop {pc}
.*: 4770 bx lr
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
#...
.* <__app_func_veneer>:
.*: e51ff004 ldr pc, \[pc, #-4\] ; .* <__app_func_veneer\+0x4>
@ -51,8 +50,8 @@ Disassembly of section .far_arm:
.* <app_func>:
.*: e1a0c00d mov ip, sp
.*: e92dd800 push {fp, ip, lr, pc}
.*: eb000008 bl .* <__lib_func1_veneer>
.*: eb000009 bl .* <__lib_func2_veneer>
.*: eb0000.. bl .* <__lib_func1_veneer>
.*: eb0000.. bl .* <__lib_func2_veneer>
.*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop ; \(mov r0, r0\)
@ -60,15 +59,13 @@ Disassembly of section .far_arm:
.* <app_func2>:
.*: e12fff1e bx lr
.*: e1a00000 nop ; \(mov r0, r0\)
.*: e1a00000 nop ; \(mov r0, r0\)
.*: e1a00000 nop ; \(mov r0, r0\)
#...
.* <__lib_func1_veneer>:
.*: e51ff004 ldr pc, \[pc, #-4\] ; 2100034 <__lib_func1_veneer\+0x4>
.*: e51ff004 ldr pc, \[pc, #-4\] ; .* <__lib_func1_veneer\+0x4>
.*: 000081e8 .word 0x000081e8
.* <__lib_func2_veneer>:
.*: e51ff004 ldr pc, \[pc, #-4\] ; 210003c <__lib_func2_veneer\+0x4>
.*: e51ff004 ldr pc, \[pc, #-4\] ; .* <__lib_func2_veneer\+0x4>
.*: 000081dc .word 0x000081dc
Disassembly of section .far_thumb:
@ -79,8 +76,7 @@ Disassembly of section .far_thumb:
.*: bd00 pop {pc}
.*: 4770 bx lr
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
#...
.* <__lib_func2_from_thumb>:
.*: e51ff004 ldr pc, \[pc, #-4\] ; 2200014 <__lib_func2_from_thumb\+0x4>

View file

@ -41,8 +41,7 @@ Disassembly of section .text:
.*: bd00 pop {pc}
.*: 4770 bx lr
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
#...
.* <__app_func_veneer>:
.*: e51ff004 ldr pc, \[pc, #-4\] ; 8234 <__app_func_veneer\+0x4>
@ -53,8 +52,8 @@ Disassembly of section .far_arm:
.* <app_func>:
.*: e1a0c00d mov ip, sp
.*: e92dd800 push {fp, ip, lr, pc}
.*: eb000008 bl .* <__lib_func1_veneer>
.*: eb000009 bl .* <__lib_func2_veneer>
.*: eb000006 bl .* <__lib_func1_veneer>
.*: eb000007 bl .* <__lib_func2_veneer>
.*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop ; \(mov r0, r0\)
@ -62,15 +61,13 @@ Disassembly of section .far_arm:
.* <app_func2>:
.*: e12fff1e bx lr
.*: e1a00000 nop ; \(mov r0, r0\)
.*: e1a00000 nop ; \(mov r0, r0\)
.*: e1a00000 nop ; \(mov r0, r0\)
#...
.* <__lib_func1_veneer>:
.*: e51ff004 ldr pc, \[pc, #-4\] ; 2100034 <__lib_func1_veneer\+0x4>
.*: e51ff004 ldr pc, \[pc, #-4\] ; .* <__lib_func1_veneer\+0x4>
.*: 000081ec .word 0x000081ec
.* <__lib_func2_veneer>:
.*: e51ff004 ldr pc, \[pc, #-4\] ; 210003c <__lib_func2_veneer\+0x4>
.*: e51ff004 ldr pc, \[pc, #-4\] ; .* <__lib_func2_veneer\+0x4>
.*: 000081e0 .word 0x000081e0
Disassembly of section .far_thumb:
@ -81,8 +78,7 @@ Disassembly of section .far_thumb:
.*: bd00 pop {pc}
.*: 4770 bx lr
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
#...
.* <__lib_func2_from_thumb>:
.*: 4778 bx pc

View file

@ -50,55 +50,47 @@ Disassembly of section .text:
...
.* <__real_lib_func2>:
.*: f000 f80e bl 1000330 <__app_func_from_thumb>
.*: f000 f81c bl 1000350 <__app_func_weak_from_thumb>
.*: f000 f822 bl 1000360 <__lib_func3_from_thumb>
.*: f000 f810 bl 1000340 <__lib_func4_from_thumb>
.*: f000 f8.. bl .* <__app_func_from_thumb>
.*: f000 f8.. bl .* <__app_func_weak_from_thumb>
.*: f000 f8.. bl .* <__lib_func3_from_thumb>
.*: f000 f8.. bl .* <__lib_func4_from_thumb>
.*: 4770 bx lr
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
#...
.* <__app_func_from_thumb>:
.*: 4778 bx pc
.*: 46c0 nop ; \(mov r8, r8\)
.*: e59fc000 ldr ip, \[pc\] ; 100033c <__app_func_from_thumb\+0xc>
.*: e59fc000 ldr ip, \[pc\] ; .* <__app_func_from_thumb\+0xc>
.*: e08cf00f add pc, ip, pc
.*: feffff68 .word 0xfeffff68
.*: feffff.. .word 0xfeffff..
.* <__lib_func4_from_thumb>:
.*: 4778 bx pc
.*: 46c0 nop ; \(mov r8, r8\)
.*: e59fc000 ldr ip, \[pc\] ; 100034c <__lib_func4_from_thumb\+0xc>
.*: e59fc000 ldr ip, \[pc\] ; .* <__lib_func4_from_thumb\+0xc>
.*: e08cf00f add pc, ip, pc
.*: feffff88 .word 0xfeffff88
.*: feffff.. .word 0xfeffff..
.* <__app_func_weak_from_thumb>:
.*: 4778 bx pc
.*: 46c0 nop ; \(mov r8, r8\)
.*: e59fc000 ldr ip, \[pc\] ; 100035c <__app_func_weak_from_thumb\+0xc>
.*: e59fc000 ldr ip, \[pc\] ; .* <__app_func_weak_from_thumb\+0xc>
.*: e08cf00f add pc, ip, pc
.*: feffff58 .word 0xfeffff58
.*: feffff.. .word 0xfeffff..
.* <__lib_func3_from_thumb>:
.*: 4778 bx pc
.*: 46c0 nop ; \(mov r8, r8\)
.*: e59fc000 ldr ip, \[pc\] ; 100036c <__lib_func3_from_thumb\+0xc>
.*: e59fc000 ldr ip, \[pc\] ; .* <__lib_func3_from_thumb\+0xc>
.*: e08cf00f add pc, ip, pc
.*: feffff58 .word 0xfeffff58
.*: feffff.. .word 0xfeffff..
...
.* <__real_lib_func3>:
.*: f000 f80e bl 2000390 <__app_func_from_thumb>
.*: f000 f804 bl 2000380 <__app_func_weak_from_thumb>
.*: 4770 bx lr
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
#...
.* <__app_func_weak_from_thumb>:
.*: 4778 bx pc

View file

@ -42,47 +42,40 @@ Disassembly of section .text:
...
.* <lib_func2>:
.*: f000 e820 blx 1000344 <__app_func_from_thumb>
.*: f000 e812 blx 100032c <__app_func_weak_from_thumb>
.*: f000 e80a blx 1000320 <__lib_func3_from_thumb>
.*: f000 e814 blx 1000338 <__lib_func4_from_thumb>
.*: f000 e8.. blx .* <__app_func_from_thumb>
.*: f000 e8.. blx .* <__app_func_weak_from_thumb>
.*: f000 e8.. blx .* <__lib_func3_from_thumb>
.*: f000 e8.. blx .* <__lib_func4_from_thumb>
.*: 4770 bx lr
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop.*
#...
.* <__lib_func3_from_thumb>:
.*: e59fc000 ldr ip, \[pc\] ; 1000328 <__lib_func3_from_thumb\+0x8>
.*: e59fc000 ldr ip, \[pc\] ; .* <__lib_func3_from_thumb\+0x8>
.*: e08ff00c add pc, pc, ip
.*: feffff90 .word 0xfeffff90
.*: feffff.. .word 0xfeffff..
.* <__app_func_weak_from_thumb>:
.*: e59fc000 ldr ip, \[pc\] ; 1000334 <__app_func_weak_from_thumb\+0x8>
.*: e59fc000 ldr ip, \[pc\] ; .* <__app_func_weak_from_thumb\+0x8>
.*: e08ff00c add pc, pc, ip
.*: feffff78 .word 0xfeffff78
.*: feffff.. .word 0xfeffff..
.* <__lib_func4_from_thumb>:
.*: e59fc000 ldr ip, \[pc\] ; 1000340 <__lib_func4_from_thumb\+0x8>
.*: e59fc000 ldr ip, \[pc\] ; .* <__lib_func4_from_thumb\+0x8>
.*: e08ff00c add pc, pc, ip
.*: feffff84 .word 0xfeffff84
.*: feffff.. .word 0xfeffff..
.* <__app_func_from_thumb>:
.*: e59fc000 ldr ip, \[pc\] ; 100034c <__app_func_from_thumb\+0x8>
.*: e59fc000 ldr ip, \[pc\] ; .* <__app_func_from_thumb\+0x8>
.*: e08ff00c add pc, pc, ip
.*: feffff54 .word 0xfeffff54
.*: feffff.. .word 0xfeffff..
...
.* <lib_func3>:
.*: f000 e80c blx 200037c <__app_func_from_thumb>
.*: f000 e804 blx 2000370 <__app_func_weak_from_thumb>
.*: 4770 bx lr
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
#...
.* <__app_func_weak_from_thumb>:
.*: e59fc000 ldr ip, \[pc\] ; 2000378 <__app_func_weak_from_thumb\+0x8>

View file

@ -53,6 +53,4 @@ Disassembly of section .text:
.*: f7ff efc. blx .* <lib_func2@plt>
.*: bd00 pop {pc}
.*: 4770 bx lr
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
#...

View file

@ -55,6 +55,4 @@ Disassembly of section .text:
.*: f7ff ffc. bl .* <lib_func2@plt>
.*: bd00 pop {pc}
.*: 4770 bx lr
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
#...

View file

@ -30,10 +30,4 @@ Disassembly of section .text:
.* <lib_func2>:
.*: 4770 bx lr
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
.*: 46c0 nop ; \(mov r8, r8\)
#...