opcodes/
* ppc-opc.c (DCBT_EO): New define. (powerpc_opcodes) <lbarx>: Enable for POWER8 and later. <lharx>: Likewise. <stbcx.>: Likewise. <sthcx.>: Likewise. <waitrsv>: Do not enable for POWER7 and later. <waitimpl>: Likewise. <dcbt>: Default to the two operand form of the instruction for all "old" cpus. For "new" cpus, use the operand ordering that matches whether the cpu is server or embedded. <dcbtst>: Likewise. gas/testsuite/ * gas/ppc/a2.s: Fixup test case due to dcbt/dcbtst embedded operand ordering change. * gas/ppc/a2.d: Likewise. * gas/ppc/476.d: Likewise. * gas/ppc/booke.s: Remove invalid 3 operand dcbt tests. * gas/ppc/booke.d: Likewise. * gas/ppc/power7.s: Remove lbarx, lharx, stbcx., sthcx., waitrsv and waitimpl tests. * gas/ppc/power7.d: Likewise.
This commit is contained in:
Peter Bergner
parent
5fbae7d108
commit
4fff86c517
10 changed files with 158 additions and 152 deletions
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@ -1,3 +1,15 @@
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2015-04-27 Peter Bergner <bergner@vnet.ibm.com>
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* gas/ppc/a2.s: Fixup test case due to dcbt/dcbtst embedded operand
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ordering change.
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* gas/ppc/a2.d: Likewise.
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* gas/ppc/476.d: Likewise.
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* gas/ppc/booke.s: Remove invalid 3 operand dcbt tests.
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* gas/ppc/booke.d: Likewise.
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* gas/ppc/power7.s: Remove lbarx, lharx, stbcx., sthcx., waitrsv
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and waitimpl tests.
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* gas/ppc/power7.d: Likewise.
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2015-04-27 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
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* doc/as.texinfo: Document Tag_GNU_S390_ABI_Vector.
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@ -90,13 +90,13 @@ Disassembly of section \.text:
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140: (7c 06 3b ac|ac 3b 06 7c) dcbi r6,r7
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144: (7c 85 33 0c|0c 33 85 7c) dcblc 4,r5,r6
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148: (7c 06 38 6c|6c 38 06 7c) dcbst r6,r7
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14c: (7c c0 2a 2c|2c 2a c0 7c) dcbt 0,r5,6
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14c: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6
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150: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6
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154: (7c c8 2a 2c|2c 2a c8 7c) dcbt r8,r5,6
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154: (7d 05 32 2c|2c 32 05 7d) dcbt 8,r5,r6
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158: (7c e8 49 4c|4c 49 e8 7c) dcbtls 7,r8,r9
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15c: (7c e0 31 ec|ec 31 e0 7c) dcbtst 0,r6,7
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15c: (7c 06 39 ec|ec 39 06 7c) dcbtst r6,r7
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160: (7c 06 39 ec|ec 39 06 7c) dcbtst r6,r7
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164: (7c e9 31 ec|ec 31 e9 7c) dcbtst r9,r6,7
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164: (7d 26 39 ec|ec 39 26 7d) dcbtst 9,r6,r7
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168: (7d 4b 61 0c|0c 61 4b 7d) dcbtstls 10,r11,r12
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16c: (7c 01 17 ec|ec 17 01 7c) dcbz r1,r2
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170: (7c 05 37 ec|ec 37 05 7c) dcbz r5,r6
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@ -117,12 +117,12 @@ Disassembly of section \.text:
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164: (7c 0a 58 6c|6c 58 0a 7c) dcbst r10,r11
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168: (7c 0a 58 7e|7e 58 0a 7c) dcbstep r10,r11
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16c: (7c 0a 5a 2c|2c 5a 0a 7c) dcbt r10,r11
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170: (7c 2a 5a 2c|2c 5a 2a 7c) dcbt r10,r11,1
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170: (7c 2a 5a 2c|2c 5a 2a 7c) dcbt 1,r10,r11
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174: (7d 4b 62 7e|7e 62 4b 7d) dcbtep r10,r11,r12
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178: (7c 0a 59 4c|4c 59 0a 7c) dcbtls r10,r11
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17c: (7c 2a 59 4c|4c 59 2a 7c) dcbtls 1,r10,r11
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180: (7c 0a 59 ec|ec 59 0a 7c) dcbtst r10,r11
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184: (7c 2a 59 ec|ec 59 2a 7c) dcbtst r10,r11,1
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184: (7c 2a 59 ec|ec 59 2a 7c) dcbtst 1,r10,r11
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188: (7d 4b 61 fe|fe 61 4b 7d) dcbtstep r10,r11,r12
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18c: (7c 0a 59 0c|0c 59 0a 7c) dcbtstls r10,r11
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190: (7c 2a 59 0c|0c 59 2a 7c) dcbtstls 1,r10,r11
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@ -91,13 +91,13 @@ start:
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dcblc 1,10,11
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dcbst 10,11
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dcbstep 10,11
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dcbt 10,11,0
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dcbt 10,11,1
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dcbt 0,10,11
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dcbt 1,10,11
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dcbtep 10,11,12
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dcbtls 0,10,11
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dcbtls 1,10,11
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dcbtst 10,11,0
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dcbtst 10,11,1
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dcbtst 0,10,11
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dcbtst 1,10,11
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dcbtstep 10,11,12
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dcbtstls 0,10,11
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dcbtstls 1,10,11
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@ -39,5 +39,3 @@ Disassembly of section \.text:
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6c: (7c 17 43 a6|a6 43 17 7c) mtsprg 7,r0
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70: (7c 17 43 a6|a6 43 17 7c) mtsprg 7,r0
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74: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6
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78: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6
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7c: (7d 05 32 2c|2c 32 05 7d) dcbt 8,r5,r6
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@ -38,5 +38,3 @@ branch_target_2:
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mtsprg7 0
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dcbt 5,6
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dcbt 0,5,6
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dcbt 8,5,6
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@ -7,118 +7,106 @@
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Disassembly of section \.text:
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0+00 <power7>:
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0: (7c 64 2e 98|98 2e 64 7c) lxvd2x vs3,r4,r5
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4: (7d 64 2e 99|99 2e 64 7d) lxvd2x vs43,r4,r5
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8: (7c 64 2f 98|98 2f 64 7c) stxvd2x vs3,r4,r5
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c: (7d 64 2f 99|99 2f 64 7d) stxvd2x vs43,r4,r5
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10: (f0 64 28 50|50 28 64 f0) xxmrghd vs3,vs4,vs5
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14: (f1 6c 68 57|57 68 6c f1) xxmrghd vs43,vs44,vs45
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18: (f0 64 2b 50|50 2b 64 f0) xxmrgld vs3,vs4,vs5
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1c: (f1 6c 6b 57|57 6b 6c f1) xxmrgld vs43,vs44,vs45
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20: (f0 64 28 50|50 28 64 f0) xxmrghd vs3,vs4,vs5
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24: (f1 6c 68 57|57 68 6c f1) xxmrghd vs43,vs44,vs45
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28: (f0 64 2b 50|50 2b 64 f0) xxmrgld vs3,vs4,vs5
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2c: (f1 6c 6b 57|57 6b 6c f1) xxmrgld vs43,vs44,vs45
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30: (f0 64 29 50|50 29 64 f0) xxpermdi vs3,vs4,vs5,1
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34: (f1 6c 69 57|57 69 6c f1) xxpermdi vs43,vs44,vs45,1
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38: (f0 64 2a 50|50 2a 64 f0) xxpermdi vs3,vs4,vs5,2
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3c: (f1 6c 6a 57|57 6a 6c f1) xxpermdi vs43,vs44,vs45,2
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40: (f0 64 27 80|80 27 64 f0) xvmovdp vs3,vs4
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44: (f1 6c 67 87|87 67 6c f1) xvmovdp vs43,vs44
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48: (f0 64 27 80|80 27 64 f0) xvmovdp vs3,vs4
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4c: (f1 6c 67 87|87 67 6c f1) xvmovdp vs43,vs44
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50: (f0 64 2f 80|80 2f 64 f0) xvcpsgndp vs3,vs4,vs5
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54: (f1 6c 6f 87|87 6f 6c f1) xvcpsgndp vs43,vs44,vs45
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58: (7c 00 00 7c|7c 00 00 7c) wait
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5c: (7c 00 00 7c|7c 00 00 7c) wait
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60: (7c 20 00 7c|7c 00 20 7c) waitrsv
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64: (7c 20 00 7c|7c 00 20 7c) waitrsv
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68: (7c 40 00 7c|7c 00 40 7c) waitimpl
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6c: (7c 40 00 7c|7c 00 40 7c) waitimpl
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70: (4c 00 03 24|24 03 00 4c) doze
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74: (4c 00 03 64|64 03 00 4c) nap
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78: (4c 00 03 a4|a4 03 00 4c) sleep
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7c: (4c 00 03 e4|e4 03 00 4c) rvwinkle
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80: (7c 83 01 34|34 01 83 7c) prtyw r3,r4
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84: (7d cd 01 74|74 01 cd 7d) prtyd r13,r14
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88: (7d 5c 02 a6|a6 02 5c 7d) mfcfar r10
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8c: (7d 7c 03 a6|a6 03 7c 7d) mtcfar r11
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90: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5
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94: (7d 4b 66 2a|2a 66 4b 7d) lwzcix r10,r11,r12
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98: (ee 11 90 04|04 90 11 ee) dadd f16,f17,f18
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9c: (fe 96 c0 04|04 c0 96 fe) daddq f20,f22,f24
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a0: (7c 60 06 6c|6c 06 60 7c) dss 3
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a4: (7e 00 06 6c|6c 06 00 7e) dssall
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a8: (7c 25 22 ac|ac 22 25 7c) dst r5,r4,1
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ac: (7e 08 3a ac|ac 3a 08 7e) dstt r8,r7,0
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b0: (7c 65 32 ec|ec 32 65 7c) dstst r5,r6,3
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b4: (7e 44 2a ec|ec 2a 44 7e) dststt r4,r5,2
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b8: (7d 4b 63 56|56 63 4b 7d) divwe r10,r11,r12
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bc: (7d 6c 6b 57|57 6b 6c 7d) divwe\. r11,r12,r13
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c0: (7d 8d 77 56|56 77 8d 7d) divweo r12,r13,r14
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c4: (7d ae 7f 57|57 7f ae 7d) divweo\. r13,r14,r15
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c8: (7d 4b 63 16|16 63 4b 7d) divweu r10,r11,r12
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cc: (7d 6c 6b 17|17 6b 6c 7d) divweu\. r11,r12,r13
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d0: (7d 8d 77 16|16 77 8d 7d) divweuo r12,r13,r14
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d4: (7d ae 7f 17|17 7f ae 7d) divweuo\. r13,r14,r15
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d8: (7e 27 d9 f8|f8 d9 27 7e) bpermd r7,r17,r27
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dc: (7e 8a 02 f4|f4 02 8a 7e) popcntw r10,r20
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e0: (7e 8a 03 f4|f4 03 8a 7e) popcntd r10,r20
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e4: (7e 95 b4 28|28 b4 95 7e) ldbrx r20,r21,r22
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e8: (7e 95 b5 28|28 b5 95 7e) stdbrx r20,r21,r22
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ec: (7d 40 56 ee|ee 56 40 7d) lfiwzx f10,0,r10
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f0: (7d 49 56 ee|ee 56 49 7d) lfiwzx f10,r9,r10
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f4: (ec 80 2e 9c|9c 2e 80 ec) fcfids f4,f5
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f8: (ec 80 2e 9d|9d 2e 80 ec) fcfids\. f4,f5
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fc: (ec 80 2f 9c|9c 2f 80 ec) fcfidus f4,f5
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100: (ec 80 2f 9d|9d 2f 80 ec) fcfidus\. f4,f5
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104: (fc 80 29 1c|1c 29 80 fc) fctiwu f4,f5
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108: (fc 80 29 1d|1d 29 80 fc) fctiwu\. f4,f5
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10c: (fc 80 29 1e|1e 29 80 fc) fctiwuz f4,f5
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110: (fc 80 29 1f|1f 29 80 fc) fctiwuz\. f4,f5
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114: (fc 80 2f 5c|5c 2f 80 fc) fctidu f4,f5
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118: (fc 80 2f 5d|5d 2f 80 fc) fctidu\. f4,f5
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11c: (fc 80 2f 5e|5e 2f 80 fc) fctiduz f4,f5
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120: (fc 80 2f 5f|5f 2f 80 fc) fctiduz\. f4,f5
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124: (fc 80 2f 9c|9c 2f 80 fc) fcfidu f4,f5
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128: (fc 80 2f 9d|9d 2f 80 fc) fcfidu\. f4,f5
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12c: (fc 0a 59 00|00 59 0a fc) ftdiv cr0,f10,f11
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130: (ff 8a 59 00|00 59 8a ff) ftdiv cr7,f10,f11
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134: (fc 00 51 40|40 51 00 fc) ftsqrt cr0,f10
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138: (ff 80 51 40|40 51 80 ff) ftsqrt cr7,f10
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13c: (7e 08 4a 2c|2c 4a 08 7e) dcbtt r8,r9
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140: (7e 08 49 ec|ec 49 08 7e) dcbtstt r8,r9
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144: (ed 40 66 44|44 66 40 ed) dcffix f10,f12
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148: (ee 80 b6 45|45 b6 80 ee) dcffix\. f20,f22
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14c: (7d 4b 60 68|68 60 4b 7d) lbarx r10,r11,r12
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150: (7d 4b 60 68|68 60 4b 7d) lbarx r10,r11,r12
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154: (7d 4b 60 69|69 60 4b 7d) lbarx r10,r11,r12,1
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158: (7e 95 b0 e8|e8 b0 95 7e) lharx r20,r21,r22
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15c: (7e 95 b0 e8|e8 b0 95 7e) lharx r20,r21,r22
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160: (7e 95 b0 e9|e9 b0 95 7e) lharx r20,r21,r22,1
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164: (7d 4b 65 6d|6d 65 4b 7d) stbcx\. r10,r11,r12
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168: (7d 4b 65 ad|ad 65 4b 7d) sthcx\. r10,r11,r12
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16c: (fd c0 78 30|30 78 c0 fd) fre f14,f15
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170: (fd c0 78 31|31 78 c0 fd) fre\. f14,f15
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174: (ed c0 78 30|30 78 c0 ed) fres f14,f15
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178: (ed c0 78 31|31 78 c0 ed) fres\. f14,f15
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17c: (fd c0 78 34|34 78 c0 fd) frsqrte f14,f15
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180: (fd c0 78 35|35 78 c0 fd) frsqrte\. f14,f15
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184: (ed c0 78 34|34 78 c0 ed) frsqrtes f14,f15
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188: (ed c0 78 35|35 78 c0 ed) frsqrtes\. f14,f15
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18c: (7c 43 27 1e|1e 27 43 7c) isel r2,r3,r4,28
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190: (60 42 00 00|00 00 42 60) ori r2,r2,0
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194: (60 00 00 00|00 00 00 60) nop
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198: (60 00 00 00|00 00 00 60) nop
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19c: (60 42 00 00|00 00 42 60) ori r2,r2,0
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1a0: (7f 7b db 78|78 db 7b 7f) yield
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1a4: (7f 7b db 78|78 db 7b 7f) yield
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1a8: (7f bd eb 78|78 eb bd 7f) mdoio
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1ac: (7f bd eb 78|78 eb bd 7f) mdoio
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1b0: (7f de f3 78|78 f3 de 7f) mdoom
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1b4: (7f de f3 78|78 f3 de 7f) mdoom
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1b8: (7d 40 e2 a6|a6 e2 40 7d) mfppr r10
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1bc: (7d 62 e2 a6|a6 e2 62 7d) mfppr32 r11
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1c0: (7d 80 e3 a6|a6 e3 80 7d) mtppr r12
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1c4: (7d a2 e3 a6|a6 e3 a2 7d) mtppr32 r13
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.*: (7c 64 2e 98|98 2e 64 7c) lxvd2x vs3,r4,r5
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.*: (7d 64 2e 99|99 2e 64 7d) lxvd2x vs43,r4,r5
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.*: (7c 64 2f 98|98 2f 64 7c) stxvd2x vs3,r4,r5
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.*: (7d 64 2f 99|99 2f 64 7d) stxvd2x vs43,r4,r5
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.*: (f0 64 28 50|50 28 64 f0) xxmrghd vs3,vs4,vs5
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.*: (f1 6c 68 57|57 68 6c f1) xxmrghd vs43,vs44,vs45
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.*: (f0 64 2b 50|50 2b 64 f0) xxmrgld vs3,vs4,vs5
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.*: (f1 6c 6b 57|57 6b 6c f1) xxmrgld vs43,vs44,vs45
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.*: (f0 64 28 50|50 28 64 f0) xxmrghd vs3,vs4,vs5
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.*: (f1 6c 68 57|57 68 6c f1) xxmrghd vs43,vs44,vs45
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.*: (f0 64 2b 50|50 2b 64 f0) xxmrgld vs3,vs4,vs5
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.*: (f1 6c 6b 57|57 6b 6c f1) xxmrgld vs43,vs44,vs45
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.*: (f0 64 29 50|50 29 64 f0) xxpermdi vs3,vs4,vs5,1
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.*: (f1 6c 69 57|57 69 6c f1) xxpermdi vs43,vs44,vs45,1
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.*: (f0 64 2a 50|50 2a 64 f0) xxpermdi vs3,vs4,vs5,2
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.*: (f1 6c 6a 57|57 6a 6c f1) xxpermdi vs43,vs44,vs45,2
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.*: (f0 64 27 80|80 27 64 f0) xvmovdp vs3,vs4
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.*: (f1 6c 67 87|87 67 6c f1) xvmovdp vs43,vs44
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.*: (f0 64 27 80|80 27 64 f0) xvmovdp vs3,vs4
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.*: (f1 6c 67 87|87 67 6c f1) xvmovdp vs43,vs44
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.*: (f0 64 2f 80|80 2f 64 f0) xvcpsgndp vs3,vs4,vs5
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.*: (f1 6c 6f 87|87 6f 6c f1) xvcpsgndp vs43,vs44,vs45
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.*: (7c 00 00 7c|7c 00 00 7c) wait
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.*: (7c 00 00 7c|7c 00 00 7c) wait
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.*: (4c 00 03 24|24 03 00 4c) doze
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.*: (4c 00 03 64|64 03 00 4c) nap
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.*: (4c 00 03 a4|a4 03 00 4c) sleep
|
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.*: (4c 00 03 e4|e4 03 00 4c) rvwinkle
|
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.*: (7c 83 01 34|34 01 83 7c) prtyw r3,r4
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.*: (7d cd 01 74|74 01 cd 7d) prtyd r13,r14
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.*: (7d 5c 02 a6|a6 02 5c 7d) mfcfar r10
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.*: (7d 7c 03 a6|a6 03 7c 7d) mtcfar r11
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.*: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5
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.*: (7d 4b 66 2a|2a 66 4b 7d) lwzcix r10,r11,r12
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.*: (ee 11 90 04|04 90 11 ee) dadd f16,f17,f18
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.*: (fe 96 c0 04|04 c0 96 fe) daddq f20,f22,f24
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.*: (7c 60 06 6c|6c 06 60 7c) dss 3
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.*: (7e 00 06 6c|6c 06 00 7e) dssall
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.*: (7c 25 22 ac|ac 22 25 7c) dst r5,r4,1
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.*: (7e 08 3a ac|ac 3a 08 7e) dstt r8,r7,0
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.*: (7c 65 32 ec|ec 32 65 7c) dstst r5,r6,3
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.*: (7e 44 2a ec|ec 2a 44 7e) dststt r4,r5,2
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.*: (7d 4b 63 56|56 63 4b 7d) divwe r10,r11,r12
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.*: (7d 6c 6b 57|57 6b 6c 7d) divwe\. r11,r12,r13
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.*: (7d 8d 77 56|56 77 8d 7d) divweo r12,r13,r14
|
||||
.*: (7d ae 7f 57|57 7f ae 7d) divweo\. r13,r14,r15
|
||||
.*: (7d 4b 63 16|16 63 4b 7d) divweu r10,r11,r12
|
||||
.*: (7d 6c 6b 17|17 6b 6c 7d) divweu\. r11,r12,r13
|
||||
.*: (7d 8d 77 16|16 77 8d 7d) divweuo r12,r13,r14
|
||||
.*: (7d ae 7f 17|17 7f ae 7d) divweuo\. r13,r14,r15
|
||||
.*: (7e 27 d9 f8|f8 d9 27 7e) bpermd r7,r17,r27
|
||||
.*: (7e 8a 02 f4|f4 02 8a 7e) popcntw r10,r20
|
||||
.*: (7e 8a 03 f4|f4 03 8a 7e) popcntd r10,r20
|
||||
.*: (7e 95 b4 28|28 b4 95 7e) ldbrx r20,r21,r22
|
||||
.*: (7e 95 b5 28|28 b5 95 7e) stdbrx r20,r21,r22
|
||||
.*: (7d 40 56 ee|ee 56 40 7d) lfiwzx f10,0,r10
|
||||
.*: (7d 49 56 ee|ee 56 49 7d) lfiwzx f10,r9,r10
|
||||
.*: (ec 80 2e 9c|9c 2e 80 ec) fcfids f4,f5
|
||||
.*: (ec 80 2e 9d|9d 2e 80 ec) fcfids\. f4,f5
|
||||
.*: (ec 80 2f 9c|9c 2f 80 ec) fcfidus f4,f5
|
||||
.*: (ec 80 2f 9d|9d 2f 80 ec) fcfidus\. f4,f5
|
||||
.*: (fc 80 29 1c|1c 29 80 fc) fctiwu f4,f5
|
||||
.*: (fc 80 29 1d|1d 29 80 fc) fctiwu\. f4,f5
|
||||
.*: (fc 80 29 1e|1e 29 80 fc) fctiwuz f4,f5
|
||||
.*: (fc 80 29 1f|1f 29 80 fc) fctiwuz\. f4,f5
|
||||
.*: (fc 80 2f 5c|5c 2f 80 fc) fctidu f4,f5
|
||||
.*: (fc 80 2f 5d|5d 2f 80 fc) fctidu\. f4,f5
|
||||
.*: (fc 80 2f 5e|5e 2f 80 fc) fctiduz f4,f5
|
||||
.*: (fc 80 2f 5f|5f 2f 80 fc) fctiduz\. f4,f5
|
||||
.*: (fc 80 2f 9c|9c 2f 80 fc) fcfidu f4,f5
|
||||
.*: (fc 80 2f 9d|9d 2f 80 fc) fcfidu\. f4,f5
|
||||
.*: (fc 0a 59 00|00 59 0a fc) ftdiv cr0,f10,f11
|
||||
.*: (ff 8a 59 00|00 59 8a ff) ftdiv cr7,f10,f11
|
||||
.*: (fc 00 51 40|40 51 00 fc) ftsqrt cr0,f10
|
||||
.*: (ff 80 51 40|40 51 80 ff) ftsqrt cr7,f10
|
||||
.*: (7e 08 4a 2c|2c 4a 08 7e) dcbtt r8,r9
|
||||
.*: (7e 08 49 ec|ec 49 08 7e) dcbtstt r8,r9
|
||||
.*: (ed 40 66 44|44 66 40 ed) dcffix f10,f12
|
||||
.*: (ee 80 b6 45|45 b6 80 ee) dcffix\. f20,f22
|
||||
.*: (fd c0 78 30|30 78 c0 fd) fre f14,f15
|
||||
.*: (fd c0 78 31|31 78 c0 fd) fre\. f14,f15
|
||||
.*: (ed c0 78 30|30 78 c0 ed) fres f14,f15
|
||||
.*: (ed c0 78 31|31 78 c0 ed) fres\. f14,f15
|
||||
.*: (fd c0 78 34|34 78 c0 fd) frsqrte f14,f15
|
||||
.*: (fd c0 78 35|35 78 c0 fd) frsqrte\. f14,f15
|
||||
.*: (ed c0 78 34|34 78 c0 ed) frsqrtes f14,f15
|
||||
.*: (ed c0 78 35|35 78 c0 ed) frsqrtes\. f14,f15
|
||||
.*: (7c 43 27 1e|1e 27 43 7c) isel r2,r3,r4,28
|
||||
.*: (60 42 00 00|00 00 42 60) ori r2,r2,0
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (60 42 00 00|00 00 42 60) ori r2,r2,0
|
||||
.*: (7f 7b db 78|78 db 7b 7f) yield
|
||||
.*: (7f 7b db 78|78 db 7b 7f) yield
|
||||
.*: (7f bd eb 78|78 eb bd 7f) mdoio
|
||||
.*: (7f bd eb 78|78 eb bd 7f) mdoio
|
||||
.*: (7f de f3 78|78 f3 de 7f) mdoom
|
||||
.*: (7f de f3 78|78 f3 de 7f) mdoom
|
||||
.*: (7d 40 e2 a6|a6 e2 40 7d) mfppr r10
|
||||
.*: (7d 62 e2 a6|a6 e2 62 7d) mfppr32 r11
|
||||
.*: (7d 80 e3 a6|a6 e3 80 7d) mtppr r12
|
||||
.*: (7d a2 e3 a6|a6 e3 a2 7d) mtppr32 r13
|
||||
#pass
|
||||
|
|
|
|||
|
|
@ -24,10 +24,6 @@ power7:
|
|||
xvcpsgndp 43,44,45
|
||||
wait
|
||||
wait 0
|
||||
waitrsv
|
||||
wait 1
|
||||
waitimpl
|
||||
wait 2
|
||||
doze
|
||||
nap
|
||||
sleep
|
||||
|
|
@ -83,14 +79,6 @@ power7:
|
|||
dcbtstt 8,9
|
||||
dcffix 10,12
|
||||
dcffix. 20,22
|
||||
lbarx 10,11,12
|
||||
lbarx 10,11,12,0
|
||||
lbarx 10,11,12,1
|
||||
lharx 20,21,22
|
||||
lharx 20,21,22,0
|
||||
lharx 20,21,22,1
|
||||
stbcx. 10,11,12
|
||||
sthcx. 10,11,12
|
||||
fre 14,15
|
||||
fre. 14,15
|
||||
fres 14,15
|
||||
|
|
|
|||
|
|
@ -1,3 +1,17 @@
|
|||
2015-04-27 Peter Bergner <bergner@vnet.ibm.com>
|
||||
|
||||
* ppc-opc.c (DCBT_EO): New define.
|
||||
(powerpc_opcodes) <lbarx>: Enable for POWER8 and later.
|
||||
<lharx>: Likewise.
|
||||
<stbcx.>: Likewise.
|
||||
<sthcx.>: Likewise.
|
||||
<waitrsv>: Do not enable for POWER7 and later.
|
||||
<waitimpl>: Likewise.
|
||||
<dcbt>: Default to the two operand form of the instruction for all
|
||||
"old" cpus. For "new" cpus, use the operand ordering that matches
|
||||
whether the cpu is server or embedded.
|
||||
<dcbtst>: Likewise.
|
||||
|
||||
2015-04-27 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
|
||||
|
||||
* s390-opc.c: New instruction type VV0UU2.
|
||||
|
|
|
|||
|
|
@ -2756,6 +2756,12 @@ extract_vleil (unsigned long insn,
|
|||
#define E6500 PPC_OPCODE_E6500
|
||||
#define PPCVLE PPC_OPCODE_VLE
|
||||
#define PPCHTM PPC_OPCODE_HTM
|
||||
/* The list of embedded processors that use the embedded operand ordering
|
||||
for the 3 operand dcbt and dcbtst instructions. */
|
||||
#define DCBT_EO (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_476 \
|
||||
| PPC_OPCODE_A2 | PPC_OPCODE_VLE)
|
||||
|
||||
|
||||
|
||||
/* The opcode table.
|
||||
|
||||
|
|
@ -4463,7 +4469,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
{"mfvrd", X(31,51)|1, XX1RB_MASK|1, PPCVSX2, PPCNONE, {RA, VS}},
|
||||
{"eratilx", X(31,51), X_MASK, PPCA2, PPCNONE, {ERAT_T, RA, RB}},
|
||||
|
||||
{"lbarx", X(31,52), XEH_MASK, POWER7|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
|
||||
{"lbarx", X(31,52), XEH_MASK, POWER8|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
|
||||
|
||||
{"ldux", X(31,53), X_MASK, PPC64|PPCVLE, PPCNONE, {RT, RAL, RB}},
|
||||
|
||||
|
|
@ -4478,8 +4484,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
{"andc", XRC(31,60,0), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
|
||||
{"andc.", XRC(31,60,1), X_MASK, COM|PPCVLE, PPCNONE, {RA, RS, RB}},
|
||||
|
||||
{"waitrsv", X(31,62)|(1<<21), 0xffffffff, POWER7|E500MC|PPCA2, PPCNONE, {0}},
|
||||
{"waitimpl", X(31,62)|(2<<21), 0xffffffff, POWER7|E500MC|PPCA2, PPCNONE, {0}},
|
||||
{"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, PPCNONE, {0}},
|
||||
{"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, PPCNONE, {0}},
|
||||
{"wait", X(31,62), XWC_MASK, POWER7|E500MC|PPCA2|PPCVLE, PPCNONE, {WC}},
|
||||
|
||||
{"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RA0, RB}},
|
||||
|
|
@ -4543,7 +4549,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
{"mfvrwz", X(31,115)|1, XX1RB_MASK|1, PPCVSX2, PPCNONE, {RA, VS}},
|
||||
{"mfvsrwz", X(31,115), XX1RB_MASK, PPCVSX2, PPCNONE, {RA, XS6}},
|
||||
|
||||
{"lharx", X(31,116), XEH_MASK, POWER7|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
|
||||
{"lharx", X(31,116), XEH_MASK, POWER8|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
|
||||
|
||||
{"clf", X(31,118), XTO_MASK, POWER, PPCNONE, {RA, RB}},
|
||||
|
||||
|
|
@ -4711,9 +4717,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
{"mtvsrwz", X(31,243), XX1RB_MASK, PPCVSX2, PPCNONE, {XT6, RA}},
|
||||
|
||||
{"dcbtstt", XRT(31,246,0x10), XRT_MASK, POWER7, PPCNONE, {RA0, RB}},
|
||||
{"dcbtst", X(31,246), X_MASK, POWER4, PPCNONE, {RA0, RB, CT}},
|
||||
{"dcbtst", X(31,246), X_MASK, PPC|PPCVLE, POWER4, {CT, RA0, RB}},
|
||||
|
||||
{"dcbtst", X(31,246), X_MASK, POWER4, DCBT_EO, {RA0, RB, CT}},
|
||||
{"dcbtst", X(31,246), X_MASK, DCBT_EO, PPCNONE, {CT, RA0, RB}},
|
||||
{"dcbtst", X(31,246), X_MASK, PPC, POWER4|DCBT_EO, {RA0, RB}},
|
||||
|
||||
{"stbux", X(31,247), X_MASK, COM|PPCVLE, PPCNONE, {RS, RAS, RB}},
|
||||
|
||||
{"slliq", XRC(31,248,0), X_MASK, M601, PPCNONE, {RA, RS, SH}},
|
||||
|
|
@ -4753,9 +4760,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
{"lscbx.", XRC(31,277,1), X_MASK, M601, PPCNONE, {RT, RA, RB}},
|
||||
|
||||
{"dcbtt", XRT(31,278,0x10), XRT_MASK, POWER7, PPCNONE, {RA0, RB}},
|
||||
{"dcbt", X(31,278), X_MASK, POWER4, PPCNONE, {RA0, RB, CT}},
|
||||
{"dcbt", X(31,278), X_MASK, PPC|PPCVLE, POWER4, {CT, RA0, RB}},
|
||||
|
||||
{"dcbt", X(31,278), X_MASK, POWER4, DCBT_EO, {RA0, RB, CT}},
|
||||
{"dcbt", X(31,278), X_MASK, DCBT_EO, PPCNONE, {CT, RA0, RB}},
|
||||
{"dcbt", X(31,278), X_MASK, PPC, POWER4|DCBT_EO, {RA0, RB}},
|
||||
|
||||
{"lhzx", X(31,279), X_MASK, COM|PPCVLE, PPCNONE, {RT, RA0, RB}},
|
||||
|
||||
{"cdtbcd", X(31,282), XRB_MASK, POWER6, PPCNONE, {RA, RS}},
|
||||
|
|
@ -5531,7 +5539,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
{"tendall.", XRC(31,686,1)|(1<<25), XRTRARB_MASK, PPCHTM, PPCNONE, {0}},
|
||||
{"tend.", XRC(31,686,1), XRTARARB_MASK, PPCHTM, PPCNONE, {HTM_A}},
|
||||
|
||||
{"stbcx.", XRC(31,694,1), X_MASK, POWER7, PPCNONE, {RS, RA0, RB}},
|
||||
{"stbcx.", XRC(31,694,1), X_MASK, POWER8, PPCNONE, {RS, RA0, RB}},
|
||||
|
||||
{"stfsux", X(31,695), X_MASK, COM, PPCEFS, {FRS, RAS, RB}},
|
||||
|
||||
|
|
@ -5561,7 +5569,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
|
|||
{"stswi", X(31,725), X_MASK, PPCCOM|PPCVLE, E500|E500MC, {RS, RA0, NB}},
|
||||
{"stsi", X(31,725), X_MASK, PWRCOM, PPCNONE, {RS, RA0, NB}},
|
||||
|
||||
{"sthcx.", XRC(31,726,1), X_MASK, POWER7, PPCNONE, {RS, RA0, RB}},
|
||||
{"sthcx.", XRC(31,726,1), X_MASK, POWER8, PPCNONE, {RS, RA0, RB}},
|
||||
|
||||
{"stfdx", X(31,727), X_MASK, COM, PPCEFS, {FRS, RA0, RB}},
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue