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Author SHA1 Message Date
Andrew Cagney
080fe24b58 Fix PR gdb/287. From wiz at danbala. Then->than and typos. 2002-02-25 02:13:10 +00:00
Keith Seitz
b3ba81f8ee * armos.c (SWIWrite0): Use generic host_callback mechanism 
for supported OS functions "open", "close", "write", etc.
	(SWIopen): Likewise.
	(SWIread): Likewise.
	(SWIwrite): Likewise.
	(SWIflen): Likewise.
	(ARMul_OSHandleSWI): Likewise.
 2002-02-21 20:22:49 +00:00
Chris Demetriou
c5d00cc701 2002-02-18 Chris Demetriou <cgd@broadcom.com> 
* mips.igen: For all functions and instructions, list model
        names that support that instruction one per line.
 2002-02-19 08:10:44 +00:00
Chris Demetriou
074e9cb865 2002-02-11 Chris Demetriou <cgd@broadcom.com> 
* mips.igen: Add some additional comments about supported
        models, and about which instructions go where.
        (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
        order as is used in the rest of the file.
 2002-02-11 23:35:07 +00:00
Chris Demetriou
9805e2294e 2002-02-11 Chris Demetriou <cgd@broadcom.com> 
* mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
        indicating that ALU32_END or ALU64_END are there to check
        for overflow.
        (DADD): Likewise, but also remove previous comment about
        overflow checking.
 2002-02-11 22:49:45 +00:00
Chris Demetriou
f701dad2ba 2002-02-10 Chris Demetriou <cgd@broadcom.com> 
* mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
        DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
        JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
        SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
        ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
        fields (i.e., add and move commas) so that they more closely
        match the MIPS ISA documentation opcode partitioning.
 2002-02-11 06:13:49 +00:00
Chris Demetriou
20ae00985d 2002-02-10 Chris Demetriou cgd@sibyte.com 
* mips.igen (ADDI): Print immediate value.
        (BREAK): Print code.
        (DADDIU, DSRAV, DSRLV): Print correct instruction name.
        (SLL): Print "nop" specially, and don't run the code
        that does the shift for the "nop" case.
 2002-02-11 02:19:38 +00:00
Chris Demetriou
6439295f61 2002-02-10 Chris Demetriou <cgd@broadcom.com> 
* callback.c: Fix some spelling errors.
        * hw-device.h: Likewise.
        * hw-tree.c: Likewise.
        * sim-abort.c: Likewise.
        * sim-alu.h: Likewise.
        * sim-core.h: Likewise.
        * sim-events.c: Likewise.
        * sim-events.h: Likewise.
        * sim-fpu.h: Likewise.
        * sim-profile.h: Likewise.
        * sim-utils.c: Likewise.
 2002-02-10 23:11:37 +00:00
Nick Clifton
72ca629fe1 Document check-in procedures 2002-02-07 09:09:13 +00:00
Nick Clifton
c17aa31873 Modify previous patch so that it is only triggered for COFF format executables. 2002-02-05 11:22:26 +00:00
Nick Clifton
25180f8aef If a v5 architecture is detected, assume it might be an XScale binary, since 
there is no way to distinguish between    the two in the COFF file format.
 2002-02-04 16:27:22 +00:00
Andrew Cagney
b78bd0bd68 Revert sh64 changes. Accidently committed. 2002-02-02 04:48:32 +00:00
Ben Elliston
cbb38b47b3 * Contribute Hitachi SH5 simulator. 2002-02-01 11:44:32 +00:00
Hans-Peter Nilsson
dea03d4e10 * cgen-ops.h (ADDCQI, ADDCFQI, ADDOFQI, SUBCQI, SUBCFQI, SUBOFQI): 
New functions.
 2002-01-31 17:55:16 +00:00
Ben Elliston
1636f0bbeb 2002-01-20 Ben Elliston <bje@redhat.com> 
* sim-fpu.h (SIM_FPU_IS_QNAN): Replace "Quite" with "Quiet" in
	the comment for this enumerator.
 2002-01-20 04:09:23 +00:00
Ben Elliston
b59d44decf 2002-01-14 Ben Elliston <bje@redhat.com> 
* sim-fpu.h: Fix comment about sim_fpu_* constants.
 2002-01-14 02:47:59 +00:00
Matthew Green
43c4bab055 * Makefile.in (tmp-igen): Pass -I $(srcdir) to igen. 
* igen.c (main): Change -I to add include paths for :include:
files.
Implement -G as per sim/igen, with just gen-icache=N support.
Call load_insn_table() with the built include path.

* ld-insn.c (parse_include_entry): New. Load an :include: file.
(load_insn_table): New `includes' argument.  Look for :include:
entries and call parse_include_entry() for them.
(main): Adjust load_insn_table() call.
* ld-insn.h (model_include_fields): New enum.
(load_insn_table): Update prototype.
* table.c (struct _open_table, struct _table): Rework
structures to handle included files.
(table_push): Move the guts of table_open() here.

* table.c (struct _open table, struct table): Make table object an
indirect ptr to the current table file.
(current_line, new_table_entry, next_line): Make file arg type
open_table.
(table_open): Use table_push.
(table_entry_read): Point variable file at current table, at eof, pop
last open table.

* misc.h (NZALLOC): New macro. From sim/igen.

* table.h, table.c (table_push): New function.
 2002-01-12 10:21:12 +00:00
Nick Clifton
00125dd034 Add myself as ARM sim maintainer 2002-01-10 11:15:35 +00:00
Nick Clifton
57165fb4bb Fix parameters passed to CPRead[13] and CPRead[14]. 2002-01-10 11:14:57 +00:00
Nick Clifton
86c735a526 General format tidy ups 2002-01-09 15:08:21 +00:00
Nick Clifton
272fcdcd59 Fix bug detected by GDB testsuite - when fetching registers more than 4 
bytes wide return 0 for the other bytes.
 2002-01-09 14:59:22 +00:00
Matthew Green
5c8844646d * bits.c (LSMASKED64): New inline function. 
(LSEXTRACTED64): Likewise.
* bits.h (_LSB_POS, _LSMASKn, LSMASK64): New macros from
sim/common/sim-bits.h
(LSMASKED64, LSEXTRACTED64): New functions definitions.
* Makefile.in (sim-bits.o): Remove target.

* main.c (zalloc): Fix typo in error message.
 2002-01-04 00:00:54 +00:00
Kazu Hirata
280b26c033 * run.c (usage): Fix a typo. 2001-12-21 00:47:18 +00:00
Kazu Hirata
de9b1892f5 * compile.c: Fix formatting. 2001-12-20 17:36:23 +00:00
Kazu Hirata
2ea716f649 * compile.c: Fix comment typos. 2001-12-20 16:47:52 +00:00
Andrew Cagney
3a11ea24fc Don't try to link in sim-bits.o. 2001-12-16 21:00:08 +00:00
Matthew Green
de46f45f87 * main.c: Include "defs.h", "bfd.h", "callback.h" and "remote-sim.h". 
(sim_io_error): New function.
	* sim_calls.c: (sim_io_error): New function.
 2001-12-15 05:08:44 +00:00
Ben Elliston
c9b2b0e016 s/cygnus.com/redhat.com/ 2001-12-15 04:51:01 +00:00
Matthew Green
d29d5195ca * support sim-fpu.c for correct FP emulation. 
* Makefile.in (LIB_OBJ): Add @sim_fpu@.
	(ICACHE_CFLAGS, SEMANTICS_CFLAGS): New variables.
	(icache.o, semantics.o): Add new ICACHE_FLAGS & SEMANTICS_FLAGS.
	(sim-fpu.o, sim-bits.o, tconfig.h): New targets.
	* configure.in: Rename INLINE_LOCALS to PSIM_INLINE_LOCALS.  Add a
	check for sim/common/sim-fpu.c.  Output sim_fpu and sim_fpu_cflags.
	* configure: Regenerate.
	* device.h (device_find_integer_array_property): Match function definition.
	* gen-icache.c (print_icache_internal_function_declaration): Rename
	INLINE_ICACHE to PSIM_INLINE_ICACHE.
	* gen-idecode.c (print_idecode_run_function_header): Rename INLINE_IDECODE
	to PSIM_INLINE_IDECODE.
	* gen-semantics.c (print_semantic_function_header): Rename
	EXTERN_SEMANTICS to PSIM_EXTERN_SEMANTICS.
	* gen-support.c (print_support_function_name): Rename INLINE_SUPPORT to
	PSIM_INLINE_SUPPORT.
	* igen.c (print_function_name): Also escape `(' and `)'.
	(gen_semantics_h): Rename EXTERN_SEMANTICS to PSIM_EXTERN_SEMANTICS.
	(gen_semantics_c): Likewise.  Also output includes for "sim-fpu.h"
	* inline.h (INLINE_SIM_ENDIAN): Renamed INLINE_PSIM_ENDIAN.
	(EXTERN_SIM_ENDIAN): Renamed EXTERN_PSIM_ENDIAN.
	(STATIC_INLINE_SIM_ENDIAN): Renamed STATIC_INLINE_PSIM_ENDIAN.
	(INLINE_LOCALS): Renamed PSIM_INLINE_LOCALS.
	(EXTERN_SUPPORT): Renamed PSIM_EXTERN_SUPPORT.
	(INLINE_SUPPORT): Renamed PSIM_INLINE_SUPPORT.
	(EXTERN_SEMANTICS): Renamed PSIM_EXTERN_SEMANTICS.
	(INLINE_SEMANTICS): Renamed PSIM_INLINE_SEMANTICS.
	(EXTERN_IDECODE): Renamed PSIM_EXTERN_IDECODE.
	(INLINE_IDECODE): Renamed PSIM_INLINE_IDECODE.
	(EXTERN_ICACHE): Renamed PSIM_EXTERN_ICACHE.
	(INLINE_ICACHE): Renamed PSIM_INLINE_ICACHE.
	* options.c (options_inline): Fix names.
	* sim-endian-n.h: Change INLINE_SIM_ENDIAN to INLINE_PSIM_ENDIAN.
	* sim-endian.h: Likewise.
	* sim-main.h: New file.
	* std-config.h: Rename INLINE_LOCALS to PSIM_INLINE_LOCALS.
 2001-12-14 00:22:13 +00:00
Andrew Cagney
7ef2d4e783 * Makefile.in (simops.h, table.c): Delete targets. 
(tmp-gencode, gencode.o, gencode): Delete targets.
(simops.h): New file.
($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h.
* gencode.c: Delete file.
 2001-12-02 19:27:29 +00:00
Andrew Cagney
6654b4ae11 From Mark Peek. 
* ppc-spr-table: Add SDA and PIR.
 2001-12-01 18:56:36 +00:00
Fred Fish
9e52972e45 2001-11-17 Fred Fish <fnf@redhat.com> 
* sim-main.h (float_operation): Move enum declaration outside
	of _sim_cpu struct declaration.
 2001-11-18 06:00:29 +00:00
Ben Harris
6746a76a70 2001-11-16 Ben Harris <bjh21@netbsd.org> 
* Makefile.in (armemu32.o): Replace $< with autoconf recommended
	$(srcdir)/....
	(armemu26.o): Ditto.
 2001-11-16 18:56:01 +00:00
Andrew Cagney
bebd2b3536 when #size-cells is zero, don't expect a size. 2001-11-14 19:54:59 +00:00
Dave Brolley
378af1d671 2001-11-14 Dave Brolley <brolley@redhat.com> 
* arch.c: Regenerate.
	* arch.h: Regenerate.
	* cpu.c: Regenerate.
	* cpu.h: Regenerate.
	* cpuall.h: Regenerate.
	* cpux.c: Regenerate.
	* cpux.h: Regenerate.
	* decode.c: Regenerate.
	* decode.h: Regenerate.
	* decodex.c: Regenerate.
	* decodex.h: Regenerate.
	* model.c: Regenerate.
	* modelx.c: Regenerate.
	* sem-switch.c: Regenerate.
	* sem.c: Regenerate.
	* semx-switch.c: Regenerate.
 2001-11-14 19:51:40 +00:00
Dave Brolley
3e43c635d5 2001-11-14 Dave Brolley <brolley@redhat.com> 
* arch.c: Regenerate.
	* arch.h: Regenerate.
	* cpu.c: Regenerate.
	* cpu.h: Regenerate.
	* cpuall.h: Regenerate.
	* decode.c: Regenerate.
	* decode.h: Regenerate.
	* model.c: Regenerate.
	* sem-switch.c: Regenerate.
	* sem.c: Regenerate.
 2001-11-14 19:50:01 +00:00
Andrew Cagney
560ba567a0 Chirp fixes: 
* hw_htab.c (htab_map_binary): Don't try to map the text section
when it is empty.
* emul_chirp.c (map_over_chirp_note): Default load-base to -1 not
CHIRP_LOAD_BASE.
(emul_chirp_create): Map in the interrupt table.
 2001-10-26 04:37:54 +00:00
Andrew Cagney
457174f645 Enable PowerPC simulator on native linux and netbsd. 2001-10-20 00:16:44 +00:00
Nick Clifton
ff44f8e352 Add support for XScale's coprocessor access check register. 
Fix formatting.
 2001-10-18 12:20:49 +00:00
John R. Moore
962b3eada2 Removed a section of code that didn't do anything, but left values in 
memory. This was labeled as a hack to set r0/r1 with argc/argv.
 2001-08-02 00:50:38 +00:00
Ben Elliston
f18ee7ef71 2001-07-31 Ben Elliston <bje@redhat.com> 
* lib/sim-defs.exp (run_sim_test): Include a description such as
	"assembling" or "linking" that identifies the phase a test fails
	in, for easier analysis of failures.
 2001-07-31 04:59:59 +00:00
Stephane Carrez
eefde3513e * dv-m68hc11eepr.c (m68hc11eepr_info): Fix print of current write 
address.
	(m68hc11eepr_port_event): Fix detach/attach logic.
 2001-07-28 19:19:05 +00:00
Stephane Carrez
00d0c012ef * Makefile.in (SIM_OBJS): Remove sim-resume.o 
* interp.c (sim_resume): New function from sim-resume.c, install
	the stepping event after having processed the pending ticks.
	(has_stepped): Likewise.
	(sim_info): Produce an output only if verbose or STATE_VERBOSE_P.
 2001-07-22 12:33:58 +00:00
Andrew Cagney
bf1bef8f1c Regenerate using autoconf 2.13. 2001-07-18 06:20:29 +00:00
Daniel Jacobowitz
54cfd411af Makefile.in: Add dependencies on $(CPU_H). 2001-07-16 18:36:37 +00:00
Andrew Cagney
b51c76031a * Makefile.in (gencode): Provide explicit path to gencode.c. 2001-07-10 22:46:59 +00:00
Ben Elliston
e3e473dacc 2001-07-05 Ben Elliston <bje@redhat.com> 
* Make-common.in (srccgen): Remove.
	(CGEN_CPU_DIR): Define.
	(CGEN_READ_SCM): Redefine without $(srccgen).
	(CGEN_ARCH_SCM): Ditto.
	(CGEN_CPU_SCM): Ditto.
	(CGEN_DECODE_SCM): Ditto.
	(CGEN_DESC_SCM): Ditto.

	* $arch/Makefile.in: Use $(CGEN_CPU_DIR) where applicable.
 2001-07-05 13:51:26 +00:00
Stephane Carrez
81e09ed832 Improve HC11 simulator to support HC12 2001-05-20 15:40:27 +00:00
Stephane Carrez
11115521f6 * dv-m68hc11sio.c (m68hc11sio_tx_poll): Always check for 
pending interrupts.
	* interrupts.c (interrupts_process): Keep track of the last number
	of masked insn cycles.
	(interrupts_initialize): Clear last number of masked insn cycles.
	(interrupts_info): Report them.
	(interrupts_update_pending): Compute clear and set masks of
	interrupts and clear the interrupt bits before setting them
	(due to SCI interrupt sharing).
	* interrupts.h (struct interrupts): New members last_mask_cycles
	and xirq_last_mask_cycles.
 2001-05-20 15:36:29 +00:00
Nick Clifton
fb7a8ef0df Fix handling of XScale LDRD and STRD instructions with post indexed addressing modes. 2001-05-11 21:51:07 +00:00