2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_begin): Use i386_regtab_size to scan
i386_regtab.
(parse_register): Use i386_regtab_size instead of ARRAY_SIZE
on i386_regtab.
opcodes/
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.c: Include "libiberty.h".
(i386_regtab): Remove the last entry.
(i386_regtab_size): New.
(i386_float_regtab_size): Likewise.
* i386-opc.h (i386_regtab_size): New.
(i386_float_regtab_size): Likewise.
* config/tc-i386.h (Seg2ShortForm, Seg3ShortForm): Delete.
* config/tc-i386.c: Wrap overly long lines, whitespace fixes.
(process_operands): Move old Seg2ShortForm and Seg3ShortForm
code, and test for these insns using a combination of
opcode_modifier and operand_types.
include/opcode/
* i386.h (i386_optab): Replace all occurrences of Seg2ShortForm
and Seg3ShortFrom with Shortform.
PR gas/3826
* config/tc-i386.c (register_prefix): New.
(set_intel_syntax): Set set_intel_syntax to "" if register
prefix is needed.
(check_byte_reg): Use register_prefix for error message.
(check_long_reg): Likewise.
(check_qword_reg): Likewise.
(check_word_reg): Likewise.
* config/tc-i386.c (process_operands): Check i.reg_operands
and increment i.operands when adding a register operand.
(build_modrm_byte): Fix 4 operand instruction handling.
* config/tc-i386.c (disp_expressions): Use MAX_MEMORY_OPERANDS
for array size instead of 2.
(im_expressions): Use MAX_IMMEDIATE_OPERANDS for for array size
instead of 2.
(i386_immediate): Update immediate operand overflow error
message.
(i386_displacement): Check displacement operand overflow.
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/3712
* config/tc-i386.c (match_template): Use MAX_OPERANDS for the
number of operands. Issue an error if MAX_OPERANDS != 4. Add
the 4th operand check.
gas/testsuite/
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/3712
* gas/i386/inval.s: Add invalid insertq.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/inval.l: Updated.
* gas/i386/x86-64-inval.l: Likewise.
* bfd/elf64-x86-64.c: Add FreeBSD support.
(elf64_x86_64_fbsd_post_process_headers): New function.
* bfd/targets.c (_bfd_target_vector): Add bfd_elf64_x86_64_freebsd_vec.
* bfd/config.bfd (x64_64-*-freebsd*): Add bfd_elf64_x86_64_freebsd_vec to the targ_selvecs.
* bfd/configure.in: Add entry for bfd_elf64_x86_64_freebsd_vec.
* bfd/configure: Regenerate.
* gas/config/tc-i386.c (md_parse_option): Treat any target starting with elf64_x86_64 as a viable target for the -64 switch.
(i386_target_format): For 64-bit ELF flavoured output use ELF_TARGET_FORMAT64.
* gas/config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
* ld/emulparams/elf_x86_64_fbsd.sh (OUTPUT_FORMAT): Define as elf64-x86-64-freebsd.
2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch_tune_set): New.
(cpu_arch_isa): Likewise.
(i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
nops with short or long nop sequences based on -march=/.arch
and -mtune=.
(set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
set cpu_arch_tune and cpu_arch_tune_flags.
(md_parse_option): For -march=, set cpu_arch_isa and set
cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
0. Set cpu_arch_tune_set to 1 for -mtune=.
(i386_target_format): Don't set cpu_arch_tune.
gas/testsuite/
2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run nops-1, nops-1-i386, nops-1-i686,
nops-1-merom, nops-2, nops-2-i386, nops-2-merom, x86-64-nops-1,
x86-64-nops-1-k8, x86-64-nops-1-nocona and x86-64-nops-1-merom.
* gas/i386/nops-1.s: New file.
* gas/i386/nops-2.s: Likewise.
* gas/i386/nops-1-i386.d: Likewise.
* gas/i386/nops-1-i686.d: Likewise.
* gas/i386/nops-1-merom.d: Likewise.
* gas/i386/nops-1.d: Likewise.
* gas/i386/nops-2-i386.d: Likewise.
* gas/i386/nops-2-merom.d: Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/x86-64-nops-1.s: Likewise.
* gas/i386/x86-64-nops-1-k8.d: Likewise.
* gas/i386/x86-64-nops-1-merom.d: Likewise.
* gas/i386/x86-64-nops-1-nocona.d: Likewise.
* gas/i386/x86-64-nops-1.d: Likewise.
* gas/i386/sse2.d: Updated to expect xchg %ax,%ax as 2 byte
nop.
bfd/ChangeLog:
* reloc.c: Add BFD_RELOC_X86_64_GOT64, BFD_RELOC_X86_64_GOTPCREL64,
BFD_RELOC_X86_64_GOTPC64, BFD_RELOC_X86_64_GOTPLT64,
BFD_RELOC_X86_64_PLTOFF64.
* bfd-in2.h: Regenerated.
* libbfd.h: Regenerated.
* elf64-x86-64.c (x86_64_elf_howto_table): Correct comment.
Add howtos for above relocs.
(x86_64_reloc_map): Add mappings for new relocs.
(elf64_x86_64_check_relocs): R_X86_64_GOT64, R_X86_64_GOTPCREL64,
R_X86_64_GOTPLT64 need a got entry. R_X86_64_GOTPLT64 also a PLT
entry. R_X86_64_GOTPC64 needs a .got section. R_X86_64_PLTOFF64
needs a PLT entry.
(elf64_x86_64_gc_sweep_hook): Reflect changes from
elf64_x86_64_check_relocs for the new relocs.
(elf64_x86_64_relocate_section): Handle new relocs.
gas/ChangeLog:
* config/tc-i386.c (type_names): Correct placement of 'static'.
(reloc): Map some more relocs to their 64 bit counterpart when
size is 8.
(output_insn): Work around breakage if DEBUG386 is defined.
(output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
different from i386.
(output_imm): Ditto.
(lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
Imm64.
(md_convert_frag): Jumps can now be larger than 2GB away, error
out in that case.
(tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
gas/testsuite/ChangeLog:
* gas/i386/reloc64.s: Accept 64-bit forms.
* gas/i386/reloc64.d: Adjust.
* gas/i386/reloc64.l: Adjust.
include/ChangeLog:
* elf/x86-64.h: Add the new relocations with their official
numbers.
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (output_insn): Support Intel Merom New
Instructions.
* gas/config/tc-i386.h (CpuMNI): New.
(CpuUnknownFlags): Add CpuMNI.
gas/testsuite/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add merom and x86-64-merom.
* gas/i386/merom.d: New file.
* gas/i386/merom.s: Likewise.
* gas/i386/x86-64-merom.d: Likewise.
* gas/i386/x86-64-merom.s: Likewise.
include/opcode/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel Merom New Instructions.
opcodes/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
Intel Merom New Instructions.
(THREE_BYTE_0): Likewise.
(THREE_BYTE_1): Likewise.
(three_byte_table): Likewise.
(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
THREE_BYTE_1 for entry 0x3a.
(twobyte_has_modrm): Updated.
(twobyte_uses_SSE_prefix): Likewise.
(print_insn): Handle 3-byte opcodes used by Intel Merom New
Instructions.
2005-12-14 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (add_prefix): More fine-grained handling of
REX prefixes. Or new prefix value into i.prefix instead of
assigning.
gas/testsuite/
2005-12-14 Jan Beulich <jbeulich@novell.com>
* gas/i386/rex.[sd]: New.
* gas/i386/i386.exp: Run new test.
