Michael Meissner
241b462435
Print compare bits in human readible form
1998-01-28 23:48:13 +00:00
Andrew Cagney
aaa11abe42
Clarify meaning of sim_signalled's SIGRC argument. Document that this
...
isn't possible in sim-reason.c and just return the target SIGRC
instead.
For simulators that rely on sim-reason.c, replace SIG* with SIM_SIG*.
Hack nrun.c so that when it is executed (ARGV[0]) as `step' instead
of `run' it single steps the simulator. Allows testing of single step
without full GDB.
1997-11-22 12:52:44 +00:00
Andrew Cagney
89d0973831
Add support for 16 byte quantities to sim-endian macro H2T.
...
Add model-filter field to option, include, model anf function igen records
1997-10-28 07:10:36 +00:00
Andrew Cagney
b3c77578dc
Rewrite simulator floating point module. Do not rely on host FP
...
implementation. Add preliminary support for different IEEE-754
rounding modes. Implement SQRT in software.
Update TiC80 simulator.
Add sim-fpu -> TestFloat interface for testing.
1997-10-03 00:03:35 +00:00
Andrew Cagney
4113ba4cd7
Passify GCC.
1997-08-30 00:01:12 +00:00
Andrew Cagney
d6fea803dc
Add MSBIT* and LSBIT* macro's to sim-bits.h
...
Add more macro's for extracting sub word quantites to sim-endian.h
1997-08-27 07:56:27 +00:00
Andrew Cagney
128b51546e
Add assembler information to igen input files.
1997-05-30 07:25:13 +00:00
Andrew Cagney
4e95b94e1e
Fix subu immed - was incorrectly using unsigned.
1997-05-29 07:25:20 +00:00
Michael Meissner
8c5b6ead7d
Make getpid, kill supported system calls
1997-05-19 23:02:30 +00:00
Andrew Cagney
f03b093cd3
o Implement generic halt/restart/abort module.
...
Use in tic80 and d30v simulators.
o Add signal hook to sim-core module
1997-05-19 03:42:33 +00:00
Andrew Cagney
37a684b84d
o Make tic80 insn file more `cache ready'
...
o Have igen always zero r0 instead of constantly checking if
the designated register is r0.
1997-05-16 03:27:40 +00:00
Andrew Cagney
07b4c0a66c
Remove some of the flake from the c80 floating point.
1997-05-15 16:39:38 +00:00
Andrew Cagney
aa3a044769
Fix double conversion problem.
1997-05-15 02:21:11 +00:00
Andrew Cagney
2310e3c2b5
Passify gcc's warnings.
1997-05-15 00:14:33 +00:00
Michael Meissner
1b6f4dde35
Make sure r0 == 0; Return EINVAL for system calls that are defined but not provided; Provide traps 74-79 as debugging traps
1997-05-13 22:04:32 +00:00
Andrew Cagney
8490235019
Remove ANNULed cycle - was confusing gdb.
1997-05-13 13:57:49 +00:00
Michael Meissner
d01082ada2
Fix ld/st tracing
1997-05-12 21:16:26 +00:00
Andrew Cagney
c445af5a2b
c80 simulator fixes.
1997-05-12 04:57:49 +00:00
Michael Meissner
8ad6078850
Fix endian problems with ld.d/st.d
1997-05-12 02:04:02 +00:00
Michael Meissner
450be2349a
Fix shift/lmo insns; Subu does arithmetic unsigned
1997-05-11 14:32:32 +00:00
Michael Meissner
20b2f9bc83
And short immediate instructions use unsigned immediates, not signed.
1997-05-10 16:40:21 +00:00
Michael Meissner
89d1a47805
Fix xor in simulator
1997-05-09 20:16:01 +00:00
Michael Meissner
aaa7b25260
Make cmp produce the correct results
1997-05-09 19:48:52 +00:00
Michael Meissner
c3cad878c9
Really fix the bbo/bbz instructions.
1997-05-08 23:04:22 +00:00
Michael Meissner
1e0e7911a5
reverse bit number for bbo/bbz instructions.
1997-05-08 19:58:20 +00:00
Michael Meissner
53dcd669e5
Fix non-anulled calls so that return address is correct
1997-05-08 18:36:00 +00:00
Andrew Cagney
381f42ef5d
o Clean-up tic80 fp tracing
...
o Fill in more tic80 insns
1997-05-07 13:58:52 +00:00
Michael Meissner
7b167b0900
Add semantic tracing to the tic80
1997-05-06 19:27:57 +00:00
Andrew Cagney
3971886ac1
Add flakey floating-point support to the TI c80 simulator.
1997-05-05 12:46:25 +00:00
Andrew Cagney
d9b7594738
o Add core and event objects into simulator
...
base type
o Add preliminary tracing support for same
o trace_printf() takes both SD and CPU arguments
o Add CIA to standard set of parameters for
generated functions.
o Pacify GCC
1997-05-02 05:31:34 +00:00
Andrew Cagney
c1c77d4071
Add Tick shift insn
1997-04-30 08:41:47 +00:00
Andrew Cagney
d5e2c74e38
Numerous fixes.
1997-04-29 08:41:15 +00:00
Andrew Cagney
abe293a0c6
Enable more instructions.
1997-04-24 12:06:27 +00:00
Andrew Cagney
480e740cc1
More Tic80 instructions.
1997-04-23 13:56:14 +00:00
Andrew Cagney
15c1649391
TIc80 simulator checkpoint - runs 3 instructions - trap, addu, br.a.
1997-04-22 17:46:07 +00:00
