Fix shift/lmo insns; Subu does arithmetic unsigned
This commit is contained in:
Michael Meissner
parent
20b2f9bc83
commit
450be2349a
4 changed files with 88 additions and 24 deletions
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@ -1,3 +1,17 @@
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Sun May 11 10:25:14 1997 Michael Meissner <meissner@cygnus.com>
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* cpu.h (tic80_trace_shift): Add declaration.
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(TRACE_SHIFT): New macro to trace shift instructions.
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* misc.c (tic80_trace_alu2): Align spacing.
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(tic80_trace_shift): New function to trace shifts.
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* insns (lmo): Add missing 0b prefix to bits.
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(do_shift): Use ~ (unsigned32)0, instead of -1. Use TRACE_SHIFT
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instead of TRACE_ALU2.
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(sl r): Use EndMask as is, instead of using Source+1 register.
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(subu): Operands are unsigned, not signed.
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Sat May 10 12:35:47 1997 Michael Meissner <meissner@cygnus.com>
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* insns (and{.tt,.tf,.ft,.ff}): Immediate values are unsigned, not
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@ -160,6 +160,7 @@ struct _sim_cpu {
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#if defined(WITH_TRACE)
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extern char *tic80_trace_alu3 PARAMS ((int, unsigned32, unsigned32, unsigned32));
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extern char *tic80_trace_alu2 PARAMS ((int, unsigned32, unsigned32));
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extern char *tic80_trace_shift PARAMS ((int, unsigned32, unsigned32, int, int, int, int, int));
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extern void tic80_trace_fpu3 PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int,
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sim_fpu, sim_fpu, sim_fpu));
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extern void tic80_trace_fpu2 PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int,
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@ -192,6 +193,16 @@ do { \
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} \
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} while (0)
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#define TRACE_SHIFT(indx, result, input, i, n, merge, endmask, rotate) \
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do { \
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if (TRACE_ALU_P (CPU)) { \
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trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
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itable[indx].line_nr, "shift", \
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tic80_trace_shift (indx, result, input, i, n, \
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merge, endmask, rotate)); \
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} \
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} while (0)
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#define TRACE_FPU3(indx, result, input1, input2) \
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do { \
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if (TRACE_FPU_P (CPU)) { \
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@ -706,7 +706,7 @@ void::function::do_ld_u:unsigned32 *rDest, unsigned32 Base, unsigned32 *rBase, i
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// lmo
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31.Dest,26.Source,21.111111000,12.0,11./::::lmo
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31.Dest,26.Source,21.0b111111000,12.0,11./::::lmo
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int b;
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for (b = 0; b < 32; b++)
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if (rSource & BIT32 (31 - b))
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@ -820,7 +820,7 @@ void::function::do_shift:int Dest, int Source, int Merge, int i, int n, int EndM
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}
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/* form the end mask */
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if (EndMask == 0)
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endmask = -1;
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endmask = ~ (unsigned32)0;
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else
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endmask = (1 << EndMask) - 1;
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if (i)
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@ -829,13 +829,13 @@ void::function::do_shift:int Dest, int Source, int Merge, int i, int n, int EndM
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switch (Merge)
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{
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case 0: case 1: case 2:
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shiftmask = -1; /* disabled */
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shiftmask = ~ (unsigned32)0; /* disabled */
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break;
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case 3: case 4: case 5:
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shiftmask = ((1 << nRotate) - 1); /* enabled */
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shiftmask = ((1 << nRotate) - 1); /* enabled */
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break;
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case 6: case 7:
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shiftmask = ~((1 << nRotate) - 1); /* inverted */
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shiftmask = ~((1 << nRotate) - 1); /* inverted */
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break;
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default:
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engine_error (SD, CPU, cia,
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@ -848,13 +848,13 @@ void::function::do_shift:int Dest, int Source, int Merge, int i, int n, int EndM
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/* and merge */
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switch (Merge)
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{
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case 0: case 3: case 6: /* zero */
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case 0: case 3: case 6: /* zero */
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GPR (Dest) = rotated & cm;
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break;
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case 1: case 4: case 7: /* merge */
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case 1: case 4: case 7: /* merge */
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GPR (Dest) = (rotated & cm) | (GPR (Dest) & ~cm);
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break;
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case 2: case 5: /* sign */
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case 2: case 5: /* sign */
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{
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int b;
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GPR (Dest) = rotated & cm;
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@ -870,22 +870,11 @@ void::function::do_shift:int Dest, int Source, int Merge, int i, int n, int EndM
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cia.ip, Source);
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}
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TRACE_ALU2 (MY_INDEX, GPR (Dest), input);
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TRACE_SHIFT (MY_INDEX, GPR (Dest), input, i, n, Merge, EndMask, Rotate);
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31.Dest,26.Source,21.0b0001,17.Merge,14./,11.i,10.n,9.EndMask,4.Rotate::::sl i
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do_shift (_SD, Dest, Source, Merge, i, n, EndMask, Rotate);
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31.Dest,26.Source,21.0b110001,15.Merge,12.0,11.i,10.n,9.EndMask,4.RotReg::::sl r
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int endmask;
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if (EndMask == 0)
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endmask = EndMask;
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else
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{
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if (Source & 1)
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engine_error (SD, CPU, cia,
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"0x%lx: Invalid source (%d) for shift",
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cia.ip, Source);
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endmask = GPR (Source + 1) & 31;
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}
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do_shift (_SD, Dest, Source, Merge, i, n, endmask, GPR (RotReg) & 31);
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do_shift (_SD, Dest, Source, Merge, i, n, EndMask, GPR (RotReg) & 31);
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// sli.{d|e|i}{m|s|z} - see shift
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@ -959,12 +948,12 @@ void::function::do_sub:signed32 *rDest, signed32 Source1, signed32 Source2
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// subu
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void::function::do_subu:signed32 *rDest, signed32 Source1, signed32 Source2
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void::function::do_subu:unsigned32 *rDest, unsigned32 Source1, signed32 Source2
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unsigned32 result = Source1 - Source2;
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TRACE_ALU3 (MY_INDEX, result, Source1, Source2);
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*rDest = result;
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// NOTE - the book has 15.1 which conflicts with subu.
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31.Dest,26.Source2,21.0b101101,15.1,14.SignedImmediate::::subu i
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31.Dest,26.Source2,21.0b101101,15.1,14.UnsignedImmediate::::subu i
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do_subu (_SD, rDest, vSource1, rSource2);
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31.Dest,26.Source2,21.0b11101101,13.1,12.0,11./,4.Source1::::subu r
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do_subu (_SD, rDest, rSource1, rSource2);
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@ -168,12 +168,62 @@ tic80_trace_alu2 (int indx,
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sprintf (tic80_trace_buffer, "%-*s 0x%.*lx/%*ld %*s => 0x%.*lx/%*ld",
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tic80_size_name, itable[indx].name,
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SIZE_HEX, input, SIZE_DECIMAL, (long)(signed32)input,
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SIZE_HEX + SIZE_DECIMAL + 2, "",
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SIZE_HEX + SIZE_DECIMAL + 3, "",
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SIZE_HEX, result, SIZE_DECIMAL, (long)(signed32)result);
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return tic80_trace_buffer;
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}
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/* Trace the result of a shift instruction */
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char *
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tic80_trace_shift (int indx,
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unsigned32 result,
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unsigned32 input,
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int i,
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int n,
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int merge,
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int endmask,
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int rotate)
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{
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const char *merge_name;
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char name[40];
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char *p;
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if (!tic80_size_name)
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tic80_init_trace ();
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switch (merge)
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{
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default: merge_name = ".??"; break;
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case 0: merge_name = ".dz"; break;
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case 1: merge_name = ".dm"; break;
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case 2: merge_name = ".ds"; break;
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case 3: merge_name = ".ez"; break;
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case 4: merge_name = ".em"; break;
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case 5: merge_name = ".es"; break;
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case 6: merge_name = ".iz"; break;
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case 7: merge_name = ".im"; break;
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}
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/* Don't use itable[indx].name, which is just sl {r,i}. Instead reconstruct
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the name, using the i and n fields. */
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p = strchr (itable[indx].name, ' ');
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sprintf (name, "s%s%s%s%s",
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(n) ? "r" : "l",
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(i) ? "i" : "",
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merge_name,
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(p) ? p : "");
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sprintf (tic80_trace_buffer, "%-*s 0x%.*lx/%*ld %*s%2d,%2d => 0x%.*lx/%*ld",
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tic80_size_name, name,
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SIZE_HEX, input, SIZE_DECIMAL, (long)(signed32)input,
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SIZE_HEX + SIZE_DECIMAL - 2, "",
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rotate, endmask,
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SIZE_HEX, result, SIZE_DECIMAL, (long)(signed32)result);
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return tic80_trace_buffer;
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}
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/* Trace the result of an FPU operation with 2 floating point inputs and a floating point output */
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void
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tic80_trace_fpu3 (SIM_DESC sd,
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