Commit graph

1653 commits

Author SHA1 Message Date
Frank Ch. Eigler
f337710aff * SKY hardware interrupt tests.
Wed Jun 10 15:56:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* sim/sky/t-int.c: New file to test sky hardware
	interrupts.
	* sim/sky/t-int-handler.s: New file for null interrupt
	handler.
	* sim/sky/t-int.brn: New file to build new test.
1998-06-10 17:56:19 +00:00
Doug Evans
f3c7eb69df * sim/m32r/addx.cgs: Add another test.
* sim/m32r/jmp.cgs: Add another test.
	* sim/m32r/bra8-2.cgs: New testcase.
	* sim/m32r/hello.ms: Run on m32rx too.
1998-06-10 17:56:18 +00:00
Frank Ch. Eigler
b879096335 * Support for sky hardware interrupts. The sky-dma cannot trigger
interrupts properly yet (jlemke TODO).
Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (decode_coproc): For TX39, add stub COP0 register #7,
 	to allay warnings.
	(interrupt_event): Made non-static.
start-sanitize-tx3904
	* dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
 	interchange of configuration values for external vs. internal
 	clock dividers.
end-sanitize-tx3904
start-sanitize-sky
	* sky-device.c (sky_signal_interrupt): New function to generate
	interrupt event.
	* sky-device.h: Declare it.
	* sky-dma.c (check_int1): Call it.
	* sky-pke.c (pke_begin_interrupt_stall): Call it.
end-sanitize-sky
1998-06-10 17:07:10 +00:00
Patrick Macdonald
a4377bf7bd * Updated several files to place all sky specific runtime options
in sky-gdb.c.
	* Added two new runtime options --sky-debug and --screen-refresh
	* ChangeLog.sky contains a detailed description of the mods
1998-06-10 17:07:09 +00:00
Frank Ch. Eigler
e1b5df344e * Typo fix for tx3904tmr use of configuration parameters.
(ChangeLog entry coming later.)
1998-06-10 08:58:42 +00:00
Ian Carmichael
0001bce1f8 * Handle 10 and 20-bit versions of Break instruction. Move handling
* of special values from signal_exception() in interp.c into mips.igen.
*
* Modified: ChangeLog gencode.c interp.c mips.igen sim-main.h
1998-06-09 22:11:24 +00:00
Frank Ch. Eigler
cc9bc93202 * Updates to tx3904 peripheral simulations for ECC.
Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
 	register upon non-zero interrupt event level, clear upon zero
 	event value.
	* dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
	by passing zero event value.
	(*_io_{read,write}_buffer): Endianness fixes.
	* dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
	(deliver_*_tick): Reduce sim event interval to 75% of count interval.
	* interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
	serial I/O and timer module at base address 0xFFFF0000.
1998-06-09 16:54:09 +00:00
Ian Carmichael
895a7dc2aa * Handle 10 and 20-bit versions of Break instruction. Move handling
* of special values from signal_exception() in interp.c into mips.igen.
*
* Modified: gencode.c interp.c mips.igen sim-main.h
1998-06-09 16:54:08 +00:00
Doug Evans
5724515d03 * sim/sky/dma.h: New file.
* sim/sky/vif.h: New file.
	* sim/sky/vu.h: New file.
	* sim/sky/sce_main.c: Move magic numbers to .h files.
1998-06-09 16:01:59 +00:00
James Lemke
a77734aa1e sky.ld: Remove big endian stuff in OUTPUT_FORMAT 1998-06-09 15:55:49 +00:00
Gavin Romig-Koch
2b5d87dfa4 * mips.igen (SWC1) : Correct the handling of ReverseEndian
and BigEndianCPU.
1998-06-09 15:54:05 +00:00
Gavin Romig-Koch
55ad270f9a * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
parts.
	* configure: Update.
1998-06-09 15:42:04 +00:00
Doug Evans
cacc867752 * sim/m32r/trap.cgs: Test trap 2. 1998-06-08 23:09:54 +00:00
Doug Evans
02c6148370 Test trap 2. 1998-06-08 23:08:49 +00:00
Joyce Janczyn
3d64946ded Support for timers for mn103002. Still needs more testing/debugging. 1998-06-08 21:57:42 +00:00
David Taylor
e62b6fed2a add test to verify that changes made to the PSW in-parallel-with a trap
instruction end up in the bPSW and not in the PSW.  (PR 16026).
1998-06-08 19:18:21 +00:00
Joyce Janczyn
d38f2372a0 Add dv-mn103tim.c and dv-mn103ser.c 1998-06-08 18:09:40 +00:00
Joyce Janczyn
d3f76d42ac Add timer and serial devices (mn103tim and mn103ser), support
--board=am32 for runtime control of device simulation, and adjust
interrupt settings to support am32 instead of am30.
1998-06-08 17:46:25 +00:00
Joyce Janczyn
7cb5d42660 Skeleton file for mn1030002 serial device implementation. 1998-06-08 17:34:04 +00:00
Joyce Janczyn
5f69de151a Fix typo. 1998-06-08 17:28:08 +00:00
Joyce Janczyn
7146013910 Fix interrupt settings for mn103002, not mn10300 implementation. 1998-06-08 17:27:10 +00:00
Joyce Janczyn
6adf5185c1 * interp.c: (mn10300_option_handler): New function parses arguments
using sim-options.
start-sanitize-am30
	* (board): Add --board option for specifying am32.
	* (sim_open): Create new timer and serial devices and control
	configuration of other am32 devices via board option.
end-sanitize-am30
1998-06-08 17:23:11 +00:00
Joyce Janczyn
7f1e9a13b2 Add new devices: mn103tim and mn103ser. 1998-06-08 17:18:02 +00:00
James Lemke
037f29c526 Added support for the VU insn D (debug) & T (trace) bits. 1998-06-04 20:50:55 +00:00
Frank Ch. Eigler
da040f2a6c * Early check-in of tx3904 timer sim implementation for ECC.
It is not yet properly tested.
Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904tmr.c: New file - implements tx3904 timer.
	* dv-tx3904{irc,cpu}.c: Mild reformatting.
	* configure.in: Include tx3904tmr in hw_device list.
	* configure: Rebuilt.
	* interp.c (sim_open): Instantiate three timer instances.
	Fix address typo of tx3904irc instance.
1998-06-04 12:43:45 +00:00
Andrew Cagney
0e797366ef The r5900 doesn't have HI/LO DIV/MUL register problems. Hobble
checks on hi/lo usage but retain functions so that they can be used
for HI/LO stall counting code.
1998-06-04 08:46:56 +00:00
Andrew Cagney
05f6bf9cea Memory corruption problems - hw-event list wasn't correct
unlinking/freeing events.  Couldn't handle the removal of a hw-event
that just been scheduled.
1998-06-04 06:33:02 +00:00
Mark Alexander
7d146b765c * interf.c (sim_open): Use revamped memory_read, which makes
byte-swapping unnecessary.  Add -sparclite-board option for
	emulating RAM found on typical SPARClite boards.  Print
	error message for unrecognized option.
	* erc32.c: Change RAM address and size from constants to variables,
	to allow emulation of SPARClite board RAM.
	(fetch_bytes, store_bytes): New helper functions for revamped
	mememory_read and memory_write.
	(memory_read, memory_write): Rewrite to store bytes in target
	byte order instead of storing words in host byte order; this
	greatly simplifies support of little-endian programs.
	(get_mem_ptr): Remove unnecessary byte parameter.
	(sis_memory_write, sis_memory_read): Store words in target
	byte order instead of host byte order.
	(byte_swap_words): Remove, no longer needed.
	* sis.h ((byte_swap_words): Remove declaration, no longer needed.
	(memory_read): Add new sz parameter.
	* sis.c (run_sim): Use revamped memory_read, which makes
	byte-swapping unnecessary.
	* exec.c (dispatch_instruction): Use revamped memory_read, which
	makes byte-swapping and double-word fetching unnecessary.
	* func.c (sparclite_board): Declare new variable.
	(get_regi): Handle little-endian data.
	(bfd_load): Recognize little-endian SPARClite as having
	little-endian data.
1998-06-02 22:43:46 +00:00
Nick Clifton
e3ace30a61 Allow simulator to work with Angel SWIs. 1998-06-02 22:23:52 +00:00
Ian Carmichael
4979c0a271 * Move the sanitize comments to the right place. 1998-06-02 21:04:49 +00:00
Ian Carmichael
8e3a0b599f * SYSCALL now uses exception vector.
* SKY: New memory mapping rules for k1seg, k0seg.
* Modified Files: ChangeLog.sky ChangeLog interp.c sim-main.c
1998-06-02 19:53:36 +00:00
Jason Molenda
7d449b448b Mon Jun 1 17:14:19 1998 Anthony Thompson (athompso@cambridge.arm.com)
* armos.c (ARMul_OSHandleSWI::SWI_Open): Handle special case
        of ":tt" to catch stdin in addition to stdout.
        (ARMul_OSHandleSWI::SWI_Seek): Return 0 or 1 to indicate failure
        or success of lseek().

From PR 15839, modified a bit by me to appease my sense of style--but
not too much because I am lazy.
1998-06-02 00:18:31 +00:00
Frank Ch. Eigler
29b5afe9af * Small TX39-only patch for ECC.
Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (decode_coproc): For TX39, add stub COP0 register #3,
	to allay warnings.
1998-06-01 16:29:43 +00:00
Jeff Law
fb0ea2b9e1 * r5900.igen (rsqrt.s): Update based on r5900 ISA manual version 2.1.
(sqrt.s): Likewise.
1998-06-01 16:29:42 +00:00
Frank Ch. Eigler
22134bdb43 * sky test suite fixes.
Mon Jun  1 18:54:22 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* lib/sim-defs.exp (sim_run): Add possible environment variable
 	list to simulator run.
start-sanitize-sky
	* sim/sky/sky-defs.tcl: Use it.
	* sim/sky/t-pke2.vif1out: Update to match recent word-precise
 	tracking table change in sim/mips/sky-pke.c.
	* sim/sky/t-pke3.trc: Ditto.
	* sim/sky/t-pke4.vif0expect: Ditto.
end-sanitize-sky
Mon May 18 10:37:47 1998  Doug Evans  <devans@canuck.cygnus.com>
1998-06-01 16:09:52 +00:00
Andrew Cagney
df26156d68 Match mips*tx39 not mipst*tx39. 1998-05-29 01:42:20 +00:00
Andrew Cagney
451a9c0587 Pull in preliminary versions of hw instances and handles from ../ppc 1998-05-25 11:33:28 +00:00
Andrew Cagney
48f83b1a2e Make hw-main.h the main header file for H/W devices. Like sim-main.h
Update dv-*.c
Replace *_callback with more correct. *_method. Update dv-*.c
1998-05-25 11:06:29 +00:00
Andrew Cagney
c14db36dbb Add files hw-alloc.[hc] (mising from last CI)
Move set_* macro's from hw-base to hw-device.
1998-05-25 08:50:22 +00:00
Andrew Cagney
325a1ba876 Initialize/destory hw-properties within the hw-device. 1998-05-25 08:29:05 +00:00
Andrew Cagney
69be0d4cb8 Split out hw-alloc code. Add constructor and destructor for hw-alloc. 1998-05-25 08:18:03 +00:00
Andrew Cagney
39e953a722 Split out hw-event code. Clean up interface. Update all users. 1998-05-25 07:37:30 +00:00
Andrew Cagney
2f06c437e2 Clean up create/delete of hw-ports 1998-05-25 07:08:48 +00:00
Andrew Cagney
f675744718 * hw-device.c (hw_ioctl), hw-device.h (hw_ioctl_callback): Drop
PROCESSOR and CIA arguments.
1998-05-25 06:44:39 +00:00
Andrew Cagney
1e1dcdf0d9 De-sanitize simulator hw. 1998-05-25 06:20:43 +00:00
Andrew Cagney
ce82378189 Fix mips SWL on 64bit ISA when 32 bit word appears in second half of
64 bit bus.
Test.
1998-05-25 05:48:34 +00:00
Ron Unrau
aa81c3ca99 * Initial support for "sim list vif[01]" 1998-05-24 13:06:09 +00:00
Andrew Cagney
f872d0d643 Only enable H/W on some mips targets.
Move common hw-obj to Make-common
Pacify GCC
1998-05-22 05:23:04 +00:00
Andrew Cagney
32d41f6ddb Sanity clause 1998-05-22 02:08:26 +00:00
Andrew Cagney
56833aba59 Back out of hw-main _callback -> _descriptor changes 1998-05-22 01:12:06 +00:00