Commit graph

530 commits

Author SHA1 Message Date
Ian Lance Taylor
0270516b96 Thu Feb 27 14:04:32 1997 Philippe De Muyter <phdm@info.ucl.ac.be>
* m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
1997-02-27 19:06:15 +00:00
Michael Meissner
dcbf6f077f Deal with 64 bit instruction sizes on the tic80 1997-02-27 16:37:37 +00:00
Michael Meissner
6757ae582b Define r25 1997-02-26 21:59:58 +00:00
Ian Lance Taylor
2ef564d268 Wed Feb 26 13:38:30 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
* m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
	floatformat_to_double to make portable.
	(print_insn_arg): Use NEXTEXTEND macro when extracting extended
	precision float.
1997-02-26 18:53:18 +00:00
Fred Fish
17990badfc * tic80-opc.c (LSI_SCALED): Renamed from this ...
(OFF_SL_BR_SCALED): ... to this, and added the flag
	TIC80_OPERAND_BASEREL to the flags word.
	(tic80_opcodes): Replace all occurances of LSI_SCALED with
	OFF_SL_BR_SCALED.
1997-02-24 21:46:54 +00:00
Ian Lance Taylor
8a974fdc24 update copyrights 1997-02-23 23:05:35 +00:00
Dawn Perchik
a2768484d9 * mips-opc.c: Add macros for cop0, cop1 cop2 and cop3.
Change mips_opcodes from const array to a pointer,
	and change bfd_mips_num_opcodes from const int to int,
	so that we can increase the size of the mips opcodes table
	dynamically.
1997-02-23 22:26:01 +00:00
Fred Fish
c7583da0b6 * tic80-opc.c (tic80_predefined_symbols): Revert change to
store BITNUM values in the table in one's complement form
	to match behavior when assembler is given a raw numeric
	value for a BITNUM operand.
	* tic80-dis.c (print_operand_bitnum): Ditto.
1997-02-23 04:06:51 +00:00
Martin Hunt
4fe23bdd06 Fri Feb 21 16:31:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
* d30v-opc.c: Removed references to FLAG_X.
1997-02-22 00:32:23 +00:00
Michael Meissner
b934926eac Since d10v is public now, remove all sanitization statements 1997-02-20 17:00:14 +00:00
Michael Meissner
c6c7035cfb Since d10v is public now, remove all sanitization statements 1997-02-20 16:05:18 +00:00
Ian Lance Taylor
7adf26304e * Makefile.in: Add dependencies on ../bfd/bfd.h as required. 1997-02-19 19:52:17 +00:00
Martin Hunt
b2e3f8442a Tue Feb 18 17:43:43 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
* Makefile.in: Added d30v object files.
	* configure: (bfd_d30v_arch) Rebuilt.
	* configure.in: (bfd_d30v_arch) Added new case.
	* d30v-dis.c: New file.
	* d30v-opc.c: New file.
	* disassemble.c (disassembler) Add entry for d30v.
1997-02-19 01:53:26 +00:00
Fred Fish
49d1bbbef2 * tic80-opc.c (tic80_predefined_symbols): Add symbolic
representations for the floating point BITNUM values.
1997-02-18 23:34:35 +00:00
Gavin Romig-Koch
1d339e4849 fixes bugs caused by adding 5900 1997-02-14 18:57:43 +00:00
Ian Lance Taylor
246c54580e Thu Feb 13 21:56:51 1997 Klaus Kaempf <kkaempf@progis.de>
* makefile.vms: Remove 8 bit characters.  Update to latest
	gcc release.
1997-02-14 02:57:52 +00:00
Ian Lance Taylor
03514bc871 Thu Feb 13 20:41:22 1997 Philippe De Muyter <phdm@info.ucl.ac.be>
* m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction.
1997-02-14 01:43:14 +00:00
Jeff Law
9bd0068fc8 * mn10200-opc.c (IMM16_PCREL): This is a signed operand.
(IMM24_PCREL): Likewise.
Fixes bugs exposed by disassembler testsuite.
1997-02-13 23:31:53 +00:00
Ian Lance Taylor
6617b927da * mips-dis.c (print_mips16_insn_arg): Use memaddr - 2 as the base
address for an extended PC relative instruction that is not a
	branch.
1997-02-13 18:29:25 +00:00
Ian Lance Taylor
d1c52e5b5c Wed Feb 12 12:27:40 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
* m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
	bytes_per_line.
1997-02-12 17:28:14 +00:00
Fred Fish
e2773136e0 * tic80-opc.c (tic80_operands): Fix typo '+' -> '|'.
(tic80_opcodes): Sort entries so that long immediate forms
	come after short immediate forms, making it easier for
	assembler to select the right one for a given operand.
1997-02-11 23:48:15 +00:00
Ian Lance Taylor
2ea116f49b * mips-dis.c (_print_insn_mips): Set bytes_per_chunk and
display_endian.
	(print_insn_mips16): Likewise.
1997-02-11 20:46:14 +00:00
Gavin Romig-Koch
276c2d7dc8 Add r5900 1997-02-11 13:26:34 +00:00
Fred Fish
c37555c141 * tic80-opc.c (tic80_symbol_to_value): Changed to accept
a symbol class that restricts translation to just that
	class (general register, condition code, etc).
1997-02-10 17:16:28 +00:00
Fred Fish
cceb79baa8 * tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E,
and REG_DEST_E for register operands that have to be
	an even numbered register.  Add REG_FPA for operands that
	are one of the floating point accumulator registers.
	Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
	(tic80_opcodes): Change entries that need even numbered
	register operands to use the new operand table entries.
	Add "or" entries that are identical to "or.tt" entries.
1997-02-07 00:38:44 +00:00
Ian Lance Taylor
0d52464ce4 * mips16-opc.c: Add new cases of exit instruction for
disassembler.
	* mips-dis.c (print_mips16_insn_arg): Display floating point
	registers in operands of exit instruction.  Print `$' before
	register names in operands of entry and exit instructions.
1997-02-05 16:14:26 +00:00
Fred Fish
6cb5b585c5 * tic80-opc.c (tic80_predefined_symbols): Table of name/value
pairs for all predefined symbols recognized by the assembler.
	Also used by the disassembling routines.
	(tic80_symbol_to_value): New function.
	(tic80_value_to_symbol): New function.
	* tic80-dis.c (print_operand_control_register,
 	print_operand_condition_code, print_operand_bitnum):
	Remove private tables and use tic80_value_to_symbol function.
1997-01-30 21:16:46 +00:00
Martin Hunt
f28d34be74 Thu Jan 30 11:30:45 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
* d10v-dis.c (print_operand): Change address printing
	to correctly handle PC wrapping.  Fixes PR11490.
1997-01-30 19:33:11 +00:00
Jeff Law
c9f649022e * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
branchs relaxable.
1997-01-29 16:40:15 +00:00
Ian Lance Taylor
20d4301801 * mips-dis.c (print_insn_mips16): Set insn_info information.
(print_mips16_insn_arg): Likewise.
1997-01-28 21:49:18 +00:00
Ian Lance Taylor
c4f19df2ef * mips-dis.c (print_insn_mips16): Better handling of an extend
opcode followed by an instruction which can not be extended.
1997-01-28 20:58:28 +00:00
J.T. Conklin
071ad7f0e0 * m68k-opc.c (m68k_opcodes): Changed operand specifier for the
coldfire moveb instruction to not allow an address register as
destination.  Although the documentation does not indicate that
this is invalid, experiments uncovered unexpected behavior.
Added a comment explaining the situation.  Thanks to Andreas
Schwab for pointing this out to me.
1997-01-24 20:14:26 +00:00
Fred Fish
1eb54bb463 * tic80-opc.c (tic80_opcodes): Expand comment to note that the
entries are presorted so that entries with the same mnemonic are
	adjacent to each other in the table.  Sort the entries for each
	instruction so that this is true.
1997-01-23 03:17:45 +00:00
Ian Lance Taylor
84be8dcf9e Mon Jan 20 12:48:57 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
* m68k-dis.c: Include <libiberty.h>.
	(print_insn_m68k): Sort the opcode table on the most significant
	nibble of the opcode.
1997-01-20 17:50:34 +00:00
Fred Fish
68c7761c42 * tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd",
"vsub", "vst", "xnor", and "xor" instructions.
      (V_a1): Renamed from V_a, msb of accumulator reg number.
      (V_a0): Add macro, lsb of accumulator reg number.
1997-01-19 22:24:21 +00:00
Fred Fish
8fdffbc4b3 * tic80-dis.c (print_insn_tic80): Broke excessively long
function up into several smaller ones and arranged for
        the instruction printing function to be callable recursively
        to print vector instructions that have both a load and a
        math instruction packed into a single opcode.
        * tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
        to explain why it comes after the other vector opcodes.
1997-01-19 18:33:10 +00:00
J.T. Conklin
c49bbc27db fix operand mask in the "moveml" entries for the coldfire. 1997-01-18 00:37:30 +00:00
J.T. Conklin
a3d4e445d2 From the coldfire branch:
* m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
	move insns to handle immediate operands.

From Andreas Schwab:

        * m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
1997-01-18 00:27:23 +00:00
Fred Fish
c977d8fb7b * tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V):
New macros for building vector instruction opcodes.
	(tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
	FMT_LI, which were unused.  The field is now a flags field.
	Remove some opcodes that are possible, but illegal, such
	as long immediate instructions with doubles for immediate
	values.  Add "vadd" and "vld" instructions.
1997-01-17 04:00:56 +00:00
Fred Fish
5fdeceb477 * tic80-opc.c (tic80_operands): Reorder some table entries to make
the order more logical.  Move the shift alias instructions ("rotl",
	"shl", "ins", "rotr", "extu", "exts", "srl", and "sra" to be
 	interspersed with the regular sr.x and sl.x instructions.  Add
	and test new instruction opcodes for "sl", "sli", "sr", "sri", "st",
 	"sub", "subu", "swcr", and "trap".
1997-01-16 02:10:17 +00:00
Fred Fish
003df61759 * tic80-dis.c (print_insn_tic80): Print floating point operands
as floats.
      * tic80-opc.c (SPFI): Add single precision floating point
      immediate operand type.
      (ROTATE): Add rotate operand type for shifts.
      (ENDMASK): Add for shifts.
      (n): Macro for the 'n' bit.
      (i): Macro for the 'i' bit.
      (PD): Macro for the 'PD' field.
      (P2): Macro for the 'P2' field.
      (P1): Macro for the 'P1' field.
      (tic80_operands): Add entries for "exts", "extu", "fadd",
      "fcmp", and "fdiv".
1997-01-13 23:05:49 +00:00
Jeff Law
1b8a127fe7 Fix copyright. 1997-01-06 22:14:13 +00:00
Jeff Law
09171e3fe6 * mn10200-dis.c (disassemble): Mask off unwanted bits after
adding in current address for pc-relative operands.
Fixes disassembly of backwards 24bit pc-relative addressese.
1997-01-06 22:13:39 +00:00
Fred Fish
50965d0ec2 * tic80-dis.c (R_SCALED): Add macro to test for ":s" modifier bit.
(print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
	* tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
	changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
	(SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
	REG_BASE_M_SI, REG_BASE_M_LI respectively.
	(REG_SCALED, LSI_SCALED): New operand types.
	(E): New macro for 'E' bit at bit 27.
	(tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
	opcodes, including the various size flavors (b,h,w,d) for
	the direct load and store instructions.
1997-01-06 18:04:38 +00:00
Fred Fish
937fe72232 * tic80-dis.c (M_SI, M_LI): Add macros to test for ":m" modifier bit
in an instruction.
	* tic80-dis.c (print_insn_tic80): Change comma and paren handling.
  	Use M_SI and M_LI macros to check for ":m" modifier for GPR operands.
	* tic80-opc.c (tic80_operands): Add REGM_SI and REGM_LI operands.
	(F, M_REG, M_LI, M_SI, SZ_REG, SZ_LI, SZ_SI, D, S): New	bit-twiddlers.
	(MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
	masks with "MASK_* & ~M_*" to get the M bit reset.
	(tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.
1997-01-05 19:29:42 +00:00
Fred Fish
1f8c8c60a1 * tic80-dis.c (print_insn_tic80): Print TIC80_OPERAND_RELATIVE
correctly.  Add support for printing TIC80_OPERAND_BITNUM and
	TIC80_OPERAND_CC, and TIC80_OPERAND_CR operands in symbolic
	form.
	* tic80-opc.c (tic80_operands): Add SSOFF, LSOFF, BITNUM,
	CC, SICR, and LICR table entries.
	(tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
	"bcnd", and "brcr" opcodes.
1997-01-05 02:10:14 +00:00
Fred Fish
872dc6f0bc * ppc-opc.c (powerpc_operands): Make comment match the
actual fields (no shift field).
	* sparc-opc.c (sparc_opcodes): Document why this cannot be "const".

	* tic80-dis.c (print_insn_tic80): Replace abort stub with a
	partial implementation, work in progress.
	* tic80-opc.c (tic80_operands): Begin construction operands table.
	(tic80_opcodes): Continue populating opcodes table and start
	filling in the operand indices.
	(tic80_num_opcodes): Add this.
1997-01-04 01:39:30 +00:00
Ian Lance Taylor
a3ecb49f4b * m68k-opc.c: Add #B case for moveq. 1997-01-03 17:14:30 +00:00
Jeff Law
bc83032148 * mn10300-dis.c (disassemble): Make sure all variables are initialized
before they are used.
Fixes various weird disassembly problems.
1997-01-02 19:21:36 +00:00
Jeff Law
160cca6457 * v850-opc.c (v850_opcodes): Put curly-braces around operands
for "breakpoint" instruction.
Fixes random assembler failures for hp-x-v850 toolchain.
1996-12-31 21:20:00 +00:00