* mips-dis.c (print_insn_mips16): Set insn_info information.
(print_mips16_insn_arg): Likewise.
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b4aabb244e
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2 changed files with 49 additions and 0 deletions
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@ -1,5 +1,8 @@
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Tue Jan 28 15:57:34 1997 Ian Lance Taylor <ian@cygnus.com>
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* mips-dis.c (print_insn_mips16): Set insn_info information.
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(print_mips16_insn_arg): Likewise.
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* mips-dis.c (print_insn_mips16): Better handling of an extend
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opcode followed by an instruction which can not be extended.
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@ -351,6 +351,13 @@ print_insn_mips16 (memaddr, info)
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int extend;
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const struct mips_opcode *op, *opend;
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info->insn_info_valid = 1;
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info->branch_delay_insns = 0;
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info->data_size = 0;
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info->insn_type = dis_nonbranch;
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info->target = 0;
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info->target2 = 0;
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status = (*info->read_memory_func) (memaddr, buffer, 2, info);
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if (status != 0)
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{
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@ -393,6 +400,7 @@ print_insn_mips16 (memaddr, info)
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{
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(*info->fprintf_func) (info->stream, "extend 0x%x",
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(unsigned int) extend);
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info->insn_type = dis_noninsn;
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return length;
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}
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@ -414,6 +422,7 @@ print_insn_mips16 (memaddr, info)
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{
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(*info->fprintf_func) (info->stream, "extend 0x%x",
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(unsigned int) extend);
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info->insn_type = dis_noninsn;
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return length - 2;
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}
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@ -462,6 +471,13 @@ print_insn_mips16 (memaddr, info)
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info);
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}
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if ((op->pinfo & INSN_UNCOND_BRANCH_DELAY) != 0)
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{
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info->branch_delay_insns = 1;
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if (info->insn_type != dis_jsr)
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info->insn_type = dis_branch;
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}
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return length;
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}
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}
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@ -469,6 +485,7 @@ print_insn_mips16 (memaddr, info)
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if (use_extend)
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(*info->fprintf_func) (info->stream, "0x%x", extend | 0xf000);
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(*info->fprintf_func) (info->stream, "0x%x", insn);
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info->insn_type = dis_noninsn;
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return length;
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}
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@ -612,21 +629,33 @@ print_mips16_insn_arg (type, op, l, use_extend, extend, memaddr, info)
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case '5':
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nbits = 5;
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immed = (l >> MIPS16OP_SH_IMM5) & MIPS16OP_MASK_IMM5;
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info->insn_type = dis_dref;
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info->data_size = 1;
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break;
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case 'H':
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nbits = 5;
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shift = 1;
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immed = (l >> MIPS16OP_SH_IMM5) & MIPS16OP_MASK_IMM5;
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info->insn_type = dis_dref;
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info->data_size = 2;
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break;
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case 'W':
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nbits = 5;
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shift = 2;
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immed = (l >> MIPS16OP_SH_IMM5) & MIPS16OP_MASK_IMM5;
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if ((op->pinfo & MIPS16_INSN_READ_PC) == 0
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&& (op->pinfo & MIPS16_INSN_READ_SP) == 0)
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{
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info->insn_type = dis_dref;
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info->data_size = 4;
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}
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break;
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case 'D':
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nbits = 5;
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shift = 3;
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immed = (l >> MIPS16OP_SH_IMM5) & MIPS16OP_MASK_IMM5;
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info->insn_type = dis_dref;
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info->data_size = 8;
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break;
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case 'j':
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nbits = 5;
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@ -645,11 +674,17 @@ print_mips16_insn_arg (type, op, l, use_extend, extend, memaddr, info)
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nbits = 8;
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shift = 2;
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immed = (l >> MIPS16OP_SH_IMM8) & MIPS16OP_MASK_IMM8;
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/* FIXME: This might be lw, or it might be addiu to $sp or
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$pc. We assume it's load. */
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info->insn_type = dis_dref;
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info->data_size = 4;
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break;
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case 'C':
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nbits = 8;
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shift = 3;
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immed = (l >> MIPS16OP_SH_IMM8) & MIPS16OP_MASK_IMM8;
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info->insn_type = dis_dref;
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info->data_size = 8;
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break;
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case 'U':
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nbits = 8;
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@ -673,6 +708,7 @@ print_mips16_insn_arg (type, op, l, use_extend, extend, memaddr, info)
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signedp = 1;
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pcrel = 1;
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branch = 1;
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info->insn_type = dis_condbranch;
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break;
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case 'q':
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nbits = 11;
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@ -680,18 +716,24 @@ print_mips16_insn_arg (type, op, l, use_extend, extend, memaddr, info)
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signedp = 1;
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pcrel = 1;
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branch = 1;
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info->insn_type = dis_branch;
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break;
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case 'A':
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nbits = 8;
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shift = 2;
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immed = (l >> MIPS16OP_SH_IMM8) & MIPS16OP_MASK_IMM8;
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pcrel = 1;
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/* FIXME: This can be lw or la. We assume it is lw. */
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info->insn_type = dis_dref;
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info->data_size = 4;
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break;
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case 'B':
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nbits = 5;
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shift = 3;
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immed = (l >> MIPS16OP_SH_IMM5) & MIPS16OP_MASK_IMM5;
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pcrel = 1;
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info->insn_type = dis_dref;
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info->data_size = 8;
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break;
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case 'E':
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nbits = 5;
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@ -775,6 +817,7 @@ print_mips16_insn_arg (type, op, l, use_extend, extend, memaddr, info)
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}
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val = (baseaddr & ~ ((1 << shift) - 1)) + immed;
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(*info->print_address_func) (val, info);
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info->target = val;
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}
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}
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break;
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@ -784,6 +827,9 @@ print_mips16_insn_arg (type, op, l, use_extend, extend, memaddr, info)
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extend = 0;
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l = ((l & 0x1f) << 23) | ((l & 0x3e0) << 13) | (extend << 2);
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(*info->print_address_func) ((memaddr & 0xf0000000) | l, info);
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info->insn_type = dis_jsr;
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info->target = (memaddr & 0xf0000000) | l;
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info->branch_delay_insns = 1;
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break;
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case 'l':
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