darkkirb/old-cross-binutils
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885 commits

Author SHA1 Message Date
Nick Clifton
a0a6db4bfa Tidied up sanitization. 1997-08-14 19:45:14 +00:00
Nick Clifton
f7fcba7a84 Added support for v850e and v850eq instructions. 1997-08-14 02:13:32 +00:00
Mark Alexander
9e61ae7d3c * sim-calls.c (sim_store_register): Allow accumulators 
other than A0 to be modified.  Correct error message.
 1997-08-09 04:54:08 +00:00
Andrew Cagney
f1bea83b2b Add test for "mtsa" 1997-07-29 00:57:39 +00:00
Andrew Cagney
9204a35e78 Handle overflow from signed divide by -1. 1997-07-28 13:46:53 +00:00
Andrew Cagney
64f0e81628 More checks for pdivuw 1997-07-28 10:52:39 +00:00
Gavin Romig-Koch
c12e2e4c48 gencode.c: Two arg MADD should not assign result to /bin/bash. 1997-07-25 19:10:05 +00:00
David Edelsohn
63f6871728 * configure.in (sparc*-*-*): Don't build erc32. 
* configure: Regenerate.
 1997-07-25 18:41:12 +00:00
David Edelsohn
5697f15271 Keep sim-watch.[ch]. 1997-07-22 19:05:13 +00:00
David Edelsohn
556d1f8c7f Don't always keep igen, it's currently only kept if d30v or tic80. 1997-07-22 19:03:25 +00:00
David Edelsohn
e6609d8f2a * sim-n-core.h (sim_core_write_unaligned_N): Add missing break 
to FORCED_ALIGNMENT case.
 1997-07-22 17:36:23 +00:00
Andrew Cagney
7cf0d79519 Configure r5900 testsuite sub-directory. 1997-07-15 20:46:15 +00:00
Andrew Cagney
39e9b3369a Similistic configure/build scripts for tx59 simulator tests. 1997-07-15 20:35:26 +00:00
Andrew Cagney
b31dd8eea2 Generic tests for 5900. 1997-07-15 20:25:09 +00:00
Andrew Cagney
d9c61e8391 Standard simulator tests. 1997-07-14 16:53:04 +00:00
Andrew Cagney
ccc034af67 Tests for mips r5900 instructions 1997-07-11 21:36:11 +00:00
Andrew Cagney
1e851d2c82 Fix a number of problems in the r5900 specific p* (parallel) instructions. 
In particular a host endian dependency one fixed resolved most problems.
 1997-07-11 03:07:29 +00:00
Andrew Cagney
0f552ea045 Sync powerpc simulator with public version. Enable FPSCR and string 
instructions.
 1997-07-03 07:44:38 +00:00
Jeff Law
6443523484 * gencode.c (build_instruction): Handle "pext5" according to 
version 1.95 of the r5900 ISA.
Fixes pr12413 (c/h from toshiba).
 1997-07-02 18:41:22 +00:00
Jeff Law
649625bb8e * gencode.c (build_instruction): Handle "ppac5" according to 
version 1.95 of the r5900 ISA.
fixes pr12407 (c/h from toshiba).
 1997-07-02 18:29:16 +00:00
Jeff Law
05d1322f2c * interp.c (sim_engine_run): Reset the ZERO register to zero 
regardless of FEATURE_WARN_ZERO.
 1997-07-02 18:13:00 +00:00
Jeff Law
ae19b07bf8 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO. 
Fix for pr12402 (c/h from toshiba).
 1997-07-02 17:57:56 +00:00
Andrew Cagney
3a8e858f24 Add test for dbt/rtd instructions 1997-06-27 08:33:16 +00:00
Jeff Law
d05b86b7fb * interp.c (sim_resume): Clear State.exited. 
(sim_stop_reason): If State.exited is nonzero, then indicate that
        the simulator exited instead of stopped.
        * mn10300_sim.h (struct _state): Add exited field.
        * simops.c (syscall): Set State.exited for SYS_exit.

Fixes problem found bin Felix.
 1997-06-24 19:45:17 +00:00
Jeff Law
c370b3cd95 * simops.c: Fix thinko in last change. 1997-06-12 04:14:42 +00:00
Jeff Law
dbdb5bd881 * simops.c: "call" stores the callee saved registers into the 
stack!  Update the stack pointer properly when done with
        register saves.
 1997-06-10 22:59:13 +00:00
Jeff Law
0a8fa63cb8 * simops.c: Fix return address computation for "call" instructions. 1997-06-10 18:32:40 +00:00
Andrew Cagney
84e8cd0fcf Open in binary mode when available. 1997-06-06 02:34:55 +00:00
Andrew Cagney
0bdfae1167 Clean up formatting of instruction traces. 1997-06-06 00:31:08 +00:00
Andrew Cagney
897f67b74f Verify magic number of simulator struct. 1997-06-05 04:51:34 +00:00
Andrew Cagney
896eab009e Initialize the sim-engine module. 1997-06-04 02:47:49 +00:00
Andrew Cagney
56e7c84918 o Fixes to repeated watchpoints 
o	Add mips ISA instructions needed to handle interrupts
 1997-06-03 23:03:50 +00:00
Andrew Cagney
c7cebfa32c o Fix padd insn 
o	Take an interrupt when an int event occures.
 1997-06-02 15:00:43 +00:00
Andrew Cagney
128b51546e Add assembler information to igen input files. 1997-05-30 07:25:13 +00:00
Andrew Cagney
4e95b94e1e Fix subu immed - was incorrectly using unsigned. 1997-05-29 07:25:20 +00:00
Andrew Cagney
efe4f1cbf8 Add a simple dissasembler to igen 1997-05-29 07:06:41 +00:00
Andrew Cagney
1a70e182aa Fix watching PC for 64bit (mips) target. 
Stop watchpoints corrupting the event queue.
 1997-05-27 11:25:47 +00:00
Andrew Cagney
2f2e6c5d5b Extend xor-endian and per-cpu support in core module. 
Allow negated test when watching value within core.
 1997-05-27 06:48:20 +00:00
Andrew Cagney
cd0d873d0f Preliminary suport for xor-endian suport in core module. 1997-05-23 09:19:43 +00:00
Andrew Cagney
b526378484 Incorrect test for zero-r0 code gen. 1997-05-23 02:01:04 +00:00
Andrew Cagney
8167e102a5 Enumerate longjmp's return type. 1997-05-23 01:29:16 +00:00
Gavin Romig-Koch
d3d2a9f718 ifdef out uses of simSTOP, simSTEP and simBE when DEBUG is defined. 1997-05-22 13:30:01 +00:00
Gavin Romig-Koch
6e61ecfc92 Change longjmp param/setjmp return value used for simulator restart from 0 to 2. 1997-05-22 13:16:03 +00:00
Jeff Law
09e142d5a2 * interp.c (sim_resume): Add missing case in big switch 
statement (for extb instruction).
 1997-05-22 05:28:34 +00:00
Andrew Cagney
50a2a69182 Watchpoint interface. 1997-05-21 06:54:13 +00:00
Jeff Law
003c91bec4 * interp.c: Replace all references to load_mem and store_mem 
with references to load_byte, load_half, load_3_byte, load_word
        and store_byte, store_half, store_3_byte, store_word.
        (INLINE): Delete definition.
        (load_mem_big): Likewise.
        (max_mem): Make it global.
        (dispatch): Make this function inline.
        (load_mem, store_mem): Delete functions.
        * mn10300_sim.h (INLINE): Define.
        (RLW): Delete unused definition.
        (load_mem, store_mem): Delete declarations.
        (load_mem_big): New definition.
        (load_byte, load_half, load_3_byte, load_word): New functions.
        (store_byte, store_half, store_3_byte, store_word): New functions.
        * simops.c:  Replace all references to load_mem and store_mem
        with references to load_byte, load_half, load_3_byte, load_word
        and store_byte, store_half, store_3_byte, store_word.
 1997-05-20 23:53:47 +00:00
Andrew Cagney
ff82f21409 Part II of adding callback argument to sim_open(). Update all the 
other simulators; remove SIM_DESC from depreciated function
sim_set_callbacks().
 1997-05-20 01:57:43 +00:00
Andrew Cagney
24aa2b57af Depreciate sim_set_callbacks() function. Set simulator callbacks 
during sim_open().
 1997-05-20 00:05:27 +00:00
Michael Meissner
8c5b6ead7d Make getpid, kill supported system calls 1997-05-19 23:02:30 +00:00
Jeff Law
4df7aeb3c5 * interp.c (dispatch): Make this an inline function. 
* simops.c (syscall): Use callback->write regardless of
        what file descriptor we're writing too.
 1997-05-19 19:55:31 +00:00
Andrew Cagney
2e61a3ad9c Graft sim/common event and other code onto the mips simulator. 1997-05-19 13:30:30 +00:00
Andrew Cagney
ba2374064d Update. 1997-05-19 09:35:51 +00:00
Andrew Cagney
fd76456bdb Make simulator event-queue manager a bit more signal safe. 1997-05-19 06:55:56 +00:00
Andrew Cagney
f03b093cd3 o Implement generic halt/restart/abort module. 
Use in tic80 and d30v simulators.
o	Add signal hook to sim-core module
 1997-05-19 03:42:33 +00:00
Andrew Cagney
11ab132f16 Pacify gcc. 1997-05-19 01:24:31 +00:00
Jeff Law
b07a1e78c5 * interp.c (load_mem_big): Remove function. It's now a macro 
defined elsewhere.
        (compare_simops): New function.
        (sim_open): Sort the Simops table before inserting entries
        into the hash table.
        * mn10300_sim.h: Remove unused #defines.
        (load_mem_big): Define.
Another 20% so performance improvement for the mn10300 simulator.
 1997-05-18 22:57:49 +00:00
Michael Meissner
63aa80ff51 Treat infinities like normal numbers for purposes of comparisons 1997-05-17 02:28:11 +00:00
Jeff Law
248c1fb830 * callback.c (os_close): Mark the descriptor as being 
available if the close succeeded.
        (os_open): Pass 0644 as the mode of the file being created.
Bring Bob's changes over from the mec branch.
 1997-05-16 22:39:08 +00:00
Jeff Law
234a9a49cf * interp.c (load_mem): If we get a load from an out of range 
address, abort.
        (store_mem): Likewise for stores.
        (max_mem): New variable.
 1997-05-16 22:37:02 +00:00
Andrew Cagney
37a684b84d o Make tic80 insn file more `cache ready' 
o	Have igen always zero r0 instead of constantly checking if
	the designated register is r0.
 1997-05-16 03:27:40 +00:00
Andrew Cagney
07b4c0a66c Remove some of the flake from the c80 floating point. 1997-05-15 16:39:38 +00:00
Andrew Cagney
d24f06eef2 More floating point operations. 1997-05-15 02:22:37 +00:00
Andrew Cagney
aa3a044769 Fix double conversion problem. 1997-05-15 02:21:11 +00:00
Andrew Cagney
2310e3c2b5 Passify gcc's warnings. 1997-05-15 00:14:33 +00:00
Michael Meissner
93555c3b02 Make columns line up for fpu operation tracing 1997-05-14 22:06:45 +00:00
Michael Meissner
1b6f4dde35 Make sure r0 == 0; Return EINVAL for system calls that are defined but not provided; Provide traps 74-79 as debugging traps 1997-05-13 22:04:32 +00:00
Andrew Cagney
8490235019 Remove ANNULed cycle - was confusing gdb. 1997-05-13 13:57:49 +00:00
Michael Meissner
d01082ada2 Fix ld/st tracing 1997-05-12 21:16:26 +00:00
Andrew Cagney
9af5dcea8f Clear cntrl-c after handling it. 1997-05-12 08:33:56 +00:00
Andrew Cagney
c445af5a2b c80 simulator fixes. 1997-05-12 04:57:49 +00:00
Andrew Cagney
e05e76e8a4 Match commands like `(gdb) sim a b c' against options --a-b-c. 1997-05-12 04:30:38 +00:00
Michael Meissner
8ad6078850 Fix endian problems with ld.d/st.d 1997-05-12 02:04:02 +00:00
Michael Meissner
450be2349a Fix shift/lmo insns; Subu does arithmetic unsigned 1997-05-11 14:32:32 +00:00
Michael Meissner
20b2f9bc83 And short immediate instructions use unsigned immediates, not signed. 1997-05-10 16:40:21 +00:00
Michael Meissner
89d1a47805 Fix xor in simulator 1997-05-09 20:16:01 +00:00
Michael Meissner
aaa7b25260 Make cmp produce the correct results 1997-05-09 19:48:52 +00:00
Andrew Cagney
9efd3f7412 Update CIA as well as NIA when a 64bit insn is encountered. 1997-05-09 00:21:13 +00:00
Michael Meissner
c3cad878c9 Really fix the bbo/bbz instructions. 1997-05-08 23:04:22 +00:00
Michael Meissner
1e0e7911a5 reverse bit number for bbo/bbz instructions. 1997-05-08 19:58:20 +00:00
Michael Meissner
53dcd669e5 Fix non-anulled calls so that return address is correct 1997-05-08 18:36:00 +00:00
Michael Meissner
30a05dbd8d Change output format slightly 1997-05-08 16:32:06 +00:00
Michael Meissner
8c3b5af125 Change output format slightly 1997-05-08 16:14:54 +00:00
Michael Meissner
e42224cc3a Bump SIZE_DECIMAL to 13 1997-05-08 15:58:23 +00:00
Andrew Cagney
43c53e07db Add function sim_args_command() which takes a `(gdb) sim <command>' and 
parses it using rules found in the simulator command-line-options
databse.
 1997-05-08 05:28:20 +00:00
Andrew Cagney
381f42ef5d o Clean-up tic80 fp tracing 
o	Fill in more tic80 insns
 1997-05-07 13:58:52 +00:00
David Edelsohn
bd3274c6d9 * sim-profile.c (profile_uninstall): Likewise. 1997-05-06 23:40:31 +00:00
David Edelsohn
ea4e449340 * sim-trace.c (trace_uninstall): Don't close a file twice. 1997-05-06 23:38:31 +00:00
Andrew Cagney
19a2b3005c Only zap the igen directory once. 1997-05-06 23:24:03 +00:00
David Edelsohn
cf8b5fc15e Makefile.orig, README.orig deleted. 1997-05-06 21:21:53 +00:00
David Edelsohn
5797882259 Keep igen. 1997-05-06 21:20:13 +00:00
David Edelsohn
710f55ce8a Keep sim-config.c, sim-fpu.[ch]. 1997-05-06 21:19:41 +00:00
Jeff Law
8def922034 * mn10300_sim.h: Fix ordering of bits in the PSW. 1997-05-06 19:42:17 +00:00
Michael Meissner
1ec53ef597 Remove extra : from nop, sink{1,2} tracing 1997-05-06 19:33:51 +00:00
Michael Meissner
7b167b0900 Add semantic tracing to the tic80 1997-05-06 19:27:57 +00:00
Jeff Law
baa83bcc80 * interp.c: Improve hashing routine to avoid long list 
traversals for common instructions.  Add HASH_STAT support.
        Rewrite opcode dispatch code using a big switch instead of
        cascaded if/else statements.  Avoid useless calls to load_mem.
 1997-05-06 19:27:22 +00:00
David Edelsohn
f4749781f9 Keep sim-utils.h. 1997-05-06 17:09:05 +00:00
Michael Meissner
d0adfefd44 Fix typo; pass trace_line request as arg; pass common stuff in static struct 1997-05-06 11:55:21 +00:00
Michael Meissner
a77241718f Enable --trace-linenum support 1997-05-06 10:21:57 +00:00
Jeff Law
26e9f63c11 * mn10300_sim.h (struct _state): Add space for mdrq register. 
(REG_MDRQ): Define.
        * simops.c: Don't abort for trap.  Add support for the extended
        instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
        and "bsch".
 1997-05-06 00:35:42 +00:00
Michael Meissner
d23af88239 Fix problems -Wall found 1997-05-05 18:16:10 +00:00