Andrew Cagney
9ec6741b17
igen: Fix SMP simulator generator support.
...
Use the bfd-processor name in the sim-engine switch.
Add nr_cpus argument to sim_engine_run.
tic80, v850, d30v, mips, common:
Update
mips: Fill in bfd-processor field of model records so that
they match ../bfd/archures.
1998-01-31 06:23:41 +00:00
Michael Meissner
241b462435
Print compare bits in human readible form
1998-01-28 23:48:13 +00:00
Doug Evans
c5ecfceb13
* cpu.h (TRACE_COND_BR): Use TRACE_BRANCH_P, not TRACE_ALU_P.
1997-11-24 22:58:47 +00:00
Andrew Cagney
70c8abdb4c
Use updated MSMASK, MSMASKED macros.
...
Fix sat problem in d30v.
1997-09-08 17:23:16 +00:00
Andrew Cagney
128b51546e
Add assembler information to igen input files.
1997-05-30 07:25:13 +00:00
Andrew Cagney
37a684b84d
o Make tic80 insn file more `cache ready'
...
o Have igen always zero r0 instead of constantly checking if
the designated register is r0.
1997-05-16 03:27:40 +00:00
Andrew Cagney
aa3a044769
Fix double conversion problem.
1997-05-15 02:21:11 +00:00
Michael Meissner
450be2349a
Fix shift/lmo insns; Subu does arithmetic unsigned
1997-05-11 14:32:32 +00:00
Andrew Cagney
381f42ef5d
o Clean-up tic80 fp tracing
...
o Fill in more tic80 insns
1997-05-07 13:58:52 +00:00
Michael Meissner
7b167b0900
Add semantic tracing to the tic80
1997-05-06 19:27:57 +00:00
Andrew Cagney
3971886ac1
Add flakey floating-point support to the TI c80 simulator.
1997-05-05 12:46:25 +00:00
Andrew Cagney
d9b7594738
o Add core and event objects into simulator
...
base type
o Add preliminary tracing support for same
o trace_printf() takes both SD and CPU arguments
o Add CIA to standard set of parameters for
generated functions.
o Pacify GCC
1997-05-02 05:31:34 +00:00
Andrew Cagney
d5e2c74e38
Numerous fixes.
1997-04-29 08:41:15 +00:00
Andrew Cagney
abe293a0c6
Enable more instructions.
1997-04-24 12:06:27 +00:00
Andrew Cagney
15c1649391
TIc80 simulator checkpoint - runs 3 instructions - trap, addu, br.a.
1997-04-22 17:46:07 +00:00
