(int_register, cp_register, fp_register): Delete.
(reg_table): Delete. Replaced with ...
(rn_table, cp_table, cn_table, fn_table, mav_mvf_table)
(mav_mvd_table, mav_mvfx_table, mav_mvdx_table, mav_mvax_table)
(mav_dspsc_table): ... one table per register set.
(arm_reg_hsh): Delete.
(struct reg_map): New structure.
(all_reg_maps): New array.
(enum arm_reg_type): New enums.
(build_reg_hsh): New function.
(insert_reg_alias): Use hash table passed by caller. Adjust all
callers.
(create_register_alias): New function, split out from ...
(md_assemble): ... here.
(md_begin): Build new register hash tables.
(arm_reg_parse): New argument for the hash table to search. Adjust all
callers.
(arm_reg_parse_any): New function.
(co_proc_number): Look up the processor number in the processor hash
table.
(cirrus_regtype): Delete.
(cirrus_register, cirrus_mvf_register, cirrus_mvd_register)
(cirrus_mvfx_register, cirrus_mvdx_register, cirrus_mvax_register)
(ARM_EXT_MAVERICKsc_register): Delete.
(do_c_binops_1, do_c_binops_2, do_c_binops_3): Delete.
(do_c_binops_1[a-o], do_c_binops_2[a-c], do_c_binops_3[a-d]): New
functions.
(do_c_triple_4, do_c_triple_5): Delete.
(do_c_triple_4[ab], do_c_triple_5[a-h]): New functions.
(do_c_quad_6): Delete.
(do_c_quad_6[ab]): New functions.
(do_c_binops, do_c_triple, do_c_quad, do_c_shift, do_c_ldst): Rework
arguments to use new register parsing methods.
(cirrus_reg_required_here): Likewise.
(insns): Reclassify cirrus maverick worker functions.
(cirrus_valid_reg): Delete.
* Makefile.am (BFD32_BACKENDS): Add elf32-sh-nbsd.lo.
(BFD32_BACKENDS_CFILES): Add elf32-sh-nbsd.c.
(elf32-sh-nbsd.lo): New rule.
* Makefile.in: Regenerate.
* config.bfd (sh*le-*-netbsdelf*): New target.
(sh*-*-netbsdelf*): New target.
* configure.in: Include netbsd-core.lo for native sh*-*-netbsd*.
(bfd_elf32_shnbsd_vec): New vector.
(bfd_elf32_shlnbsd_vec): New vector.
* configure: Regenerate.
* elf32-sh-nbsd.c: New file.
* targets.c: Update copyright years.
(_bfd_target_vector): Add bfd_elf32_shlnbsd_vec and
bfd_elf32_shnbsd_vec.
gas:
* configure.in (sh*le): Set cpu_type=sh and endian=little.
(sh*-*-netbsdelf*): New target.
* configure: Regenerate.
* tc-sh.h: Update copyright years.
(TARGET_FORMAT): Add version for TE_NetBSD.
ld:
* Makefile.am (ALL_EMULATIONS): Add eshelf_nbsd.o and eshlelf_nbsd.o.
(eshelf_nbsd.c): New rule.
(eshlelf_nbsd.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt (sh*le-*-netbsdelf*): New target.
(sh*-*-netbsdelf*): New target.
* emulparams/shelf.sh: Document that shelf_nbsd.sh sources this file.
* ld/emulparams/shelf_nbsd.sh: New emulation.
* ld/emulparams/shlelf_nbsd.sh: New emulation.
* config/tc-ppc.c (md_parse_option): BookE is not Motorola specific.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
(PPC_OPCODE_BOOKE64): Likewise.
R_SPARC_DISP32. Support R_SPARC_PLT32.
(sparc_reloc_map): Add BFD_RELOC_16_PCREL and BFD_RELOC_SPARC_PLT32.
(elf32_sparc_check_relocs): Handle R_SPARC_PLT32.
(elf32_sparc_relocate_section): Likewise.
* elf64-sparc.c (sparc64_elf_howto_table): Fix dst_mask for
R_SPARC_DISP32. Support R_SPARC_PLT32 and R_SPARC_PLT64.
(sparc_reloc_map): Add BFD_RELOC_16_PCREL, BFD_RELOC_64_PCREL
and BFD_RELOC_SPARC_PLT32.
(sparc64_elf_check_relocs): Handle R_SPARC_PLT32 and R_SPARC_PLT64.
(sparc64_elf_relocate_section): Likewise.
* reloc.c (bfd_reloc_code_type): Add BFD_RELOC_SPARC_PLT32.
* bfd-in2.h, libbfd.h: Rebuilt.
* config/tc-sparc.h (TC_PARSE_CONS_EXPRESSION): Define.
(sparc_cons): Provide prototype.
* config/tc-sparc.c (tc_gen_reloc): Handle BFD_RELOC_*_PCREL and
BFD_RELOC_SPARC_PLT{32,64}. Enumerate for which relocs
reloc->addend = fixp->fx_addnumber shouldn't be done instead of
enumarating for which pc relative ones it should be done.
(sparc_cons_special_reloc): New variable.
(sparc_cons): New function.
(cons_fix_new_sparc): Use sparc_cons_special_reloc.
* testsuite/gas/sparc/pcrel.s: New test.
* testsuite/gas/sparc/pcrel.d: Expected output.
* testsuite/gas/sparc/pcrel64.s: New test.
* testsuite/gas/sparc/pcrel64.d: Expected output.
* testsuite/gas/sparc/plt.s: New test.
* testsuite/gas/sparc/plt.d: Expected output.
* testsuite/gas/sparc/plt64.s: New test.
* testsuite/gas/sparc/plt64.d: Expected output.
* testsuite/gas/sparc/sparc.exp: Add pcrel, pcrel64, plt and plt64
tests.
(m68*-*-netbsd): Also include bfd_elf32_m68k_vec.
(m68*-*-netbsdaout*): New alias for m68*-*-netbsd.
* configure.in (m68k-*-netbsdelf*): New target.
(m68k-*-netbsd*): Also include ELF support.
(m68k-*-netbsdaout*): New alias for m68*-*-netbsd*.
* configure: Regenerate.
* Makefile.am (ALL_EMULATIONS): Add m68kelfnbsd.o.
(m68kelfnbsd.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt (m68*-hp-netbsd*): Renamed to ..
(m68*-*-netbsd*4k*): .. this.
(m68*-*-netbsdelf*): New target.
(m68*-*-netbsd*): Also include ELF support.
(m68*-*-netbsdaout*): New alias for m68*-*-netbsd*.
* emulparams/m68kelfnbsd.sh: New emulation.
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
Corinna Vinschen <vinschen@redhat.com>
* Makefile.am: Add support for xstormy16.
* archures.c: Add support for xstormy16.
* config.bfd: Add support for xstormy16.
* configure.in: Add support for xstormy16.
* reloc.c: Add support for xstormy16.
* targets.c: Add support for xstormy16.
* cpu-xstormy16.c: New file.
* elf32-xstormy16.c: New file.
* Makefile.in: Regenerated.
* bfd-in2.h: Regenerated.
* configure: Regenerated.
* libbfd.h: Regenerated.
Index: binutils/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
* readelf.c (guess_is_rela): Add support for stormy16.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
Index: gas/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
* configure.in: Add support for xstormy16.
* configure: Regenerated.
* Makefile.am: Add support for xstormy16.
* Makefile.in: Regenerated.
* config/tc-xstormy16.c: New file.
* config/tc-xstormy16.h: New file.
Index: gas/testsuite/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
matthew green <mrg@redhat.com>
* gas/xstormy16/allinsn.d: New file.
* gas/xstormy16/allinsn.exp: New file.
* gas/xstormy16/allinsn.s: New file.
* gas/xstormy16/allinsn.sh: New file.
* gas/xstormy16/gcc.d: New file.
* gas/xstormy16/gcc.s: New file.
* gas/xstormy16/gcc.sh: New file.
* gas/xstormy16/reloc-1.d: New file.
* gas/xstormy16/reloc-1.s: New file.
* gas/xstormy16/reloc-2.d: New file.
* gas/xstormy16/reloc-2.s: New file.
Index: ld/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
* Makefile.am: Add support for xstormy16.
* configure.tgt: Add support for xstormy16.
* Makefile.in: Regenerate.
* emulparams/elf32xstormy16.sh: New file.
* scripttempl/xstormy16.sc: New file.
Index: opcodes/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
* Makefile.am: Add support for xstormy16.
* Makefile.in: Regenerate.
* configure.in: Add support for xstormy16.
* configure: Regenerate.
* disassemble.c: Add support for xstormy16.
* xstormy16-asm.c: New generated file.
* xstormy16-desc.c: New generated file.
* xstormy16-desc.h: New generated file.
* xstormy16-dis.c: New generated file.
* xstormy16-ibld.c: New generated file.
* xstormy16-opc.c: New generated file.
* xstormy16-opc.h: New generated file.
Index: include/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
* dis-asm.h (print_insn_xstormy16): Declare.
Index: include/elf/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
* common.h (EM_XSTORMY16): Define.
* xstormy16.h: New file.
cond_offset. Rename variants->variant.
(insns): Adjust for new format. Explicitly code each variant that
takes flags. Remove temporary instructions.
(struct arm_it): Remove redundant field suffix.
(s_flag, ldr_flags, str_flags, byte_flag, cmp_flags, ldm_flags)
(stm_flags, lfm_flags, sfm_flags, round_flags, fix_flags, except_flag)
(long_flag): Delete.
(struct asm_flg): Delete.
(LONGEST_INST): Delete.
(V4_STR_BIT): Define.
(struct thumb_opcode): Rename variants->variant.
(do_empty): Renamed from do_nop.
(ldst_extend): Delete argument hwse. Split code for half-word and
signed byte instructions to ...
(ldst_extend_v4): ... here.
(ld_mode_required_here): Use ldst_extend_v4.
(do_ldrd): Simplify now that this is only called for ldrd. No
need to test for XScale, which was wrong anyway. Don't reject r12
as a target register. Add test that ldrd doesn't update an index
register.
(do_pld): Don't allow post-indexed or write-back addressing modes.
Adjust call to ldst_extend.
(do_adr): Split code for adrl to ...
(do_adrl): ... here.
(do_cmp): No need to fold in COND_BIT.
(do_ldst): Simplify. Split code for ldrt/strt into do_ldstt. Split
code to handle half-word and signed byte instructions to ...
(do_ldstv4): ... here.
(do_ldstt): New function. Handle load/store with translate.
(do_ldmstm): Write feature modification bits directly into
inst.instruction.
(do_fpa_ldst): Remove suffix handling code.
(do_fpa_dyadic, do_fpa_monadic, do_fpa_from_reg): Likewise.
(do_fpa_ldmstm): Type of access is now held in inst.instruction.
(build_arm_ops_hsh): New function.
(md_begin): Call it. Don't build the ARM opcode directly.
(md_assemble): Simplify ARM instruction handling.
* stabs.c (stabs_generate_asm_lineno): Remember file and line number
from one call to the next, and eliminate consecutive duplicates
(thereby emitting only one line symbol per source line).
* dwarf2dbg.c (dwarf2_gen_line_info): Ditto.
(elf64_alpha_relocate_section): Translate local_got_entries
for STT_SECTION symbol to SHF_MERGE section the first time
we see it.
* elfxx-ia64.c (struct elfNN_ia64_local_hash_entry): Add
sec_merge_done.
(get_local_sym_hash): New, extracted from get_dyn_sym_info.
(get_dyn_sym_info): Use it.
(elfNN_ia64_relocate_section): Translate local dyn entries
for STT_SECTION symbol to SHF_MERGE section the first time
we see it.
* write.c (adjust_reloc_syms): Mark SEC_MERGE symbols as used
in reloc if it has non-zero addend.
* config/tc-alpha.c (tc_gen_reloc): Reinstall SEC_MERGE check.
* config/tc-sparc.c (md_apply_fix3): Likewise.
(md_apply_fix3): ...here. Don't prevent the symbol value being
subtracted twice from GPREL addends.
(tc_gen_reloc): Add the symbol value to a GPREL addend if it was
subtracted by the previous function.
(md_longopts): Allow OPTION_MABI for ELF compilation only. RE-allow
OPTION_GP32, OPTION_GP64, OPTION_FP32 for non-ELF compilation.
Sort options a bit more logical.
(md_parse_option): Allow OPTION_32, OPTION_N32, OPTION_N64,
OPTION_MABI only for elf targets.
* gas/mips/mips.exp: Change naming of some conditionals to reflect
the object format they actually mean. Don't try mips-abi32 and
mips-abi32-pic tests for ecoff.
mips_set_options.
(mips_set_options): Add members gp32, fp32, abi.
(file_mips_gp32): New flag.
(file_mips_fp32): New flag.
(mips_opts): Initialize the new members.
(mips_gp32): Remove.
(mips_fp32): Remove.
(HAVE_32BIT_GPRS): Use the new values from mips_opts.
(HAVE_32BIT_FPRS): Likewise.
(HAVE_NEWABI): Likewise.
(HAVE_64BIT_OBJECTS): Likewise.
(md_begin): Likewise. Save default (file) values.
(md_parse_option): Use the new values from mips_opts.
(s_mipsset): Likewise. Fix logic to keep the ABI selection if
possible. Let .set mipsN work together with .set push/pop.
Enhance error messages.
(mips_elf_final_processing): Use file_mips_* for header processing.
the page man title.
* doc/Makefile.in: Rebuild.
* doc/as.texinfo: Do not put man SEEALSO in document;
Use @command for commands, @option for options; Reorganize usage
to clearly identify target specific options.
2001-11-04 Chris Demetriou <cgd@broadcom.com>
* configure.in (mips-*-netbsd*): Add support for target.
* configure: Regenerate.
[ gas/testsuite/ChangeLog ]
2001-11-04 Chris Demetriou <cgd@broadcom.com>
* gas/mips/mips.exp (svr4pic): Set if target is *-*-netbsd*.
(aout): Don't set if *-*-netbsd*.
[ ld/ChangeLog ]
2001-11-04 Chris Demetriou <cgd@broadcom.com>
* configure.tgt (mips*el-*-netbsd*, mips*-*-netbsd*):
Add support for targets.
(insns): Re-arrange instructions by archtitecture. Pld instruction
is part of ARMv5E.
(tinsns): blx and bkpt are part of ARMv5T.
(do_fp_{ctrl,ldst,ldstm,dyadic,monadic,cmp,from_reg,to_reg}): Rename
to do_fpa_*. All callers changed.
* tc-arm.c (insns): Add two temporary instructions to handle
ldrd/strd.
2001-10-31 Chris Demetriou <cgd@demetriou.com>
* elf32-mips.c (_bfd_mips_elf_hi16_reloc): Handle PC-relative
relocations properly.
[ gas/ChangeLog ]
2001-10-31 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (HAVE_32BIT_ADDRESSES): If compiling embedded
PIC code, assume pointers the same size as GPRs.
(macro): In M_LA_AB handling for embedded PIC code, support
"la $treg,foo-bar($breg)". In load/store handling
(label ld_st) support "<op> $treg,<sym>-<local_sym>($breg)"
which is used by the compiler for switch statements.
In load/store double multi-instruction macro handling
(label ldd_std) add a comment that no special handling
is currently done for embedded PIC.
(mips_ip): In 'o' (16-bit offset) case, only accept 16
bit offsets.
[ gas/testsuite/ChangeLog ]
2001-10-31 Chris Demetriou <cgd@broadcom.com>
* gas/mips/empic.s: Undo damage inflicted on 2000-12-02.
* gas/mips/empic.d: Likewise.
* gas/mips/elempic.d: Likewise (it was copied into other files).
* gas/mips/telempic.d: Likewise.
* gas/mips/tempic.d: Likewise.
* gas/mips/empic2.s: New test to check new 'la' and 'lw' (and
related ops) syntax, test loads with large offsets.
* gas/mips/emcic2.d: Likewise.
* gas/mips/mips.exp: Run the new test on ELF platforms.
* tc-arm.c (ARM_EXT_LONGMUL, ARM_EXT_HALFWORD, ARM_EXT_THUMB): Delete.
(ARM_2UP, ARM_ALL, ARM_3UP, ARM_6UP): Delete.
(FPU_CORE, FPU_FPA10, FPA_FPA11, FPU_ALL, FPA_MEMMULTI): Delete.
(ARM_EXT_V{1,2,2S,3,3M,4,4T,5T,5ExP}): New defines.
(ARM_EXT_V{5,5E}): Synchronize with above.
(ARM_ARCH_V*): Define a complete set in terms of above features.
(ARM_{1,2,3,250,6,7,8,9,STRONG}): Define in terms of architecture.
(FPU_FPA_EXT_V[12]): Define.
(FPU_ARCH_FPE, FPU_ARCH_FPA): Define in terms of above.
(FPU_ANY): Define.
(FPU_DEFAULT): Default to FPA.
(CPU_DEFAULT): For XScale, this is now just ARM_ARCH_XSCALE; for
Thumb, this is now ARM_ARCH_V5T.
(insns): Rework for new feature defines.
(tinsns): Likewise.
(opcode_select, do_ldst, md_begin, md_parse_option): Likewise.
2001-10-21 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Mark "bgezall" and
"bltzall" as writing GPR 31 (since they do).
* mips-dis.c (print_insn_arg): Calculate info->target
where appropriate.
(print_insn_mips): Fill in instruction info.
(print_mips16_insn_arg): Remove unneded variable 'val'.
Removed duplicated instruction target calculations,
calculate once and print that result. Use same idiom for
masking the jump segment bits as is used in print_insn_arg.
[gas/testsuite/ChangeLog]
2001-10-21 Chris Demetriou <cgd@broadcom.com>
* gas/mips/beq.s: Add zero words at end of instructions so
that objdump will print "..." when disassembling.
* gas/mips/beq.d: Update for disassembler changes which force
branch delay-slot nops to be printed.
* gas/mips/bge.d: Ditto.
* gas/mips/bgeu.d: Ditto.
* gas/mips/blt.d: Ditto.
* gas/mips/bltu.d: Ditto.
* gas/mips/jal-svr4pic.d: Ditto.
* gas/mips/jal-xgot.d: Ditto.
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* gas/mips/mips.exp (sb1-ext-ps): New test to test
SB-1 core's paired-single extensions to the MIPS64 ISA.
* gas/mips/sb1-ext-ps.d: New file.
* gas/mips/sb1-ext-ps.s: New file.
[include/opcode/ChangeLog]
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* mips.h (INSN_SB1): New cpu-specific instruction bit.
(OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
if cpu is CPU_SB1.
[opcodes/ChangeLog]
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_isa_type): Make the ISA used to disassemble
SB-1 binaries include instructions specific to the SB-1.
* mips-opc.c (SB1): New definition.
(mips_builtin_opcodes): Add SB-1 extension opcodes "div.ps",
"recip.ps", "rsqrt.ps", and "sqrt.ps".
(ppc_size): Select PPC_OPCODE_64 if 64 bit.
(md_begin): Don't set ppc_size here.
(ppc_target_format): Test ppc_size as well as BFD_DEFAULT_TARGET_SIZE.
(md_shortopts): Constify.
(md_longopts): Likewise.
(md_longopts_size): Likewise.
(ppc_elf_suffix): Only allow 64-bit relocs when ppc_size specifies
64-bit opcodes.
(ppc_machine): Explain why this function is a nop.
* gas/ppc/booke.s (rfci, wrtee, wrteei, mfdcrx, mfdcr, mtdcrx,
mtdcr, msync, dcba, mbar): New BookE tests.
* gas/ppc/booke.d: Update for new BookE tests.
[opcodes/ChangeLog]
* ppc-opc.c (MO): New macro for MO field of mbar instruction.
(powerpc_opcodes): Add rfci, wrtee, wrteei, mfdcrx, mfdcr,
mtdcrx, mtdcr, msync, dcba and mbar as BookE instructions.
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
(mips_cpreturn_register): Likewise.
(mips_gp_register): Likewise.
(s_cpsetup): New function prototype.
(s_cplocal): Likewise.
(s_cpreturn): Likewise.
(s_gpvalue): Likewise.
(mips_pseudo_table): Add .cpsetup, .cplocal, .cpreturn, .gpvalue
pseudo-ops.
(macro): Don't warn about .cprestore for NewABI.
(md_pcrel_from): Code cleanup.
(mips_force_relocation): Force output of some NewABI relocations even
without a defined symbol.
(s_cpload): Ignore .cpload for NewABI.
(s_cpsetup): Handle .cpsetup.
(s_cplocal): Handle .cplocal.
(s_cprestore): Ignore .cprestore for NewABI.
(s_cpreturn): Handle .cpreturn.
(s_gpvalue): Handle .gpvalue.
(s_cpadd): Ignore .cpadd for NewABI.
(nopic_need_relax): Take g_switch_value into account as gp
optimization.
(tc_gen_reloc): Don't handle BFD_RELOC_MIPS_{CALL,GOT}* for NewABI.
(small_ex_type): Named this enum, more return values for
my_getSmallExpression.
(mips_ip): Allow SPC and HT between arguments. Handle some NewABI
triple relocations. Protect some parts with ifdef OBJ_ELF.
(percent_op_match): New struct, lookup table for %some_reloc().
(my_getSmallParser): New function, parses nested percent_ops also.
(my_getSmallExpression): Rewite to support nested percent_ops.
(load_address): Support both 32- and 64-bit addresses.
(macro): Call load_register correctly. Expand 64-bit loads ans stores.
(macro2): Call load_address correctly.
throughout file.
(obj_elf_change_section): Rename "group" to "group_name".
(obj_elf_section): Likewise.
(elf_frob_file): Don't use sec->lineno for SHT_GROUP section to store
first member section; Instead use elf_next_in_group.
Set elf_section_data group from it. Warn if group name changed.
(obj_elf_parse_section_letters): Parse 'G' too.
(obj_elf_section): Parse group name.
(struct group_list): New.
(build_group_lists): New function.
(elf_frob_file): Create SEC_GROUP section(s).
* config/obj-elf.c: (elf_copy_symbol_attributes): Zap trailing
whitespace.
capitalise, no final period or newline, don't say "ignoring" for
as_bad messages. In some cases, change the wording to that used
elsewhere for similar messages.
(obj_elf_section_name): New function, split out from ..
(obj_elf_section): .. here. Correctly mask off SHF_MERGE if
entsize not specified.
relocation triple.
(prev_insn_fixp): Likewise.
(append_insn): Changed prototype to accept a relocation pointer.
(imm_reloc): Make it an array.
(offset_reloc): Likewise.
(md_assemble): Handle triple relocations.
(append_insn): Likewise. Add handling for some NewABI relocations.
(mips_no_prev_insn): Handle triple relocations.
(macro_build): Likewise. Add handling for some NewABI relocations.
Move handling for the 'u' case to append_insn().
(mips16_macro_build): Handle triple relocations.
(macro_build_lui): Likewise. Don't handle _gp_disp as special symbol
for NewABI.
(mips_ip): Handle triple relocations.
(mips16_ip): Likewise.
(mips_force_relocation): Force handling of triple relocations
without symbols for NewABI.
(md_apply_fix): Add handling for some NewABI relocations.
(mips_target_format): Move downwards in file, use HAVE_64BIT_OBJECTS
in it.
(mips_abi_level, mips_abi): New enum.
(mips_32bit_abi): Remove.
(HAVE*PRS): Use mips_abi instead of mips_32bit_abi.
(HAVE_NEWABI): New define.
(HAVE_64BIT_OBJECTS): New define.
(HAVE_32BIT_ADDRESSES): Don't return true for 64bit objects.
(HAVE_64BIT_ADDRESSES): New define, inverse of HAVE_32BIT_ADDRESSES.
(support_64bit_objects): New prototype.
(md_begin): Use mips_abi instead of mips_32bit_abi. Don't write
.reginfo section for n32, use .MIPS.options instead.
(support_64bit_objects): New function, code from md_parse_option.
(md_longopts): Add -n32 option.
(md_parse_option): Use mips_abi instead of mips_32bit_abi/mips64.
Add -n32 option. Protect with OBJ_ELF.
(s_mipsset): Use mips_abi instead of mips_32bit_abi.
(mips_elf_final_processing): Likewise. Don't write .reginfo section
for n32, use .MIPS.options instead.
* input-file.c (input_file_open): When reading the
first line looking for #NO_APP, prepare for the possibility
of finding #APP instead. Also fix algorithm to allow
white-space to follow either #NO_APP or #APP directives.
* write.c (set_symtab): Update bfd_alloc declaration. Use a temp
var to ensure bfd_alloc arg is the right type.
(write_object_file): Cast args of bfd_seek. Replace bfd_write with
bfd_bwrite.
* config/obj-coff.c: Replace calls to bfd_write with calls to
bfd_bwrite. Cast args of bfd_seek.
* config/obj-elf.c (obj_elf_change_section): Avoid signed/unsigned
warning.
* config/tc-mn10300.c (set_arch_mach): Make param unsigned.
* config/tc-tic54x.c (tic54x_mlib): Replace bfd_read call with
call to bfd_bread.
* config.bfd: Change machine triplets from mips*el*-* to mips*el-*.
Add support for mips64.
/ChangeLog
* config.sub: Change machine triplets from mipsel*-* to mips*el-*.
Add support for mips64.
/gas/ChangeLog
* configure.in: Change machine triplets from mips-*-linux-gnu* to
mips*-*-linux*.
and rearrange for efficiency. For "PIC code" subtraction, use
"rightseg" rather than recalculating. For "symbol OP symbol"
subtract, set "retval" to absolute_section if symbols in same
section.
* symbols.c (resolve_symbol_value): Resolve "sym +/- expr" to an
O_symbol. Simplify a +/- b code. Allow equality and non-equality
comparisons on symbols from any section. Allow other comparison
operators as for subtraction.
(symbol_equated_reloc_p): New predicate function.
* symbols.h (symbol_equated_reloc_p): Declare.
* write.c (adjust_reloc_syms): Use symbol_equated_reloc_p.
(write_relocs): Likewise.
(write_object_file): Likewise.
(relax_segment <rs_machine_dependent>): Ensure segment for
expression syms is set correctly.
* config/tc-mips.c (md_estimate_size_before_relax): Likewise.
* config/tc-i386.c (md_assemble <Output jumps>): Don't lose part
of a complex expression when setting up frag_var.
(MACRO_LITERAL, MACRO_BASE, MACRO_BYTOFF, MACRO_JSR): Remove.
(alpha_macros): Remove occurrences of same.
(O_lituse_addr, O_gprel): New.
(DUMMY_RELOC_LITUSE_*): New.
(s_alpha_ucons, s_alpha_arch): Prototype.
(alpha_reloc_op): Construct elements via DEF macro.
(ALPHA_RELOC_SEQUENCE_OK): Remove.
(struct alpha_reloc_tag): Rename from alpha_literal_tag; rename
members to not be literal specific.
(next_sequence_num): New.
(md_apply_fix3): Cope with missing GPDISP_LO16. Adjust for
added/removed BFD relocations.
(alpha_force_relocation, alpha_fix_adjustable): Likewise.
(alpha_adjust_symtab_relocs): Handle GPDISP relocs as well.
(tokenize_arguments): Parse ! relocations properly.
(find_macro_match): Delete unused macro argument types.
(assemble_insn): Add reloc parameter; emit that instead of the
default as appropriate.
(get_alpha_reloc_tag): New. Split from ...
(emit_insn): ... here. Allocate a reloc tag for GPDISP.
(assemble_tokens): Don't search macros if user relocation present.
Copy reloc sequence number to insn struct.
(emit_ldgp): Remove user reloc handling.
(load_expression, emit_lda, emit_ldah, emit_ir_load): Likewise.
(emit_loadstore, emit_ldXu, emit_ldil, emit_stX): Likewise.
(emit_sextX, emit_division, emit_jsrjmp, emit_retjcr): Likewise.
* config/tc-alpha.h (tc_adjust_symtab): Always define.
(struct alpha_fix_tag): Name members less literal specific.
* gas/alpha/alpha.exp: New file.
* gas/alpha/elf-reloc-1.[sd]: New test.
* gas/alpha/elf-reloc-2.[sl]: New test.
* gas/alpha/elf-reloc-3.[sl]: New test.
* gas/alpha/elf-reloc-4.[sd]: New test.
* gas/alpha/fp.exp: Remove file.
* gas/alpha/fp.s: Output to .data not .rdata.
* gas/alpha/fp.d: Adjust to match.
* gas/all/gas.exp (930509a): Expect failure on the H8/300 ELF port.
* gas/h8300/ffxx1-elf.d: Update due to recent changes to H8/300
ELF toolchain.
* gas/h8300/h8300-elf.exp: Likewise.
* gas/macros/macros.exp: Expect failure on all H8/300 ports.
* gas/vtable/vtable.exp: Do not run tests on H8/300 ELF ports.
offset match H8 ELF spec.
(md_section_align): Alternate implementation for BFD_ASSEMBLER.
(md_apply_fix): Fix argument and return types for BFD_ASSEMBLER.
(build_bytes): Mark fixups for PCrel branches as signed. For
OBJ_ELF, make sure the reloc's offset points to the first byte
to be modified.
(md_convert_frag): Update definiton based on BFD_ASSEMBLER.
* tc-h8300.h (relocation mappings): Add.
* tc-h8300.c (tc_crawl_symbol_chain, tc_headers_hook): Don't
define for BFD_ASSEMBLER.
(tc_reloc_mangle): Likewise.
(tc_gen_reloc): New function for BFD_ASSEMBLER.
More of Joern's patches with minor changes s/OBJ_ELF/BFD_ASSEMBLER/
assorted coff relocations to the corresponding elf relocations.
* tc-h8300.h (TARGET_ARCH, TARGET_FORMAT): Define appropriately.
More of Joern's patches.
* configure: Regenerate.
* config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER,
PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros.
(md_assemble): Use them.
(ppc_machine): Support stub for ELF64 as well as XCOFF.
(md_pseudo_table): Add "llong", "quad".
(md_parse_option): Match default_cpu of powerpc*.
(ppc_arch): Likewise.
(ppc_subseg_align): Only for OBJ_XCOFF.
(ppc_target_format): Return elf64-powerpc strings for 64 bit ELF.
(md_begin): Select PPC_OPCODE_64 for 64 bit.
(ppc_insert_operand): Don't bother testing 'file' before calling
as_bad_where. Use as_bad_where for operand->insert errors.
(mapping): Add ELF64 relocation modifiers.
(ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc
expressions with abs_symbol.
(ppc_elf_cons): Correct offset for little endian targets.
(ppc_elf_frob_symbol): New.
(md_assemble): Add support for 64 bit ELF relocs.
(ppc_tc): Ensure 8 byte alignment when 64 bit.
(ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match
".toc" section for 64 bit ELF.
(ppc_fix_adjustable): New. Macro body moved from tc-ppc.h.
(md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do
the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit,
use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16.
Expand on comments, error message. Add support for 64 bit relocs,
and use PPC_HI etc. macros.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
(HANDLE_ALIGN): Define to generate nops in code sections rather
than zeros.
(TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC.
(ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections.
(tc_fix_adjustable): Move body of macro to tc-ppc.c.
(ppc_fix_adjustable): Declare.
(tc_frob_symbol): Define.
(ppc_elf_frob_symbol): Declare.
value, not the word beyond maximum.
* tc_mips.c (macro_build_lui): Code cleanup.
(macro): Reflect change to MAX_GPREL_OFFSET.
(mips_ip): Check explicitly against S_EX_NONE.
(my_get_SmallExpression): parse for %gp_rel, not %gprel.
(md_apply_fix): Code cleanup.
mips.
* gas/mips/mips.exp: Likewise. Use traditional testcases for
mips${el}16-f if needed.
* gas/mips/elempic.d: New file, testcase for little endian empic.
* gas/mips/elfel-rel2.d: Don't test trailing zeroes in dump.
* gas/mips/mips16-f.d: Use non-traditional symbol sorting.
* gas/mips/mipsel16-f.d: Likewise.
* gas/mips/mipsel16-e.d: New file, testcase for little endian MIPS16
relocations.
* gas/mips/tmipsel16-f.d: New file, testcase for little endian MIPS16
relocations, traditional variant.
return values.
(mips_ip): Use the new return values instead of characters. Add
support for %higher and %highest.
(LP): Remove.
(RP): Remove.
(my_getSmallExpression): Make parsing case insensitive and more
reliable. Add support for %higher and %highest. Further support to
parse %gprel and %neg is implemented but currently deactivated.
-mipsX is specified. Make both -mcpu/-march and -mcpu/-mtune pairs
mutually exclusive (if they are different).
(md_parse_option): Warn if an -march/-mtune/-mcpu/-m<cpu> option is
set more than once.
* config/tc-mips.c (mips_fp32, mips_32bit_abi): New static variables.
(md_long_opts): Add -mfp32 option.
(md_parse_option): Handle it. Set mips_32bit_abi given -mabi=32.
(md_show_usage): Show usage for -mfp32 and -mgp32.
(HAVE_32BIT_GPRS, HAVE_32BIT_FPRS): New macros.
(HAVE_64BIT_GPRS, HAVE_64BIT_FPRS): New macros, inverse of the above.
(HAVE_32BIT_ADDRESSES): New macro.
(load_register): Use HAVE_32BIT_GPRS to determine the register width.
(load_address): Use HAVE_32BIT_ADDRESSES to determine the address size.
(s_cprestore, s_cpadd): Likewise.
(macro): Use HAVE_32BIT_GPRS to determine the width of registers
used in branch and M_LI_D macros. Use HAVE_64BIT_FPRS to determine
the width registers used in M_LI_DD macros. Use HAVE_32BIT_ADDRESSES
to determine the width of addresses in load, store and jump macros.
(macro2): Use HAVE_32BIT_GPRS to determine the width of registers
used in set instructions; do not check the address size for them.
Use HAVE_32BIT_ADDRESSES to determine the width of addresses in
unaligned load and store macros.
(mips_ip): Use the new macros to check the width of a register when
processing float constants. Force a constant into memory if it is
destined for an FPR and the FPRs are wider than the GPRs. Warn about
odd FPR numbers if HAVE_32BIT_FPRS. Use HAVE_32BIT_GPRS rather
than mips_gp32 to select synthetic instructions.
(macro_build): Use HAVE_32BIT_GPRS rather than mips_gp32 to select
synthetic instructions.
final period or newline, don't say "ignored" or "zero assumed" for
as_bad messages. In some cases, change the wording to that used
elsewhere for similar messages.
* app.c, as.c, atof-generic.c, cgen.c, cond.c, depend.c, dwarf2dbg.c,
ecoff.c, expr.c, frags.c, input-file.c, input-scrub.c, listing.c,
output-file.c, stabs.c, subsegs.c, symbols.c, write.c: Likewise.
* ecoff.c (ecoff_directive_end): Test for missing name by
comparing input line pointers rather than reading string.
(ecoff_directive_ent): Likewise.
* read.c (s_set): Likewise.
(s_align): Report a warning rather than an error for
alignment too large.
(s_comm): Check for missing symbol name.
(s_lcomm_internal): Likewise.
(s_lsym): Likewise.
(s_globl): Use is_end_of_line instead of looking for '\n'.
(s_lcomm_internal): Likewise.
(ignore_rest_of_line): Report a warning rather than an error.
* config/tc-mips.c (md_estimate_size_before_relax): Make sure
we treat weak like extern only for ELF.
(mips_fix_adjustable): Make sure we don't adjust extern/weak
symbols only for ELF.
* app.c (LEX_IS_PARALLEL_SEPARATOR): New macro.
(IS_PARALLEL_SEPARATOR): New macro.
(do_scrub_begin): Set up characters in tc_parallel_separator_chars
as LEX_IS_PARALLEL_SEPARATOR, if it is defined.
(do_scrub_chars): Handle LEX_PARALLEL_SEPARATOR chars like
LEX_LINE_SEPARATOR except that we go to state 1 (as if the label has
been seen).
"isbranch" param as all calls have it set.
(pa_parse_neg_cmpsub_cmpltr): Likewise.
(pa_parse_nonneg_add_cmpltr): Likewise. Remember result of
strcasecmp in "nullify" var.
(pa_parse_neg_add_cmpltr): Likewise.
(pa_ip): Don't "save_s" unnecessarily. Update calls to above
functions. Don't print wrong conditions in error messages.
* config/obj-elf.c (obj_elf_section): md_elf_section_change_data_hook
added to grab section information after it's been extracted from the
.section directive.
* cgen.c (gas_cgen_save_fixups): Modified to allow more than one
set of fixups to be stored.
(gas_cgen_restore_fixups): Modified to allow the fixup chain to be
restored to be chosen from any that are saved.
(gas_cgen_swap_fixups): Modified to allow the current set of
fixups to be swapped with any other set that has been saved.
(gas_cgen_initialize_saved_fixups_array): New routine.
* cgen.h: Modifed prototypes for gas_cgen_save_fixups,
gas_cgen_restore_fixups, and gas_cgen_swap_fixups. Added definitions
or MAX_SAVED_FIXUP_CHAINS.
* config/tc-m32r.c (assemble_two_insns): Changed calls to fixup
store, swap and restore fuctions to reflect the new interface.
* config/tc-ia64.c (special_section): Add SPECIAL_SECTION_INIT_ARRAY
and SPECIAL_SECTION_FINI_ARRAY.
(special_section_name): Add .init_array and .fini_array.
(md_pseudo_table): Add init_array and fini_array.
(md): Add pointer_size and pointer_size_shift fields.
(setup_unwind_header): New static function.
(output_unw_records): Modify to use setup_unwind_header.
(generate_unwind_image, dot_endp): Modify to use md.pointer_size and
md.pointer_size_shift.
(md_begin): Initialize md.pointer_size and md.pointer_size_shift.
* config/tc-mips.c (md_apply_fix): Prevent addend from becoming zero
if it's expected to be non-zero.
[gas/testsuite]
* gas/mips/elf-rel3.s: Add zero word to end of file.
subtract MD_PCREL_FROM_SECTION for 68k.
(fixup_segment <Difference of 2 syms different seg>): Only fudge
by adding MD_PCREL_FROM_SECTION for 68k or if not already pcrel.
* config/tc-m88k.c (md_number_to_imm): Remove; unused since 1993.
(emit_relocations): Ditto.
(s_bss): Ditto.
(md_begin): Reformat comments to conform to the GNU standards.
(md_assemble): Ditto.
2001-06-24 Ben Elliston <bje@redhat.com>
* config/tc-m88k.c (get_reg): Adjust type of `reg_prefix' to char.
(md_parse_option): Mark parameters as unused.
(md_show_usage): Ditto.
(calcop): Adjust type of `reg_prefix' to char.
(get_reg): Ditto.
(getval): Adjust type of local `c' to char.
(md_create_short_jump): Mark from_addr, to_addr params as unused.
(md_create_long_jump): Ditto.
(md_estimate_size_before_relax): Mark parameters as unused.
(md_apply_fix): Use it here. Replace printf with equivalent
as_bad_where.
(tc_gen_reloc): Use as_bad_where instead of as_bad.
(md_apply_fix): Here too.
* config/tc-i386.c (tc_gen_reloc): Use as_bad_where instead of as_bad.
* config/tc-m68k.c (tc_gen_reloc): Likewise.
(md_convert_frag_1): Likewise.
* NEWS: Updated for the new -n option for the MIPS assembler.
* config/tc-mips.c (md_show_usage): Add -n.
* doc/as.texinfo: Document the new -n option.
* doc/c-mips.texi: Likewise.
* doc/as.1: Regenerated.
* gas/mips/elfel-rel3.s: Moved to ...
* gas/mips/elf-rel3.s: Here.
* gas/mips/elf-rel3.d: Updated.
* gas/mips/elfel-rel3.d: Updated.
* gas/mips/relax.d: New file.
* gas/mips/relax.s: Likewise.
* gas/mips/mips.exp: Run relax and set xfail.
* config/tc-mips.c (warn_nops): New variable. Set to 0 to
disable warning about all NOPS that the assembler generates.
(macro): Warn NOPS generated only if warn_nops is not 0.
(md_shortopts): Add `n'.
(md_parse_option): Set warn_nops to 1 for `n'.
* config/tc-mips.c (md_apply_fix): Don't adjust common
extern/weak symbols for ELF.
(md_estimate_size_before_relax): Treat weak like extern for
ELF.
(mips_fix_adjustable): Don't adjust extern/weak symbols for
ELF.
* Makefile.in: Regenerate.
* config/tc-mips.c (mips16_mark_labels): Reduce number of calls to
S_GET_VALUE by using a temp.
(append_insn): Likewise, and for S_GET_VALUE too.
(mips_emit_delays): Likewise.
(my_getExpression): Likewise.
(md_apply_fix): Likewise. Use "valueT" rather than "long" for "value".
(mips16_extended_frag): Remove code concerned with avoiding
locking in a frag address now that symbols are not finalized until
relaxation is complete. Cater for first relaxation pass having
bogus addresses. Use relax_marker to reliably determine whether a
symbol frag has been reached on the current pass.
* gas/mips/e32el-rel2.d: New for little endian mips.
* gas/mips/elfel-rel2.d: Likewise.
* gas/mips/elfel-rel.d: Likewise.
* gas/mips/mipsel16-f.d: Likewise.
* gas/mips/telempic.d: Likewise.
* gas/mips/tmipsel16-e.d: Likewise.
* gas/mips/tempic.d: New for traditional mips.
* gas/mips/tmips16-e.d: Likewise.
* gas/mips/elf-rel.d: Handle alignment padding.
* gas/mips/elf-rel2.d: Likewise.
* gas/mips/mips.exp: Support little endian and traditional
mips.
as relaxable if embedded system, make weak syms non-relaxable.
Move definition..
(tc_m68k_fix_adjustable): ..so it can be used here.
(md_apply_fix_2): Sign extend without conditional.
optimize differences between symbols in code sections to
constants.
(mn10300_fix_adjustable): Don't adjust to section+offset
relocations pointing at symbols in code sections.
also collect whether to expect an FDE augmentation.
(check_eh_frame): Rewrite as a state machine. Track where in
an FDE we are located, skip any augmentation.
(eh_frame_estimate_size_before_relax): Get code alignment from
the fragment subtype.
(eh_frame_relax_frag, eh_frame_convert_frag): Likewise.
* read.c (emit_leb128_expr): Call check_eh_frame.
(need_modrm): Give it file scope.
(MODRM_CHECK): Define.
(dofloat): Use MODRM_CHECK.
(OP_E): Likewise.
(OP_EM): Likewise.
(OP_EX): Likewise.
and fix testsuite yet again now that we are getting correct disassembly.
sections as well.
(elfNN_ia64_final_write_processing): Map .gnu.linkonce.ia64unw.FOO
to .gnu.linkonce.t.FOO text section.
* readelf.c (process_unwind): Print all unwind sections, not just
one.
* config/tc-ia64.c (special_linkonce_name): New.
(make_unw_section): Map .gnu.linkonce.t.FOO text section into
.gnu.linkonce.ia64unw{,i}.FOO.
(ia64_elf_section_type): Handle .gnu.linkonce.ia64unw{,i}.FOO.
(dot_endp): Add comment about it.
* elf/ia64.h (ELF_STRING_ia64_unwind_once): Define.
(ELF_STRING_ia64_unwind_info_once): Define.
* emulparams/elf64_ia64.sh (OTHER_READONLY_SECTIONS): Put
.gnu.linkonce.ia64unw{,i} sections into corresponding .IA_64.unwind*
output sections.
* emulparams/elf64_aix.sh (OTHER_READONLY_SECTIONS): Likewise.
