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51 commits

Author SHA1 Message Date
Jeff Law
d05b86b7fb * interp.c (sim_resume): Clear State.exited. 
(sim_stop_reason): If State.exited is nonzero, then indicate that
        the simulator exited instead of stopped.
        * mn10300_sim.h (struct _state): Add exited field.
        * simops.c (syscall): Set State.exited for SYS_exit.

Fixes problem found bin Felix.
 1997-06-24 19:45:17 +00:00
Jeff Law
c370b3cd95 * simops.c: Fix thinko in last change. 1997-06-12 04:14:42 +00:00
Jeff Law
dbdb5bd881 * simops.c: "call" stores the callee saved registers into the 
stack!  Update the stack pointer properly when done with
        register saves.
 1997-06-10 22:59:13 +00:00
Jeff Law
0a8fa63cb8 * simops.c: Fix return address computation for "call" instructions. 1997-06-10 18:32:40 +00:00
Jeff Law
003c91bec4 * interp.c: Replace all references to load_mem and store_mem 
with references to load_byte, load_half, load_3_byte, load_word
        and store_byte, store_half, store_3_byte, store_word.
        (INLINE): Delete definition.
        (load_mem_big): Likewise.
        (max_mem): Make it global.
        (dispatch): Make this function inline.
        (load_mem, store_mem): Delete functions.
        * mn10300_sim.h (INLINE): Define.
        (RLW): Delete unused definition.
        (load_mem, store_mem): Delete declarations.
        (load_mem_big): New definition.
        (load_byte, load_half, load_3_byte, load_word): New functions.
        (store_byte, store_half, store_3_byte, store_word): New functions.
        * simops.c:  Replace all references to load_mem and store_mem
        with references to load_byte, load_half, load_3_byte, load_word
        and store_byte, store_half, store_3_byte, store_word.
 1997-05-20 23:53:47 +00:00
Jeff Law
4df7aeb3c5 * interp.c (dispatch): Make this an inline function. 
* simops.c (syscall): Use callback->write regardless of
        what file descriptor we're writing too.
 1997-05-19 19:55:31 +00:00
Jeff Law
26e9f63c11 * mn10300_sim.h (struct _state): Add space for mdrq register. 
(REG_MDRQ): Define.
        * simops.c: Don't abort for trap.  Add support for the extended
        instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
        and "bsch".
 1997-05-06 00:35:42 +00:00
Andrew Cagney
87e43259f1 Cleanups to compile under FreeBSD 1997-04-17 06:05:19 +00:00
Jeff Law
81f13ed1f3 * simops.c (syscall): Handle new mn10300 calling conventions. 
Forgot to check this in last week.
 1997-04-08 06:01:20 +00:00
Jeff Law
65b784d8a5 * simops.c: Fix register extraction for a two "movbu" variants. 
Somewhat simplify "sub" instructions.
        Correctly sign extend operands for "mul".  Put the correct
        half of the result in MDR for "mul" and "mulu".
        Implement remaining instructions.
        Tweak opcode for "syscall".
 1997-03-20 19:02:44 +00:00
Jeff Law
0915c8433b * simops.c: Do syscall emulation in "syscall" instruction. Add 
dummy "trap" instruction.
Cleanups for the beta release.
 1997-03-18 21:24:38 +00:00
Jeff Law
0ade484f98 * simops.c: Fix carry bit computation for "add" instructions. 
More bugs exposed by new mn10300 compiler optimizations.
 1997-03-12 22:20:13 +00:00
Jeff Law
09eef8af93 * simops.c: Fix typos in bset insns. Fix arguments to store_mem 
for bset imm8,(d8,an) and bclr imm8,(d8,an).
Bugs exposed by new compiler optimizations.
 1997-03-12 22:05:49 +00:00
Jeff Law
43eb4bed50 * simops.c: Fix register references when computing Z and N bits 
for lsr imm8,dn.
Bug exposed by c-torture testing of the mn10300.
 1997-03-05 22:04:31 +00:00
Jeff Law
f95251f068 * simops.c: Undo last change to "rol" and "ror", original code 
was correct!
 1997-01-21 22:03:39 +00:00
Jeff Law
b4b290a020 * simops.c: Fix "rol" and "ror". 
Something I noticed while working on the mn10200.
 1997-01-16 18:28:46 +00:00
Jeff Law
898c77b856 * simops.c: Fix typo in last change. 1997-01-15 13:46:18 +00:00
Jeff Law
2da0bc1bf9 * simops.c: Use REG macros in few places not using them yet. 
Something I noticed while working on the mn10200 simulator.
 1997-01-13 20:28:37 +00:00
Jeff Law
b774c0e4b1 * mn10300_sim.h (struct _state): Put all registers into a single 
array to make gdb implementation easier.
        (REG_*): Add definitions for all registers in the state array.
        (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
        * simops.c: Related changes.
 1996-12-31 23:26:11 +00:00
Jeff Law
d657034d38 * interp.c (sim_resume): Handle 0xff as a single byte insn. 
* simops.c: Fix overflow computation for "add" and "inc"
        instructions.
 1996-12-18 17:15:21 +00:00
Jeff Law
093e9a32d3 * simops.c: Handle "break" instruction. 1996-12-16 22:31:37 +00:00
Jeff Law
16d2e2b670 * simops.c: Fix restoring the PC for "ret" and "retf" instructions. 1996-12-16 17:08:10 +00:00
Jeff Law
95d18eb74d * simops.c (REG0_4): Define. 
Use REG0_4 for indexed loads/stores.
Fixes bugs exposed after minor codegen improvements in the compiler.
 1996-12-10 22:10:07 +00:00
Jeff Law
2e8f4133d7 * simops.c (REG0_16): Fix typo. 1996-12-07 16:54:57 +00:00
Jeff Law
5084d8e513 Add missing semicolons in last change. 1996-12-07 00:36:50 +00:00
Jeff Law
b2f7a7e5b3 * simops.c: Call abort for any instruction that's not currently 
simulated.
 1996-12-06 21:49:27 +00:00
Jeff Law
9f4a551e11 * simops.c: Define accessor macros to extract register 
values from instructions.  Use them consistently.
 1996-12-06 21:47:21 +00:00
Jeff Law
7c52bf32f2 * interp.c: Delete unused global variable "OP". 
(sim_resume): Remove unused variable "opcode".
        * simops.c: Fix some uninitialized variable problems, add
        parens to fix various -Wall warnings.
Fixing assorted -Wall problems.
 1996-12-06 21:33:48 +00:00
Jeff Law
d252301029 * gencode.c (write_header): Add "insn" and "extension" arguments 
to the OP_* declarations.
        (write_template): Similarly for function templates.
        * interp.c (insn, extension): Remove global variables.  Instead
        pass them as arguments to the OP_* functions.
        * mn10300_sim.h: Remove decls for "insn" and "extension".
        * simops.c (OP_*): Accept "insn" and "extension" as arguments
        instead of using globals.
Starting to clean things up.
 1996-12-06 21:19:37 +00:00
Jeff Law
e5a7a53799 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)" 
Fixes remaining hangs while running c-torture execution tests.
Only 12 c-torture execution failures left:

  * 920625-1.c fails all 6 execution tests.

  * 960521-1.c fails all 6 execution tests.
 1996-12-06 07:57:21 +00:00
Jeff Law
4d8ced6cb1 * simops.c: Fix thinkos in last change to "inc dn". 1996-12-06 05:30:24 +00:00
Jeff Law
61ecca95c0 * simops.c: "add imm,sp" does not effect the condition codes. 
"inc dn" does effect the condition codes.
Just something I noticed.
 1996-12-04 18:02:00 +00:00
Jeff Law
e4e1302293 * simops.c: Treat both operands as signed values for 
"div" instruction.
Fixes another dozen c-torture execution failures.
 1996-12-04 05:00:49 +00:00
Jeff Law
20e1ab85bf * simops.c: Fix simulation of division instructions. 
Fix typos/thinkos in several "cmp" and "sub" instructions.
Another couple dozen c-torture failures fixed.
 1996-12-04 00:42:01 +00:00
Jeff Law
216e65571a * simomps.c: Fix carry bit handling in "sub" and "cmp" 
instructions.
Another dozen execution failures fixed.
 1996-12-02 20:12:08 +00:00
Jeff Law
fcfaf40d78 * simops.c: Fix "mov imm8,an" and "mov imm16,dn". 
Fixes 80 or so c-torture execution failures.  400 to go.
 1996-12-02 19:35:55 +00:00
Jeff Law
b7b89deb44 * simops.c: Fix overflow computation for many instructions. 
Fixes several hangs in the c-torture execution tests.  Also fixes about
40 failures.
 1996-12-02 08:35:20 +00:00
Jeff Law
af388638ae * simops.c: Fix "movdm, an", "movbu dm, (an)", and "movhu dm, (an)". 
Along with some compiler, bfd, assembler changes this fixes 90 or so
c-torture execution failures.
 1996-12-02 07:38:10 +00:00
Jeff Law
c8f0171f5f * simops.c: Fix "mov am, dn". 
Fixes more c-torture problems.
 1996-12-02 04:23:37 +00:00
Jeff Law
6db7fc49d2 * simops.c: Fix more bugs in "add imm,an" and 
"add imm,dn".
Fixes a half-dozen (of several hundred :( c-torture failures.
 1996-12-01 23:10:04 +00:00
Jeff Law
6e7a01c144 * simops.c: Fix bugs in "movm" and "add imm,an". 
main(){write (0, "hello world\n", 13);} works!
 1996-11-27 23:20:24 +00:00
Jeff Law
3bb3fe44e0 * simops.c: Don't lose the upper 24 bits of the return 
pointer in "call" and "calls" instructions.  Rough cut
        at emulated system calls.
 1996-11-27 18:36:54 +00:00
Jeff Law
de0dce7c5c * simops.c: Implement the remaining 5, 6 and 7 byte instructions. 
Everything except the extended instructions, the loop instructions,
trap, rti, and rtm.
 1996-11-27 17:56:10 +00:00
Jeff Law
ecb4b5a357 * simops.c Implement remaining 4 byte instructions. 1996-11-27 17:19:44 +00:00
Jeff Law
2e35551c74 * simops.c Implement remaining 3 byte instructions. 
Moving right along...
 1996-11-27 16:51:30 +00:00
Jeff Law
f5f13c1d73 * simops.c: Implement remaining 2 byte instructions. Call 
abort for instructions we're not implementing now.
 1996-11-27 16:25:03 +00:00
Jeff Law
707641f658 * simops.c: Implement lots of random instructions. 
Implments most instructions with first nibble 0x0 - 0xe and
those with the first byte 0xf0 - 0xf2.
 1996-11-27 07:20:36 +00:00
Jeff Law
1f3bea2169 * simops.c: Implement "movm" and "bCC" insns. 
Function calls and conditional branches work!
 1996-11-27 05:29:49 +00:00
Jeff Law
92284aaa35 * mn10300_sim.h (_state): Add another register (MDR). 
(REG_MDR): Define.
        * simops.c: Implement "cmp", "calls", "rets", "jmp" and
        a few additional random insns.
We can now function calls.  We get out of crt0 into main now, then lose
when calls are nested (because don't handle movm yet).
 1996-11-27 00:53:25 +00:00
Jeff Law
73e6529893 * mn10300_sim.h (PSW_*): Define for CC status tracking. 
(REG_D0, REG_A0, REG_SP): Define.
        * simops.c: Implement "add", "addc" and a few other random
        instructions.
Starting to simulate instructions for the mn10300.  Executes some of
the crt0 code now!
 1996-11-26 22:58:24 +00:00