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Author SHA1 Message Date
Jiong Wang
49df5539f9 [AArch64][3/6] GAS support TLSLD move/add relocation types 
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers,
  "dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1",
  "dtprel_g1_nc", "dtprel_g2".
  (md_apply_fix): Support new relocation types.
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_g0.s: New testcase.
  * gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g2.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0.d: New expectation file.
  * gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g2.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
 2015-08-19 16:36:22 +01:00
Jiong Wang
13289c10e2 [AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
 2015-08-19 16:28:08 +01:00
Jiong Wang
70151fb54a [AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

include/elf/
  * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define.

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers
  "dtprel_lo12".
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
 2015-08-11 21:26:31 +01:00
Jiong Wang
a12fad50d2 [AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC 
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.d: New expectation file.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d: Likewise.
 2015-08-11 21:25:51 +01:00
Jiong Wang
1107e076cf [AArch64][2/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-tlsldm-page-1.s: New testcase.
  * gas/aarch64/reloc-tlsldm-page-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-tlsldm-page-1.d: New expectation file.
  * gas/aarch64/reloc-tlsldm-page-ilp32-1.d: Likewise.
 2015-08-11 21:24:38 +01:00
Jiong Wang
6c37fedc41 [AArch64][2/3] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21 2015-07-16 15:43:21 +01:00
Renlin Li
87f5fbcc7a [AArch64] Gas add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 support 
2015-06-15  Renlin Li <renlin.li@arm.com>
bfd/
    * reloc.c (BFD_RELOC_AARCH64_LD64_GOTOFF_LO15): New entry.
    * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
    BFD_RELOC_AARCH64_LD64_GOTOFF_LO15.
    * bfd-in2.h: Regenerate.
    * libbfd.h: Regenerate.

gas/
    * config/tc-aarch64.c (reloc_table): New relocation modifier.
    (md_apply_fix): Support BFD_RELOC_AARCH64_LD64_GOTOFF_LO15.
    (aarch64_force_relocation): Ditto

gas/testsuite/
    * gas/aarch64/reloc-insn.s: Update test
    * gas/aarch64/reloc-insn.d: Update expected result.
 2015-06-15 11:07:37 +01:00
Matthew Wahab
88f0ea342d [AArch64] Add support for ARMv8.1 command line option 2015-06-04 11:14:07 +01:00
Matthew Wahab
9e1f0fa7f3 [AArch64] Support for ARMv8.1a Adv.SIMD instructions 
2015-06-02  Matthew Wahab  <matthew.wahab@arm.com>

gas/
  * config/tc-aarch64.c (aarch64_features): Add "rdma".
  * doc/c-aarch64.texi (AArch64 Extensions): Add "rdma".

gas/testsuite/
  * rdma-directive.d: New.
  * rdma.d: New.
  * rdma.s: New.

include/opcode/
  * aarch64.h (AARCH64_FEATURE_RDMA): New.

opcode/
  * aarch64-tbl.h (aarch64_feature_rdma): New.
  (RDMA): New.
  (aarch64_opcode_table): Add "sqrmlah" and "sqrdmlsh" instructions.
  * aarch64-asm-2.c: Regenerate.
  * aarch64-dis-2.c: Regenerate.
  * aarch64-opc-2.c: Regenerate.
 2015-06-02 12:20:00 +01:00
Matthew Wahab
290806fd94 [AArch64] Support for ARMv8.1a Limited Ordering Regions extension 
2015-06-02  Matthew Wahab  <matthew.wahab@arm.com>
include/
  * aarch64.h (AARCH64_FEATURE_LOR): New.

opcodes/
  * aarch64-tbl.h (aarch64_feature_lor): New.
  (LOR): New.
  (aarch64_opdocde_table): Add "ldlar", "ldlarb", "ldlarh", "stllr",
  "stllrb", "stllrh".
  * aarch64-asm-2.c: Regenerate.
  * aarch64-dis-2.c: Regenerate.
  * aarch64-opc-2.c: Regenerate.

gas/
  * config/tc-aarch64.c (aarch64_features): Add "lor".
  * doc/c-aarch64.c (Aarch64 Extensions): Add "lor" to list of
  architecture extensions.

gas/testsuite/
  * lor-directive.d: New.
  * lor.d: New.
  * lor.s: New.
 2015-06-02 11:30:12 +01:00
Matthew Wahab
72ca8fad61 [AArch64][GAS] Add support for PAN architecture extension 
2015-06-01  Matthew Wahab  <matthew.wahab@arm.com>
gas/
	* config/tc-aarch64.c (parse_sys_reg): New parameter.  Check
	target support.  Fix whitespace.
	(parse_operands): Update for parse_sys_reg changes.
	(aarch64_features): Add "pan".
	* doc/c-aarch64.texi (Aarch64 Extensions): Add "pan".

gas/testsuite/
	* pan-directive.d: New.
	* pan.d: New.
	* pan.s: New
 2015-06-01 16:05:58 +01:00
Jiong Wang
3d715ce420 [AArch64] GAS support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 
This patch add BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 support in Gas.

The relocation modifier
===
  :gotpage_lo14:symbol

2015-06-01 Jiong.Wang <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14.
  (aarch64_force_relocation): Ditto.

gas/testsuite/
  * gas/aarch64/ilp32-basic.s: New testcase.
  * gas/aarch64/ilp32-basic.d: Ditto.
 2015-06-01 15:41:54 +01:00
Jiong Wang
a921b5bd70 [AArch64] GAS Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15 
2015-06-01 Jiong.Wang <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15.
  (aarch64_force_relocation): Ditto.

gas/testsuite/
  * gas/aarch64/reloc-insn.s: New testcase.
  * gas/aarch64/reloc-insn.d: Ditto.
 2015-06-01 10:22:15 +01:00
Jiong Wang
f09c556a25 [AArch64] Sort relocation case labels alphabetically 
2015-05-19  Jiong. Wang  <jiong.wang@arm.com>

gas/
  * config/tc-aarch64.c (process_movw_reloc_info): Sort relocation case labels
  alphabetically.
  (md_apply_fix): Ditto.
  (aarch64_force_relocation): Ditto.
 2015-05-20 10:48:29 +01:00
Renlin Li
448eb63d72 [AArch64] Record instruction alignment for .inst directive 
2015-05-06  Renlin Li  <renlin.li@arm.com>

  gas/
    * config/tc-aarch64.c (mapping_state): Recording alignment before exit.

  gas/testsuite/
    * gas/aarch64/codealign_1.s: New.
    * gas/aarch64/codealign_1.d: New.
 2015-05-06 12:18:19 +01:00
Renlin Li
c7ad08e6e5 [AARCH64] Positively emit symbols for alignment 
2015-05-05  Renlin Li  <renlin.li@arm.com>

  gas/
    * config/tc-aarch64.c (aarch64_init_frag): Always generate mapping symbols.

  gas/testsuite/
    * gas/aarch64/mapping_5.d: New.
    * gas/aarch64/mapping_5.s: New.
    * gas/aarch64/mapping_6.d: New.
    * gas/aarch64/mapping_6.s: New.
 2015-05-05 17:48:18 +01:00
Renlin Li
eb9d6cc91a [AArch64] Don't try to align insn in non-executale section 
2015-04-27  Renlin Li  <renlin.li@arm.com>

  gas/
    * config/tc-aarch64.c (s_aarch64_inst): Don't align code for non-text
    section.
    (md_assemble): Likewise, move the align code outside the loop.
 2015-04-27 11:36:12 +01:00
Jim Wilson
faade85139 gas thunderx support 
gas/
* config/tc-aarch64.c (aarch64_cpus): Add CRC and CRYPTO features
for thunderx.
 2015-04-24 13:44:20 -07:00
Renlin Li
a97902de74 [AArch64] use subseg_text_p to check .text 
2015-04-07  Renlin Li  <renlin.li@arm.com>

gas/
  * config/tc-aarch64.c (mapping_state): Use subseg_text_p.
  (s_aarch64_inst): Likewise.
  (md_assemble): Likewise.
 2015-04-07 18:10:33 +01:00
Renlin Li
c1baaddf88 [AArch64] Emit DATA_MAP in order within text section 
2015-03-27  Renlin Li  <renlin.li@arm.com>

gas/
  * config/tc-aarch64.c (mapping_state): Emit MAP_DATA within text section in order.
  (mapping_state_2): Don't emit MAP_DATA here.
  (s_aarch64_inst): Align frag during state transition.
  (md_assemble): Likewise.
 2015-04-02 14:59:45 +01:00
Ed Maste
726e626a7b Remove unused functions in tc-aarch64.c. 
* config/tc-aarch64.c (set_error_kind): Delete.
	(set_error_message): Delete.
 2015-04-02 14:44:59 +01:00
Evandro Menezes
2412d87834 [AArch64] Add support for the Samsung Exynos M1 processor 
2015-03-26  Evandro Menezes  <e.menezes@samsung.com>

gas/
	* config/tc-aarch64.c: Add support for Samsung Exynos M1.
	* doc/c-aarch64.texi (-mcpu=): Add "exynos-m1".
 2015-04-01 21:00:41 +00:00
Renlin Li
bb383c6cf1 [AARCH64]Fix "align directive causes MAP_DATA symbol to be lost" 
gas/ChangeLog:

2015-03-25  Renlin Li  <renlin.li@arm.com>

  * config/tc-aarch64.c (mapping_state): Remove first MAP_DATA emitting code.
  (mapping_state_2): Emit first MAP_DATA symbol here.
 2015-03-25 12:33:07 +00:00
Jiong Wang
4bf8c6e898 [AArch64] Don't warn on XZR/SP overlapping when it's in load/store 
2015-03-13  Jiong Wang  <jiong.wang@arm.com>

gas/
   * config/tc-aarch64.c (warn_unpredictable_ldst): Don't warn on reg number 31.

gas/testsuite/
  * gas/aarch64/diagnostic.s: New testcases.
  * gas/aarch64/diagnostic.l: New error match.
 2015-03-13 12:02:23 +00:00
Jiong Wang
a578ef7ed4 [AArch64] Set the minimum alignment on code segments 
gas/
2015-03-10  Matthew Wahab  <matthew.wahab@arm.com>

	* config/tc-aarch64.c (mapping_state): Set minimum alignment for
	code sections.

gas/testsuite
2015-03-10  Matthew Wahab  <matthew.wahab@arm.com>

	* gas/aarch64/codealign.d: Add test for code section alignment.
	* gas/aarch64/codealign.s: New file.
 2015-03-10 11:22:15 +00:00
Richard Sandiford
e09ab7ac78 Allow MOVK for R_AARCH64_TLSLE_MOVW_TPREL_G{0,1}NC 
bfd/
	PR gas/17843
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Expect
	R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
	to be used with MOVK rather than MOVZ.

gas/
	PR gas/17843
	* config/tc-aarch64.c (process_movw_reloc_info): Allow
	R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
	for MOVK.

gas/testsuite/
	PR gas/17843
	* gas/aarch64/tls.s, gas/aarch64/tls.d: Add test for
	R_AARCH64_TLSLE_MOVW_TPREL_G0/R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
	sequence.

ld/testsuite/
	PR gas/17843
	* ld-aarch64/tlsle.s, ld-aarch64/tlsle.d: New test.
	* ld-aarch64/aarch64-elf.exp: Run it.
 2015-03-04 09:09:05 +00:00
Marcus Shawcroft
1ada945d05 [AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19 2015-02-26 22:59:23 +00:00
Marcus Shawcroft
389b8029b6 [AArch64] Add support for :tlsdesc: and TLSDESC_ADR_PREL21 2015-02-26 22:59:16 +00:00
Marcus Shawcroft
3c12b05436 Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support. 2015-02-26 22:23:09 +00:00
Marcus Shawcroft
043bf05a3d Adding support for TLSIE_LD_GOTTREL_PREL19. 2015-02-26 22:23:09 +00:00
Marcus Shawcroft
74ad790c76 Adding ld_literal_type. 
Extend the address modifier parsing to distinguish between the
modifers used in LDR literal and LDR register offset address modes.

The current parser incorrectly accepts the :got: modifier on a
register offset instruction resulting in silent corruption of the
output binary.
 2015-02-26 22:23:09 +00:00
Marcus Shawcroft
6f4a313ba4 Adding adr_type and prevent adr :got: 
The current implementation of the :got: assembler modifier does not
distinguish the ADR and ADRP instruction.  The :got: modifier does not
make sense on and ADR instruction and should be error'd rather than
the current behavior of applying an inappropriate relocation to the
output and scrambling the underlying instruction silently.
 2015-02-26 22:23:09 +00:00
Marcus Shawcroft
1db365dcdf Remove dead code. 2015-02-26 22:23:08 +00:00
Jiong Wang
aa31c464df [AArch64] Fix code formatting in the cpu-table 
2015-02-11  Matthew Wahab  <matthew.wahab@arm.com>

	* config/tc-aarch64.c (aarch64_cpus): Fix code formatting.
 2015-02-11 14:35:27 +00:00
Jiong Wang
2abdd192f1 [AArch64] Add support for Cortex-A72 
2015-02-04  Matthew Wahab  <matthew.wahab@arm.com>

	* config/tc-aarch64.c (aarch64_cpus): Add support for Cortex-A72.
	* doc/c-aarch64.texi (-mcpu=): Add "cortex-a72".
 2015-02-04 19:17:12 +00:00
Alan Modra
b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Richard Earnshaw
5c47e52589 [AArch64] Fix mis-detection of unpredictable load/store operations with FP regs. 
* config/tc-aarch64.c (warn_unpredictable_ldst): Check that transfer
	registers are in the GP register set.  Adjust warnings.  Use correct
	field member for address register.
	* testsuite/gas/aarch64/diagnostic.l: Update.
 2014-11-20 15:28:52 +00:00
Jiong Wang
54a28c4ce5 [AArch64] Warn on load pair to same register 
2014-11-19  Ryan Mansfield  <rmansfield@qnx.com>

    * config/tc-aarch64.c (md_assemble): Call warn_unpredictable_ldst.
    (warn_unpredictable_ldst): New.

  2014-11-19  Ryan Mansfield <rmansfield@qnx.com>

    * gas/aarch64/diagnostic.s: Add new warnings test patterns.
    * gas/aarch64/diagnostic.l: Update expected diagnostic output.
 2014-11-19 09:35:23 +00:00
Jan Beulich
ae527cd876 aarch64: allow adding/removing just feature flags via .arch_extension 
Rather than requiring to always also set/change the base architecture,
allow just en-/disabling of architecture extensions, matching what ARM
has.
 2014-11-18 14:08:28 +01:00
Philipp Tomsich
0a9ce86daf [AArch64] Add xgene2. 2014-11-18 11:24:14 +00:00
Philipp Tomsich
070cb95614 [AArch64] Add xgene1. 
The name xgene1 superceeds xgene-1.  We retain support for the
original xgene-1 for compatibility but drop it from documentation.
 2014-11-18 11:19:05 +00:00
Marcus Shawcroft
02c1355124 [AArch64] Enable CRC feature in GAS for cortex-a53 and cortex-a57. 2014-11-14 12:52:17 +00:00
Marcus Shawcroft
09bc6c7224 [AArch64] Remove example processors from GAS. 2014-11-13 16:42:23 +00:00
Dr Philipp Tomsich
f803aa8ead Remove the artificial limit on code alignment through the use of the 
fixed part of a fragment for output generation only, which required
MAX_MEM_FOR_RS_ALIGN_CODE to be large enough to hold the maximum pad.

	* config/tc-aarch64.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define to 7.
	* config/tc-aarch64.c (aarch64_handle_align): Rewrite to handle
	large alignments with a constant fragment size of
	MAX_MEM_FOR_RS_ALIGN_CODE.
 2014-10-30 10:53:09 +00:00
Andrew Pinski
55fbd9927b [AARCH64] Add thunderx support to gas 
This patch adds -mcpu=thunderx support to gas.

OK? Tested with no regressions.

ChangeLog:
	* config/tc-aarch64.c (aarch64_cpus):
	Add thunderx.
	* doc/c-aarch64.texi: Document that thunderx
	is a valid processor name.
 2014-10-21 10:51:01 -07:00
Jan Beulich
28f013d5cb aarch64: move bogus assertion 
Asserting "idx" to be non-negative when subsequent code handles this
case is bogus. In fact the assertion triggers e.g. when mistakenly
using the arm32 comment character @ following an instruction.

While doing this I also noticed that despite there being local
variables "detail" and "idx", not all places where they could be used
did actually make use of them, so this is being adjusted at once.

Finally, for the code to be slightly more robust, also change
comparisons against -1 to such checking for a (non-)negative value.
 2014-10-21 09:53:25 +02:00
Jiong Wang
df7b4545b2 [PATCH/AArch64] Generic support for all system registers using mrs and msr 
2014-09-03  Jiong Wang  <jiong.wang@arm.com>

  opcode/
    * aarch64-tbl.h (aarch64_opcode_table): Update encoding for mrs/msr.
    * aarch64-dis-2.c: Update auto-generated file.

  gas/
    * config/tc-aarch64.c (parse_sys_reg): Remove the restriction on op0 field.

  gas/testsuite/
    * gas/aarch64/illegal.s: Update testcase.
    * gas/aarch64/illegal.d: Likewise.
    * gas/aarch64/sysreg-1.s: Likewise.
    * gas/aarch64/sysreg-1.d: Likewise.
 2014-09-03 14:53:53 +01:00
Jiong Wang
ee804238f0 [PATCH/AArch64] Implement LSE feature 
2014-09-03  Jiong Wang  <jiong.wang@arm.com>

  gas/
	* config/tc-aarch64.c (parse_operands): Recognize PAIRREG.
	(aarch64_features): Add entry for lse extension.

  include/opcode/
	* aarch64.h (AARCH64_FEATURE_LSE): New feature added.
	(aarch64_opnd): Add AARCH64_OPND_PAIRREG.
	(aarch64_insn_class): Add lse_atomic.
	(F_LSE_SZ): New field added.
	(opcode_has_special_coder): Recognize F_LSE_SZ.

  opcode/
	* aarch64-tbl.h (QL_R4NIL): New qualifiers.
	(aarch64_feature_lse): New feature added.
	(LSE): New Added.
	(aarch64_opcode_table): New LSE instructions added.  Improve
	descriptions for ldarb/ldarh/ldar.
	(aarch64_opcode_table): Describe PAIRREG.
	* aarch64-opc.h (aarch64_field_kind): Add FLD_lse_sz.
	* aarch64-opc.c (fields): Add entry for F_LSE_SZ.
	(aarch64_print_operand): Recognize PAIRREG.
	(operand_general_constraint_met_p): Check reg pair constraints for CASP
	instructions.
	* aarch64-dis.c (aarch64_ext_regno_pair): New extractor for paired reg.
	(do_special_decoding): Recognize F_LSE_SZ.
	* aarch64-asm.c (do_special_encoding): Recognize F_LSE_SZ.

  gas/testsuite/
	* gas/aarch64/lse-atomic.d: New.
	* gas/aarch64/lse-atomic.s: Likewise.
	* gas/aarch64/illegal-lse.d: Likewise.
	* gas/aarch64/illegal-lse.l: Likewise.
	* gas/aarch64/illegal-lse.s: Likewise.
	* gas/aarch64/diagnostic.s: Check processor feature detect for lse
	instruction.
	* gas/aarch64/diagnostic.l: Likewise.
 2014-09-03 14:53:53 +01:00
Richard Henderson
a2cac51cb0 aarch64: Fix CFA encoding of vector registers 
* config/tc-aarch64.c (tc_aarch64_regname_to_dw2regnum): Fix
	register number for vector register types.
 2014-08-22 14:41:43 -07:00
Alan Modra
e57e6ddc2e Prepare gas for 64-bit obstacks 
Use size_t in a few places involved with obstacks, and don't include
obstack.h in files that don't use obstacks.

gas/
	* config/bfin-parse.y: Don't include obstack.h.
	* config/obj-aout.c: Likewise.
	* config/obj-coff.c: Likewise.
	* config/obj-som.c: Likewise.
	* config/tc-bfin.c: Likewise.
	* config/tc-i960.c: Likewise.
	* config/tc-rl78.c: Likewise.
	* config/tc-rx.c: Likewise.
	* config/tc-tic4x.c: Likewise.
	* expr.c: Likewise.
	* listing.c: Likewise.
	* config/obj-elf.c (elf_file_symbol): Make name_length a size_t.
	* config/tc-aarch64.c (symbol_locate): Likewise.
	* config/tc-arm.c (symbol_locate): Likewise.
	* config/tc-mmix.c (mmix_handle_mmixal): Make len_0 a size_t.
	* config/tc-score.c (s3_build_score_ops_hsh): Make len a size_t.
	(s3_build_dependency_insn_hsh): Likewise.
	* config/tc-score7.c (s7_build_score_ops_hsh): Likewise.
	(s7_build_dependency_insn_hsh): Likewise.
	* frags.c (frag_grow): Make parameter a size_t, and use size_t locals.
	(frag_new): Make parameter a size_t.
	(frag_var_init): Make max_chars and var parameters size_t.
	(frag_var, frag_variant): Likewise.
	(frag_room): Return a size_t.
	(frag_align_pattern): Make n_fill parameter a size_t.
	* frags.h: Update function prototypes.
	* symbols.c (save_symbol_name): Make name_length a size_t.
 2014-07-26 21:00:50 +09:30