* config/tc-i386.c (check_prefix): New static function, split out
from md_assemble.
(struct _i386_insn): Add wait_prefix field.
(md_assemble): Remove wait_prefix local variable. Use
check_prefix when adding a prefix.
* config/tc-i386.c (current_templates): New static variable.
(md_assemble): Remove current_templates local variable.
(md_assemble, i386_operand): Improve error and warning messages in
many places. Add RESTORE_END_STRING in many places before error
return. Clarify some comments.
* config/tc-i386.c (struct _i386_insn): Change seg field to a two
element array.
(md_assemble): Parse string instruction operands, looking for
segment override prefixes. Check for invalid segment prefixes on
string instruction.
(i386_operand): i.seg[] and max mem_operand changes for string
insns.
* config/tc-i386.h (EsSeg): Define.
* config/tc-i386.h (regKludge): Define.
(iclrKludge, imulKludge): Don't define.
* config/tc-i386.c (md_assemble): Merge imulKludge and iclrKludge
code. Move ReverseRegRegmem fudges into Modrm case. Reorder
opcode_modifier checks to look for more common cases first. Add
default_seg for IsString case.
(compute_mpgloc): New function.
(eval_expr): New arg `cpu'. All callers updated.
(non_vu_insn_seen_p): New static global.
(RELAX_{MPG,DIRECT,VU,ENCODE,GROWTH,DONE_}): New macros.
(struct dvp_fixup): New member `cpu'.
(assemble_one_insn): New args init_fixup_count, fixup_offset.
All callers updated.
(md_assemble): Set non_vu_insn_seen_p as appropriate.
(assemble_vif): Set `cpu' field of fixup.
Clean up calls to frag_var. Recorded mpgloc is now in bytes.
(assemble_vu_insn): Delete, contents moved into ...
(assemble_vu): ... here. Don't record fixups until after parsing
both upper and lower insns. If branch insn inside mpg, properly
compute target address.
(dvp_frob_label): Create copies of vu labels inside mpg's.
(dvp_relax_frag): Clean up.
(md_convert_frag): Ditto.
(md_apply_fix3): Signal error if mpg embedded vu code has branch
to undefined label (not currently supported).
(eval_expr): New arg `cpu'. All callers updated.
(insert_operand_final): Convert mpgloc from bytes to dwords.
(s_endmpg): Use compute_mpgloc to update $.mpgloc.
(s_state): If switching to vu state, initialize $.mpgloc.
* config/tc-i386.c (md_assemble): Swap template arguments to
CONSISTENT_REGISTER_MATCH macro in reverse direction test.
This macro is currently symmetric, so passing them the wrong
way didn't cause any problem, but may if the macro is changed
in the future.
After copying template to i.tm, use i.tm. rather than t-> to
access fields, and make t a const*
Move i.tm.operand_types[] swap to immediately after the copy.
(md_convert_frag): Delete.
(TC_FIX_TYPE): New fields wl,cl,user_value;
* config/tc-dvp.c (insert_mpg_marker): New argument ignore.
All callers updated.
(insert_unpack_marker): New function.
(insert_file): New argument insert_marker_arg. All callers updated.
(gif_user_value): New static local.
(vif_data_start,vif_data_end): New static locals.
(mpgloc_sym,unpackloc_sym): New static locals.
(cur_varlen_frag,cur_varlen_insn,cur_varlen_value): Delete.
(cur_opcode,cur_operand): New static locals.
(endmpg_caller): New enum.
(md_pseudo_table): Pass ENDMPG_USER to s_endmpg.
(md_begin): Initialize mpgloc_sym, unpackloc_sym.
(dvp_fixup): New members user_value,wl,cl;
(assemble_vif): Rewrite.
(assemble_gif): Tweak name of data start label.
(assemble_one_insn): Allow special parser to punt and call the
normal expression parser. Set cur_opcode,cur_operand for md_operand.
(md_operand): Handle '*' value for mpgloc,unpackloc.
(md_estimate_size_before_relax): New function.
(dvp_relax_frag,md_convert_frag): New functions.
(md_pcrel_from_section): Handle end data label for variable length
vif insns.
(md_apply_fix3): Handle count field for variable length vif insns.
Handle address field for mpg,unpack.
(eval_expr): Initialize user_value,wl,cl fields of the fixup.
(cur_vif_insn_length): Delete.
(vif_length_value): New function.
(install_vif_length): Don't perform logical->physical conversion here.
(s_enddirect,s_endmpg,s_endunpack): Rewrite.
* config/tc-i386.h (LinearAddress): Define.
* config/tc-i386.c (md_assemble): If LinearAddress is set for the
instruction, don't use a default segment.
"name.completer" where only the name is actually in the opcode
table. Allow various operands for base register in load/store
instructions. Handle various new argument characters for the
cop2/vu0 co-processor.
(insert_file): New args insert_marker, size. All callers updated.
(assemble_vif): Rewrite varlen insn handling.
(assemble_vu): Call insert_mpg_marker when 256th insn reached.
(s_enddirect,s_endunpack): Rename arg to internal_p.
(setup_dma_autocount): Renamed from setup_autocount. New argument
inline_p. All callers changed. Fix word address of count.
(parse_dma_addr_autocount): Fix word address of address.
(gif_{insn_type,data_name,insn_frag}): New static locals.
(md_assemble): Watch for .endgif if in ASM_GIF state.
(assemble_gif): Complete.
(s_endgif): Complete.
(md_pseudo_table): Add .word.
(assemble_dma): Set alignment to 16 bytes. Enable code that records
fixups.
(assemble_one_insn): Handle DVP_OPERAND_DMA_{ADDR,AUTOCOUNT}.
(md_apply_fix3): Handle DVP_OPERAND_DMA_ADDR.
(parse_dma_addr_autocount): Renamed from parse_dma_ptr_autocount.
Rewrite.
(eval_expr): New function.
(create_label,create_colon_label): New function.
(s_enddmadata): Rewrite.
insns regardless of the size of a pointer if we're in mips I or
MIPS II mode.
(macro, macro2, s_cprestore, s_cpadd): Likewise.
Fix problems in recent code to handle address sizes more sanely.
* config/tc-ppc.c (md_apply_fix3): Change BFD_RELOC_HI16 and
BFD_RELOC_HI16_S to store the high bits of any value.
* config/tc-ppc.h (tc_fix_adjustable): Undo change of Fri Jun 27.
(TC_RELOC_RTSYM_LOC_FIXUP): Don't let the
assembler calculate relocations to any external symbol at all.
* config/tc-ppc.c (md_apply_fix3) [OBJ_ELF]: Correct bugs
involving generation of pc-relative relocs.
(md_pcrel_from_section) [OBJ_ELF]: The job this code used to do
has been moved to md_apply_fix3.
* config/tc-ppc.c (md_apply_fix3): Fix test for too-far branch.
(ppc_elf_suffix): Warn about 'identifier+constant@got' syntax,
which actually means (the address of identifier's GOT entry) +
constant, which is not particularly useful.
* Makefile.am (CONFIG_OBJS): New variable, containing part of old
OBJS variable.
(GENERIC_OBJS): New variable, with the rest of the old OBJS
variable.
(OBJS): Now just $(CONFIG_OBJS) and $(GENERIC_OBJS).
($(srcdir)/make-gas.com): Rename from make-gas.com.
(stamp-mk.com): Replace $(OBJS) with $(GENERIC_OBJS).
(EXTRA_DIST): Define.
* vmsconf.sh: Handle {targ-cpu, obj-format, atof-targ} modules
explicitly rather than via the list of object files.
(gcc-as.opt): New file created when make-gas.com is run.
* config-gas.com: Create {targ-cpu.h, obj-format.h, targ-env.h,
itbl-cpu.h} to #include appropriate file rather than copying that
file.
* config/vms-conf.h: Synchronize with current config.in.
* Makefile.in: Rebuild.
(md_longopts): Add new OPTION_RELAX and OPTION_NO_RELAX options.
(md_parse_option): Handle new relax options.
(md_show_usage): Document new relax options.
(find_opcode): Don't use short forms of PC relative branches if
tic80_relax is set.
PR 12927
long (32 bit) PC relative offsets. Fix places that previously
misused R_MPPCR for 15 bit offsets to use the new R_MPPCR15W type.
(md_apply_fix): Add case to handle long PC relative offsets.
PR 12927
(hilo_interlocks): Added mips_4900.
(md_begin): Set default for mips_4900.
(macro_build,mips_ip): Test for INSN_4900 if mips_4900.
(md_longopts): Add "m4900" and "no-m4900".
(md_parse_option): Handle above options.
(hilo_interlocks): VR5400 has interlocks.
(md_begin): Expect mips64vr5400, not mips64r5400.
* config/tc-mips.c (mips_ip): In default case, call as_bad instead of fprintf,
to get "assembler messages:" message output before instead of after.
print out MD fields of fix.
* frags.c (frag_var, frag_variant): Use TC_FRAG_INIT macro (if
defined) to initialize MD fields in frag.
* as.h (struct frag, ns32k support): Rename ns32k to fr_ns32k.
Delete pcrel_adjust. Add fr_opcode_fragP, fr_opcode_offset.
* config/tc-ns32k.h: Add comments. Remove obsolete
BFD_FAST_SECTION_FILL definition, change prototypes for
fix_new_ns32k and fix_new_ns32k_exp to add new arguments
opcode_frag and opcode_offset and remove pcrel_adjust.
(TC_FIX_TYPE): add opcode_fragP and opcode_offset fields.
(TC_FIX_DATA_PRINT): new macro to print out TC_FIX_TYPE.
(TC_FRAG_INIT): new macro to initialize machine dependent field in
frags.
(frag_opcode_frag, frag_opcode_offset, frag_bsr): macros to access
MD fields in frag structure.
(fix_im_disp, fix_bit_fixP, fix_opcode_frag, fix_opcode_offset,
fix_bsr): macros to access MD fields in fix structure.
* config/tc-ns32k.c: Avoid overlength lines. Align comments. Don't
use struct opcode_location as these fields are now in the frag
structure.
(convert_iif): Call frag_more as it is needed instead
of trying to allocate for the whole insn. Avoid call of frag_more
with negative argument.
(md_pcrel_adjust, md_fix_pcrel_adjust, md_apply_fix,
md_estimate_size_before_relax, md_pcrel_from,
tc_aout_fix_to_chars): use accessor macros to get md fields in fix
and frag structures.
(fix_new_ns32k, fix_new_ns32k_exp): add new arguments opcode_frag and
opcode_offset and remove pcrel_adjust.
(convert_iif, cons_fix_new_ns32k): call fix_new_ns32k,
fix_new_ns32k_exp with changed arguments.
that mips_cpu depends on TARGET_CPU, and mips_opts.isa depends on
mips_cpu.
(md_parse_option): Remove all code that sets defaults; md_begin
handles all of this now.
(md_begin, md_parse_option): Handle 5400 options/names.
(macro_build, mips_ip): Check for 5400-specific instructions.
(md_longopts, OPTION_M5400, OPTION_NO_M5400): More command-line support for
5400.
* config/tc-mips.c (validate_mips_insn): New function, checks match versus mask
bits, and also verifies that all bits to be output are actually specified
somewhere.
(md_begin): Call it for 32-bit instructions, instead of doing match/mask check
here. In case of failure, print a message, but check the rest of the opcode
table before exiting.
* config/tc-sparc.c (sparc_memory_model): New variable.
(md_longopts): Add -TSO/-PSO/-RMO options.
(md_parse_options): Handle them.
(sparc_elf_final_processing): For 64 ELF, set required
memory ordering in e_flags. Default to RMO and let the user
override it through command line.
* config/tc-sparc.h (elf_tc_final_processing): Add.
(struct sparc_arch): Rename arch_size to default_arch_size.
New member user_option_p.
(sparc_arch_table): Always include v9, v9a. New entry v9-64.
(init_default_arch): Check whether default arch is valid.
Set default_arch_size in addition to sparc_arch_size.
(OPTION_32,OPTION_64): Define.
(md_longopts): New entries for -32, -64.
(md_parse_option): Handle them.
(md_show_usage): Print them. Ensure init_default_arch called.
* config/tc-sparc.c (sparc_target_format): Handle coff here.
(sparc_ip): Add %hix,%lox.
(md_apply_fix3): Call as_bad_where, not as_bad.
Add support for BFD_RELOC_SPARC_{HIX22,LOX10}.
(tc_gen_reloc): Add support for BFD_RELOC_SPARC_{HIX22,LOX10}.
