2000-04-14 Gary Thomas <gthomas@redhat.com>
* v850.igen: Define 'br *' as illegal since this is the only
way to provide a breakpoint on some v850 family processors.
v850/simops.c, d10v/simops.c, v850/Makefile.in, d10v/Makefile.in:
Include targ-vals.h instead of syscall.h. Replace SYS_* with
TARGET_SYS_*. Add dependency.
z8k/support.c: Include <errno.h>
v850/simops.c: Replace long with portable signed32.
mips/interp.c: Make sim_monitor global - needed by sky.
Use the bfd-processor name in the sim-engine switch.
Add nr_cpus argument to sim_engine_run.
tic80, v850, d30v, mips, common:
Update
mips: Fill in bfd-processor field of model records so that
they match ../bfd/archures.
o Clarify how to use alias options
o use in sim-watch (better usage message)
o Don't pass something on the stack into the
watch-point interrupt hander.
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
that image properties such as endianness can be checked.
More strongly document the expected behavour of each of the sim_*
interfaces.
Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN. Use in sim_config.
(prog_bfd): New global variable.
(sim_open): Undo patch to add -E support.
(sim_close): Close prog_bfd if sim_load opened it.
(sim_load): Record bfd of loaded file in prog_bfd.
* simops.c (prog_bfd): Renamed from exec_bfd.
o Provide poll_quit callback to simulators
so that they can poll for SIGINT on
clueless OS's.
o Add sim_stop to simulators so that clients
can request a halt (eg gdbtk's STOP button)
Works for PPC!
o Re-arange remote-sim.c so that the
hard work is moved from gdbsim_resume()
to gdbsim_wait() (where it should be).
* Make-common.in (CSEARCH): Do not include the gdb directory in
the search path.
* Make-common.in (SIM_ENDIAN, SIM_HOSTENDIAN, SIM_INLINE,
SIM_WARNING): Drop, requiring the simulator specific Makefile.in
to explicitly incorporate these.
* aclocal.m4 (--enable-sim-alignment); New option. Strongly
specify the alignment restrictions of the target architecture -
without this option all alignment restrictions are accomodated.
(--enable-sim-assert): New option. Conditionally compile in
assertion statements.
(--enable-sim-float): New option. Strongly specify the target's
floating point support.
(--enable-sim-hardware): New option. Specify the hardware devices
included in the simulation.
(--enable-sim-packages): New option. Specify the hardware
packages included in the simulation.
(--enable-sim-regparm): New option. Specify that parameters be
passed in registers instead of on the stack.
(--enable-sim-reserved-bits): New option. Specify that reserved
bits within an instruction are are correctly set.
(--enable-sim-smp): New option. Specify the level of SMP support
to be included in the simulator.
(--enable-sim-stdcall): New option. Specify an alternative
function call convention.
(--enable-sim-xor-endian): New option. Configure xor-endian
support used by some targets to implement bi-endian support.
scheme which is more compatible with WinGDB builds.
* configure.in: Improve comment on how to run autoconf.
* configure: Re-run autoconf to get new ../common/aclocal.m4.
* Makefile.in: Use autoconf substitution to install common
makefile fragment.
(OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement
is zero extended for sst/sld instructions.
* v850_sim.h (SEX7): Delete. It's no longer needed (and it
was incorrect anyway).
So we properly simulate sst/sld instructions.
autoconf.
* gencode.c (write_opcodes): Pad operands field to account for
MSVC braindamage.
* simops.c: Include errno.h. Exclude SYS_chown, since MSVC
doesn't support it. (Why is this here in the first place?!?)
* v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's.
Change number of operands in struct simops from 9 to 6. Define
SIGTRAP and SIGQUIT for MSVC.
* (map): Add support for external mem in the 1->2 meg range.
Also, abort() when memory access is way out of bounds. (Better to
die than to give wrong result. (This will be fixed later.))
* (sim_size): MEM_SIZE is now bytes, not shift factor.
and patterns.
* interp.c (sim_resume): Save and restore PC from the appropriate
register.
* (sim_fetch_register sim_store_register): Fix byte-order problem
with reading and writing registers.
* simops.c (OP_FFFF): Implement pseudo-breakpoint insn.
