Commit graph

2306 commits

Author SHA1 Message Date
Alan Modra
b3066ae825 m68hc11/12 and xgate config.sub weirdness
Oddly, config.sub converts a duple ending in -elf for these target to
-unknown-none, which means they aren't seen as elf targets by
binutils.  So, counter that.  This exposes a number of testsuite
issues (ones you would have seen if configuring with a full triple,
say m68hc11-unknown-elf).

binutils/
	* testsuite/lib/binutils-common.exp (is_elf_format): Return true
	for m68hc11/12 and xgate triples.
gas/
	* testsuite/gas/cfi/cfi.exp: Exclude m68hc11/12 from m68k test.
ld/
	* testsuite/lib/ld-lib.exp (check_shared_lib_support): Exclude xgate.
	* testsuite/ld-elf/endsym.d: xfail m68hc11/12 and xgate.
	* testsuite/ld-elf/pr14156a.d: Likewise.
	* testsuite/ld-elf/pr14926.d: Don't run for m68hc11/12 and xgate.
	* testsuite/ld-elf/sec64k.exp: Likewise.
2016-01-17 12:13:43 +10:30
Thomas Preud'homme
4c4ac9642a Fix Thumb-Thumb farcall v6-M (no profile) test
2016-01-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>

ld/
    * testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall v6-M (no profile)):
    Set address of .foo section when linking.
    * testsuite/ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Place myfunc
    in .foo section.
    * testsuite/ld-arm/farcall-thumb-thumb-m-no-profile.d: Adapt expected
    output to the above changes.
2016-01-14 18:00:55 +08:00
Nick Clifton
8405419985 Mark the linker's -Bsymbolic-functions test as an expected failure for MIPS targets.
* ld-elf/elf.exp (-Bymsolic-functions): Expect to fail
	for MIPS targets.
2016-01-13 10:00:49 +00:00
Nick Clifton
13ce3603be Mark the linker's extract symbols test as an expected failure for MIPS targets.
* testsuite/ld-scripts/script.exp (extract_symbol_test): Expect to
	fail for MIPS targets.
2016-01-13 09:40:11 +00:00
Nick Clifton
1bce3adf99 Mark the rgn-at11 test as an expected failure for MIPS targets.
* ld-scripts/rgn-at11.d: Expect this test to fail for
	MIPS targets.
2016-01-13 09:26:22 +00:00
Yury Usishchev
ac06903dcf Add cantunwind when unwind info does not match start of section.
bfd     * elf32-arm.c (elf32_arm_fix_exidx_coverage): Insert cantunwind when
        address in first unwind entry does not match start of section.

tests   * ld-arm/arm-elf.exp: New test.
        * ld-arm/unwind-mix.d: New file.
        * ld-arm/unwind-mix1.s: New file.
        * ld-arm/unwind-mix2.s: New file.
2016-01-12 16:35:49 +00:00
Jiong Wang
109575d7eb [ARM] PR ld/19368: Add missing relocation type class for R_ARM_IRELATIVE
2016-01-08  Richard Sandiford  <richard.sandiford@arm.com>
	    Jiong Wang  <jiong.wang@arm.com>

	PR ld/19368
	bfd/
	* elf32-arm.c (elf32_arm_reloc_type_class): Map R_ARM_IRELATIVE to
	reloc_class_ifunc.

	ld/
	* testsuite/ld-arm/ifunc-3.rd: Update expected result.
	* testsuite/ld-arm/ifunc-4.rd: Likewise.
	* testsuite/ld-arm/ifunc-9.rd: Likewise.
	* testsuite/ld-arm/ifunc-10.rd: Likewise.
	* testsuite/ld-arm/ifunc-12.rd: Likewise.
	* testsuite/ld-arm/ifunc-13.rd: Likewise.
2016-01-08 09:49:03 +00:00
Maciej W. Rozycki
d537eeb527 MIPS/BFD: Move attribute check after ELF file header flag check
We have a problem in that in making compatibility checks while merging
private BFD data on the MIPS target we give priority to the attribute
check, which may fail and cause the function to abort early on.  The
problem with this is the ABI compatibility aspect recorded in the
attributes is relatively minor compared to aspects recorded in the ELF
file header.  However the premature exit causes any more important
compatibility aspect violated to be masked and not reported to the user
once a problem with attributes has been noticed.

So move the attribute check after the ELF file header flag check in
`_bfd_mips_elf_merge_private_bfd_data', and do not return prematurely
there.  Take advantage of the resulting grouping of ELF file header
handling together and remove the premature success return point for the
first input object being handled, letting the code later on figure out
output ABI flags even for this object.

Update LD test cases according to messages from ELF file header checks
now preceding ones from attribute checks.

	bfd/
	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Move
	attribute check after ELF file header flag check.

	ld/
	* testsuite/ld-mips-elf/attr-gnu-4-14.d: Update the order of
	messages expected according to MIPS BFD private data merge
	changes.
	* testsuite/ld-mips-elf/attr-gnu-4-24.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-34.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-41.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-42.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-43.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-45.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-46.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-47.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-48.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-49.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-54.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-64.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-74.d: Likewise.
2016-01-04 23:30:00 +00:00
Alan Modra
6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Alan Modra
4120fa118f binutils ChangeLog rotation 2016-01-01 22:59:17 +10:30
Alan Modra
331e61312e Fix assorted ChangeLog errors 2015-12-30 11:44:35 +10:30
Thomas Preud'homme
3e1a8f9569 Add test for ARMv6-M farcall with no profile info
2015-12-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>

ld/testsuite/
    * ld-arm/arm-elf.exp: Run new test "Thumb-Thumb farcall v6-M (no
    profile)".
    * ld-arm/farcall-thumb-thumb-m-no-profile-a.s: New file.
    * ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Likewise.
    * ld-arm/farcall-thumb-thumb-m-no-profile.d: Likewise.
2015-12-26 10:24:58 +08:00
Thomas Preud'homme
2fd158eb7b Add support for linking ARMv8-M object files
2015-12-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
    * elf32-arm.c (using_thumb_only): Check that profile is 'M' and update
    logic around Tag_CPU_arch values to return TRUE for ARMv8-M
    architectures.
    (tag_cpu_arch_combine): Define v8m_baseline and v8m_mainline and update
    v4t_plus_v6_m and comb to deal with ARMv8-M Tag_CPU_arch merging logic.
    (elf32_arm_merge_eabi_attributes): Add Tag_CPU_name values for
    ARMv8-M.

bfd/testsuite/
    * ld-arm/arm-elf.exp (armeabitests_common): Run new tests
    "Thumb-Thumb farcall v8-M", "EABI attribute merging 8",
    "EABI attribute merging 9" and "EABI attribute merging 10".
    (Thumb-Thumb farcall v8-M): Renamed to ...
    (Thumb-Thumb farcall v8-M Mainline): This.
    (Thumb-Thumb farcall v8-M Baseline): New test.
    * ld-arm/attr-merge-8a.s: New file.
    * ld-arm/attr-merge-8b.s: Likewise.
    * ld-arm/attr-merge-8.attr: Likewise.
    * ld-arm/attr-merge-9a.s: Likewise.
    * ld-arm/attr-merge-9b.s: Likewise.
    * ld-arm/attr-merge-9.out: Likewise.
    * ld-arm/attr-merge-10a.s: Likewise.
    * ld-arm/attr-merge-10b.s: Likewise.
    * ld-arm/attr-merge-10.attr: Likewise.
2015-12-24 17:33:17 +08:00
Yury Usishchev
491d01d3da ARM: Fix exidx coverage for relocatable builds.
bfd  * elf-bfd.h: Add callback to count additional relocations.
     * elf32-arm.c (_arm_elf_section_data): Add new counter.
     (insert_cantunwind_after): Increment relocations counter.
     (elf32_arm_fix_exidx_coverage): Remove exidx entries and add
     terminating CANTUNWIND entry only in final builds.
     (elf32_arm_add_relocation): New function.
     (elf32_arm_write_section): Add relocations in relocatable builds.
     (elf32_arm_count_additional_relocs): New function.
     (elf_backend_count_additional_relocs): New define.
     * bfd/elflink.c (bfd_elf_final_link): Use callback and adjust size of
     .rel section.
     * bfd/elfxx-target.h (elf_backend_count_additional_relocs): New define.

ld   * emultempl/armelf.em (gld${EMULATION_NAME}_after_allocation): Call
     elf32_arm_fix_exidx_coverage for relocatable builds.

ld/testsuite
     * ld-arm/arm-elf.exp: New test.
     * ld-arm/unwind-rel.d: New file.
     * ld-arm/unwind-rel1.s: New file.
     * ld-arm/unwind-rel2.s: New file.
     * ld-arm/unwind-rel3.s: New file.
2015-12-22 15:50:13 +00:00
Mickael Guene
ac4c9b0459 Add support for ARM's NOREAD section flag.
include/elf
     * arm.h: Add arm SHF_ARM_NOREAD section flag.

bfd  * bfd-in2.h: Regenerate.
     * section.c: Add SEC_ELF_NOREAD.
     * elf32-arm.c (elf32_arm_post_process_headers): Only set
     PF_X attribute if a segment only contains section with
     SHF_ARM_NOREAD flag.
     (elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion.
     (elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD
     to bfd flag.
     (elf32_arm_lookup_section_flags): New function to allow
     INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag.
     (elf32_arm_special_sections): Add special sections array
     to catch section prefix by '.text.noread' pattern.

ld/testsuite
     * ld-arm/arm-elf.exp: New tests.
     * ld-arm/thumb1-input-section-flag-match.d: New
     * ld-arm/thumb1-input-section-flag-match.s: New
     * ld-arm/thumb1-noread-not-present-mixing-two-section.d: New
     * ld-arm/thumb1-noread-not-present-mixing-two-section.s: New
     * ld-arm/thumb1-noread-present-one-section.d: New
     * ld-arm/thumb1-noread-present-one-section.s: New
     * ld-arm/thumb1-noread-present-two-section.d: New
     * ld-arm/thumb1-noread-present-two-section.s: New

binutils
	* readelf.c (get_elf_section_flags): Add support for ARM specific
	section flags.
2015-12-22 14:12:35 +00:00
Christophe Lyon
0bef041426 Add forgotten ChangeLog updates for 72d98d16ed:
2015-12-16  Mickael Guene <mickael.guene@st.com>

	bfd/
	* bfd-in2.h: Regenerate.
	* reloc.c: Add new relocations.
	* libbfd.h (bfd_reloc_code_real_names): Add new relocations
	display names.
	* elf32-arm.c (elf32_arm_howto_table_1): Add HOWTO for new
	relocations.
	(elf32_arm_reloc_map): Add bfd/arm mapping for new relocations.
	(elf32_arm_final_link_relocate): Implement new relocations
	resolution.

	gas/
	* doc/c-arm.texi: Add documentation about new directives
	* config/tc-arm.c (group_reloc_table): Add mapping between gas
	syntax and new relocations.
	(do_t_add_sub): Keep new relocations for add operand.
	(do_t_mov_cmp): Keep new relocations for mov operand.
	(insns): Use 'shifter operand with possible group relocation'
	operand parse code for movs operand.
	(md_apply_fix): Implement mov and add encoding when new
	relocations on them.
	(tc_gen_reloc): Add new relocations.
	(arm_fix_adjustable): Since offset has a limited range ([0:255])
	we disable adjust_reloc_syms() for new relocations.

	gas/testsuite/
	* gas/arm/adds-thumb1-reloc-local.d: New
	* gas/arm/adds-thumb1-reloc-local.s: New
	* gas/arm/movs-thumb1-reloc-local.d: New
	* gas/arm/movs-thumb1-reloc-local.s: New

	include/
	* elf/arm.h: Add new arm relocations.

	ld/testsuite/
	* ld-arm/arm-elf.exp (armelftests_common): Add new relocations
	tests.
	* ld-arm/thumb1-adds.d: New
	* ld-arm/thumb1-adds.s: New
	* ld-arm/thumb1-movs.d: New
	* ld-arm/thumb1-movs.s: New
2015-12-17 11:14:37 +01:00
Mickael Guene
72d98d16ed [ARM] Add support for thumb1 pcrop relocations.
To support thumb1 execute-only code we need to support four new
relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC,
R_ARM_THM_ALU_ABS_G2_NC and  R_ARM_THM_ALU_ABS_G3_NC).
These relocations allow the static linker to finalize construction
of symbol address.
Typical sequence of code to get address of the symbol foo is then
the following :
	movs	r3, #:upper8_15:#foo
	lsls	r3, #8
	adds	r3, #:upper0_7:#foo
	lsls	r3, #8
	adds	r3, #:lower8_15:#foo
	lsls	r3, #8
	adds	r3, #:lower0_7:#foo
This will give following sequence of text and relocations after
assembly :
   4:	2300      	movs	r3, #0
			4: R_ARM_THM_ALU_ABS_G3_NC	foo
   6:	021b      	lsls	r3, r3, #8
   8:	3300      	adds	r3, #0
			8: R_ARM_THM_ALU_ABS_G2_NC	foo
   a:	021b      	lsls	r3, r3, #8
   c:	3300      	adds	r3, #0
			c: R_ARM_THM_ALU_ABS_G1_NC	foo
   e:	021b      	lsls	r3, r3, #8
  10:	3300      	adds	r3, #0
			10: R_ARM_THM_ALU_ABS_G0_NC	foo
2015-12-16 10:19:51 +01:00
H.J. Lu
c5847ba726 ld -r doesn't need plugin for slim lto object
Plugin isn't required on slim lto object for relocatable link.

bfd/

	PR ld/19317
	* linker.c (_bfd_generic_link_add_one_symbol): Don't complain
	plugin needed to handle slim lto object for relocatable link.

ld/testsuite/

	PR ld/19317
	* ld-plugin/lto.exp (lto_no_fat): New.
	(lto_link_tests): Add a test for PR ld/19317.
	(lto_run_tests): Likewise.
	(run_ld_link_tests): Likewise.
2015-12-10 12:35:50 -08:00
Jan Beulich
1e550d79b1 ld: relax alignment requirements of compressed .debug_* section checks
This fixes a failure of the gabinormal linking test on some distros
(where e.g. crt1.o has a .debug_aranges section with larger alignment).
2015-12-07 17:52:25 +01:00
H.J. Lu
02e2aef89b Optimize R_386_GOT32/R_386_GOT32X only if addend is 0
Linker can't optimize R_386_GOT32 and R_386_GOT32X relocations if addend
isn't 0.  It isn't valid to convert

movl	foo@GOT+1(%ecx), %eax

to

leal	foo@GOTOFF+1(%ecx), %eax

nor to convert

movq	foo@GOTPCREL+1(%rip), %rax

to

leaq	foo(%rip), %rax

for x86-64.  We should check if addend is 0 before optimizing R_386_GOT32
and R_386_GOT32X relocations.  Testcases are added for i386 and x86-64.

bfd/

	* elf32-i386.c (elf_i386_convert_load): Skip if addend isn't 0.
	(elf_i386_relocate_section): Skip R_386_GOT32X optimization if
	addend isn't 0.

ld/testsuite/

	* ld-i386/i386.exp: Run mov2a, mov2b and mov3.
	* ld-i386/mov2.s: New file.
	* ld-i386/mov2a.d: Likewise.
	* ld-i386/mov2b.d: Likewise.
	* ld-i386/mov3.d: Likewise.
	* ld-i386/mov3.s: Likewise.
	* ld-x86-64/mov2.s: Likewise.
	* ld-x86-64/mov2a.d: Likewise.
	* ld-x86-64/mov2b.d: Likewise.
	* ld-x86-64/mov2c.d: Likewise.
	* ld-x86-64/mov2d.d: Likewise.
	* ld-x86-64/x86-64.exp: Run mov2a, mov2b, mov2c and mov2d.
2015-12-04 09:03:04 -08:00
H.J. Lu
ead3d5427a Properly check symbol defined by assignment in linker script
Symbol defined by a linker assignment may have type bfd_link_hash_new
or bfd_link_hash_undefined.  And h->def_regular is always set.
elf_i386_convert_load and elf_x86_64_convert_load should check
h->def_regular as well as bfd_link_hash_undefined and bfd_link_hash_new
to see if a symbol is defined by a linker script.

bfd/

	PR ld/19319
	* elf32-i386.c (elf_i386_convert_load): Check h->def_regular
	instead of bfd_link_hash_new.
	* elf64-x86-64.c (elf_x86_64_convert_load): Likewise.  Skip
	relocation overflow for bfd_link_hash_undefined and
	bfd_link_hash_new if h->def_regular is set.

ld/testsuite/

	PR ld/19319
	* ld-i386/i386.exp: Run pr19319 test.
	* ld-x86-64/x86-64.exp: Likewise.
	* ld-i386/pr19319.dd: New file.
	* ld-i386/pr19319a.S: Likewise.
	* ld-i386/pr19319b.S: Likewise.
	* ld-x86-64/pr19319.dd: Likewise.
	* ld-x86-64/pr19319a.S: Likewise.
	* ld-x86-64/pr19319b.S: Likewise.
2015-12-01 14:45:51 -08:00
Marcus Shawcroft
06d2788cef Revert "[LD][AARCH64]Add TLSIE relaxation support under large memory model."
This reverts commit 3ebe65c0ff.

Reverted due to PR19188
2015-11-12 15:16:40 +00:00
Peter Bergner
a680de9a98 Add assembler, disassembler and linker support for power9.
include/opcode/
	* ppc.h (PPC_OPCODE_POWER9): New define.
	(PPC_OPCODE_VSX3): Likewise.

opcodes/
	* ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries.
	Add PPC_OPCODE_VSX3 to the vsx entry.
	(powerpc_init_dialect): Set default dialect to power9.
        * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd,
        insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1,
        extract_l1 insert_xtq6, extract_xtq6): New static functions.
        (insert_esync): Test for illegal L operand value.
	(DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6,
	XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA,
	XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK,
	XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3,
	PPCVSX3): New defines.
	(powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu,
	fcmpo, ftdiv, ftsqrt>: Use XBF_MASK.
	<mcrxr>: Use XBFRARB_MASK.
	<addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq.,
	bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc.,
	cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first,
	cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx,
	lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll,
	lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw,
	modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last,
	rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx,
	stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx,
	subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh,
	vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh.,
	vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd,
	vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d,
	vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx,
	vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq,
	vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd,
	vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait,
	xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp,
	xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp,
	xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz,
	xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp,
	xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp,
	xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo,
	xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo,
	xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo,
	xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp,
	xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp,
	xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp,
	xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw,
	xxinsertw, xxperm, xxpermr, xxspltib>: New instructions.
	<doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9.
	<tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands.

include/elf/
	* ppc.h (R_PPC_REL16DX_HA): New reloction.
	* ppc64.h (R_PPC64_REL16DX_HA): Likewise.

bfd/
	* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA.
	(ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA.
	(ppc_elf_addr16_ha_reloc): Likewise.
	(ppc_elf_check_relocs): Likewise.
	(ppc_elf_relocate_section): Likewise.
	(is_insn_dq_form): Handle lxv and stxv instructions.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA.
	(ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA.
	(ppc64_elf_ha_reloc): Likewise.
	(ppc64_elf_check_relocs): Likewise.
	(ppc64_elf_relocate_section): Likewise.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
	* reloc.c (BFD_RELOC_PPC_REL16DX_HA): New.

elfcpp/
	* powerpc.h (R_POWERPC_REL16DX_HA): Define.

gas/
	* doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9.
	* doc/c-ppc.texi (PowerPC-Opts):  Likewise.
	* config/tc-ppc.c (md_show_usage): Likewise.
	(md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA.
	(md_apply_fix): Likewise.
	(ppc_handle_align): Handle power9's group ending nop.

gas/testsuite/
	* gas/ppc/altivec3.s: New test.
	* gas/ppc/altivec3.d: Likewise.
	* gas/ppc/vsx3.s: Likewise.
	* gas/ppc/vsx3.d: Likewise.
	* gas/ppc/power9.s: Likewise.
	* gas/ppc/power9.d: Likewise.
	* gas/ppc/ppc.exp: Run them.
	* gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests.
	* gas/ppc/power8.d: Likewise.
	* gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ...
	<lxvd2x, stxvd2x>: ...to this.
	* gas/ppc/vsx.d: Likewise.

gold/
	* gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function.
	(Powerpc_relocate_functions::addr16dx_ha): Likewise.
	(Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA.
	(Target_powerpc::Scan::global): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.

ld/testsuite/
	* ld-powerpc/addpcis.d: New test.
	* ld-powerpc/addpcis.s: New test.
	* ld-powerpc/powerpc.exp: Run it.
2015-11-11 19:52:52 -06:00
Renlin Li
1ac688f831 [LD][AARCH64]Add test cases for big-endian.
ld/testsuite

2015-11-03  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: Run newly added test cases.
	* ld-aarch64/emit-relocs-301.d: Skip aarch64_be.
	* ld-aarch64/emit-relocs-302.d: Likwise.
	* ld-aarch64/emit-relocs-310.d: Likwise.
	* ld-aarch64/emit-relocs-515.d: Likwise.
	* ld-aarch64/emit-relocs-516.d: Likwise.
	* ld-aarch64/tls-large-desc.d: Likwise.
	* ld-aarch64/tls-large-ie.d: Likwise.
	* ld-aarch64/tls-relax-large-desc-ie.d: Likwise.
	* ld-aarch64/tls-relax-large-desc-le.d: Likwise.
	* ld-aarch64/tls-relax-large-gd-ie.d: Likwise.
	* ld-aarch64/tls-relax-large-gd-le.d: Likwise.
	* ld-aarch64/emit-relocs-301-be.d: New for aarch64_be.
	* ld-aarch64/emit-relocs-302-be.d: Likewise.
	* ld-aarch64/emit-relocs-310-be.d: Likewise.
	* ld-aarch64/emit-relocs-515-be.d: Likewise.
	* ld-aarch64/emit-relocs-516-be.d: Likewise.
	* ld-aarch64/tls-large-desc-be.d: Likewise.
	* ld-aarch64/tls-large-ie-be.d: Likewise.
	* ld-aarch64/tls-relax-large-desc-ie-be.d: Likewise.
	* ld-aarch64/tls-relax-large-desc-le-be.d: Likewise.
	* ld-aarch64/tls-relax-large-gd-ie-be.d: Likewise.
	* ld-aarch64/tls-relax-large-gd-le-be.d: Likewise.
2015-11-03 12:00:10 +00:00
H.J. Lu
b10a8bc7de Also check GOTPCRELX
* ld-x86-64/plt-main3.rd: Also check GOTPCRELX.
2015-10-29 09:18:57 -07:00
Catherine Moore
ca9584fb9b 2015-10-29 Catherine Moore <clm@codesourcery.com>
bfd/
    	* elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output
    	section to bfd_abs_section_ptr if the stub is discarded.

    	ld/testsuite/
    	* ld-mips-elf/mips16-fp-stub-1.s: New.
    	* ld-mips-elf/mips16-fp-stub-2.s: New.
    	* ld-mips-elf/mips16-fp-stub.d: New.
    	* ld-mips-elf/mips-elf.exp: Run new tests.
    	* ld-mips-elf/mips16-intermix.d: Update expected output.

	https://sourceware.org/ml/binutils/2015-10/msg00137.html
2015-10-29 06:58:16 -07:00
H.J. Lu
7963511fbf Add a test for PR ld/19162
PR ld/19162
	* ld-x86-64/x86-64.exp: Run pr19162.
	* ld-x86-64/pr19162.d: New file.
	* ld-x86-64/pr19162a.s: Likewise.
	* ld-x86-64/pr19162b.s: Likewise.
2015-10-28 03:20:55 -07:00
Laurent Alfonsi
a504d23a83 Add --fix-stm32l4xx-629360 to the ARM linker to enable a link-time workaround for a bug in the bus matrix / memory controller for some of the STM32 Cortex-M4 based products (STM32L4xx).
bfd  * bfd-in2.h: Regenerate.
     * bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how
     STM32L4XX instruction scanning should be done.
     (bfd_elf32_arm_set_stm32l4xx_fix)
     (bfd_elf32_arm_stm32l4xx_erratum_scan)
     (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): Add prototypes.
     (bfd_elf32_arm_set_target_relocs): Add stm32l4xx fix type argument
     to prototype.
     * elf32-arm.c (STM32L4XX_ERRATUM_VENEER_SECTION_NAME)
     (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME): Define macros.
     (elf32_stm32l4xx_erratum_type): New enum.
     (elf32_stm32l4xx_erratum_list): New struct. List of veneers or
     jumps to veneers.
     (_arm_elf_section_data): Add stm32l4xx_erratumcount,
     stm32l4xx_erratumlist.
     (elf32_arm_link_hash_table): Add stm32l4xx_erratum_glue_size,
     stm32l4xx_fix and num_stm32l4xx_fixes fields.
     (ctz): New function.
     (popcount): New function.
     (elf32_arm_link_hash_table_create): Initialize stm32l4xx_fix.
     (put_thumb2_insn): New function.
     (STM32L4XX_ERRATUM_LDM_VENEER_SIZE): Define. Size of a veneer for
     LDM instructions.
     (STM32L4XX_ERRATUM_VLDM_VENEER_SIZE): Define. Size of a veneer for
     VLDM instructions.
     (bfd_elf32_arm_allocate_interworking_sections): Initialise erratum
     glue section.
     (record_stm32l4xx_erratum_veneer) : New function. Create a single
     veneer, and its associated symbols.
     (bfd_elf32_arm_add_glue_sections_to_bfd): Add STM32L4XX erratum glue.
     (bfd_elf32_arm_set_stm32l4xx_fix): New function. Set the type of
     erratum workaround required.
     (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): New function. Find
     out where veneers and branches to veneers have been placed in
     virtual memory after layout.
     (is_thumb2_ldmia): New function.
     (is_thumb2_ldmdb): Likewise.
     (is_thumb2_vldm ): Likewise.
     (stm32l4xx_need_create_replacing_stub): New function. Decide if a
     veneer must be emitted.
     (bfd_elf32_arm_stm32l4xx_erratum_scan): Scan the sections of an
     input BFD for potential erratum-triggering insns. Record results.
     (bfd_elf32_arm_set_target_relocs): Set stm32l4xx_fix field in
     global hash table.
     (elf32_arm_size_dynamic_sections): Collect glue information.
     (create_instruction_branch_absolute): New function.
     (create_instruction_ldmia): Likewise.
     (create_instruction_ldmdb): Likewise.
     (create_instruction_mov): Likewise.
     (create_instruction_sub): Likewise.
     (create_instruction_vldmia): Likewise.
     (create_instruction_vldmdb): Likewise.
     (create_instruction_udf_w): Likewise.
     (create_instruction_udf): Likewise.
     (push_thumb2_insn32): Likewise.
     (push_thumb2_insn16): Likewise.
     (stm32l4xx_fill_stub_udf): Likewise.
     (stm32l4xx_create_replacing_stub_ldmia): New function. Expands the
     replacing stub for ldmia instructions.
     (stm32l4xx_create_replacing_stub_ldmdb): Likewise for ldmdb.
     (stm32l4xx_create_replacing_stub_vldm): Likewise for vldm.
     (stm32l4xx_create_replacing_stub): New function. Dispatches the
     stub emission to the appropriate functions.
     (elf32_arm_write_section): Output veneers, and branches to veneers.

ld   * ld.texinfo: Description of the STM32L4xx erratum workaround.
     * emultempl/armelf.em (stm32l4xx_fix): New.
     (arm_elf_before_allocation): Choose the type of fix, scan for
     erratum.
     (gld${EMULATION_NAME}_finish): Fix veneer locations.
     (arm_elf_create_output_section_statements): Propagate
     stm32l4xx_fix value.
     (PARSE_AND_LIST_PROLOGUE): Define OPTION_STM32L4XX_FIX.
     (PARSE_AND_LIST_LONGOPTS): Add entry for handling
     --fix-stm32l4xx-629360.
     (PARSE_AND_LIST_OPTION): Add entry for helping on
     --fix-stm32l4xx-629360.
     (PARSE_AND_LIST_ARGS_CASES): Treat OPTION_STM32L4XX_FIX.

tests * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX
       tests.
     * ld-arm/stm32l4xx-cannot-fix-far-ldm.d: New.
     * ld-arm/stm32l4xx-cannot-fix-far-ldm.s: Likewise.
     * ld-arm/stm32l4xx-cannot-fix-it-block.d: Likewise.
     * ld-arm/stm32l4xx-cannot-fix-it-block.s: Likewise.
     * ld-arm/stm32l4xx-fix-all.d: Likewise.
     * ld-arm/stm32l4xx-fix-all.s: Likewise.
     * ld-arm/stm32l4xx-fix-it-block.d: Likewise.
     * ld-arm/stm32l4xx-fix-it-block.s: Likewise.
     * ld-arm/stm32l4xx-fix-ldm.d: Likewise.
     * ld-arm/stm32l4xx-fix-ldm.s: Likewise.
     * ld-arm/stm32l4xx-fix-vldm.d: Likewise.
     * ld-arm/stm32l4xx-fix-vldm.s: Likewise.
2015-10-27 13:20:33 +00:00
Alan Modra
469bdc72e7 xfail pr19161 test on hppa-linux
HPPA linux needs libgcc.a for millicode routine $$dyncall.

	* ld-gc/pr19161.d: xfail hppa-*-*.
2015-10-27 18:09:21 +10:30
H.J. Lu
7b7e7f1da2 Check symbol defined by assignment in linker script
Symbol symbol defined by an assignment in a linker script has type
bfd_link_hash_new.  elf_i386_convert_load and elf_x86_64_convert_load
should check bfd_link_hash_new to see if a symbol is defined by a linker
script.

bfd/

	PR ld/19175
	* elf32-i386.c (elf_i386_convert_load): Check bfd_link_hash_new
	instead of calling bfd_link_get_defined_symbol.
	* elf64-x86-64.c (elf_x86_64_convert_load): Likewise.  Skip
	relocation overflow for bfd_link_hash_new.
	* linker.c (bfd_link_get_defined_symbol): Removed.
	* bfd-in2.h: Regenerated.

ld/testsuite/

	PR ld/19175
	* ld-i386/i386.exp: Run pr19175.
	* ld-x86-64/x86-64.exp: Likewise.
	* ld-i386/pr19175.d: New file.
	* ld-i386/pr19175.s: Likewise.
	* ld-i386/pr19175.t: Likewise.
	* ld-x86-64/pr19175.d: Likewise.
	* ld-x86-64/pr19175.s: Likewise.
	* ld-x86-64/pr19175.t: Likewise.
2015-10-26 16:32:55 -07:00
H.J. Lu
a6af384b19 Properly convert address load of __start_XXX/__stop_XXX
Since __start_XXX and __stop_XXX symbols aren't defined when address
load is being converted, we need to check if there is an XXX output
section to get their section and value.  This patch adds a new function,
bfd_link_get_defined_symbol, to search for the XXX output section to
check if __start_XXX and __stop_XXX symbols are defined.

bfd/

	PR ld/19171
	* elf32-i386.c (elf_i386_convert_load): Call
	bfd_link_get_defined_symbol to check if a symbol is defined.
	* elf64-x86-64.c (elf_x86_64_convert_load): Call
	bfd_link_get_defined_symbol to get defined symbol section and
	value.
	* linker.c (bfd_link_get_defined_symbol): New function.
	* bfd-in2.h: Regenerated.

ld/testsuite/

	PR ld/19171
	* ld-i386/lea1.s: Add tests for address load of __start_XXX
	and __stop_XXX.
	* ld-i386/mov1.s: Likewise.
	* ld-x86-64/lea1.s: Likewise.
	* ld-x86-64/mov1.s: Likewise.
	* ld-i386/lea1a.d: Updated.
	* ld-i386/lea1b.d: Likewise.
	* ld-i386/lea1c.d: Likewise.
	* ld-i386/mov1a.d: Likewise.
	* ld-i386/mov1b.d: Likewise.
	* ld-x86-64/lea1a.d: Likewise.
	* ld-x86-64/lea1b.d: Likewise.
	* ld-x86-64/lea1c.d: Likewise.
	* ld-x86-64/lea1d.d: Likewise.
	* ld-x86-64/lea1e.d: Likewise.
	* ld-x86-64/lea1f.d: Likewise.
	* ld-x86-64/mov1a.d: Likewise.
	* ld-x86-64/mov1b.d: Likewise.
	* ld-x86-64/mov1c.d: Likewise.
	* ld-x86-64/mov1d.d: Likewise.
2015-10-26 08:11:55 -07:00
H.J. Lu
be83aa76d2 Add a test for PR ld/19167
PR ld/19167
	* ld-gc/gc.exp: Run pr19167 test.
	* ld-gc/pr19167.d: New file.
	* ld-gc/pr19167a.s: Likewise.
	* ld-gc/pr19167b.s: Likewise.
2015-10-23 04:23:51 -07:00
H.J. Lu
bba037e0ae Always keep sections marked with SEC_KEEP
SEC_KEEP check in elf_gc_sweep was missing in commit:

commit bde6f3eb6d
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Fri Jan 8 01:43:23 2010 +0000

    Set SEC_KEEP on section XXX for undefined __start_XXX/__stop_XXX

    bfd/

    2010-01-07  H.J. Lu  <hongjiu.lu@intel.com>

      PR ld/11133
      * elflink.c (_bfd_elf_gc_mark_hook): Check section XXX for
      undefined __start_XXX/__stop_XXX in all input files and set
      SEC_KEEP.

This patch adds SEC_KEEP check to elf_gc_sweep.

bfd/

	PR ld/19161
	* elflink.c (elf_gc_sweep): Always keep sections marked with
	SEC_KEEP.

ld/testsuite/

	PR ld/19161
	* ld-gc/gc.exp: Run pr19161 test.
	* ld-gc/pr19161-1.c: New file.
	* ld-gc/pr19161-2.c: Likewise.
	* ld-gc/pr19161.d: Likewise.
2015-10-22 12:23:03 -07:00
Hans-Peter Nilsson
282b7d7b65 Allow mmix-knuth-mmixware adjustments to objcopy --extract-symbols test.
* ld-scripts/script.exp (extract_symbol_test): Allow nm output of
	objcopy --extract-symbols result to differ from original on
	mmix-knuth-mmixware.
2015-10-22 16:16:09 +02:00
H.J. Lu
caa65211bb Add "-z call-nop=PADDING" option to ld
The ld linker can transform indirect call to a locally defined function,
foo, via its GOT slot, to either "NOP call foo" or "call foo NOP" where
NOP is a 1-byte NOP padding.  This patch adds a "-z call-nop=PADDING"
option to x86 ld to control 1-byte NOP padding for x86 call instruction.
PADDING is one of prefix-addr, prefix-nop, suffix-nop, prefix-NUMBER or
suffix-NUMBER.

bfd/

	* elf32-i386.c (elf_i386_convert_load): Use call_nop_byte and
	check call_nop_as_suffix for 1-byte NOP padding to pad call.
	* elf64-x86-64.c (elf_x86_64_convert_load): Likewise.

include/

	* bfdlink.h (bfd_link_info): Add call_nop_as_suffix and
	call_nop_byte.

ld/

	* ld/ld.texinfo: Document "-z call-nop=PADDING" option.
	* emulparams/call_nop.sh: New file.
	* emulparams/elf_i386_be.sh: Source
	${srcdir}/emulparams/call_nop.sh.
	* emulparams/elf_i386_chaos.sh: Likewise.
	* emulparams/elf_i386_ldso.sh: Likewise.
	* emulparams/elf_i386_vxworks.sh: Likewise.
	* emulparams/elf_iamcu.sh: Likewise.
	* emulparams/elf_k1om.sh: Likewise.
	* emulparams/elf_l1om.sh: Likewise.
	* emulparams/elf_x86_64.sh: Likewise.
	* emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Set
	link_info.call_nop_byte if $CALL_NOP_BYTE isn't empty.

ld/testsuite/

	* ld-i386/call3.s: New file.
	* ld-i386/call3a.d: Likewise.
	* ld-i386/call3b.d: Likewise.
	* ld-i386/call3c.d: Likewise.
	* ld-i386/call3d.d: Likewise.
	* ld-i386/call3e.d: Likewise.
	* ld-i386/call3f.d: Likewise.
	* ld-i386/call3g.d: Likewise.
	* ld-i386/call3h.d: Likewise.
	* ld-i386/load1-nacl.d: Likewise.
	* ld-x86-64/call1.s: Likewise.
	* ld-x86-64/call1a.d: Likewise.
	* ld-x86-64/call1b.d: Likewise.
	* ld-x86-64/call1c.d: Likewise.
	* ld-x86-64/call1d.d: Likewise.
	* ld-x86-64/call1e.d: Likewise.
	* ld-x86-64/call1f.d: Likewise.
	* ld-x86-64/call1g.d: Likewise.
	* ld-x86-64/call1h.d: Likewise.
	* ld-x86-64/call1i.d: Likewise.
	* ld-x86-64/load1a-nacl.d: Likewise.
	* ld-x86-64/load1b-nacl.d: Likewise.
	* ld-x86-64/load1c-nacl.d: Likewise.
	* ld-x86-64/load1d-nacl.d: Likewise.
2015-10-22 04:56:39 -07:00
H.J. Lu
56ceb5b540 Add R_X86_64_[REX_]GOTPCRELX support to gas and ld
This patch adds support for the R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX relocations proposed in

https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0

to gas and ld.  It updates gas to generate R_X86_64_GOTPCRELX,
R_X86_64_REX_GOTPCRELX if there is a REX prefix, relocation for memory
operand, foo@GOTPCREL(%rip).  With the locally defined symbol, foo, we
convert

  mov foo@GOTPCREL(%rip), %reg

to

   lea foo(%rip), %reg

and convert

   call/jmp *foo@GOTPCREL(%rip)
to

   nop call foo/jmp foo nop

When PIC is false, convert

   test %reg, foo@GOTPCREL(%rip)
to

test $foo, %reg

and convert

   binop foo@GOTPCREL(%rip), %reg

to

   binop $foo, %reg

where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.

bfd/

	* elf64-x86-64.c: Include opcode/i386.h.
	(x86_64_elf_howto_table): Add R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX.
	(R_X86_64_standard): Replace R_X86_64_PLT32_BND with
	R_X86_64_REX_GOTPCRELX.
	(x86_64_reloc_map): Add BFD_RELOC_X86_64_GOTPCRELX and
	BFD_RELOC_X86_64_REX_GOTPCRELX.
	(need_convert_mov_to_lea): Renamed to ...
	(need_convert_load): This.
	(elf_x86_64_check_relocs): Handle R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX.  Replace need_convert_mov_to_lea with
	need_convert_load.
	(elf_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX.
	(elf_x86_64_size_dynamic_sections): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	(elf_x86_64_convert_mov_to_lea): Renamed to ...
	(elf_x86_64_convert_load): This.  Replace need_convert_mov_to_lea
	with need_convert_load.  Support R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX transformations.
	* reloc.c (BFD_RELOC_X86_64_GOTPCRELX): New.
	(BFD_RELOC_X86_64_REX_GOTPCRELX): Likewise.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.

gas/

	* config/tc-i386.c (tc_i386_fix_adjustable): Handle
	BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX.
	(tc_gen_reloc): Likewise.
	(i386_validate_fix): Generate BFD_RELOC_X86_64_GOTPCRELX or
	BFD_RELOC_X86_64_REX_GOTPCRELX if fx_tcbit2 is set.
	* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Also return
	true for BFD_RELOC_X86_64_GOTPCRELX and
	BFD_RELOC_X86_64_REX_GOTPCRELX.

gas/testsuite/

	* gas/i386/i386.exp: Run x86-64-gotpcrel.
	* gas/i386/x86-64-gotpcrel.d: New file.
	* gas/i386/x86-64-gotpcrel.s: Likewise.
	* gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
	* gas/i386/x86-64-localpic.d: Replace R_X86_64_GOTPCREL with
	R_X86_64_REX_GOTPCRELX.
	* gas/i386/ilp32/x86-64-localpic.d: Likewise.

include/elf/

	* x86-64.h (R_X86_64_GOTPCRELX): New.
	(R_X86_64_REX_GOTPCRELX): Likewise.

ld/testsuite/

	* ld-ifunc/ifunc-5r-local-x86-64.d: Replace R_X86_64_GOTPCREL
	with R_X86_64_REX_GOTPCRELX.
	* ld-x86-64/plt-main1.rd: Likewise.
	* ld-x86-64/plt-main3.rd: Likewise.
	* ld-x86-64/plt-main4.rd: Likewise.
	* ld-x86-64/gotpcrel1.dd: New file.
	* ld-x86-64/gotpcrel1.out: Likewise.
	* ld-x86-64/gotpcrel1a.S: Likewise.
	* ld-x86-64/gotpcrel1b.c: Likewise.
	* ld-x86-64/gotpcrel1c.c: Likewise.
	* ld-x86-64/gotpcrel1d.S: Likewise.
	* ld-x86-64/load1.s: Likewise.
	* ld-x86-64/load1a.d: Likewise.
	* ld-x86-64/load1b.d: Likewise.
	* ld-x86-64/load1c.d: Likewise.
	* ld-x86-64/load1d.d: Likewise.
	* ld-x86-64/x86-64.exp: Run load1a, load1b, load1c and load1d
	tests.  Run gotpcrel1 test.
2015-10-22 04:49:38 -07:00
H.J. Lu
02a866936d Add R_386_GOT32X support to gas and ld
This patch adds support for the R_386_GOT32X relocation proposed in

https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I

to gas and ld.  It updates gas to generate R_386_GOT32X relocation for
memory operand, foo@GOT[(%reg)].  We must encode "mov foo@GOT, %eax"
with the 0x8b opcode, instead of the 0xb8 opcode, so that it can be
transformed to "lea foo, %eax".  With the locally defined symbol, foo,
we convert

   mov foo@GOT[(%reg1)], %reg2
to
   lea foo[@GOTOFF(%reg1)], %reg2

and convert

   call/jmp *foo@GOT[(%reg)]
to

   nop call foo/jmp foo nop

When PIC is false, convert

   test %reg1, foo@GOT[(%reg2)]
to
   test $foo, %reg1

and convert

binop foo@GOT[(%reg1)], %reg2

to

binop $foo, %reg2

where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.

bfd/

	* elf32-i386.c: Include opcode/i386.h.
	(elf_howto_table): Add R_386_GOT32X.
	(R_386_ext2): Replace R_386_IRELATIVE with R_386_GOT32X.
	(elf_i386_reloc_type_lookup): Handle BFD_RELOC_386_GOT32X.
	(need_convert_mov_to_lea): Renamed to ...
	(need_convert_load): This.
	(elf_i386_check_relocs): Handle R_386_GOT32X.  Replace
	need_convert_mov_to_lea with need_convert_load.
	(elf_i386_gc_sweep_hook): Handle R_386_GOT32X.
	(elf_i386_size_dynamic_sections): Likewise.
	(elf_i386_relocate_section): Likewise.
	(elf_i386_convert_mov_to_lea): Renamed to ...
	(elf_i386_convert_load): This.  Replace need_convert_mov_to_lea
	with need_convert_load.  Support R_386_GOT32X transformations.
	* reloc.c (BFD_RELOC_386_GOT32X): New.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.

gas/

	* config/tc-i386.c (tc_i386_fix_adjustable): Handle
	BFD_RELOC_386_GOT32X.
	(tc_gen_reloc): Likewise.
	(match_template): Force 0x8b encoding for "mov foo@GOT, %eax".
	(output_disp): Check for "call/jmp *mem", "mov mem, %reg",
	"test %reg, mem" and "binop mem, %reg" where binop is one of
	adc, add, and, cmp, or, sbb, sub, xor instructions.  Set
	fx_tcbit if the REX prefix is generated.  Set fx_tcbit2 if
	BFD_RELOC_386_GOT32X should be generated.
	(i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2
	is set.

gas/testsuite/

	* gas/i386/got.d: New file.
	* gas/i386/got.s: Likewise.
	* gas/i386/i386.exp: Run got.
	* gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X.
	* gas/i386/mixed-mode-reloc32.d: Likewise.
	* gas/i386/reloc32.d: Likewise.

include/elf/

	* i386.h (R_386_GOT32X): New relocation.

ld/testsuite/

	* ld-i386/branch1.d: New file.
	* ld-i386/branch1.s: Likewise.
	* ld-i386/call1.d: Likewise.
	* ld-i386/call1.s: Likewise.
	* ld-i386/call2.d: Likewise.
	* ld-i386/call2.s: Likewise.
	* ld-i386/got1.dd: Likewise.
	* ld-i386/got1.out: Likewise.
	* ld-i386/got1a.S: Likewise.
	* ld-i386/got1b.c: Likewise.
	* ld-i386/got1c.c: Likewise.
	* ld-i386/got1d.S: Likewise.
	* ld-i386/jmp1.d: Likewise.
	* ld-i386/jmp1.s: Likewise.
	* ld-i386/jmp2.d: Likewise.
	* ld-i386/jmp2.s: Likewise.
	* ld-i386/load1.d: Likewise.
	* ld-i386/load1.s: Likewise.
	* ld-i386/load2.d: Likewise.
	* ld-i386/load2.s: Likewise.
	* ld-i386/load3.d: Likewise.
	* ld-i386/load3.s: Likewise.
	* ld-i386/load4.s: Likewise.
	* ld-i386/load4a.d: Likewise.
	* ld-i386/load4b.d: Likewise.
	* ld-i386/load5.s: Likewise.
	* ld-i386/load5a.d: Likewise.
	* ld-i386/load5b.d: Likewise.
	* ld-i386/load6.d: Likewise.
	* ld-i386/load6.s: Likewise.
	* ld-i386/i386.exp: Run branch1, call1, call2, jmp1, jmp2,
	load1, load2, load3, load4a, load4b, load5a, load5b and load6
	tests.  Run got1 test.
2015-10-22 04:47:07 -07:00
Andreas Krebbel
e44c481aff S/390: ifunc: Enable the ifunc tests.
ld/testsuite/ChangeLog:

	* ld-ifunc/ifunc.exp: Run ifunc tests on s390* targets.
2015-10-22 10:01:30 +02:00
Simon Dardis
15a70cda97 Add test to ensure that ternary linker script operators copy symbol flags.
* ld-elf/attributes.d: New test for symbol attribute copying.
	* ld-elf/attributes.ld: Part of above.
	* ld-elf/attributes.s: Likewise.
2015-10-19 14:32:54 +01:00
H.J. Lu
b31bcacc48 Convert mov to lea for loading address of local common symbol
There is no need to check def_regular when converting mov to lea for
loading address of local symbols since def_regular may be false for
common symbols and SYMBOL_REFERENCES_LOCAL is sufficient.

bfd/

	* elf32-i386.c (elf_i386_convert_mov_to_lea): Don't check
	def_regular.
	* elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Likewise.

ld/testsuite/

	* ld-i386/lea1.s: Add a test for loading address of local common
	symbol.
	* ld-x86-64/lea1.s: Likewise.
	* ld-i386/lea1a.d: Updated.
	* ld-i386/lea1b.d: Likewise.
	* ld-i386/lea1c.d: Likewise.
	* ld-x86-64/lea1a.d: Likewise.
	* ld-x86-64/lea1b.d: Likewise.
	* ld-x86-64/lea1c.d: Likewise.
	* ld-x86-64/lea1d.d: Likewise.
	* ld-x86-64/lea1e.d: Likewise.
	* ld-x86-64/lea1f.d: Likewise.
2015-10-16 03:14:40 -07:00
Alan Modra
7b19bec22f objcopy --extract-symbol testcase
Run the test for more than just ELF.  Shows that objcopy --extract-symbol
isn't working on PE, mips, mmix and some aout targets.

	* config/default.exp (size): New global.
	* ld-elf/extract-symbol-1.s,
	* ld-elf/extract-symbol-1.ld,
	* ld-elf/extract-symbol-1sec.d,
	* ld-elf/extract-symbol-1sym.d: Delete.
	* ld-scripts/script.exp (extract_symbol_test): New.
2015-10-15 23:38:29 +10:30
H.J. Lu
4373f8af3d Skip the unversioned definition after the default version
We may see an unversioned definition after the default version.  We
should skip the unversioned definition in this case.

bfd/

	PR ld/19073
	* elflink.c (_bfd_elf_add_default_symbol): Skip the unversioned
	definition after the default version.

ld/testsuite/

	PR ld/19073
	* ld-elf/pr19073.map: New file.
	* ld-elf/pr19073.rd: Likewise.
	* ld-elf/pr19073.s: Likewise.
	* ld-elf/shared.exp (build_tests): Add tests for PR ld/19073.
2015-10-12 04:57:16 -07:00
Nick Clifton
886a250647 New ARC implementation.
bfd	* archures.c: Remove support for older ARC. Added support for new
	ARC cpus (ARC600, ARC601, ARC700, ARCV2).
	* bfd-in2.h: Likewise.
	* config.bfd: Likewise.
	* cpu-arc.c: Likewise.
	* elf32-arc.c: Totally changed file with a refactored
	inplementation of the ARC port.
	* libbfd.h: Added ARC specific relocation types.
	* reloc.c: Likewise.

gas     * config/tc-arc.c: Revamped file for ARC support.
        * config/tc-arc.h: Likewise.
        * doc/as.texinfo: Add new ARC options.
        * doc/c-arc.texi: Likewise.

ld	* configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*.
	* emulparams/arcebelf_prof.sh: New file
	* emulparams/arcebelf.sh: Likewise.
	* emulparams/arceblinux_prof.sh: Likewise.
	* emulparams/arceblinux.sh: Likewise.
	* emulparams/arcelf_prof.sh: Likewise.
	* emulparams/arcelf.sh: Likewise.
	* emulparams/arclinux_prof.sh: Likewise.
	* emulparams/arclinux.sh: Likewise.
	* emulparams/arcv2elfx.sh: Likewise.
	* emulparams/arcv2elf.sh: Likewise.
	* emultempl/arclinux.em: Likewise.
	* scripttempl/arclinux.sc: Likewise.
	* scripttempl/elfarc.sc: Likewise.
	* scripttempl/elfarcv2.sc: Likewise
	* Makefile.am: Add new ARC emulations.
	* Makefile.in: Regenerate.
	* NEWS: Mention the new feature.

opcodes * arc-dis.c: Revamped file for ARC support
	* arc-dis.h: Likewise.
	* arc-ext.c: Likewise.
	* arc-ext.h: Likewise.
	* arc-opc.c: Likewise.
	* arc-fxi.h: New file.
	* arc-regs.h: Likewise.
	* arc-tbl.h: Likewise.

binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact
	and ARCv2.
	(get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT.
	(guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_16bit_abs_reloc): Likewise.
	(is_none_reloc): Likewise.
	* NEWS: Mention the new feature.

include	* dis-asm.h (arc_get_disassembler): Correct declaration.
	* arc-reloc.def: Macro file with definition of all relocation
	types.
	* arc.h: Changed macros for the newly supported ARC cpus.  Altered
	enum defining the supported relocations.
	* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added
	macro for EM_ARC_COMPACT2.
        * arc-func.h: New file.
        * arc.h: Likewise.
2015-10-07 14:20:19 +01:00
H.J. Lu
a0d49154d4 Don't re-export common symbols
For ELF linker, a common symbol isn't a definition.  When we decide if a
symbol should be re-exported, we should check if the symbol isn't
undefined, not if it is a definition.

bfd/

	PR ld/18914
	* elflink.c (elf_link_add_object_symbols): Don't re-export a
	symbol if it isn't undefined.

ld/testsuite/

	PR ld/18914
	* ld-elf/exclude.exp: Also check exclude_common.
	* ld-elf/exclude2.s: Add exclude_common.
2015-10-05 14:45:17 -07:00
Renlin Li
3ebe65c0ff [LD][AARCH64]Add TLSIE relaxation support under large memory model.
bfd/
2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Add
	TLSIE_MOVW_GOTTPREL_G1.
	(aarch64_tls_transition_without_check): Add
	TLSIE_MOVW_GOTTPREL_G1 to TLSLE_MOVW_TPREL_G2
	transition for local symbol.
	(elfNN_aarch64_tls_relax): Add a argument to pass tp offset.
	Add TLSIE_MOVW_GOTTPREL_G1 relaxation.
	(elfNN_aarch64_relocate_section): Call elfNN_aarch64_tls_relax
	with new argument.

ld/testsuite/
2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp (tls-relax-large-le-ie): Run new test.
	* ld-aarch64/tls-relax-large-ie-le.d: New.
	* ld-aarch64/tls-relax-large-ie-le.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li
0484b4549e [LD][AARCH64]Add TLSDESC support for large memory model.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_tls_transition_without_check):  Add
	relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC,
	TLSDESC_OFF_G1.
	(aarch64_tls_transition_without_check): Add relaxation support.
	(aarch64_reloc_got_type): Add support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_tls_relax): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: Run new test.
	* ld-aarch64/tls-large-desc.d: New.
	* ld-aarch64/tls-large-desc.s: New.
	* ld-aarch64/tls-relax-large-desc-ie.d: New.
	* ld-aarch64/tls-relax-large-desc-ie.s: New.
	* ld-aarch64/tls-relax-large-desc-le.d: New.
	* ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li
ac73473248 [BFD][AARCH64]Add TLSGD relaxation support under large memory model.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC):
	Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1.
	(aarch64_tls_transition_without_check): Likewise
	(elfNN_aarch64_tls_relax): Likwise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: run new test
	* ld-aarch64/tls-relax-large-gd-ie.d: New.
	* ld-aarch64/tls-relax-large-gd-ie.s: New.
	* ld-aarch64/tls-relax-large-gd-le.d: New.
	* ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li
3b957e5b07 [Binutils][AARCH64]Add TLS IE large memory support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and
	AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Make
	TLSIE_MOVW_GOTTPREL_G1 check overflow.
	(aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1
	and TLSIE_MOVW_GOTTPREL_G0_NC.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): Add two entries for
	gottprel_g0_nc and gottprel_g1.
	(process_movw_reloc_info): Add support.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-gottprel_g0_nc.d: New.
	* gas/aarch64/reloc-gottprel_g0_nc.s: New.
	* gas/aarch64/reloc-gottprel_g1.d: New.
	* gas/aarch64/reloc-gottprel_g1.s: New.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/tls-large-ie.d: New.
	* ld-aarch64/tls-large-ie.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:56:08 +01:00
Renlin Li
7ba7cfe431 [LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-516.d: New.
	* ld-aarch64/emit-relocs-516.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:56:08 +01:00
Renlin Li
94facae337 [LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-515.d: New.
	* ld-aarch64/emit-relocs-515.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:56:08 +01:00
Renlin Li
dc8008f508 [LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: Run new test.
	* ld-aarch64/emit-relocs-301.d: New.
	* ld-aarch64/emit-relocs-301.s: New.
2015-10-02 17:56:07 +01:00
Renlin Li
74a1bfe1d6 [LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add support
	for BFD_RELOC_AARCH64_MOVW_GOTOFF_G1.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise
	(elfNN_aarch64_final_link_relocate): Calculate offset within GOT.

ld/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-302.d: New.
	* ld-aarch64/emit-relocs-302.s: New.
	* ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-02 17:56:07 +01:00
Renlin Li
a2e1db00c7 [LD][AARCH64]Add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 Support.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_LD_64_GOTOFF_LO15 support.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise
	(elfNN_aarch64_final_link_relocate): Calculate offset within GOT.

ld/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-310.d: New.
	* ld-aarch64/emit-relocs-310.s: New.
	* ld-aarch64/aarch64-elf.exp: Run the test.
2015-10-02 17:56:07 +01:00
H.J. Lu
5db4f0d383 Create a PLT entry for R_X86_64_PC32 in non-code sections
Since something like ".long foo - ." may be used as pointer, we make
sure that PLT is used if foo is a function defined in a shared library.

bfd/

	PR ld/19031
	* elf64-x86-64.c (elf_x86_64_check_relocs): Set
	pointer_equality_needed for R_X86_64_PC32 reloc in non-code
	sections.

ld/testsuite/

	PR ld/19031
	* ld-x86-64/x86-64.exp: Run PR ld/19031 test.
	* ld-x86-64/pr19031.out: New file.
	* ld-x86-64/pr19031a.c: Likewise.
	* ld-x86-64/pr19031b.S: Likewise.
	* ld-x86-64/pr19031c.c: Likewise.
2015-10-01 10:49:33 -07:00
Renlin Li
73524045d3 [BFD][AARCH64]Emit single AARCH64_MAP_INSN symbol for the whole plt.
bfd/

2015-10-01  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_output_plt_map): Remove.
	(elfNN_aarch64_output_arch_local_syms): Emit AARCH64_MAP_INSN once.

ld/testsuite/

2015-10-01  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/plt_mapping_symbol.d: New.
	* ld-aarch64/plt_mapping_symbol.s: New.
	* ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-01 14:27:56 +01:00
Alan Modra
c220e327e3 Update ld-x86-64/pr19013-nacl.d
* ld-x86-64/pr19013-nacl.d: Update.
2015-10-01 09:31:16 +09:30
Alan Modra
017e6bceee Revert "Also check e_machine when merging sections"
Commit 9865bd0d added a bogus check in _bfd_elf_merge_sections.

bfd/
	PR ld/19013
	* elflink.c (_bfd_elf_merge_sections): Revert last change.
ld/testsuite/
	* ld-x86-64/pr19013-x32.d: Update.
2015-10-01 07:41:28 +09:30
H.J. Lu
b8836e409e Pass -m elf_x86_64 to ld for 64-bit test
* ld-x86-64/pr19013.d (ld): Add -m elf_x86_64.
2015-09-30 10:20:34 -07:00
H.J. Lu
4b627c1844 Create a PLT entry for R_386_PC32 in non-code sections
Since something like ".long foo - ." may be used as pointer, we make
sure that PLT is used if foo is a function defined in a shared library.

bfd/

	PR ld/19031
	* elf32-i386.c (elf_i386_check_relocs): Set
	pointer_equality_needed for R_386_PC32 reloc in non-code
	sections.

ld/testsuite/

	PR ld/19031
	* ld-i386/i386.exp: Run PR ld/19031 test.
	* ld/testsuite/ld-i386/pr19031.out: New file.
	* ld/testsuite/ld-i386/pr19031a.c: Likewise.
	* ld/testsuite/ld-i386/pr19031b.S: Likewise.
	* ld/testsuite/ld-i386/pr19031c.c: Likewise.
2015-09-30 08:45:13 -07:00
H.J. Lu
9865bd0da6 Also check e_machine when merging sections
When we check consistency for merge ELF sections, we should not only
check EI_CLASS, but also compatible e_machine.

bfd/

	PR ld/19013
	* elflink.c (_bfd_elf_merge_sections): Only merge input bfds
	that have the compatible ELF machine code with the output bfd.

ld/testsuite/

	PR ld/19013
	* ld-x86-64/pr19013-nacl.d: New file.
	* ld-x86-64/pr19013-x32.d: Likewise.
	* ld-x86-64/pr19013.d: Likewise.
	* ld-x86-64/pr19013.s: Likewise.
	* ld-x86-64/x86-64.exp: Run PR ld/19013 tests.
2015-09-30 05:37:49 -07:00
H.J. Lu
c68c163716 Adjust the output section size to skip gap fills
In objcopy, copy_object calls copy_section to copy contents of input
section to output section.  When --gap-fill= is used, objcopy extends
the size of output sectios to fill gaps between output sections with
gap fills.  In this case, we adjust the output section size to skip
gap files to avoid reading beypond the input section buffer before
calling copy_section and restore the output section size after input
sections have been copied.

binutils/

	PR binutils/19005
	* objcopy.c (copy_object): Adjust the output section size to
	skip gap fills between sections when copying from input sections
	to output sections.

ld/testsuite/

	PR binutils/19005
	* ld-elf/pr19005.d: New file.
	* ld-elf/pr19005.s: Likewise.
	* ld-elf/pr19005.t: Likewise.
2015-09-29 06:33:24 -07:00
Peter Zotov
8a9e7a9121 Correct the generation of OR1K pc-relative relocations.
gas	PR ld/18759
	* config/tc-or1k.c (tc_gen_reloc): Correct computation of PC
	relative relocs.
	* config/tc-or1k.h (GAS_CGEN_PRCEL_R_TYPE): Delete.

bfd	* elf32-or1k.c (R_OR1K_32_PCREL): Set pcrel_offset to TRUE.
	(R_OR1K_16_PCREL): Likewise.
	(R_OR1K_8_PCREL): Likewise.

ld/tests * ld-elf/eh-frame-hdr: Expect to pass on the or1k-linux target.
2015-09-25 15:21:14 +01:00
H.J. Lu
0a6b6047cf Update MIPS PIE tests for DF_1_PIE change
Since linker now sets the DF_1_PIE bit in the DT_FLAGS_1 tag for PIE,
we need to update MIPS PIE tests for it.

	* ld-mips-elf/pie-n32.d: Updated.
	* ld-mips-elf/pie-n64.d: Likewise.
	* ld-mips-elf/pie-o32.d: Likewise.
2015-09-22 11:12:01 -07:00
H.J. Lu
5fe2850dd9 Set DF_1_PIE in gld${EMULATION_NAME}_after_parse
We can't add OPTION_PIE to gld${EMULATION_NAME}_handle_option since
it has been handled in parse_args in lexsup.c.  This patch moves
setting DF_1_PIE to gld${EMULATION_NAME}_after_parse.

ld/

	* emultempl/alphaelf.em (alpha_after_parse): Call
	gld${EMULATION_NAME}_after_parse instead of
	after_parse_default.
	* emultempl/cr16elf.em (cr16elf_after_parse): Likewise.
	* emultempl/crxelf.em (crxelf_after_parse); Likewise.
	* emultempl/hppaelf.em (hppaelf_after_parse): Likewise.
	* emultempl/mipself.em (mips_after_parse): Likewise.
	* emultempl/nds32elf.em (nds32_elf_after_parse): Likewise.
	* emultempl/elf32.em: Don't include ldlex.h.
	(gld${EMULATION_NAME}_after_parse): New function.
	(gld${EMULATION_NAME}_handle_option) [GENERATE_PIE_SCRIPT]
	<OPTION_PIE>: Removed.
	(ld_${EMULATION_NAME}_emulation): Replace after_parse_default
	with gld${EMULATION_NAME}_after_parse.
	* emultempl/ia64elf.em (gld${EMULATION_NAME}_after_parse):
	Renamed to ...
	(ia64elf_after_parse): This.  Call
	gld${EMULATION_NAME}_after_parse instead of after_parse_default.
	(LDEMUL_AFTER_PARSE): Replace gld${EMULATION_NAME}_after_parse
	with ia64elf_after_parse.

ld/testsuite/

	* ld-elf/pie.d: New test.
2015-09-22 06:08:55 -07:00
Alan Modra
975f8a9e31 Delay converting linker script defined symbols from absolute
Giving linker script symbols defined outside of output sections a
section-relative value early, leads to them being used in expressions
as if they were defined inside an output section.  This can mean loss
of the section VMA, and wrong results.

ld/
	PR ld/18963
	* ldexp.h (struct ldexp_control): Add rel_from_abs.
	(ldexp_finalize_syms): Declare.
	* ldexp.c (new_rel_from_abs): Keep absolute for expressions
	outside of output section statements.  Set rel_from_abs.
	(make_abs, exp_fold_tree, exp_fold_tree_no_dot): Clear rel_from_abs.
	(struct definedness_hash_entry): Add final_sec, and comment.
	(update_definedness): Set final_sec.
	(set_sym_sections, ldexp_finalize_syms): New functions.
	* ldlang.c (lang_process): Call ldexp_finalize_syms.
ld/testsuite
	PR ld/18963
	* ld-scripts/pr18963.d,
	* ld-scripts/pr18963.t: New test.
	* ld-scripts/expr.exp: Run it.
	* ld-elf/provide-hidden-2.ld: Explicitly make "dot" absolute.
	* ld-mips-elf/gp-hidden.sd: Don't care about _gp section.
	* ld-mips-elf/no-shared-1-n32.d: Don't care about symbol shown at
	start of .data section.
	* ld-mips-elf/no-shared-1-n64.d: Likewise.
	* ld-mips-elf/no-shared-1-o32.d: Likewise.
2015-09-18 12:39:16 +09:30
H.J. Lu
6d636d8c77 Add "ld -r" tests for PR ld/15323
Weak defined function is turned into non-weak defined function by
"ld -r -flto" with GCC 5 due to a GCC 5 regression:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67548

Add "ld -r" tests for PR ld/15323 to make sure that any linker change
won't introduce linker regression for PR ld/15323.

	* ld-plugin/lto.exp (lto_link_tests): Add a "ld -r" test for
	PR ld/15323.
	(lto_run_tests): Add a "ld -r" test for PR ld/15323.
2015-09-11 10:02:57 -07:00
Jiong Wang
259364adb8 [AArch64] Relax TLS local dynamic traditional into local executable
The linker relaxation logic will be:

Code sequence I (tiny):

    0x00 adr  x0, :tlsldm:x
    0x04 bl   __tls_get_addr
         |
         V
    0x00 mrs  x0, tpidr_el0
    0x04 add  x0, x0, TCB_SIZE

Code sequence II (small):

    0x00 adrp a0, :tlsldm:x
    0x04 add  a0, #:tlsldm_lo12:x
    0x08 bl   __tls_get_addr
         |
         V
    0x00 mrs  x0, tpidr_el0
    0x04 add  x0, x0, TCB_SIZE
    0x08 nop

2015-09-09  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (aarch64_tls_transition_without_check): Support
  three TLS local dynamic traditional relocations types.
  (elfNN_aarch64_tls_relax): Support TLS local dynamic traditional to
  local executable relaxation.

ld/testsuite/
  * ld-aarch64/tls-relax-ld-le-tiny.s: New testcase.
  * ld-aarch64/tls-relax-ld-le-small.s: Likewise.
  * ld-aarch64/tls-relax-ld-le-tiny.d: New expectation file.
  * ld-aarch64/tls-relax-ld-le-small.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-09-09 14:19:28 +01:00
Andrew Burgess
3d476d8d59 ld: Fix failures in new orphan handling tests.
The new orphan handling tests added in commit c005eb9 fail on a range of
targets.  Some of the failures were fixed in commit e32aa93 but not
all.  This commit should address the remaining failures.

Update results to account for orphan sections being placed in different
orders, and for other, target specific sections, being discarded.

ld/testsuite/ChangeLog:

	* ld-elf/orphan-7.map: Allow for other discarded sections.
	* ld-elf/orphan-8.map: Updated to allow for different section
	ordering on different targets.
	* ld-elf/orphan.ld: Place .sbss section.
2015-09-07 23:28:04 +01:00
H.J. Lu
e32aa9338f Update ld-elf/orphan-8.map to support 32-bit targets
* ld-elf/orphan-8.map: Updated to support 32-bit targets.
2015-09-05 06:44:53 -07:00
Andrew Burgess
c005eb9e34 ld: Extend options for altering orphan handling behaviour.
Replace the options --warn-orphan and --no-warn-orphan with a single
option --orphan-handling=MODE, where mode can be place, warn, error, and
discard.

Mode 'place' is the default, and is the current behaviour, placing the
orphan section into a suitable output section.

Mode 'warn' is the same as '--warn-orphan'.  The orphan is also placed
using the same algorithm as for 'place'.

Mode 'error' is the same as '--warn-orphan' and '--fatal-warnings'.

Mode 'discard' assigns all output sections to the /DISCARD/ section.

ld/ChangeLog:

	* ld.h (enum orphan_handling_enum): New.
	(ld_config_type): Remove warn_orphan, add orphan_handling.
	* ldemul.c (ldemul_place_orphan): Remove warning about orphan
	sections.
	* ldlang.c (ldlang_place_orphan): New function.
	(lang_place_orphans): Call ldlang_place_orphan.
	* ldlex.h (enum option_values): Remove OPTION_WARN_ORPHAN and
	OPTION_NO_WARN_ORPHAN, add OPTION_ORPHAN_HANDLING.
	* lexsup.c (ld_options): Remove 'warn-orphan' and
	'no-warn-orphan', add 'orphan-handling'.
	(parse_args): Remove handling for OPTION_WARN_ORPHAN and
	OPTION_NO_WARN_ORPHAN, add handling for OPTION_ORPHAN_HANDLING.
	* NEWS: Replace text about --warn-orphan with --orphan-handling.
	* ld.texinfo (Options): Remove --warn-orphan entry and add
	entry on --orphan-handling.
	(Orphan Sections): Add reference to relevant command line options.

ld/testsuite/ChangeLog:

	* ld-elf/elf.exp: Switch to rely on run_dump_test.
	* ld-elf/orphan-5.l: Update expected output.
	* ld-elf/orphan-5.d: New file.
	* ld-elf/orphan-6.d: New file.
	* ld-elf/orphan-6.l: New file.
	* ld-elf/orphan-7.d: New file.
	* ld-elf/orphan-7.map: New file.
	* ld-elf/orphan-8.d: New file.
	* ld-elf/orphan-8.map: New file.
2015-09-04 22:30:55 +01:00
H.J. Lu
8c650f161a Add ifunc tests for call, jmp, add, test
* ld-ifunc/ifunc-21-i386.s: Add tests for call, jmp, add, test.
	* ld-ifunc/ifunc-21-x86-64.s: Likewise.
	* ld-ifunc/ifunc-22-i386.s: Likewise.
	* ld-ifunc/ifunc-22-x86-64.s: Likewise.
	* ld-ifunc/ifunc-21-i386.d: Updated.
	* ld-ifunc/ifunc-21-x86-64.d: Likewise.
	* ld-ifunc/ifunc-22-i386.d: Likewise.
	* ld-ifunc/ifunc-22-x86-64.d: Likewise.
2015-09-03 04:03:13 -07:00
H.J. Lu
0762fbb6a7 Add 2 ifunc tests for i386 and x86-64
* ld-ifunc/ifunc-21-i386.d: Likewise.
	* ld-ifunc/ifunc-21-i386.s: Likewise.
	* ld-ifunc/ifunc-21-x86-64.d: Likewise.
	* ld-ifunc/ifunc-21-x86-64.s: Likewise.
	* ld-ifunc/ifunc-22-i386.d: Likewise.
	* ld-ifunc/ifunc-22-i386.s: Likewise.
	* ld-ifunc/ifunc-22-x86-64.d: Likewise.
	* ld-ifunc/ifunc-22-x86-64.s: Likewise.
2015-09-02 15:30:32 -07:00
H.J. Lu
04ebc307f9 Skip PLT for function pointer initialization
We use its PLT entry to initialize function pointer at run-time.  If
there is no other usage for the PLT entry, we can generate run-time
function pointer relocations in read-write section, which can be
resolved by dynamic linker, to initialize function pointers.  It avoids
the extra indirect branch overhead in PLT.

bfd/

	PR ld/18900
	* elf32-i386.c (elf_i386_link_hash_entry): Add
	func_pointer_refcount.
	(elf_i386_link_hash_newfunc): Clear func_pointer_refcount.
	(elf_i386_get_local_sym_hash): Likewise.
	(elf_i386_copy_indirect_symbol): Also copy
	func_pointer_refcount.
	(elf_i386_check_relocs): Increment func_pointer_refcount.
	(elf_i386_gc_sweep_hook): Decrement func_pointer_refcount.
	(elf_i386_allocate_dynrelocs): Don't create the PLT entry if
	there are only function pointer relocations which can be
	resolved at run-time.  Keep dynanamic relocations for run-time
	function pointer initialization.
	(elf_i386_relocate_section): Copy dynamic function pointer
	relocations.
	* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add
	func_pointer_refcount.
	(elf_x86_64_link_hash_newfunc): Clear func_pointer_refcount.
	(elf_x86_64_get_local_sym_hash): Likewise.
	(elf_x86_64_copy_indirect_symbol): Also copy
	func_pointer_refcount.
	(elf_x86_64_check_relocs): Increment func_pointer_refcount.
	(elf_x86_64_gc_sweep_hook): Decrement func_pointer_refcount.
	(elf_x86_64_allocate_dynrelocs): Don't create the PLT entry if
	there are only function pointer relocations which can be
	resolved at run-time.  Keep dynanamic relocations for run-time
	function pointer initialization.
	(elf_x86_64_relocate_section): Copy dynamic function pointer
	relocations.

ld/testsuite/

	PR ld/18900
	* ld-i386/i386.exp: Run tests for PR ld/18900.
	* ld-x86-64/x86-64.exp: Likewise.
	* ld-i386/pr18900.out: New file.
	* ld-i386/pr18900a.c: Likewise.
	* ld-i386/pr18900a.c: Likewise.
	* ld-i386/pr18900a.rd: Likewise.
	* ld-i386/pr18900b.c: Likewise.
	* ld-i386/pr18900b.rd: Likewise.
	* ld-i386/pr18900c.c: Likewise.
	* ld-x86-64/pr18900.out: Likewise.
	* ld-x86-64/pr18900a.c: Likewise.
	* ld-x86-64/pr18900a.rd: Likewise.
	* ld-x86-64/pr18900b.c: Likewise.
	* ld-x86-64/pr18900b.rd: Likewise.
	* ld-x86-64/pr18900c.c: Likewise.
	* ld-x86-64/mpx3.dd: Updated.
2015-09-01 05:06:33 -07:00
Alan Modra
1cb0b71f5a Add reloc sort test
* ld-powerpc/relocsort.s, * ld-powerpc/relocsort.d: New test.
	* ld-powerpc/powerpc.exp: Run it.
2015-08-27 23:21:21 +09:30
Matthew Fortune
c97c330ba8 Select MIPS ABi based upon abiflags rather than e_flags.
bfd	PR ld/18401
	* elfxx-mips.c (bfd_mips_isa_ext_mach): New function: Converts an
	ISA value to a bfd machine number.
	(bfd_mips_isa_ext): Update the ISA level and revision if
	necessary.  Use mips_mach_extends_p to decide if the ISA extension
	needs to be set.
	(_bfd_mips_elf_merge_private_bfd_data): Allow the ISA extension to
	be inferred from the ABI setting.  Set the ISA level from the
	maximum of the incoming and outgoing ISA levels.

tests
	* ld-mips-elf/mips-elf-flags.exp: Add more ISA conflict tests.
2015-08-26 14:42:56 +01:00
Jiong Wang
07c9aa07cd [AArch64][6/6] LD support TLSLD load/store relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation
  types, including BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  (elfNN_aarch64_final_link_relocate): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/emit-relocs-531.s: New testcase.
  * ld-aarch64/emit-relocs-531-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-532.s: Likewise.
  * ld-aarch64/emit-relocs-533.s: Likewise.
  * ld-aarch64/emit-relocs-533-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-534.s: Likewise.
  * ld-aarch64/emit-relocs-535.s: Likewise.
  * ld-aarch64/emit-relocs-535-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-536.s: Likewise.
  * ld-aarch64/emit-relocs-537.s: Likewise.
  * ld-aarch64/emit-relocs-537-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-538.s: Likewise.
  * ld-aarch64/emit-relocs-531.d: New expectation file.
  * ld-aarch64/emit-relocs-531-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-532.d: Likewise.
  * ld-aarch64/emit-relocs-533.d: Likewise.
  * ld-aarch64/emit-relocs-533-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-534.d: Likewise.
  * ld-aarch64/emit-relocs-535.d: Likewise.
  * ld-aarch64/emit-relocs-535-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-536.d: Likewise.
  * ld-aarch64/emit-relocs-537.d: Likewise.
  * ld-aarch64/emit-relocs-537-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-538.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 16:57:38 +01:00
Jiong Wang
6ffe9a1ba3 [AArch64][4/6] LD support TLSLD move/add relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  PR ld/18276
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation
  types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2.
  (elfNN_aarch64_final_link_relocate): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/emit-relocs-87.s: New testcase.
  * ld-aarch64/emit-relocs-88.s: Likewise.
  * ld-aarch64/emit-relocs-88-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-89.s: Likewise.
  * ld-aarch64/emit-relocs-90.s: Likewise.
  * ld-aarch64/emit-relocs-90-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-523.s: Likewise.
  * ld-aarch64/emit-relocs-524.s: Likewise.
  * ld-aarch64/emit-relocs-525.s: Likewise.
  * ld-aarch64/emit-relocs-527.s: Likewise.
  * ld-aarch64/emit-relocs-526.s: Likewise.
  * ld-aarch64/emit-relocs-528.s: Likewise.
  * ld-aarch64/emit-relocs-528-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-87.d: New expectation file.
  * ld-aarch64/emit-relocs-88.d: Likewise.
  * ld-aarch64/emit-relocs-88-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-89.d: Likewise.
  * ld-aarch64/emit-relocs-90.d: Likewise.
  * ld-aarch64/emit-relocs-90-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-91.d: Likewise.
  * ld-aarch64/emit-relocs-523.d: Likewise.
  * ld-aarch64/emit-relocs-524.d: Likewise.
  * ld-aarch64/emit-relocs-525.d: Likewise.
  * ld-aarch64/emit-relocs-526.d: Likewise.
  * ld-aarch64/emit-relocs-527.d: Likewise.
  * ld-aarch64/emit-relocs-528.d: Likewise.
  * ld-aarch64/emit-relocs-528-overflow.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 16:40:18 +01:00
Jiong Wang
753999c1ec [AArch64][2/6] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
  (aarch64_reloc_got_type): Likewise.
  (elfNN_aarch64_final_link_relocate): Likewise.
  (elfNN_aarch64_relocate_section): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/emit-relocs-530.s: New testcase.
  * ld-aarch64/emit-relocs-92.s: Likewise.
  * ld-aarch64/emit-relocs-530.d: New expectation file.
  * ld-aarch64/emit-relocs-92.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19 16:30:47 +01:00
H.J. Lu
4e1626f5a8 Add another test for PR ld/18841
PR ld/18841
	* ld-ifunc/ifunc.exp: Add another test for PR ld/18841.
	* ld-ifunc/pr18841c.c: New file.
2015-08-18 10:43:47 -07:00
H.J. Lu
cae1fbbb7e Return reloc_class_ifunc for reloc against IFUNC
elf_XXX_reloc_type_class should return reloc_class_ifunc for relocation
against STT_GNU_IFUNC symbol.

bfd/

	PR ld/18841
	* elf-bfd.h (elf_link_hash_table): Add dynsym.
	* elf32-i386.c (elf_i386_reloc_type_class): Return
	reloc_class_ifunc for relocation against STT_GNU_IFUNC symbol.
	* elf64-x86-64.c (elf_x86_64_reloc_type_class): Likewise.
	* elflink.c (_bfd_elf_link_create_dynamic_sections): Set dynsym.
	(bfd_elf_size_dynsym_hash_dynstr): Use dynsym.
	(elf_final_link_info): Remove dynsym_sec.
	(elf_link_output_extsym): Replace dynsym_sec with dynsym.
	(bfd_elf_final_link): Remove reference to dynsym_sec.  Replace
	dynsym_sec with dynsym.

ld/testsuite/

	PR ld/18841
	* ld-ifunc/ifunc.exp: Add a test for PR ld/18841.
	* ld-ifunc/pr18841.out: New file.
	* ld-ifunc/pr18841a.c: Likewise.
	* ld-ifunc/pr18841b.c: Likewise.
2015-08-18 09:50:08 -07:00
H.J. Lu
8efa2874ab Issue an error for read-only segment with dynamic IFUNC relocations
To load an ELF binary with DT_TEXTREL tag, the dynamic linker calls
__mprotect on the read-only segment with PROT_READ|PROT_WRITE before
applying dynamic relocation.  It leads to segfault when performing
IFUNC relocations since the read-only segment has no execute permission.
This patch changes x86 linker to issue an error for read-only segment
with dynamic IFUNC relocations.  Other backends with IFUNC support
may need a similar change.

bfd/

	PR ld/18801
	* elf32-i386.c (elf_i386_size_dynamic_sections): Issue an error
	for read-only segment with dynamic IFUNC relocations.
	* elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Likewise.

ld/testsuite/

	PR ld/18801
	* ld-i386/i386.exp: Run pr18801.
	* ld-x86-64/x86-64.exp: Likewise.
	* ld-i386/pr18801.d: New file.
	* ld-i386/pr18801.s: Likewise.
	* ld-x86-64/pr18801.d: Likewise.
	* ld-x86-64/pr18801.s: Likewise.
2015-08-13 04:31:38 -07:00
H.J. Lu
e5a764c49c Add ChangeLog for check_ifunc_attribute_available 2015-08-13 02:48:55 -07:00
H.J. Lu
13a2df29c9 Set EI_OSABI to ELFOSABI_GNU for local IFUNC symbols
Since the backend elf_add_symbol_hook isn't called on local symbols,
the EI_OSABI field isn't to ELFOSABI_GNU where are local IFUNC symbols.
This patch changes the x86 backends to set has_gnu_symbols if there are
relocations against IFUNC symbols.  Other backends with IFUNC support
may need a similar change.

This patch also changes the type of has_gnu_symbols from bfd_boolean to
enum elf_gnu_symbols.

bfd/

	PR ld/18815
	* elf-bfd.h (elf_gnu_symbols): New enum.
	(elf_obj_tdata): Use elf_gnu_symbols on has_gnu_symbols.
	* elf-s390-common.c (elf_s390_add_symbol_hook): Set
	has_gnu_symbols to elf_gnu_symbol_any.
	* elf32-arm.c (elf32_arm_add_symbol_hook): Likewise.
	* elf32-m68k.c (elf_m68k_add_symbol_hook): Likewise.
	* elf32-ppc.c (ppc_elf_add_symbol_hook): Likewise.
	* elf32-sparc.c (elf32_sparc_add_symbol_hook): Likewise.
	* elf64-ppc.c (ppc64_elf_add_symbol_hook): Likewise.
	* elf64-sparc.c (elf64_sparc_add_symbol_hook): Likewise.
	* lfxx-aarch64.c (_bfd_aarch64_elf_add_symbol_hook): Likewise.
	* elf32-i386.c (elf_i386_check_relocs): Update has_gnu_symbols
	if there are relocations against IFUNC symbols.
	(elf_i386_add_symbol_hook): Don't check STT_GNU_IFUNC here.
	* elf64-x86-64. (elf_x86_64_check_relocs): Update has_gnu_symbols
	if there are relocations against IFUNC symbols.
	(elf_x86_64_add_symbol_hook): Don't check STT_GNU_IFUNC here.

ld/testsuite/

	PR ld/18815
	* ld-i386/i386.exp: Run pr18815.
	* ld-x86-64/x86-64.exp: Likewise.
	* ld-i386/pr18815.d: New file.
	* ld-i386/pr18815.s: Likewise.
	* ld-x86-64/pr18815.d: Likewise.
	* ld-x86-64/pr18815.s: Likewise.
2015-08-12 13:47:41 -07:00
Simon Dardis
40fc1451c6 [MIPS] Map 'move' to 'or'.
The MIPS assembly idiom 'move' now maps to the 'or' machine instruction. This
change affects microMIPS, MIPS32, MIPS64.

2015-08-12  Simon Dardis  <simon.dardis@imgtec.com>

opcodes/

	* micromips-opc.c (micromips_opcodes): Re-order table so that move
	based on 'or' is first.
	* mips-opc.c (mips_builtin_opcodes): Ditto.

bfd/

	* elfxx-mips.c (STUB_MOVE): Change to use 'or' only.
	(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry,
	mips_n64_exec_plt0_entry, micromips_insn32_o32_exec_plt0_entry):
	Update to use 'or' instead of 'addu/daddu'.
	(_bfd_mips_elf_finish_dynamic_symbol): Update usage of STUB_MOVE.
	(move_insns_32): Reorder table.

gas/

	* config/tc-mips.c (move_register): Change to use 'or' only.
	(s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Update to
	use or for move.

gas/testsuite/

	* gas/mips/elf-rel23.d: Update test.
	* gas/mips/elf-rel23.d: Ditto.
	* gas/mips/elf-rel23a.d: Ditto.
	* gas/mips/elf-rel23b.d: Ditto.
	* gas/mips/elf_e_flags1.d: Ditto.
	* gas/mips/elf_e_flags2.d: Ditto.
	* gas/mips/elf_e_flags3.d: Ditto.
	* gas/mips/elf_e_flags4.d: Ditto.
	* gas/mips/loc-swap-dis.d: Ditto.
	* gas/mips/micromips-insn32.d: Ditto.
	* gas/mips/micromips-noinsn32.d: Ditto.
	* gas/mips/micromips-trap.d: Ditto.
	* gas/mips/micromips.d: Ditto.
	* gas/mips/mips-abi32-pic.d: Ditto.
	* gas/mips/mips-abi32.d: Ditto.
	* gas/mips/mips-gp32-fp32-pic.d: Ditto.
	* gas/mips/mips-gp32-fp32.d: Ditto.
	* gas/mips/mips-gp32-fp64-pic.d: Ditto.
	* gas/mips/mips-gp32-fp64.d: Ditto.
	* gas/mips/mips-gp64-fp32-pic.d: Ditto.
	* gas/mips/mips-gp64-fp32.d: Ditto.
	* gas/mips/mips-gp64-fp64-pic.d: Ditto.
	* gas/mips/mips-gp64-fp64.d: Ditto.
	* gas/mips/mipsr6@loc-swap-dis.d: Ditto.
	* gas/mips/tls-o32.d: Ditto.
	* gas/mips/uld2-eb.d: Ditto.
	* gas/mips/uld2-el.d: Ditto.
	* gas/mips/ulw2-eb-ilocks.d: Ditto.
	* gas/mips/ulw2-eb.d: Ditto.
	* gas/mips/ulw2-el-ilocks.d: Ditto.
	* gas/mips/ulw2-el.d: Ditto.
	* gas/mips/move.d: New test.
	* gas/mips/move.s: Ditto.
	* gas/mips/micromips32-move.d: Ditto.
	* gas/mips/micromips32-move.s: Ditto.
	* gas/mips/mips.exp: Run the new tests.

gold/

	* mips.cc (plt0_entry_o32, plt0_entry_n32, plt0_entry_n64,
	lazy_stub_normal_1, lazy_stub_normal_1_n64,
	lazy_stub_normal_2, lazy_stub_normal_2_n64, lazy_stub_big,
	lazy_stub_big_n64, lazy_stub_micromips32_normal_1_n64,
	lazy_stub_micromips32_normal_2_n64, lazy_stub_micromips32_big,
	lazy_stub_micromips32_big_n64): Update to use 'or' for move instead
	of 'addu/daddu'.

ld/testsuite/

	* ld-mips-elf/compressed-plt-1-n32-mips16.od: Update test.
	* ld-mips-elf/compressed-plt-1-n32-umips.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-got.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-only.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-word.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-se.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips-got.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips-word.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips.od: Ditto.
	* ld-mips-elf/jalx-2.dd: Ditto.
	* ld-mips-elf/mips16-pic-3.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-3a.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-3b.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-5b.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-6-n32.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-6-o32.dd: Ditto.
	* ld-mips-elf/stub-dynsym-1-10000.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-2fe80.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-7fff.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-8000.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-fff0.d: Ditto.
	* ld-mips-elf/tlsbin-o32.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-1.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-2.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-3.d: Ditto.
	* ld-mips-elf/tlsdyn-o32.d: Ditto.
	* ld-mips-elf/tlslib-o32.d: Ditto.
2015-08-12 17:10:22 +01:00
Alan Modra
6bf45b2495 Remove ChangeLog separator 2015-08-12 22:56:01 +09:30
Jiong Wang
87ad46af87 [AArch64] Fix test failures on elf configuration
This patch fixed those failures on elf configuration by:

   * Improve the ILP32 target selector "aarch64_choose_ilp32_emul",
     makes it more robust. Target triples copied from configure.tgt

   * Updated emit-relocs-86/-overflow.d to use aarch64_choose_ilp32_emul
     which is following what have done with emit-relocs-28.

   * Those instruction encoding mismatch is because those encoding
     contains pc-relative address. As for elf, we may have different
     start address. relaxed encodind check, especially for
     aarch64-farcall-b/bl-plt, as the main purpose of those check are
     ELF text/data layout, we just want to make sure veneer to plt stub
     is generated.

2015-08-12  Jiong Wang  <jiong.wang@arm.com>

ld/testsuite/
  * ld-aarch64/aarch64-elf.exp (aarch64_choose_ilp32_emul): Support all
  four triple shapes: aarch64-*-linux*, aarch64-*-elf,
  aarch64_be-*-linux*, aarch64_be-*-elf.
  * ld-aarch64/emit-relocs-86.d: Use aarch64_choose_ilp32_emul.
  * ld-aarch64/emit-relocs-86-overflow.d: Likewise.
  * ld-aarch64/ld-aarch64/farcall-b-plt.d: Relax instrucion encoding
  check when they reflect address.
  * ld-aarch64/ld-aarch64/farcall-bl-plt.d: Likewise.
2015-08-12 13:17:50 +01:00
Thomas Preud'homme
f63d6d9650 [AArch64] Rename relocs-257-symbolic-func ld test to relocs-1027-symbolic-func.
2015-08-12  Thomas Preud'homme  <thomas.preudhomme@arm.com>

ld/testsuite/
    * ld-aarch64/aarch64-elf.exp: Rename relocs-257-symbolic-func to
    relocs-1027-symbolic-func.
    * ld-aarch64/relocs-257-symbolic-func.d: Rename to ...
    * ld-aarch64/relocs-1027-symbolic-func.d: ... this.
    * ld-aarch64/relocs-257-symbolic-func.s: Rename to ...
    * ld-aarch64/relocs-1027-symbolic-func.s: ... this.
2015-08-12 09:34:13 +08:00
Jiong Wang
b261b4db94 [AArch64] Commit missing testcases 2015-08-11 22:12:08 +01:00
Jiong Wang
f678ded748 [AArch64] Long branch veneer support far symbol defined by --defsym
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * bfd/elfnn-aarch64.c (aarch64_type_of_stub): New parameter "sym_sec".
  Loose the check for symbol from ABS section.
  (elfNN_aarch64_size_stubs): Pass sym_sec.

ld/testsuite/
  * ld-aarch64/farcall-b-defsym.s: New test.
  * ld-aarch64/farcall-bl-defsym.s: Likewise.
  * ld-aarch64/farcall-b-defsym.d: New expectation.
  * ld-aarch64/farcall-bl-defsym.d: Likewise.
2015-08-11 21:55:52 +01:00
Jiong Wang
07f9ddfeba [AArch64] PR18668, repair long branch veneer for plt stub
2015-08-11  Jiong Wang  <jiong.wang@arm.com>
bfd/
   PR ld/18668
   * elfnn-aarch64.c (aarch64_type_of_stub): Update destination for
   calls go through plt stub.
   (elfNN_aarch64_final_link_relocate): Adjust code logic for CALL26,
   JUMP26 relocation to support inserting veneer for call to plt stub.

ld/testsuite/
   * ld-aarch64/farcall-b-gsym.s: New test.
   * ld-aarch64/farcall-b-plt.s: Likewise.
   * ld-aarch64/farcall-bl-plt.s: Likewise.
   * ld-aarch64/farcall-b-gsym.d: New expect file.
   * ld-aarch64/farcall-b-plt.d: Likewise.
   * ld-aarch64/farcall-bl-plt.d: Likewise.
2015-08-11 21:44:31 +01:00
Jiong Wang
40fbed8481 [AArch64][8/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
  (aarch64_reloc_got_type): Likewise.
  (elfNN_aarch64_final_link_relocate): Likewise.
  (elfNN_aarch64_relocate_section): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/emit-relocs-529.s: New testcase.
  * ld-aarch64/emit-relocs-529-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-86.s: Likewise.
  * ld-aarch64/emit-relocs-86-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-529.d: New expectation file.
  * ld-aarch64/emit-relocs-529-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-86.d: Likewise.
  * ld-aarch64/emit-relocs-86-overflow.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-11 21:26:41 +01:00
Jiong Wang
73f925cc20 [AArch64][6/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize
  BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
  (aarch64_reloc_got_type): Likewise.
  (elfNN_aarch64_final_link_relocate): Likewise.
  (elfNN_aarch64_relocate_section): Likewise.
  (elfNN_aarch64_gc_sweep_hook): Likewise.
  (elfNN_aarch64_check_relocs): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/tls-small-ld.s: Update testcase.
2015-08-11 21:26:13 +01:00
Jiong Wang
f69e49203b [AArch64][3/8] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize
  BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
  (aarch64_reloc_got_type): Likewise.
  (elfNN_aarch64_final_link_relocate): Likewise.
  (elfNN_aarch64_relocate_section): Likewise.
  (elfNN_aarch64_gc_sweep_hook): Likewise.
  (elfNN_aarch64_check_relocs): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/tls-small-ld.s: New file.
  * ld-aarch64/tls-small-ld.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new test.
2015-08-11 21:25:04 +01:00
H.J. Lu
97dc35c88d Skip IFUNC relocations in debug sections
Skip IFUNC relocations in debug sections ignored by ld.so.

bfd/

	PR ld/18808
	* elf32-i386.c (elf_i386_relocate_section): Skip IFUNC
	relocations in debug sections.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.

ld/testsuite/

	PR ld/18808
	* ld-ifunc/ifunc.exp: Add a test for PR ld/18808.
	* ld-ifunc/pr18808.out: New file.
	* ld-ifunc/pr18808a.c: Likewise.
	* ld-ifunc/pr18808b.c: Likewise.
2015-08-11 12:59:11 -07:00
H.J. Lu
6e33951edc Properly merge hidden versioned symbol
The hidden versioned symbol can only be merged with the versioned
symbol with the same symbol version.  _bfd_elf_merge_symbol should
check the symbol version before merging the new hidden versioned
symbol with the existing symbol.  _bfd_elf_link_hash_copy_indirect can't
copy any references to the hidden versioned symbol.   We need to
bind a symbol locally when linking executable if it is locally defined,
hidden versioned, not referenced by shared library and not exported.

bfd/

	PR ld/18720
	* elflink.c (_bfd_elf_merge_symbol): Add a parameter to indicate
	if the new symbol matches the existing one.  The new hidden
	versioned symbol matches the existing symbol if they have the
	same symbol version. Update the existing symbol only if they
	match.
	(_bfd_elf_add_default_symbol): Update call to
	_bfd_elf_merge_symbol.
	(_bfd_elf_link_assign_sym_version): Don't set the hidden field
	here.
	(elf_link_add_object_symbols): Override a definition only if the
	new symbol matches the existing one.
	(_bfd_elf_link_hash_copy_indirect): Don't copy any references to
	the hidden versioned symbol.
	(elf_link_output_extsym): Bind a symbol locally when linking
	executable if it is locally defined, hidden versioned, not
	referenced by shared library and not exported.  Turn on
	VERSYM_HIDDEN only if the hidden vesioned symbol is defined
	locally.

ld/testsuite/

	PR ld/18720
	* ld-elf/indirect.exp: Run tests for PR ld/18720.
	* ld-elf/pr18720.out: New file.
	* ld-elf/pr18720a.c: Likewise.
	* ld-elf/pr18720b.c: Likewise.
	* ld-elf/pr18720c.c: Likewise.
2015-08-07 05:04:35 -07:00
Andrew Burgess
9c98104c4c ld: map option for run_dump_test requires no program.
When using run_dump_test with the map option to compare the linker map
file produced, no additional dump program should be required.  A dump
program can still be given if needed, but leaving it off will no longer
produce an error.

ld/testsuite/ChangeLog:

	* ld/ld-lib.exp (run_dump_test): When using the map option, no
	program is required.
2015-08-04 11:25:37 +01:00
Andrew Burgess
bb57e4c7bd ld: Add file based error/warning regexp for run_dump_test.
The run_dump_test mechanism supports options error and warning, which
allow regexp to be specified within the test file, these regexp are
matched against the stderr output from the linker.

Similar dump test style functions for gas and gdb also support file
based matching versions of these options; the patterns are placed into a
file which the test driver then references.  It is sometimes clearer,
when the pattern to be matched spans multiple lines if the patterns can
be placed into a separate file.

This patch adds new options error_output and warning_output for the
linker run_dump_test function.  These new options take a filename
parameter, this file is then used (with regexp_diff) to compare against
the linker output.

ld/testsuite/ChangeLog:

	* ld/ld-lib.exp (run_dump_test): Add error_output and
	warning_output options.
2015-08-04 11:16:39 +01:00
Andrew Burgess
0a61824343 ld: Add '--require-defined' command line option.
Add a new command line option '--require-defined' to the linker.  This
option operates identically to the '--undefined' option, except that if
the symbol is not defined in the final output file then the linker will
exit with an error.

When making use of --gc-section, or just when trying to pull in parts of
a library, it is not uncommon for a user to use the '--undefined'
command line option to specify a symbol that the user then expects to be
defined by one of the object files supplied to the link.

However, if for any reason the symbol is not satisfied by an object
provided to the link the user will be left with an undefined symbol in
the output file, instead of a defined symbol.

In some cases the above behaviour is what the user wants, in other cases
though we can do better.  The '--require-defined' option tries to fill
this gap.  The symbol passed to the '--require-defined' option is
treated exactly as if the symbol was passed to '--undefined', however,
before the linker exits a check is made that all symbols passed to
'--require-defined' are actually defined, if any are not then the link
will fail with an error.

ld/ChangeLog:

	* ld.texinfo (Options): Document --require-defined option.
	* ldlang.c (struct require_defined_symbol): New structure.
	(require_defined_symbol_list): New variable.
	(ldlang_add_require_defined): New function.
	(ldlang_check_require_defined_symbols): New function.
	(lang_process): Check required symbols are defined.
	* ldlang.h (ldlang_add_require_defined): Declare.
	* ldlex.h (enum option_values): Add OPTION_REQUIRE_DEFINED_SYMBOL.
	* lexsup.c (ld_options): Add '--require-defined' entry.
	(parse_args): Handle '--require-defined' entry.
	* NEWS: Mention new '--require-defined' option.

ld/testsuite/ChangeLog:

	* ld-undefined/require-defined-1.d: New file.
	* ld-undefined/require-defined-2.d: New file.
	* ld-undefined/require-defined-3.d: New file.
	* ld-undefined/require-defined-4.d: New file.
	* ld-undefined/require-defined-5.d: New file.
	* ld-undefined/require-defined.exp: New file.
	* ld-undefined/require-defined.s: New file.
2015-08-04 10:00:05 +01:00
H.J. Lu
c6e8a9a802 Don't change the default symbol for relocatable link
We should change the default symbol for the versioned symbol only when
not performing a relocatable link.

bfd/

	PR ld/18735
	* elflink.c (_bfd_elf_add_default_symbol): Add the default
	symbol if not performing a relocatable link.
	(elf_link_add_object_symbols): Adjust the default symbol if
	not performing a relocatable link.

ld/testsuite/

	PR ld/18735
	* ld-elf/pr18735.d: New file.
	* ld-elf/pr18735.s: Likewise.
2015-07-30 03:28:00 -07:00
H.J. Lu
60b57502ec Use noclone attribute only for GCC 4.5 or newer
noclone attribute was added to GCC 4.5.  We should check GCC version
before using it.

	* ld-elf/pr18718.c (bar): Use noclone attribute only for GCC
	4.5 or newer.
2015-07-29 11:20:04 -07:00