Properly convert address load of __start_XXX/__stop_XXX

Since __start_XXX and __stop_XXX symbols aren't defined when address
load is being converted, we need to check if there is an XXX output
section to get their section and value.  This patch adds a new function,
bfd_link_get_defined_symbol, to search for the XXX output section to
check if __start_XXX and __stop_XXX symbols are defined.

bfd/

	PR ld/19171
	* elf32-i386.c (elf_i386_convert_load): Call
	bfd_link_get_defined_symbol to check if a symbol is defined.
	* elf64-x86-64.c (elf_x86_64_convert_load): Call
	bfd_link_get_defined_symbol to get defined symbol section and
	value.
	* linker.c (bfd_link_get_defined_symbol): New function.
	* bfd-in2.h: Regenerated.

ld/testsuite/

	PR ld/19171
	* ld-i386/lea1.s: Add tests for address load of __start_XXX
	and __stop_XXX.
	* ld-i386/mov1.s: Likewise.
	* ld-x86-64/lea1.s: Likewise.
	* ld-x86-64/mov1.s: Likewise.
	* ld-i386/lea1a.d: Updated.
	* ld-i386/lea1b.d: Likewise.
	* ld-i386/lea1c.d: Likewise.
	* ld-i386/mov1a.d: Likewise.
	* ld-i386/mov1b.d: Likewise.
	* ld-x86-64/lea1a.d: Likewise.
	* ld-x86-64/lea1b.d: Likewise.
	* ld-x86-64/lea1c.d: Likewise.
	* ld-x86-64/lea1d.d: Likewise.
	* ld-x86-64/lea1e.d: Likewise.
	* ld-x86-64/lea1f.d: Likewise.
	* ld-x86-64/mov1a.d: Likewise.
	* ld-x86-64/mov1b.d: Likewise.
	* ld-x86-64/mov1c.d: Likewise.
	* ld-x86-64/mov1d.d: Likewise.
This commit is contained in:
H.J. Lu 2015-10-26 06:10:23 -07:00
parent 7cc53fba0a
commit a6af384b19
25 changed files with 184 additions and 10 deletions

View file

@ -1,3 +1,14 @@
2015-10-26 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19171
* elf32-i386.c (elf_i386_convert_load): Call
bfd_link_get_defined_symbol to check if a symbol is defined.
* elf64-x86-64.c (elf_x86_64_convert_load): Call
bfd_link_get_defined_symbol to get defined symbol section and
value.
* linker.c (bfd_link_get_defined_symbol): New function.
* bfd-in2.h: Regenerated.
2015-10-23 Alan Modra <amodra@gmail.com>
PR ld/11133

View file

@ -7515,6 +7515,10 @@ struct bfd_elf_version_tree * bfd_find_version_for_sym
bfd_boolean bfd_hide_sym_by_version
(struct bfd_elf_version_tree *verdefs, const char *sym_name);
bfd_boolean bfd_link_get_defined_symbol
(struct bfd_link_info *info, struct bfd_link_hash_entry *h,
asection **sec, bfd_vma *value);
/* Extracted from simple.c. */
bfd_byte *bfd_simple_get_relocated_section_contents
(bfd *abfd, asection *sec, bfd_byte *outbuf, asymbol **symbol_table);

View file

@ -2753,7 +2753,7 @@ elf_i386_readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
static bfd_boolean
elf_i386_convert_load (bfd *abfd, asection *sec,
struct bfd_link_info *link_info)
struct bfd_link_info *link_info)
{
Elf_Internal_Shdr *symtab_hdr;
Elf_Internal_Rela *internal_relocs;
@ -2976,8 +2976,8 @@ convert_branch:
if (h == htab->elf.hdynamic)
continue;
if ((h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak)
if (bfd_link_get_defined_symbol (link_info, &h->root, NULL,
NULL)
&& SYMBOL_REFERENCES_LOCAL (link_info, h))
{
convert_load:

View file

@ -3116,6 +3116,8 @@ elf_x86_64_convert_load (bfd *abfd, asection *sec,
}
else
{
bfd_boolean defined;
indx = r_symndx - symtab_hdr->sh_info;
h = elf_sym_hashes (abfd)[indx];
BFD_ASSERT (h != NULL);
@ -3124,19 +3126,17 @@ elf_x86_64_convert_load (bfd *abfd, asection *sec,
|| h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
defined = bfd_link_get_defined_symbol (link_info, &h->root,
&tsec, &toff);
/* STT_GNU_IFUNC must keep GOTPCREL relocations. We also
avoid optimizing GOTPCREL relocations againt _DYNAMIC
since ld.so may use its link-time address. */
if ((h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak)
if (defined
&& h->type != STT_GNU_IFUNC
&& h != htab->elf.hdynamic
&& SYMBOL_REFERENCES_LOCAL (link_info, h))
{
tsec = h->root.u.def.section;
toff = h->root.u.def.value;
symtype = h->type;
}
symtype = h->type;
else
continue;
}

View file

@ -3303,3 +3303,92 @@ bfd_hide_sym_by_version (struct bfd_elf_version_tree *verdefs,
bfd_find_version_for_sym (verdefs, sym_name, &hidden);
return hidden;
}
/*
FUNCTION
bfd_link_get_defined_symbol
SYNOPSIS
bfd_boolean bfd_link_get_defined_symbol
(struct bfd_link_info *info, struct bfd_link_hash_entry *h,
asection **sec, bfd_vma *value);
DESCRIPTION
Return TRUE, store symbol section and value in @var{*sec} and
@var{*value} if symbol @var{h} is defined during a final link.
*/
bfd_boolean
bfd_link_get_defined_symbol (struct bfd_link_info *info,
struct bfd_link_hash_entry *h,
asection **sec, bfd_vma *value)
{
if (h->type == bfd_link_hash_defined
|| h->type == bfd_link_hash_defweak)
{
if (sec)
*sec = h->u.def.section;
if (value)
*value = h->u.def.value;
return TRUE;
}
if (h->type == bfd_link_hash_new
|| h->type == bfd_link_hash_undefined
|| h->type == bfd_link_hash_undefweak)
{
/* Check yet undefined reference to __start_XXX or __stop_XXX
symbols. The linker will later define such symbols for output
sections that have a name representable as a C identifier. */
const char *sec_name;
if (strncmp (h->root.string, "__start_", 8) == 0)
sec_name = h->root.string + 8;
else if (strncmp (h->root.string, "__stop_", 7) == 0)
sec_name = h->root.string + 7;
else
sec_name = NULL;
if (sec_name != NULL && *sec_name != '\0')
{
bfd *i;
for (i = info->input_bfds; i != NULL; i = i->link.next)
{
asection *s = bfd_get_section_by_name (i, sec_name);
if (s != NULL)
{
asection *asect;
bfd_vma size;
if (sec)
*sec = s;
if (!value)
return TRUE;
if (sec_name == (h->root.string + 8))
{
/* Set __start_XXX symbol value. */
*value = 0;
return TRUE;
}
/* Get the size of the output XXX section for
__stop_XXX symbol value. */
size = 0;
for (asect = s->output_section->map_head.s;
asect != NULL;
asect = asect->map_head.s)
{
size = align_power (size, asect->alignment_power);
size += asect->size;
}
*value = size;
return TRUE;
}
}
}
}
return FALSE;
}

View file

@ -1,3 +1,27 @@
2015-10-26 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19171
* ld-i386/lea1.s: Add tests for address load of __start_XXX
and __stop_XXX.
* ld-i386/mov1.s: Likewise.
* ld-x86-64/lea1.s: Likewise.
* ld-x86-64/mov1.s: Likewise.
* ld-i386/lea1a.d: Updated.
* ld-i386/lea1b.d: Likewise.
* ld-i386/lea1c.d: Likewise.
* ld-i386/mov1a.d: Likewise.
* ld-i386/mov1b.d: Likewise.
* ld-x86-64/lea1a.d: Likewise.
* ld-x86-64/lea1b.d: Likewise.
* ld-x86-64/lea1c.d: Likewise.
* ld-x86-64/lea1d.d: Likewise.
* ld-x86-64/lea1e.d: Likewise.
* ld-x86-64/lea1f.d: Likewise.
* ld-x86-64/mov1a.d: Likewise.
* ld-x86-64/mov1b.d: Likewise.
* ld-x86-64/mov1c.d: Likewise.
* ld-x86-64/mov1d.d: Likewise.
2015-10-23 H.J. Lu <hongjiu.lu@intel.com>
PR ld/19167

View file

@ -1,3 +1,5 @@
.section my_section,"aw",@progbits
.long 0x12345678
.text
.globl foo
.type foo, @function
@ -9,6 +11,8 @@ foo:
_start:
movl foo@GOT(%ecx), %eax
movl bar@GOT(%ecx), %eax
movl __start_my_section@GOT(%ecx), %eax
movl __stop_my_section@GOT(%ecx), %eax
.size _start, .-_start
.comm pad,4,4
.comm bar,4,4

View file

@ -11,4 +11,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%ecx\),%eax
[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%ecx\),%eax
[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%ecx\),%eax
[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%ecx\),%eax
#pass

View file

@ -11,4 +11,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%ecx\),%eax
[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%ecx\),%eax
[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%ecx\),%eax
[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%ecx\),%eax
#pass

View file

@ -11,4 +11,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+,%eax
[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+,%eax
#pass

View file

@ -1,6 +1,10 @@
.text
.weak __start_my_section
.weak __stop_my_section
.globl _start
.type _start, @function
_start:
movl _DYNAMIC@GOT(%ecx), %eax
movl __start_my_section@GOT(%ecx), %eax
movl __stop_my_section@GOT(%ecx), %eax
.size _start, .-_start

View file

@ -10,4 +10,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
#pass

View file

@ -10,4 +10,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
#pass

View file

@ -1,3 +1,5 @@
.section my_section,"aw",@progbits
.long 0x12345678
.text
.globl foo
.type foo, @function
@ -9,6 +11,8 @@ foo:
_start:
movq foo@GOTPCREL(%rip), %rax
movq bar@GOTPCREL(%rip), %rax
movq __start_my_section@GOTPCREL(%rip), %rax
movq __stop_my_section@GOTPCREL(%rip), %rax
.size _start, .-_start
.comm pad,4,4
.comm bar,4,4

View file

@ -11,4 +11,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
#pass

View file

@ -11,4 +11,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
#pass

View file

@ -11,4 +11,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
#pass

View file

@ -11,4 +11,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
#pass

View file

@ -11,4 +11,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
#pass

View file

@ -11,4 +11,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
#pass

View file

@ -1,6 +1,10 @@
.text
.weak __start_my_section
.weak __stop_my_section
.globl _start
.type _start, @function
_start:
movq _DYNAMIC@GOTPCREL(%rip), %rax
movq __start_my_section@GOTPCREL(%rip), %rax
movq __stop_my_section@GOTPCREL(%rip), %rax
.size _start, .-_start

View file

@ -10,4 +10,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
#pass

View file

@ -10,4 +10,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
#pass

View file

@ -10,4 +10,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
#pass

View file

@ -10,4 +10,6 @@ Disassembly of section .text:
#...
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
#pass