Properly convert address load of __start_XXX/__stop_XXX
Since __start_XXX and __stop_XXX symbols aren't defined when address load is being converted, we need to check if there is an XXX output section to get their section and value. This patch adds a new function, bfd_link_get_defined_symbol, to search for the XXX output section to check if __start_XXX and __stop_XXX symbols are defined. bfd/ PR ld/19171 * elf32-i386.c (elf_i386_convert_load): Call bfd_link_get_defined_symbol to check if a symbol is defined. * elf64-x86-64.c (elf_x86_64_convert_load): Call bfd_link_get_defined_symbol to get defined symbol section and value. * linker.c (bfd_link_get_defined_symbol): New function. * bfd-in2.h: Regenerated. ld/testsuite/ PR ld/19171 * ld-i386/lea1.s: Add tests for address load of __start_XXX and __stop_XXX. * ld-i386/mov1.s: Likewise. * ld-x86-64/lea1.s: Likewise. * ld-x86-64/mov1.s: Likewise. * ld-i386/lea1a.d: Updated. * ld-i386/lea1b.d: Likewise. * ld-i386/lea1c.d: Likewise. * ld-i386/mov1a.d: Likewise. * ld-i386/mov1b.d: Likewise. * ld-x86-64/lea1a.d: Likewise. * ld-x86-64/lea1b.d: Likewise. * ld-x86-64/lea1c.d: Likewise. * ld-x86-64/lea1d.d: Likewise. * ld-x86-64/lea1e.d: Likewise. * ld-x86-64/lea1f.d: Likewise. * ld-x86-64/mov1a.d: Likewise. * ld-x86-64/mov1b.d: Likewise. * ld-x86-64/mov1c.d: Likewise. * ld-x86-64/mov1d.d: Likewise.
This commit is contained in:
parent
7cc53fba0a
commit
a6af384b19
25 changed files with 184 additions and 10 deletions
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@ -1,3 +1,14 @@
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2015-10-26 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/19171
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* elf32-i386.c (elf_i386_convert_load): Call
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bfd_link_get_defined_symbol to check if a symbol is defined.
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* elf64-x86-64.c (elf_x86_64_convert_load): Call
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bfd_link_get_defined_symbol to get defined symbol section and
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value.
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* linker.c (bfd_link_get_defined_symbol): New function.
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* bfd-in2.h: Regenerated.
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2015-10-23 Alan Modra <amodra@gmail.com>
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PR ld/11133
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@ -7515,6 +7515,10 @@ struct bfd_elf_version_tree * bfd_find_version_for_sym
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bfd_boolean bfd_hide_sym_by_version
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(struct bfd_elf_version_tree *verdefs, const char *sym_name);
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bfd_boolean bfd_link_get_defined_symbol
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(struct bfd_link_info *info, struct bfd_link_hash_entry *h,
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asection **sec, bfd_vma *value);
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/* Extracted from simple.c. */
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bfd_byte *bfd_simple_get_relocated_section_contents
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(bfd *abfd, asection *sec, bfd_byte *outbuf, asymbol **symbol_table);
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@ -2753,7 +2753,7 @@ elf_i386_readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
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static bfd_boolean
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elf_i386_convert_load (bfd *abfd, asection *sec,
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struct bfd_link_info *link_info)
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struct bfd_link_info *link_info)
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{
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Elf_Internal_Shdr *symtab_hdr;
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Elf_Internal_Rela *internal_relocs;
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@ -2976,8 +2976,8 @@ convert_branch:
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if (h == htab->elf.hdynamic)
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continue;
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if ((h->root.type == bfd_link_hash_defined
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|| h->root.type == bfd_link_hash_defweak)
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if (bfd_link_get_defined_symbol (link_info, &h->root, NULL,
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NULL)
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&& SYMBOL_REFERENCES_LOCAL (link_info, h))
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{
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convert_load:
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@ -3116,6 +3116,8 @@ elf_x86_64_convert_load (bfd *abfd, asection *sec,
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}
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else
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{
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bfd_boolean defined;
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indx = r_symndx - symtab_hdr->sh_info;
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h = elf_sym_hashes (abfd)[indx];
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BFD_ASSERT (h != NULL);
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@ -3124,19 +3126,17 @@ elf_x86_64_convert_load (bfd *abfd, asection *sec,
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|| h->root.type == bfd_link_hash_warning)
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h = (struct elf_link_hash_entry *) h->root.u.i.link;
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defined = bfd_link_get_defined_symbol (link_info, &h->root,
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&tsec, &toff);
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/* STT_GNU_IFUNC must keep GOTPCREL relocations. We also
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avoid optimizing GOTPCREL relocations againt _DYNAMIC
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since ld.so may use its link-time address. */
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if ((h->root.type == bfd_link_hash_defined
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|| h->root.type == bfd_link_hash_defweak)
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if (defined
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&& h->type != STT_GNU_IFUNC
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&& h != htab->elf.hdynamic
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&& SYMBOL_REFERENCES_LOCAL (link_info, h))
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{
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tsec = h->root.u.def.section;
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toff = h->root.u.def.value;
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symtype = h->type;
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}
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symtype = h->type;
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else
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continue;
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}
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89
bfd/linker.c
89
bfd/linker.c
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@ -3303,3 +3303,92 @@ bfd_hide_sym_by_version (struct bfd_elf_version_tree *verdefs,
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bfd_find_version_for_sym (verdefs, sym_name, &hidden);
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return hidden;
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}
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/*
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FUNCTION
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bfd_link_get_defined_symbol
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SYNOPSIS
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bfd_boolean bfd_link_get_defined_symbol
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(struct bfd_link_info *info, struct bfd_link_hash_entry *h,
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asection **sec, bfd_vma *value);
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DESCRIPTION
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Return TRUE, store symbol section and value in @var{*sec} and
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@var{*value} if symbol @var{h} is defined during a final link.
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*/
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bfd_boolean
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bfd_link_get_defined_symbol (struct bfd_link_info *info,
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struct bfd_link_hash_entry *h,
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asection **sec, bfd_vma *value)
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{
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if (h->type == bfd_link_hash_defined
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|| h->type == bfd_link_hash_defweak)
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{
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if (sec)
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*sec = h->u.def.section;
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if (value)
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*value = h->u.def.value;
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return TRUE;
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}
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if (h->type == bfd_link_hash_new
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|| h->type == bfd_link_hash_undefined
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|| h->type == bfd_link_hash_undefweak)
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{
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/* Check yet undefined reference to __start_XXX or __stop_XXX
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symbols. The linker will later define such symbols for output
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sections that have a name representable as a C identifier. */
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const char *sec_name;
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if (strncmp (h->root.string, "__start_", 8) == 0)
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sec_name = h->root.string + 8;
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else if (strncmp (h->root.string, "__stop_", 7) == 0)
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sec_name = h->root.string + 7;
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else
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sec_name = NULL;
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if (sec_name != NULL && *sec_name != '\0')
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{
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bfd *i;
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for (i = info->input_bfds; i != NULL; i = i->link.next)
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{
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asection *s = bfd_get_section_by_name (i, sec_name);
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if (s != NULL)
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{
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asection *asect;
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bfd_vma size;
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if (sec)
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*sec = s;
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if (!value)
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return TRUE;
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if (sec_name == (h->root.string + 8))
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{
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/* Set __start_XXX symbol value. */
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*value = 0;
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return TRUE;
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}
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/* Get the size of the output XXX section for
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__stop_XXX symbol value. */
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size = 0;
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for (asect = s->output_section->map_head.s;
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asect != NULL;
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asect = asect->map_head.s)
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{
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size = align_power (size, asect->alignment_power);
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size += asect->size;
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}
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*value = size;
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return TRUE;
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}
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}
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}
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}
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return FALSE;
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}
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2015-10-26 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/19171
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* ld-i386/lea1.s: Add tests for address load of __start_XXX
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and __stop_XXX.
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* ld-i386/mov1.s: Likewise.
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* ld-x86-64/lea1.s: Likewise.
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* ld-x86-64/mov1.s: Likewise.
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* ld-i386/lea1a.d: Updated.
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* ld-i386/lea1b.d: Likewise.
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* ld-i386/lea1c.d: Likewise.
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* ld-i386/mov1a.d: Likewise.
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* ld-i386/mov1b.d: Likewise.
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* ld-x86-64/lea1a.d: Likewise.
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* ld-x86-64/lea1b.d: Likewise.
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* ld-x86-64/lea1c.d: Likewise.
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* ld-x86-64/lea1d.d: Likewise.
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* ld-x86-64/lea1e.d: Likewise.
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* ld-x86-64/lea1f.d: Likewise.
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* ld-x86-64/mov1a.d: Likewise.
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* ld-x86-64/mov1b.d: Likewise.
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* ld-x86-64/mov1c.d: Likewise.
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* ld-x86-64/mov1d.d: Likewise.
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2015-10-23 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/19167
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@ -1,3 +1,5 @@
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.section my_section,"aw",@progbits
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.long 0x12345678
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.text
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.globl foo
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.type foo, @function
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_start:
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movl foo@GOT(%ecx), %eax
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movl bar@GOT(%ecx), %eax
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movl __start_my_section@GOT(%ecx), %eax
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movl __stop_my_section@GOT(%ecx), %eax
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.size _start, .-_start
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.comm pad,4,4
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.comm bar,4,4
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@ -11,4 +11,6 @@ Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%ecx\),%eax
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[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%ecx\),%eax
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[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%ecx\),%eax
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[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%ecx\),%eax
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#pass
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@ -11,4 +11,6 @@ Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%ecx\),%eax
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[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%ecx\),%eax
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[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%ecx\),%eax
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[ ]*[a-f0-9]+: 8d 81 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%ecx\),%eax
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#pass
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@ -11,4 +11,6 @@ Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+,%eax
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[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+,%eax
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[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+,%eax
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[ ]*[a-f0-9]+: 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+,%eax
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#pass
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@ -1,6 +1,10 @@
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.text
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.weak __start_my_section
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.weak __stop_my_section
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.globl _start
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.type _start, @function
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_start:
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movl _DYNAMIC@GOT(%ecx), %eax
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movl __start_my_section@GOT(%ecx), %eax
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movl __stop_my_section@GOT(%ecx), %eax
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.size _start, .-_start
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@ -10,4 +10,6 @@ Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
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[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
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[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
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#pass
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@ -10,4 +10,6 @@ Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
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[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
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[ ]*[a-f0-9]+: 8b 81 ([0-9a-f]{2} ){4} * mov -0x[a-f0-9]+\(%ecx\),%eax
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#pass
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.section my_section,"aw",@progbits
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.long 0x12345678
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.text
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.globl foo
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.type foo, @function
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_start:
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movq foo@GOTPCREL(%rip), %rax
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movq bar@GOTPCREL(%rip), %rax
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movq __start_my_section@GOTPCREL(%rip), %rax
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movq __stop_my_section@GOTPCREL(%rip), %rax
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.size _start, .-_start
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.comm pad,4,4
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.comm bar,4,4
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@ -11,4 +11,6 @@ Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
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#pass
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@ -11,4 +11,6 @@ Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
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#pass
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@ -11,4 +11,6 @@ Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
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#pass
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@ -11,4 +11,6 @@ Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
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#pass
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@ -11,4 +11,6 @@ Disassembly of section .text:
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#...
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
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[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
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||||
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
|
||||
#pass
|
||||
|
|
|
@ -11,4 +11,6 @@ Disassembly of section .text:
|
|||
#...
|
||||
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <foo>
|
||||
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <bar>
|
||||
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__start_my_section>
|
||||
[ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <__stop_my_section>
|
||||
#pass
|
||||
|
|
|
@ -1,6 +1,10 @@
|
|||
.text
|
||||
.weak __start_my_section
|
||||
.weak __stop_my_section
|
||||
.globl _start
|
||||
.type _start, @function
|
||||
_start:
|
||||
movq _DYNAMIC@GOTPCREL(%rip), %rax
|
||||
movq __start_my_section@GOTPCREL(%rip), %rax
|
||||
movq __stop_my_section@GOTPCREL(%rip), %rax
|
||||
.size _start, .-_start
|
||||
|
|
|
@ -10,4 +10,6 @@ Disassembly of section .text:
|
|||
|
||||
#...
|
||||
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
|
||||
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
|
||||
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
|
||||
#pass
|
||||
|
|
|
@ -10,4 +10,6 @@ Disassembly of section .text:
|
|||
|
||||
#...
|
||||
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
|
||||
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
|
||||
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
|
||||
#pass
|
||||
|
|
|
@ -10,4 +10,6 @@ Disassembly of section .text:
|
|||
|
||||
#...
|
||||
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
|
||||
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
|
||||
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
|
||||
#pass
|
||||
|
|
|
@ -10,4 +10,6 @@ Disassembly of section .text:
|
|||
|
||||
#...
|
||||
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
|
||||
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
|
||||
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+>
|
||||
#pass
|
||||
|
|
Loading…
Reference in a new issue