7 commits

Author	SHA1	Message	Date
Andrew Cagney	aa49c64f3e	* d10v_sim.h (SEXT56): Define. ... * simops.c (OP_4201): For "rac", sign extend 56 bit value before it is shifted. * d10v_sim.h (MAX32, MIN32, MASK32, MASK40): Re-define using SIGNED64 macro.	1997-12-03 08:03:33 +00:00
Andrew Cagney	d294a657d5	For "msbu", subtract unsigned product from ACC, ... Test.	1997-12-02 07:18:53 +00:00
Andrew Cagney	9420287ed2	For "mulxu", store unsigned product in ACC. ... Test.	1997-12-02 06:37:09 +00:00
Andrew Cagney	ae55807561	For MACU add unsigned multiply to accumulator. ... Test.	1997-12-02 05:18:27 +00:00
Andrew Cagney	51b057f27b	For sub2w, compute carry according to negated addition rules. ... Test.	1997-12-02 00:27:27 +00:00
Andrew Cagney	51624b4bf6	Test rachi instruction.	1997-11-10 08:27:15 +00:00
Andrew Cagney	5a9bddea84	Enable d10v simulator testsuite - two tests: Hello World and exit47.	1997-10-15 00:00:41 +00:00