There is no need to set BFD compression bits for each section. We
should just set it once in write_object_file.
* write.c (compress_debug): Move BFD compression bits setting
to ...
(write_object_file): Here.
Increment register number by 16 if RegVRex is set.
* config/tc-i386.c (register_number): Check RegVRex.
* testsuite/gas/i386/x86-64-avx512f.s: Add a test for vgatherqpd
with %zmm19 and %zmm3.
* testsuite/gas/i386/x86-64-avx512f-intel.d: Updated.
* testsuite/gas/i386/x86-64-avx512f.d: Likewise.
* symbols.c (decode_local_label_name): Make type a const char *.
* listing.c (print_source): Make type of p const char *.
(print_line): Make type of string const char *.
(buffer_line): Return const char *.
(title): Make type const char *.
(subtitle): Likewise.
(listing_listing): Make type of p const char *.
* messages.c (as_internal_value_out_of_range): Make type of prefix
const char *.
* stabs.c (s_stab_generic): make type of stab_secname, stabstr_secname
and string const char *.
* read.c (_bfd_rel): Make type of name const char *.
* app.c (out_string): Change type to const char *.
(struct app_save::out_string): Likewise.
gas * read.c (finish_bundle): Avoid recording a negative alignment.
(do_align): Use unsigned values for n, len and max. Only create
a frag if the alignment requirement is greater than the minimum
byte alignment. Avoid recording a negative alignment.
(s_align): Use unsigned values where appropriate.
(bss_alloc): Use an unsigned value for the alignment.
(sizeof_sleb128): Add a comment noting that we encode one octet
per byte, regardless of the value of OCTETS_PER_BYTE_POWER.
(emit_leb129_expr): Abort if the emitted encoding was longer than
expected.
* read.h (output_leb128): Update prototype.
(sizeof_leb128): Update prototype.
(bss_alloc): Update prototype.
* write.c (record_alignment): Use an unsigned value for the
alignment. Do not record alignments less than the minimum
alignment for a byte.
* write.h (record_alignment): Update prototype.
Despite the documentation and the comment in xtensa_move_literals, in
the presence of --text-section-literals and --auto-litpools literals are
moved from the separate literal sections into .init and .fini, because
the check in the xtensa_move_literals is incorrect.
This moving was broken with introduction of auto litpools: some literals
now may be lost. This happens because literal frags emitted from .init
and .fini are not closed when new .literal_position marks new literal
pool. Then frag_align(2, 0, 0) changes type of the last literal frag to
rs_align. rs_align frags are skipped in the xtensa_move_literals. As a
result fixups against such literals are not moved out of .init.literal/
.fini.literal sections producing the following assembler error:
test.S: Warning: fixes not all moved from .init.literal
test.S: Internal error!
Fix check for .init.literal/.fini.literal in the xtensa_move_literals
and don't let it move literals from there in the presence of
--text-section-literals or --auto-litpools.
2016-02-17 Max Filippov <jcmvbkbc@gmail.com>
gas/
* config/tc-xtensa.c (xtensa_move_literals): Fix check for
.init.literal/.fini.literal section name.
* testsuite/gas/xtensa/all.exp: Add init-fini-literals to the
list of xtensa tests.
* testsuite/gas/xtensa/init-fini-literals.d: New file:
init-fini-literals test result patterns.
* testsuite/gas/xtensa/init-fini-literals.s: New file:
init-fini-literals test.
In AArch64 gas, register name or string starts with valid register name
is not allowed as symbol name for mov[z,k,n] instruction.
This patch removes the restriction.
gas/
PR gas/19620
* config/tc-aarch64.c (parse_half): Remove restrictions on symbol name.
* testsuite/gas/aarch64/movw_label.d: New.
* testsuite/gas/aarch64/movw_label.s: New.
gas * doc/as.texinfo (.section): Document that numeric values can now
be used for the flags and type fields of the ELF target's .section
directive. Add notes about the restrictions on setting flags and
types.
* config/obj-elf.c (obj_elf_change_section): Allow known sections
to be given processor specific section types. Allow processor and
application specific flags of a section to be set after
definition.
(obj_elf_parse_section_letters): Handle parsing numeric values.
(obj_elf_section_type): Handle parsing numeric values.
(obj_elf_section): Allow numeric type values.
* config/obj-elf.h (obj_elf_change_section): Update prototype.
* testsuite/gas/elf/section10.d: New test.
* testsuite/gas/elf/section10.s: Source file for new test.
* testsuite/gas/elf/elf.exp: Run the new test.
* testsuite/gas/i386/ilp32/x86-64-unwind.d: Remove dependency upon
the description of the flags produced by readelf.
* testsuite/gas/tic6x/scomm-directive-4.d: Likewise.
* NEWS: Mention the new feature.
bfd * elf-bfd.h (struct bfd_elf_special_section): Use unsigned values
for length and type fields. Use a signed value for the
suffix_length field.
binutils* readelf.c (get_section_type_name): Add hex prefix to offsets
printed for LOPROC and LOOS values. Ensure that a result is
always returned for the V850 target, even when an unrecognised
processor specific value is encountered.
(process_section_headers): Display key values in the order in
which they appear to the user. Add the "C (compressed)" value to
the list.
ld * testsuite/ld-i386/pr12718.d: Remove dependency upon the
description of the flags produced by readelf.
* testsuite/ld-i386/pr12921.d: Likewise.
* testsuite/ld-i386/tlsbin-nacl.rd: Likewise.
* testsuite/ld-i386/tlsbin.rd: Likewise.
* testsuite/ld-i386/tlsbindesc-nacl.rd: Likewise.
* testsuite/ld-i386/tlsbindesc.rd: Likewise.
* testsuite/ld-i386/tlsdesc-nacl.rd: Likewise.
* testsuite/ld-i386/tlsdesc.rd: Likewise.
* testsuite/ld-i386/tlsgdesc-nacl.rd: Likewise.
* testsuite/ld-i386/tlsgdesc.rd: Likewise.
* testsuite/ld-i386/tlsnopic-nacl.rd: Likewise.
* testsuite/ld-i386/tlsnopic.rd: Likewise.
* testsuite/ld-i386/tlspic-nacl.rd: Likewise.
* testsuite/ld-i386/tlspic.rd: Likewise.
* testsuite/ld-s390/tlsbin.rd: Likewise.
* testsuite/ld-s390/tlsbin_64.rd: Likewise.
* testsuite/ld-s390/tlspic.rd: Likewise.
* testsuite/ld-s390/tlspic_64.rd: Likewise.
* testsuite/ld-sh/tlsbin-2.d: Likewise.
* testsuite/ld-sh/tlspic-2.d: Likewise.
* testsuite/ld-tic6x/common.d: Likewise.
* testsuite/ld-tic6x/shlib-1.rd: Likewise.
* testsuite/ld-tic6x/shlib-1b.rd: Likewise.
* testsuite/ld-tic6x/shlib-1r.rd: Likewise.
* testsuite/ld-tic6x/shlib-1rb.rd: Likewise.
* testsuite/ld-tic6x/shlib-app-1.rd: Likewise.
* testsuite/ld-tic6x/shlib-app-1b.rd: Likewise.
* testsuite/ld-tic6x/shlib-app-1r.rd: Likewise.
* testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise.
* testsuite/ld-tic6x/shlib-noindex.rd: Likewise.
* testsuite/ld-tic6x/static-app-1.rd: Likewise.
* testsuite/ld-tic6x/static-app-1b.rd: Likewise.
* testsuite/ld-tic6x/static-app-1r.rd: Likewise.
* testsuite/ld-tic6x/static-app-1rb.rd: Likewise.
* testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise.
* testsuite/ld-x86-64/ilp32-4.d: Likewise.
* testsuite/ld-x86-64/pr12718.d: Likewise.
* testsuite/ld-x86-64/pr12921.d: Likewise.
* testsuite/ld-x86-64/split-by-file-nacl.rd: Likewise.
* testsuite/ld-x86-64/split-by-file.rd: Likewise.
* testsuite/ld-x86-64/tlsbin-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlsbin.rd: Likewise.
* testsuite/ld-x86-64/tlsbindesc-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlsbindesc.rd: Likewise.
* testsuite/ld-x86-64/tlsdesc-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlsdesc.rd: Likewise.
* testsuite/ld-x86-64/tlsgdesc-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlsgdesc.rd: Likewise.
* testsuite/ld-x86-64/tlspic-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlspic.rd: Likewise.
* testsuite/ld-xtensa/tlsbin.rd: Likewise.
* testsuite/ld-xtensa/tlspic.rd: Likewise.
PR gas/19614
* dw2gencfi.c (cfi_sections_set): Delay setting this variable
until it is actually used.
(cfi_set_sections): Set cfi_sections_set to true.
(dot_cfi_startproc): Likewise.
(dot_cfi_endproc): Likewise.
(dot_cfi_fde_data): Likewise.
(cfi_finish): Likewise.
(dot_cfi_sections): Do not set cfi_sections_set.
* doc/as.texinfo (.cfi_sections): Note that targets can provide
their own cfi section name. Also note that the directive can be
reissued provided that CFI generation has not started.
* testsuite/gas/mips/compact-eh-err2.s: Add .cfi_startproc and
.cfi_endproc directives so that the redefinition of .cfi_sections
will trigger the generation of the error message.
* testsuite/gas/mips/compact-eh-err2.l: Update expected line
number of error message.
PR target/19561
opcdoe * msp430-dis.c (print_insn_msp430): Add a special case for
decoding an RRC instruction with the ZC bit set in the extension
word.
include * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
(RRUX): Synthesise using case 2 rather than 7.
gas * config/tc-msp430.c (msp430_operands): Remove case 7. Use case 2
to handle encoding of RRUX instruction.
* testsuite/gas/msp430/msp430x.s: Add more tests of the extended
shift instructions.
* testsuite/gas/msp430/msp430x.d: Update expected disassembly.
Change 1058c7532d "Use signed data type for R_XTENSA_DIFF* relocation
offsets." changed signedness of BFD_RELOC_XTENSA_DIFF* relocations
substituted for BFD_RELOC_*. This made it impossible to encode arbitrary
8-, 16- and 32-bit values, which broke e.g. debug info encoding by .loc
directive. Revert this part and add test.
gas/
2016-02-03 Max Filippov <jcmvbkbc@gmail.com>
* config/tc-xtensa.c (md_apply_fix): Mark BFD_RELOC_XTENSA_DIFF*
substitutions for BFD_RELOC_* as unsigned.
* gas/testsuite/gas/xtensa/all.exp: Add loc to list of xtensa
tests.
* gas/testsuite/gas/xtensa/loc.d: New file: loc test result
patterns.
* gas/testsuite/gas/xtensa/loc.s: New file: loc test.
This change makes gas's notion of the msp430 dwarf2 address size match
that of gcc and gdb. This is needed so that the format of addresses
generated for DW_LNE_set_address in .debug_line will match the address
size for the compilation unit.
In gcc/config/msp430/msp430.h, it's set to 4:
#define DWARF2_ADDR_SIZE 4
Likewise in gdb/msp430-tdep.c:
set_gdbarch_dwarf2_addr_size (gdbarch, 4);
(As far as I can tell, however, GDB doesn't use this value when decoding
.debug_line. Instead, GDB uses the Pointer Size from the compilation
unit.)
readelf is able to seamlessly handle mismatches between these various
sizes by using the size of the DW_LNE_set_address instruction to
determine the address size. Another way to fix this problem is to
make GDB behave in a similar manner. In my opinion, GDB should detect
and inform the user about these mismatches; it's not clear to me if
it's correct for GDB to go ahead and read the address anyway when a
size mismatch is detected.
Without this change, addresses in .debug_line are encoded in two bytes
for some multilibs. When GDB reads the address for
DW_LNE_set_address, it uses the pointer size provided by the CU. When
these values don't match, GDB reads the wrong number of bytes. In the
cases that I've looked at, GDB is reading 4 bytes from a 2 byte
container, which results in a garbage address. GDB discards lines
which have a bogus address; the end result is that GDB records no line
number information for CUs which have a mismatch between the address
size (from the CU) and the format of the address used by
DW_LNE_set_address.
gas/ChangeLog:
* config/tc-msp430.h (DWARF2_ADDR_SIZE): Set to 4.
Basic all instructions assembler test, auto-generated by CGEN, then
fixed by hand for some cases where CGEN had generated invalid
instruction operands.
gas/ChangeLog:
* testsuite/gas/ip2k/allinsn.d: New file.
* testsuite/gas/ip2k/allinsn.s: New file.
* testsuite/gas/ip2k/ip2k-allinsn.exp: New file.
In commit 02a79b89fd some of the load
instructions with a zero offset (where the offset is not mentioned) were
marked as NO-DIS, meaning that the disassembler must display the offset,
even though it is zero.
This change seems a little strange to me as it was only applied to some
loads, not all, and the same change was not applied to the stores.
However, I'm reluctant to revert a specific change to the assembler,
when the output is obviously correct. With this commit then I simply
bring the expected assembler test results into line with what is
actually produced.
gas/ChangeLog:
* testsuite/gas/epiphany/addr-syntax.d: Add explicit 0 offset to
some load instructions.
* testsuite/gas/epiphany/allinsn.d: Likewise.
* testsuite/gas/epiphany/regression.d: Likewise.
In commit 02a79b89fd all instruction
aliases that have a '.l' suffix were marked as NO-DIS, so the
disassembler will not display them, in preference to the instruction
without the suffix. However, the gas testsuite was not updated at the
time, this commit fixes that oversight.
gas/ChangeLog:
* testsuite/gas/epiphany/addr-syntax.d: Remove unneeded '.l'
suffixes from instruction mnemonics in expected output.
* testsuite/gas/epiphany/allinsn.d: Likewise.
* testsuite/gas/epiphany/regression.d: Likewise.
* testsuite/gas/epiphany/sample.d: Likewise.
In commit 02a79b89fd the register aliases
sb, sl, and ip were made less preferred than r9, r10, and r12, however,
the expected test results were not updated. This commit fixes this
oversight and updates the test results.
gas/ChangeLog:
* testsuite/gas/epiphany/addr-syntax.d: Update expected register
names.
* testsuite/gas/epiphany/allinsn.d: Likewise.
* testsuite/gas/epiphany/sample.d: Likewise.
Always set the bytes_per_line field (of struct disassemble_info) to the
same constant value, this is inline with the advice contained within
include/dis-asm.h.
Setting this field to a constant value will cause the disassembler
output to be better aligned.
cpu/ChangeLog:
* epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
a constant to better align disassembler output.
opcodes/ChangeLog:
* epiphany-dis.c: Regenerated from latest cpu files.
gas/ChangeLog:
* testsuite/gas/epiphany/sample.d: Update expected output.
Use OPTION_MXXX for -mxxx option in x86 assembler.
* config/tc-i386.c (OPTION_OMIT_LOCK_PREFIX): Renamed to ...
(OPTION_MOMIT_LOCK_PREFIX): This.
(md_longopts): Updated.
(md_parse_option): Likewise.
