epiphany/gas: Remove .l suffix from expected test results
In commit 02a79b89fd all instruction
aliases that have a '.l' suffix were marked as NO-DIS, so the
disassembler will not display them, in preference to the instruction
without the suffix. However, the gas testsuite was not updated at the
time, this commit fixes that oversight.
gas/ChangeLog:
* testsuite/gas/epiphany/addr-syntax.d: Remove unneeded '.l'
suffixes from instruction mnemonics in expected output.
* testsuite/gas/epiphany/allinsn.d: Likewise.
* testsuite/gas/epiphany/regression.d: Likewise.
* testsuite/gas/epiphany/sample.d: Likewise.
This commit is contained in:
Andrew Burgess
parent
2f74d480dd
commit
a012b298ba
5 changed files with 825 additions and 817 deletions
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@ -1,3 +1,11 @@
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2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
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* testsuite/gas/epiphany/addr-syntax.d: Remove unneeded '.l'
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suffixes from instruction mnemonics in expected output.
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* testsuite/gas/epiphany/allinsn.d: Likewise.
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* testsuite/gas/epiphany/regression.d: Likewise.
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* testsuite/gas/epiphany/sample.d: Likewise.
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2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
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* testsuite/gas/epiphany/addr-syntax.d: Update expected register
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@ -8,8 +8,8 @@
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Disassembly of section \.text:
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00000000 \<\.text\>:
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0: 2bcc 01ff ldr.l r1,\[r2,-0x7ff\]
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4: 4c4c 0301 ldr.l r2,\[r3\],-0x8
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8: 107c 2201 strd.l r8,\[r4\],\+0x8
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0: 2bcc 01ff ldr r1,\[r2,-0x7ff\]
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4: 4c4c 0301 ldr r2,\[r3\],-0x8
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8: 107c 2201 strd r8,\[r4\],\+0x8
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c: 506c 2400 ldrd r10,\[r12\]
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10: 587c 2400 strd r10,\[lr\]
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File diff suppressed because it is too large
Load diff
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@ -12,10 +12,10 @@ Disassembly of section \.text:
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4: 0056 lsl r0,r0,0x2
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6: c0c3 mov r6,0x6
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8: 6063 mov r3,0x3
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a: ff1f fc0a add.l r63,r63,r6
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e: fd1f fc0a add.l r63,r63,r2
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a: ff1f fc0a add r63,r63,r6
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e: fd1f fc0a add r63,r63,r2
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12: dc0b e072 mov r62,0x7e0
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16: ff3f ff8a sub.l r63,r63,r62
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16: ff3f ff8a sub r63,r63,r62
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1a: 0300 beq 20 \<BRANCH1\>
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1c: 0023 mov r0,0x1
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1e: 0fe2 trap 0x3
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@ -78,15 +78,15 @@ Disassembly of section \.text:
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0000006e \<NEXT\>:
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6e: 8014 strb r4,\[r0\]
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70: e00c e000 ldrb r63,\[r0\]
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74: fe3f fc0a sub.l r63,r63,r4
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74: fe3f fc0a sub r63,r63,r4
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78: 0300 beq 7e \<STOREB\>
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7a: 0023 mov r0,0x1
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7c: 0fe2 trap 0x3
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0000007e \<STOREB\>:
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7e: a39c 0001 strb.l r5,\[r0,\+0xf\]
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82: e38c e001 ldrb.l r63,\[r0,\+0xf\]
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86: febf fc0a sub.l r63,r63,r5
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7e: a39c 0001 strb r5,\[r0,\+0xf\]
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82: e38c e001 ldrb r63,\[r0,\+0xf\]
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86: febf fc0a sub r63,r63,r5
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8a: 0300 beq 90 \<STORES\>
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8c: 0023 mov r0,0x1
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8e: 0fe2 trap 0x3
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@ -94,15 +94,15 @@ Disassembly of section \.text:
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00000090 \<STORES\>:
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90: 8034 strh r4,\[r0\]
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92: e02c e000 ldrh r63,\[r0\]
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96: fe3f fc0a sub.l r63,r63,r4
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96: fe3f fc0a sub r63,r63,r4
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9a: 0300 beq a0 \<STORES2\>
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9c: 0023 mov r0,0x1
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9e: 0fe2 trap 0x3
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000000a0 \<STORES2\>:
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a0: a33c 0001 strh.l r5,\[r0,\+0xe\]
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a4: e32c e001 ldrh.l r63,\[r0,\+0xe\]
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a8: febf fc0a sub.l r63,r63,r5
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a0: a33c 0001 strh r5,\[r0,\+0xe\]
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a4: e32c e001 ldrh r63,\[r0,\+0xe\]
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a8: febf fc0a sub r63,r63,r5
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ac: 0300 beq b2 \<STORE\>
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ae: 0023 mov r0,0x1
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b0: 0fe2 trap 0x3
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@ -110,39 +110,39 @@ Disassembly of section \.text:
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000000b2 \<STORE\>:
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b2: 8054 str r4,\[r0\]
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b4: e04c e000 ldr r63,\[r0\]
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b8: fe3f fc0a sub.l r63,r63,r4
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b8: fe3f fc0a sub r63,r63,r4
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bc: 0300 beq c2 \<STORE2\>
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be: 0023 mov r0,0x1
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c0: 0fe2 trap 0x3
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000000c2 \<STORE2\>:
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c2: a25c 0001 str.l r5,\[r0,\+0xc\]
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c6: e24c e001 ldr.l r63,\[r0,\+0xc\]
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ca: febf fc0a sub.l r63,r63,r5
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c2: a25c 0001 str r5,\[r0,\+0xc\]
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c6: e24c e001 ldr r63,\[r0,\+0xc\]
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ca: febf fc0a sub r63,r63,r5
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ce: 0300 beq d4 \<STOREBI\>
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d0: 0023 mov r0,0x1
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d2: 0fe2 trap 0x3
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000000d4 \<STOREBI\>:
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d4: 8211 strb r4,\[r0,r4\]
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d6: e209 e000 ldrb.l r63,\[r0,\+r4\]
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da: fe3f fc0a sub.l r63,r63,r4
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d6: e209 e000 ldrb r63,\[r0,\+r4\]
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da: fe3f fc0a sub r63,r63,r4
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de: 0300 beq e4 \<STORESI\>
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e0: 0023 mov r0,0x1
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e2: 0fe2 trap 0x3
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000000e4 \<STORESI\>:
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e4: a231 strh r5,\[r0,r4\]
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e6: e229 e000 ldrh.l r63,\[r0,\+r4\]
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ea: febf fc0a sub.l r63,r63,r5
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e6: e229 e000 ldrh r63,\[r0,\+r4\]
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ea: febf fc0a sub r63,r63,r5
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ee: 0300 beq f4 \<STOREI\>
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f0: 0023 mov r0,0x1
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f2: 0fe2 trap 0x3
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000000f4 \<STOREI\>:
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f4: c251 str r6,\[r0,r4\]
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f6: e249 e000 ldr.l r63,\[r0,\+r4\]
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fa: ff3f fc0a sub.l r63,r63,r6
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f6: e249 e000 ldr r63,\[r0,\+r4\]
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fa: ff3f fc0a sub r63,r63,r6
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fe: 0300 beq 104 \<PMB\>
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100: 0023 mov r0,0x1
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102: 0fe2 trap 0x3
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@ -150,9 +150,9 @@ Disassembly of section \.text:
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00000104 \<PMB\>:
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104: 8215 strb r4,\[r0\],r4
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106: 023b 0000 sub r0,r0,4
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10a: e20d e000 ldrb.l r63,\[r0\],\+r4
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10a: e20d e000 ldrb r63,\[r0\],\+r4
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10e: 023b 0000 sub r0,r0,4
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112: fe3f fc0a sub.l r63,r63,r4
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112: fe3f fc0a sub r63,r63,r4
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116: 0300 beq 11c \<PMS\>
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118: 0023 mov r0,0x1
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11a: 0fe2 trap 0x3
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@ -160,8 +160,8 @@ Disassembly of section \.text:
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0000011c \<PMS\>:
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11c: a235 strh r5,\[r0\],r4
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11e: 023b 0000 sub r0,r0,4
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122: e22d e000 ldrh.l r63,\[r0\],\+r4
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126: febf fc0a sub.l r63,r63,r5
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122: e22d e000 ldrh r63,\[r0\],\+r4
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126: febf fc0a sub r63,r63,r5
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12a: 0300 beq 130 \<PM\>
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12c: 0023 mov r0,0x1
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12e: 0fe2 trap 0x3
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@ -170,9 +170,9 @@ Disassembly of section \.text:
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130: 023b 0000 sub r0,r0,4
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134: c255 str r6,\[r0\],r4
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136: 023b 0000 sub r0,r0,4
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13a: e24d e000 ldr.l r63,\[r0\],\+r4
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13a: e24d e000 ldr r63,\[r0\],\+r4
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13e: 023b 0000 sub r0,r0,4
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142: ff3f fc0a sub.l r63,r63,r6
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142: ff3f fc0a sub r63,r63,r6
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146: 0300 beq 14c \<MOVLAB\>
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148: 0023 mov r0,0x1
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14a: 0fe2 trap 0x3
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@ -180,7 +180,7 @@ Disassembly of section \.text:
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0000014c \<MOVLAB\>:
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14c: ffeb e002 mov r63,0xff
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150: 3fe3 mov r1,0xff
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152: fcbf fc0a sub.l r63,r63,r1
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152: fcbf fc0a sub r63,r63,r1
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156: 0300 beq 15c \<ADDLAB\>
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158: 0023 mov r0,0x1
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15a: 0fe2 trap 0x3
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@ -200,28 +200,28 @@ Disassembly of section \.text:
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176: 0fe2 trap 0x3
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00000178 \<LSRLAB\>:
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178: f84f e006 lsr.l r63,r6,0x2
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178: f84f e006 lsr r63,r6,0x2
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17c: fcbb fc00 sub r63,r63,1
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180: 0300 beq 186 \<LSLLAB\>
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182: 0023 mov r0,0x1
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184: 0fe2 trap 0x3
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00000186 \<LSLLAB\>:
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186: ec5f e006 lsl.l r63,r3,0x2
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186: ec5f e006 lsl r63,r3,0x2
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18a: fe3b fc01 sub r63,r63,12
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18e: 0300 beq 194 \<LSRILAB\>
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190: 0023 mov r0,0x1
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192: 0fe2 trap 0x3
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00000194 \<LSRILAB\>:
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194: f94f e00a lsr.l r63,r6,r2
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194: f94f e00a lsr r63,r6,r2
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198: fcbb fc00 sub r63,r63,1
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19c: 0300 beq 1a2 \<LSLILAB\>
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19e: 0023 mov r0,0x1
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1a0: 0fe2 trap 0x3
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000001a2 \<LSLILAB\>:
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1a2: ed2f e00a lsl.l r63,r3,r2
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1a2: ed2f e00a lsl r63,r3,r2
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1a6: fe3b fc01 sub r63,r63,12
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1aa: 0300 beq 1b0 \<ORRLAB\>
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1ac: 0023 mov r0,0x1
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@ -249,21 +249,21 @@ Disassembly of section \.text:
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1d2: 0fe2 trap 0x3
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000001d4 \<ADD3LAB\>:
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1d4: e99f e00a add.l r63,r2,r3
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1d4: e99f e00a add r63,r2,r3
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1d8: febb fc00 sub r63,r63,5
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1dc: 0300 beq 1e2 \<SUB3LAB\>
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1de: 0023 mov r0,0x1
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1e0: 0fe2 trap 0x3
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000001e2 \<SUB3LAB\>:
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1e2: fa3f e00a sub.l r63,r6,r4
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1e2: fa3f e00a sub r63,r6,r4
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1e6: fd3b fc00 sub r63,r63,2
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1ea: 0300 beq 1f0 \<MOVRLAB\>
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1ec: 0023 mov r0,0x1
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1ee: 0fe2 trap 0x3
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000001f0 \<MOVRLAB\>:
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1f0: e8ef e002 mov.l r63,r2
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1f0: e8ef e002 mov r63,r2
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1f4: fd3b fc00 sub r63,r63,2
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1f8: 0b00 beq 20e \<NOPLAB\>
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1fa: 0023 mov r0,0x1
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@ -271,8 +271,8 @@ Disassembly of section \.text:
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000001fe \<MOVTFLAB\>:
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1fe: 0502 movts status,r0
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200: e51f e002 movfs.l r63,status
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204: fc3f fc0a sub.l r63,r63,r0
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200: e51f e002 movfs r63,status
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204: fc3f fc0a sub r63,r63,r0
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208: fb00 beq 1fe \<MOVTFLAB\>
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20a: 0023 mov r0,0x1
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20c: 0fe2 trap 0x3
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@ -60,128 +60,128 @@ Disassembly of section \.text:
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0000002a \<add\>:
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2a: 299a add r1,r2,r3
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2c: 051f 920a add.l r32,r33,r34
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2c: 051f 920a add r32,r33,r34
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30: 2993 add r1,r2,3
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32: 681b 2002 add fp,r2,16
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00000036 \<sub\>:
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36: 29ba sub r1,r2,r3
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38: 053f 920a sub.l r32,r33,r34
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38: 053f 920a sub r32,r33,r34
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3c: 29b3 sub r1,r2,3
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3e: 683b 2002 sub fp,r2,16
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00000042 \<asr\>:
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42: 29ea asr r1,r2,r3
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44: 056f 920a asr.l r32,r33,r34
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44: 056f 920a asr r32,r33,r34
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48: 286e asr r1,r2,0x3
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4a: 6a0f 200e asr.l fp,r2,0x10
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4a: 6a0f 200e asr fp,r2,0x10
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0000004e \<lsr\>:
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4e: 29ca lsr r1,r2,r3
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50: 054f 920a lsr.l r32,r33,r34
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50: 054f 920a lsr r32,r33,r34
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54: 2866 lsr r1,r2,0x3
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56: 6a0f 2006 lsr.l fp,r2,0x10
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56: 6a0f 2006 lsr fp,r2,0x10
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0000005a \<lsl\>:
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5a: 29aa lsl r1,r2,r3
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5c: 052f 920a lsl.l r32,r33,r34
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5c: 052f 920a lsl r32,r33,r34
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60: 2876 lsl r1,r2,0x3
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62: 6a1f 2006 lsl.l fp,r2,0x10
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62: 6a1f 2006 lsl fp,r2,0x10
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00000066 \<orr\>:
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66: 29fa orr r1,r2,r3
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68: 72ff 248a orr.l fp,r12,sp
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68: 72ff 248a orr fp,r12,sp
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0000006c \<and\>:
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6c: 29da and r1,r2,r3
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6e: 72df 248a and.l fp,r12,sp
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6e: 72df 248a and fp,r12,sp
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00000072 \<eor\>:
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72: 298a eor r1,r2,r3
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74: 728f 248a eor.l fp,r12,sp
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74: 728f 248a eor fp,r12,sp
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78: 0584 ldrb r0,\[r1,0x3\]
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7a: 478c 201f ldrb.l r10,\[r1,\+0xff\]
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7a: 478c 201f ldrb r10,\[r1,\+0xff\]
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7e: 0501 ldrb r0,\[r1,r2\]
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80: 0589 0080 ldrb.l r0,\[r1,\+fp\]
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80: 0589 0080 ldrb r0,\[r1,\+fp\]
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84: 0d05 ldrb r0,\[r3\],r2
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86: 528d 2480 ldrb.l r10,\[r12\],\+sp
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86: 528d 2480 ldrb r10,\[r12\],\+sp
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8a: 05a4 ldrh r0,\[r1,0x3\]
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8c: 47ac 201f ldrh.l r10,\[r1,\+0xff\]
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8c: 47ac 201f ldrh r10,\[r1,\+0xff\]
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90: 0521 ldrh r0,\[r1,r2\]
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92: 05a9 0080 ldrh.l r0,\[r1,\+fp\]
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92: 05a9 0080 ldrh r0,\[r1,\+fp\]
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96: 0d25 ldrh r0,\[r3\],r2
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98: 52ad 2480 ldrh.l r10,\[r12\],\+sp
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98: 52ad 2480 ldrh r10,\[r12\],\+sp
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9c: 05c4 ldr r0,\[r1,0x3\]
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9e: 47cc 201f ldr.l r10,\[r1,\+0xff\]
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9e: 47cc 201f ldr r10,\[r1,\+0xff\]
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a2: 0541 ldr r0,\[r1,r2\]
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a4: 05c9 0080 ldr.l r0,\[r1,\+fp\]
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a4: 05c9 0080 ldr r0,\[r1,\+fp\]
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a8: 0d45 ldr r0,\[r3\],r2
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aa: 52cd 2480 ldr.l r10,\[r12\],\+sp
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aa: 52cd 2480 ldr r10,\[r12\],\+sp
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ae: 05e4 ldrd r0,\[r1,0x3\]
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b0: 47ec 201f ldrd.l r10,\[r1,\+0xff\]
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b0: 47ec 201f ldrd r10,\[r1,\+0xff\]
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b4: 0561 ldrd r0,\[r1,r2\]
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b6: 05e9 0080 ldrd.l r0,\[r1,\+fp\]
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b6: 05e9 0080 ldrd r0,\[r1,\+fp\]
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ba: 0d65 ldrd r0,\[r3\],r2
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bc: 52ed 2480 ldrd.l r10,\[r12\],\+sp
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bc: 52ed 2480 ldrd r10,\[r12\],\+sp
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c0: 0594 strb r0,\[r1,0x3\]
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c2: 479c 201f strb.l r10,\[r1,\+0xff\]
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c2: 479c 201f strb r10,\[r1,\+0xff\]
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c6: 0511 strb r0,\[r1,r2\]
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c8: 0599 0080 strb.l r0,\[r1,\+fp\]
|
||||
c8: 0599 0080 strb r0,\[r1,\+fp\]
|
||||
cc: 0d15 strb r0,\[r3\],r2
|
||||
ce: 529d 2480 strb.l r10,\[r12\],\+sp
|
||||
ce: 529d 2480 strb r10,\[r12\],\+sp
|
||||
d2: 05b4 strh r0,\[r1,0x3\]
|
||||
d4: 47bc 201f strh.l r10,\[r1,\+0xff\]
|
||||
d4: 47bc 201f strh r10,\[r1,\+0xff\]
|
||||
d8: 0531 strh r0,\[r1,r2\]
|
||||
da: 05b9 0080 strh.l r0,\[r1,\+fp\]
|
||||
da: 05b9 0080 strh r0,\[r1,\+fp\]
|
||||
de: 0d35 strh r0,\[r3\],r2
|
||||
e0: 52bd 2480 strh.l r10,\[r12\],\+sp
|
||||
e0: 52bd 2480 strh r10,\[r12\],\+sp
|
||||
e4: 05d4 str r0,\[r1,0x3\]
|
||||
e6: 47dc 201f str.l r10,\[r1,\+0xff\]
|
||||
e6: 47dc 201f str r10,\[r1,\+0xff\]
|
||||
ea: 0551 str r0,\[r1,r2\]
|
||||
ec: 05d9 0080 str.l r0,\[r1,\+fp\]
|
||||
ec: 05d9 0080 str r0,\[r1,\+fp\]
|
||||
f0: 0d55 str r0,\[r3\],r2
|
||||
f2: 52dd 2480 str.l r10,\[r12\],\+sp
|
||||
f2: 52dd 2480 str r10,\[r12\],\+sp
|
||||
f6: 05f4 strd r0,\[r1,0x3\]
|
||||
f8: 47fc 201f strd.l r10,\[r1,\+0xff\]
|
||||
f8: 47fc 201f strd r10,\[r1,\+0xff\]
|
||||
fc: 0571 strd r0,\[r1,r2\]
|
||||
fe: 05f9 0080 strd.l r0,\[r1,\+fp\]
|
||||
fe: 05f9 0080 strd r0,\[r1,\+fp\]
|
||||
102: 0d75 strd r0,\[r3\],r2
|
||||
104: 52fd 2480 strd.l r10,\[r12\],\+sp
|
||||
104: 52fd 2480 strd r10,\[r12\],\+sp
|
||||
|
||||
00000108 \<mov\>:
|
||||
108: dfe3 mov r6,0xff
|
||||
10a: ffeb 6ff2 mov r31,0xffff
|
||||
10e: 004b 0102 mov r0,0x1002
|
||||
112: 2802 moveq r1,r2
|
||||
114: 700f 2402 moveq.l fp,r12
|
||||
114: 700f 2402 moveq fp,r12
|
||||
118: 2812 movne r1,r2
|
||||
11a: 701f 2402 movne.l fp,r12
|
||||
11a: 701f 2402 movne fp,r12
|
||||
11e: 2822 movgtu r1,r2
|
||||
120: 702f 2402 movgtu.l fp,r12
|
||||
120: 702f 2402 movgtu fp,r12
|
||||
124: 2832 movgteu r1,r2
|
||||
126: 703f 2402 movgteu.l fp,r12
|
||||
126: 703f 2402 movgteu fp,r12
|
||||
12a: 2842 movlteu r1,r2
|
||||
12c: 704f 2402 movlteu.l fp,r12
|
||||
12c: 704f 2402 movlteu fp,r12
|
||||
130: 2852 movltu r1,r2
|
||||
132: 705f 2402 movltu.l fp,r12
|
||||
132: 705f 2402 movltu fp,r12
|
||||
136: 2862 movgt r1,r2
|
||||
138: 706f 2402 movgt.l fp,r12
|
||||
138: 706f 2402 movgt fp,r12
|
||||
13c: 2872 movgte r1,r2
|
||||
13e: 707f 2402 movgte.l fp,r12
|
||||
13e: 707f 2402 movgte fp,r12
|
||||
142: 2882 movlt r1,r2
|
||||
144: 708f 2402 movlt.l fp,r12
|
||||
144: 708f 2402 movlt fp,r12
|
||||
148: 2892 movlte r1,r2
|
||||
14a: 709f 2402 movlte.l fp,r12
|
||||
14a: 709f 2402 movlte fp,r12
|
||||
14e: 28a2 movbeq r1,r2
|
||||
150: 70af 2402 movbeq.l fp,r12
|
||||
150: 70af 2402 movbeq fp,r12
|
||||
154: 28b2 movbne r1,r2
|
||||
156: 70bf 2402 movbne.l fp,r12
|
||||
156: 70bf 2402 movbne fp,r12
|
||||
15a: 28c2 movblt r1,r2
|
||||
15c: 70cf 2402 movblt.l fp,r12
|
||||
15c: 70cf 2402 movblt fp,r12
|
||||
160: 28d2 movblte r1,r2
|
||||
162: 70df 2402 movblte.l fp,r12
|
||||
162: 70df 2402 movblte fp,r12
|
||||
166: 28e2 mov r1,r2
|
||||
168: 70ef 2402 mov.l fp,r12
|
||||
168: 70ef 2402 mov fp,r12
|
||||
|
||||
0000016c \<nop\>:
|
||||
16c: 01a2 nop
|
||||
|
|
@ -194,27 +194,27 @@ Disassembly of section \.text:
|
|||
|
||||
00000172 \<fadd\>:
|
||||
172: 2987 fadd r1,r2,r3
|
||||
174: 728f 2487 fadd.l fp,r12,sp
|
||||
174: 728f 2487 fadd fp,r12,sp
|
||||
|
||||
00000178 \<fsub\>:
|
||||
178: 2997 fsub r1,r2,r3
|
||||
17a: 729f 2487 fsub.l fp,r12,sp
|
||||
17a: 729f 2487 fsub fp,r12,sp
|
||||
|
||||
0000017e \<fmul\>:
|
||||
17e: 29a7 fmul r1,r2,r3
|
||||
180: 72af 2487 fmul.l fp,r12,sp
|
||||
180: 72af 2487 fmul fp,r12,sp
|
||||
|
||||
00000184 \<fmadd\>:
|
||||
184: 29b7 fmadd r1,r2,r3
|
||||
186: 72bf 2487 fmadd.l fp,r12,sp
|
||||
186: 72bf 2487 fmadd fp,r12,sp
|
||||
|
||||
0000018a \<fmsub\>:
|
||||
18a: 29c7 fmsub r1,r2,r3
|
||||
18c: 72cf 2487 fmsub.l fp,r12,sp
|
||||
18c: 72cf 2487 fmsub fp,r12,sp
|
||||
190: 2102 movts config,r1
|
||||
192: e50f 6002 movts.l status,r31
|
||||
196: 251f 0402 movfs.l r1,imask
|
||||
19a: e91f 6002 movfs.l r31,pc
|
||||
192: e50f 6002 movts status,r31
|
||||
196: 251f 0402 movfs r1,imask
|
||||
19a: e91f 6002 movfs r31,pc
|
||||
|
||||
0000019e \<trap\>:
|
||||
19e: 03e2 trap 0x0
|
||||
|
|
|
|||
Loading…
Reference in a new issue