2008-05-14 06:45:42 +00:00
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2008-05-14 Alan Modra <amodra@bigpond.net.au>
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* Makefile.am: Run "make dep-am".
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* Makefile.in: Regenerate.
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gas/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention XSAVE, EPT and MOVBE.
* config/tc-i386.c (cpu_arch): Add .movbe and .ept.
(md_show_usage): Add .movbe and .ept.
* doc/c-i386.texi: Add movbe and ept to -march=. Document
.movbe and .ept.
gas/testsuite/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel,
x86-64-inval-movbe. x86-64-ept, x86-64-ept-intel and
x86-64-inval-ept.
* gas/i386/arch-10.s: Add movbe and invept.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/ept.d: New file
* gas/i386/ept-intel.d: Likewise.
* gas/i386/ept.s: Likewise.
* gas/i386/inval-ept.l: Likewise.
* gas/i386/inval-ept.s: Likewise.
* gas/i386/inval-movbe.l: Likewise.
* gas/i386/inval-movbe.s: Likewise.
* gas/i386/movbe.d: Likewise.
* gas/i386/movbe-intel.d: Likewise.
* gas/i386/movbe.s: Likewise.
* gas/i386/x86-64-inval-ept.l: Likewise.
* gas/i386/x86-64-inval-ept.s: Likewise.
* gas/i386/x86-64-inval-movbe.l: Likewise.
* gas/i386/x86-64-inval-movbe.s: Likewise.
* gas/i386/x86-64-ept.d: Likewise.
* gas/i386/x86-64-ept-intel.d: Likewise.
* gas/i386/x86-64-ept.s: Likewise.
* gas/i386/x86-64-movbe.d: Likewise.
* gas/i386/x86-64-movbe-intel.d: Likewise.
* gas/i386/x86-64-movbe.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (MOVBE_Fixup): New.
(Mo): Likewise.
(PREFIX_0F3880): Likewise.
(PREFIX_0F3881): Likewise.
(PREFIX_0F38F0): Updated.
(prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
(three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
* i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
CPU_EPT_FLAGS.
(cpu_flags): Add CpuMovbe and CpuEPT.
* i386-opc.h (CpuMovbe): New.
(CpuEPT): Likewise.
(CpuLM): Updated.
(i386_cpu_flags): Add cpumovbe and cpuept.
* i386-opc.tbl: Add entries for movbe and EPT instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-05-02 16:53:40 +00:00
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2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (MOVBE_Fixup): New.
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(Mo): Likewise.
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(PREFIX_0F3880): Likewise.
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(PREFIX_0F3881): Likewise.
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(PREFIX_0F38F0): Updated.
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(prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
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PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
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(three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
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* i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
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CPU_EPT_FLAGS.
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(cpu_flags): Add CpuMovbe and CpuEPT.
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* i386-opc.h (CpuMovbe): New.
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(CpuEPT): Likewise.
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(CpuLM): Updated.
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(i386_cpu_flags): Add cpumovbe and cpuept.
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* i386-opc.tbl: Add entries for movbe and EPT instructions.
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* i386-init.h: Regenerated.
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* i386-tbl.h: Likewise.
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2008-04-29 23:27:01 +00:00
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2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
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* mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
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the two drem and the two dremu macros.
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2008-04-28 17:03:58 +00:00
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2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
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* mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
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instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
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cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
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INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
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2008-04-25 19:58:03 +00:00
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2008-04-25 David S. Miller <davem@davemloft.net>
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* sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
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instead of %sys_tick_cmpr, as suggested in architecture manuals.
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2008-04-23 16:11:47 +00:00
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2008-04-23 Paolo Bonzini <bonzini@gnu.org>
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* aclocal.m4: Regenerate.
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* configure: Regenerate.
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2008-04-23 07:49:33 +00:00
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2008-04-23 David S. Miller <davem@davemloft.net>
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* sparc-opc.c (asi_table): Add UltraSPARC and Niagara
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extended values.
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(prefetch_table): Add missing values.
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2008-04-22 22:27:13 +00:00
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2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (opcode_modifiers): Add NoAVX.
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* i386-opc.h (NoAVX): New.
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(OldGcc): Updated.
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(i386_opcode_modifier): Add noavx.
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* i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
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instructions which don't have AVX equivalent.
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* i386-tbl.h: Regenerated.
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2008-04-18 13:10:32 +00:00
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2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (OP_VEX_FMA): New.
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(OP_EX_VexImmW): Likewise.
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(VexFMA): Likewise.
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(Vex128FMA): Likewise.
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(EXVexImmW): Likewise.
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(get_vex_imm8): Likewise.
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(OP_EX_VexReg): Likewise.
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(vex_i4_done): Renamed to ...
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(vex_w_done): This.
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(prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
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and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
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FMA instructions.
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(print_insn): Updated.
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(OP_EX_VexW): Rewrite to swap register in VEX with EX.
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(OP_REG_VexI4): Check invalid high registers.
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2008-04-16 15:31:33 +00:00
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2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
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Michael Meissner <michael.meissner@amd.com>
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* i386-opc.tbl: Fix protX to allow memory in the middle operand.
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* i386-tbl.h: Regenerate from i386-opc.tbl.
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2008-05-14 06:45:42 +00:00
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2008-04-14 11:01:38 +00:00
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2008-04-14 Edmar Wienskoski <edmar@freescale.com>
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* ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
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accept Power E500MC instructions.
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(print_ppc_disassembler_options): Document -Me500mc.
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* ppc-opc.c (DUIS, DUI, T): New.
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(XRT, XRTRA): Likewise.
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(E500MC): Likewise.
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(powerpc_opcodes): Add new Power E500MC instructions.
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2008-04-10 13:36:43 +00:00
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2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
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* s390-dis.c (init_disasm): Evaluate disassembler_options.
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(print_s390_disassembler_options): New function.
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* disassemble.c (disassembler_usage): Invoke
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print_s390_disassembler_options.
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2008-04-10 13:05:07 +00:00
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2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
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* s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
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of local variables used for mnemonic parsing: prefix, suffix and
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number.
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2008-04-10 08:59:46 +00:00
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2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
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* s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
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extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
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(s390_crb_extensions): New extensions table.
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(insertExpandedMnemonic): Handle '$' tag.
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* s390-opc.txt: Remove conditional jump variants which can now
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be expanded automatically.
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Replace '*' tag with '$' in the compare and branch instructions.
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2008-04-07 21:29:50 +00:00
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2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (PREFIX_VEX_38XX): Add a tab.
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(PREFIX_VEX_3AXX): Likewis.
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2008-04-07 17:35:12 +00:00
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2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
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* i386-opc.tbl: Remove 4 extra blank lines.
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2008-04-04 16:34:23 +00:00
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2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
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with CPU_PCLMUL_FLAGS/CpuPCLMUL.
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(cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
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* i386-opc.tbl: Likewise.
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* i386-opc.h (CpuCLMUL): Renamed to ...
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(CpuPCLMUL): This.
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(CpuFMA): Updated.
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(i386_cpu_flags): Replace cpuclmul with cpupclmul.
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* i386-init.h: Regenerated.
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binutils/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 14:03:21 +00:00
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2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (OP_E_register): New.
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(OP_E_memory): Likewise.
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(OP_VEX): Likewise.
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(OP_EX_Vex): Likewise.
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(OP_EX_VexW): Likewise.
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(OP_XMM_Vex): Likewise.
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(OP_XMM_VexW): Likewise.
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(OP_REG_VexI4): Likewise.
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(PCLMUL_Fixup): Likewise.
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(VEXI4_Fixup): Likewise.
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(VZERO_Fixup): Likewise.
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(VCMP_Fixup): Likewise.
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(VPERMIL2_Fixup): Likewise.
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(rex_original): Likewise.
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(rex_ignored): Likewise.
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(Mxmm): Likewise.
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(XMM): Likewise.
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(EXxmm): Likewise.
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(EXxmmq): Likewise.
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(EXymmq): Likewise.
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(Vex): Likewise.
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(Vex128): Likewise.
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(Vex256): Likewise.
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(VexI4): Likewise.
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(EXdVex): Likewise.
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(EXqVex): Likewise.
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(EXVexW): Likewise.
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(EXdVexW): Likewise.
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(EXqVexW): Likewise.
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(XMVex): Likewise.
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(XMVexW): Likewise.
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(XMVexI4): Likewise.
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(PCLMUL): Likewise.
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(VZERO): Likewise.
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(VCMP): Likewise.
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(VPERMIL2): Likewise.
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(xmm_mode): Likewise.
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(xmmq_mode): Likewise.
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(ymmq_mode): Likewise.
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(vex_mode): Likewise.
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(vex128_mode): Likewise.
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(vex256_mode): Likewise.
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(USE_VEX_C4_TABLE): Likewise.
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(USE_VEX_C5_TABLE): Likewise.
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(USE_VEX_LEN_TABLE): Likewise.
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(VEX_C4_TABLE): Likewise.
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(VEX_C5_TABLE): Likewise.
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(VEX_LEN_TABLE): Likewise.
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(REG_VEX_XX): Likewise.
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(MOD_VEX_XXX): Likewise.
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(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
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(PREFIX_0F3A44): Likewise.
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(PREFIX_0F3ADF): Likewise.
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(PREFIX_VEX_XXX): Likewise.
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(VEX_OF): Likewise.
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(VEX_OF38): Likewise.
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(VEX_OF3A): Likewise.
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(VEX_LEN_XXX): Likewise.
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(vex): Likewise.
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(need_vex): Likewise.
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(need_vex_reg): Likewise.
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(vex_i4_done): Likewise.
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(vex_table): Likewise.
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(vex_len_table): Likewise.
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(OP_REG_VexI4): Likewise.
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(vex_cmp_op): Likewise.
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(pclmul_op): Likewise.
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(vpermil2_op): Likewise.
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(m_mode): Updated.
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(es_reg): Likewise.
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(PREFIX_0F38F0): Likewise.
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(PREFIX_0F3A60): Likewise.
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(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
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(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
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and PREFIX_VEX_XXX entries.
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(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
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(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
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PREFIX_0F3ADF.
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(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
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Add MOD_VEX_XXX entries.
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(ckprefix): Initialize rex_original and rex_ignored. Store the
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REX byte in rex_original.
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(get_valid_dis386): Handle the implicit prefix in VEX prefix
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bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
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(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
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calling get_valid_dis386. Use rex_original and rex_ignored when
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printing out REX.
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(putop): Handle "XY".
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(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
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ymmq_mode.
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(OP_E_extended): Updated to use OP_E_register and
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OP_E_memory.
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(OP_XMM): Handle VEX.
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(OP_EX): Likewise.
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(XMM_Fixup): Likewise.
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(CMP_Fixup): Use ARRAY_SIZE.
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* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
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CPU_FMA_FLAGS and CPU_AVX_FLAGS.
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(operand_type_init): Add OPERAND_TYPE_REGYMM and
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OPERAND_TYPE_VEX_IMM4.
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(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
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(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
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VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
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VexImmExt and SSE2AVX.
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(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
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* i386-opc.h (CpuAVX): New.
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(CpuAES): Likewise.
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(CpuCLMUL): Likewise.
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(CpuFMA): Likewise.
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(Vex): Likewise.
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(Vex256): Likewise.
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(VexNDS): Likewise.
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(VexNDD): Likewise.
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(VexW0): Likewise.
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(VexW1): Likewise.
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(Vex0F): Likewise.
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(Vex0F38): Likewise.
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(Vex0F3A): Likewise.
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(Vex3Sources): Likewise.
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(VexImmExt): Likewise.
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(SSE2AVX): Likewise.
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(RegYMM): Likewise.
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(Ymmword): Likewise.
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(Vex_Imm4): Likewise.
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(Implicit1stXmm0): Likewise.
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(CpuXsave): Updated.
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(CpuLM): Likewise.
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(ByteOkIntel): Likewise.
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(OldGcc): Likewise.
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(Control): Likewise.
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(Unspecified): Likewise.
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(OTMax): Likewise.
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(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
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(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
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vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
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vex3sources, veximmext and sse2avx.
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(i386_operand_type): Add regymm, ymmword and vex_imm4.
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* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
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* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
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* i386-init.h: Regenerated.
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* i386-tbl.h: Likewise.
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opcodes:
From Robin Getz <robin.getz@analog.com>
* bfin-dis.c (bu32): Typedef.
(enum const_forms_t): Add c_uimm32 and c_huimm32.
(constant_formats[]): Add uimm32 and huimm16.
(fmtconst_val): New.
(uimm32): Define.
(huimm32): Define.
(imm16_val): Define.
(luimm16_val): Define.
(struct saved_state): Define.
(GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
(get_allreg): New.
(decode_LDIMMhalf_0): Print out the whole register value.
gas/testsuite:
From Jie Zhang <jie.zhang@analog.com>
* gas/bfin/load.d: Update.
2008-03-26 14:50:52 +00:00
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2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
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From Robin Getz <robin.getz@analog.com>
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* bfin-dis.c (bu32): Typedef.
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(enum const_forms_t): Add c_uimm32 and c_huimm32.
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(constant_formats[]): Add uimm32 and huimm16.
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(fmtconst_val): New.
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(uimm32): Define.
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(huimm32): Define.
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(imm16_val): Define.
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(luimm16_val): Define.
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(struct saved_state): Define.
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(GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
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A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
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LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
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(get_allreg): New.
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(decode_LDIMMhalf_0): Print out the whole register value.
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2008-03-26 16:21:10 +00:00
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From Jie Zhang <jie.zhang@analog.com>
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* bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
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multiply and multiply-accumulate to data register instruction.
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gas/testsuite/:
From Robin Getz <rgetz@blackfin.uclinux.org>
* gas/bfin/arithmetic.d: Update to reflect spaces/capitalization in
recent changes in opcodes/bfin-dis.c.
gas/bfin/arithmetic.s: Likewise.
gas/bfin/bit.d: Likewise.
gas/bfin/bit2.d: Likewise.
gas/bfin/control_code.d: Likewise.
gas/bfin/control_code2.d: Likewise.
gas/bfin/event.d: Likewise.
gas/bfin/event2.d: Likewise.
gas/bfin/flow.d: Likewise.
gas/bfin/flow2.d: Likewise.
gas/bfin/load.d: Likewise.
gas/bfin/logical.d: Likewise.
gas/bfin/logical2.d: Likewise.
gas/bfin/move.d: Likewise.
gas/bfin/move2.d: Likewise.
gas/bfin/parallel.d: Likewise.
gas/bfin/parallel2.d: Likewise.
gas/bfin/parallel3.d: Likewise.
gas/bfin/parallel4.d: Likewise.
gas/bfin/shift.d: Likewise.
gas/bfin/shift2.d: Likewise.
gas/bfin/stack.d: Likewise.
gas/bfin/stack2.d: Likewise.
gas/bfin/store.d: Likewise.
gas/bfin/vector.d: Likewise.
gas/bfin/vector2.d: Likewise.
gas/bfin/video.d: Likewise.
gas/bfin/video2.d: Likewise.
opcodes/:
* bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
c_imm32, c_huimm32e): Define.
(constant_formats): Add flags for printing decimal, leading spaces, and
exact symbols.
(comment, parallel): Add global flags in all disassembly.
(fmtconst): Take advantage of new flags, and print default in hex.
(fmtconst_val): Likewise.
(decode_macfunc): Be consistant with spaces, tabs, comments,
capitalization in disassembly, fix minor coding style issues.
(reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
(decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
_print_insn_bfin, print_insn_bfin): Likewise.
2008-03-26 16:48:32 +00:00
|
|
|
|
* bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
|
|
|
|
|
|
c_imm32, c_huimm32e): Define.
|
|
|
|
|
|
(constant_formats): Add flags for printing decimal, leading spaces, and
|
|
|
|
|
|
exact symbols.
|
|
|
|
|
|
(comment, parallel): Add global flags in all disassembly.
|
|
|
|
|
|
(fmtconst): Take advantage of new flags, and print default in hex.
|
|
|
|
|
|
(fmtconst_val): Likewise.
|
|
|
|
|
|
(decode_macfunc): Be consistant with spaces, tabs, comments,
|
|
|
|
|
|
capitalization in disassembly, fix minor coding style issues.
|
|
|
|
|
|
(reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
|
|
|
|
|
|
(decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
|
|
|
|
|
|
decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
|
|
|
|
|
|
decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
|
|
|
|
|
|
decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
|
|
|
|
|
|
decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
|
|
|
|
|
|
decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
|
|
|
|
|
|
decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
|
|
|
|
|
|
decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
|
|
|
|
|
|
decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
|
|
|
|
|
|
_print_insn_bfin, print_insn_bfin): Likewise.
|
|
|
|
|
|
|
2008-03-17 22:17:33 +00:00
|
|
|
|
2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
|
|
|
|
|
|
|
|
|
|
|
|
* aclocal.m4: Regenerate.
|
|
|
|
|
|
* configure: Likewise.
|
|
|
|
|
|
* Makefile.in: Likewise.
|
|
|
|
|
|
|
2008-03-13 02:05:23 +00:00
|
|
|
|
2008-03-13 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Run "make dep-am".
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2008-03-06 23:00:34 +00:00
|
|
|
|
2008-03-07 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-opc.c (powerpc_opcodes): Order and format.
|
|
|
|
|
|
|
2008-03-01 23:30:51 +00:00
|
|
|
|
2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2008-02-23 17:29:17 +00:00
|
|
|
|
2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Disallow 16-bit near indirect branches for
|
|
|
|
|
|
x86-64.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2008-02-21 16:18:04 +00:00
|
|
|
|
2008-02-21 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
|
|
|
|
|
|
and Fword for far indirect jmp. Allow Reg16 and Word for near
|
|
|
|
|
|
indirect jmp on x86-64. Disallow Fword for lcall.
|
|
|
|
|
|
* i386-tbl.h: Re-generate.
|
|
|
|
|
|
|
2008-02-18 13:46:45 +00:00
|
|
|
|
2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cr16-opc.c (cr16_num_optab): Defined
|
|
|
|
|
|
|
2008-02-16 16:16:48 +00:00
|
|
|
|
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
|
2008-02-14 12:33:17 +00:00
|
|
|
|
2008-02-14 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/5524
|
|
|
|
|
|
* configure.in (SHARED_LIBADD): Select the correct host specific
|
|
|
|
|
|
file extension for shared libraries.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2008-02-13 13:41:26 +00:00
|
|
|
|
2008-02-13 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (RegFlat): New.
|
|
|
|
|
|
* i386-reg.tbl (flat): Add.
|
|
|
|
|
|
* i386-tbl.h: Re-generate.
|
|
|
|
|
|
|
2008-02-13 13:29:31 +00:00
|
|
|
|
2008-02-13 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (a_mode): New.
|
|
|
|
|
|
(cond_jump_mode): Adjust.
|
|
|
|
|
|
(Ma): Change to a_mode.
|
|
|
|
|
|
(intel_operand_size): Handle a_mode.
|
|
|
|
|
|
* i386-opc.tbl: Allow Dword and Qword for bound.
|
|
|
|
|
|
* i386-tbl.h: Re-generate.
|
|
|
|
|
|
|
2008-02-13 10:14:40 +00:00
|
|
|
|
2008-02-13 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (process_i386_registers): Process new fields.
|
|
|
|
|
|
* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
|
|
|
|
|
|
unsigned char. Add dw2_regnum and Dw2Inval.
|
|
|
|
|
|
* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
|
|
|
|
|
|
register names.
|
|
|
|
|
|
* i386-tbl.h: Re-generate.
|
|
|
|
|
|
|
2008-02-12 05:35:36 +00:00
|
|
|
|
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
2008-02-12 17:22:02 +00:00
|
|
|
|
* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
|
2008-02-12 05:35:36 +00:00
|
|
|
|
* i386-init.h: Updated.
|
|
|
|
|
|
|
2008-02-12 00:04:45 +00:00
|
|
|
|
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (cpu_flags): Add CpuXsave.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (CpuXsave): New.
|
2008-02-12 17:22:02 +00:00
|
|
|
|
(CpuLM): Updated.
|
2008-02-12 00:04:45 +00:00
|
|
|
|
(i386_cpu_flags): Add cpuxsave.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (MOD_0FAE_REG_4): New.
|
|
|
|
|
|
(RM_0F01_REG_2): Likewise.
|
|
|
|
|
|
(MOD_0FAE_REG_5): Updated.
|
|
|
|
|
|
(RM_0F01_REG_3): Likewise.
|
|
|
|
|
|
(reg_table): Use MOD_0FAE_REG_4.
|
|
|
|
|
|
(mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
|
|
|
|
|
|
for xrstor.
|
|
|
|
|
|
(rm_table): Add RM_0F01_REG_2.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Likewise.
|
|
|
|
|
|
|
2008-02-11 15:11:06 +00:00
|
|
|
|
2008-02-11 Jan Beulich <jbeulich@novell.com>
|
2008-02-11 22:56:13 +00:00
|
|
|
|
|
2008-02-11 15:11:06 +00:00
|
|
|
|
* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
|
|
|
|
|
|
Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
|
|
|
|
|
|
* i386-tbl.h: Re-generate.
|
|
|
|
|
|
|
2008-02-04 19:43:51 +00:00
|
|
|
|
2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 5715
|
|
|
|
|
|
* configure: Regenerated.
|
|
|
|
|
|
|
2008-02-04 19:26:11 +00:00
|
|
|
|
2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-dis.c: Update copyright.
|
|
|
|
|
|
(mips_arch_choices): Add Octeon.
|
|
|
|
|
|
* mips-opc.c: Update copyright.
|
|
|
|
|
|
(IOCT): New macro.
|
|
|
|
|
|
(mips_builtin_opcodes): Add Octeon instruction synciobdma.
|
|
|
|
|
|
|
2008-01-29 08:24:43 +00:00
|
|
|
|
2008-01-29 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-opc.c: Support optional L form mtmsr.
|
|
|
|
|
|
|
2008-01-24 15:11:35 +00:00
|
|
|
|
2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (OP_E_extended): Handle r12 like rsp.
|
|
|
|
|
|
|
2008-01-23 19:05:12 +00:00
|
|
|
|
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
|
2008-01-23 08:53:44 +00:00
|
|
|
|
2008-01-23 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
|
|
|
|
|
|
ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
|
|
|
|
|
|
|
2008-01-22 19:57:30 +00:00
|
|
|
|
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
|
|
|
|
|
|
(cpu_flags): Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (CpuMMX2): Removed.
|
|
|
|
|
|
(CpuSSE): Updated.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Likewise.
|
|
|
|
|
|
|
2008-01-22 19:16:45 +00:00
|
|
|
|
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
|
|
|
|
|
|
CPU_SMX_FLAGS.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
|
2008-01-16 00:05:56 +00:00
|
|
|
|
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Use Qword on movddup.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2008-01-15 18:50:44 +00:00
|
|
|
|
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2008-01-15 17:20:50 +00:00
|
|
|
|
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (Mx): New.
|
|
|
|
|
|
(PREFIX_0FC3): Likewise.
|
|
|
|
|
|
(PREFIX_0FC7_REG_6): Updated.
|
|
|
|
|
|
(dis386_twobyte): Use PREFIX_0FC3.
|
|
|
|
|
|
(prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
|
|
|
|
|
|
Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
|
|
|
|
|
|
movntss.
|
|
|
|
|
|
|
2008-01-15 01:37:56 +00:00
|
|
|
|
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (opcode_modifiers): Add IntelSyntax.
|
|
|
|
|
|
(operand_types): Add Mem.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (IntelSyntax): New.
|
|
|
|
|
|
* i386-opc.h (Mem): New.
|
|
|
|
|
|
(Byte): Updated.
|
|
|
|
|
|
(Opcode_Modifier_Max): Updated.
|
|
|
|
|
|
(i386_opcode_modifier): Add intelsyntax.
|
|
|
|
|
|
(i386_operand_type): Add mem.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
|
|
|
|
|
|
instructions.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-reg.tbl: Add size for accumulator.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Likewise.
|
|
|
|
|
|
|
2008-01-14 05:15:06 +00:00
|
|
|
|
2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (Byte): Fix a typo.
|
|
|
|
|
|
|
gas/testsuite/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/i386.s: Add tests for fnstsw and fstsw.
* gas/i386/inval.s: Likewise.
* gas/i386/x86_64.s: Likewise.
* gas/i386/intel.s: Use word instead of dword on ss.
* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
and out.
* gas/i386/prefix.s: Remove invalid fstsw.
* gas/i386/inval.l: Updated.
* gas/i386/intelbad.l: Likewise.
* gas/i386/i386.d: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/prefix.d: Updated.
gas/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (_i386_insn): Update comment.
(operand_type_match): Also clear unspecified.
(operand_type_register_match): Likewise.
(parse_operands): Initialize unspecified.
(i386_intel_operand): Likewise.
(match_template): Check memory and accumulator operand size.
(i386_att_operand): Clear unspecified on register operand.
(intel_e11): Likewise.
(intel_e09): Set operand size and clean unspecified for
"XXX PTR".
opcodes/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (operand_type_init): Add Dword to
OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
Qword and Xmmword.
(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
Xmmword, Unspecified and Anysize.
(set_bitfield): Make Mmword an alias of Qword. Make Oword
an alias of Xmmword.
* i386-opc.h (CheckSize): Removed.
(Byte): Updated.
(Word): Likewise.
(Dword): Likewise.
(Qword): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(OTMax): Likewise.
(i386_opcode_modifier): Remove checksize, byte, word, dword,
qword and xmmword.
(Fword): New.
(TBYTE): Likewise.
(Unspecified): Likewise.
(Anysize): Likewise.
(i386_operand_type): Add byte, word, dword, fword, qword,
tbyte xmmword, unspecified and anysize.
* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
Tbyte, Xmmword, Unspecified and Anysize.
* i386-reg.tbl: Add size for accumulator.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-12 16:05:42 +00:00
|
|
|
|
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/5534
|
|
|
|
|
|
* i386-gen.c (operand_type_init): Add Dword to
|
|
|
|
|
|
OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
|
|
|
|
|
|
(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
|
|
|
|
|
|
Qword and Xmmword.
|
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|
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|
|
(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
|
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|
Xmmword, Unspecified and Anysize.
|
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|
(set_bitfield): Make Mmword an alias of Qword. Make Oword
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|
an alias of Xmmword.
|
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|
|
* i386-opc.h (CheckSize): Removed.
|
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|
(Byte): Updated.
|
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|
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|
|
(Word): Likewise.
|
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|
|
|
(Dword): Likewise.
|
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|
(Qword): Likewise.
|
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|
|
(Xmmword): Likewise.
|
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|
|
|
(FWait): Updated.
|
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|
|
|
(OTMax): Likewise.
|
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|
|
|
|
(i386_opcode_modifier): Remove checksize, byte, word, dword,
|
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|
|
qword and xmmword.
|
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|
(Fword): New.
|
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|
(TBYTE): Likewise.
|
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|
(Unspecified): Likewise.
|
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|
(Anysize): Likewise.
|
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|
|
|
|
(i386_operand_type): Add byte, word, dword, fword, qword,
|
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|
|
|
|
tbyte xmmword, unspecified and anysize.
|
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|
|
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|
* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
|
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|
|
Tbyte, Xmmword, Unspecified and Anysize.
|
|
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|
* i386-reg.tbl: Add size for accumulator.
|
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|
|
* i386-init.h: Regenerated.
|
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|
|
* i386-tbl.h: Likewise.
|
|
|
|
|
|
|
2008-01-10 14:52:35 +00:00
|
|
|
|
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
|
|
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|
|
|
|
|
* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
|
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|
|
(REG_0F18): Updated.
|
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|
|
|
|
(reg_table): Updated.
|
|
|
|
|
|
(dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
|
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|
|
|
(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
|
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|
|
2008-01-09 01:24:07 +00:00
|
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|
2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
|
|
* i386-gen.c (set_bitfield): Use fail () on error.
|
|
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|
|
2008-01-08 21:24:16 +00:00
|
|
|
|
2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (lineno): New.
|
|
|
|
|
|
(filename): Likewise.
|
|
|
|
|
|
(set_bitfield): Report filename and line numer on error.
|
|
|
|
|
|
(process_i386_opcodes): Set filename and update lineno.
|
|
|
|
|
|
(process_i386_registers): Likewise.
|
|
|
|
|
|
|
gas/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
only.
(md_assemble): Remove Intel mode workaround.
(match_template): Check support for old gcc, AT&T mnemonic
and Intel Syntax.
(md_parse_option): Don't set intel_mnemonic to 0 for
OPTION_MOLD_GCC.
gas/testsuite/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.
* gas/i386/intel.d: Updated.
* gas/i386/intel.e: Likewise.
opcodes/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
ATTSyntax.
* i386-opc.h (IntelMnemonic): Renamed to ..
(ATTSyntax): This
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
and intelsyntax.
* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
* i386-tbl.h: Regenerated.
2008-01-05 17:07:25 +00:00
|
|
|
|
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
|
|
|
|
|
|
ATTSyntax.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (IntelMnemonic): Renamed to ..
|
|
|
|
|
|
(ATTSyntax): This
|
|
|
|
|
|
(Opcode_Modifier_Max): Updated.
|
|
|
|
|
|
(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
|
|
|
|
|
|
and intelsyntax.
|
|
|
|
|
|
|
2008-05-14 06:45:42 +00:00
|
|
|
|
* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
|
gas/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
only.
(md_assemble): Remove Intel mode workaround.
(match_template): Check support for old gcc, AT&T mnemonic
and Intel Syntax.
(md_parse_option): Don't set intel_mnemonic to 0 for
OPTION_MOLD_GCC.
gas/testsuite/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.
* gas/i386/intel.d: Updated.
* gas/i386/intel.e: Likewise.
opcodes/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
ATTSyntax.
* i386-opc.h (IntelMnemonic): Renamed to ..
(ATTSyntax): This
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
and intelsyntax.
* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
* i386-tbl.h: Regenerated.
2008-01-05 17:07:25 +00:00
|
|
|
|
on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2008-01-04 18:10:08 +00:00
|
|
|
|
2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c: Update copyright to 2008.
|
|
|
|
|
|
* i386-opc.h: Likewise.
|
|
|
|
|
|
* i386-opc.tbl: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Likewise.
|
|
|
|
|
|
|
2008-01-04 18:03:02 +00:00
|
|
|
|
2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
|
|
|
|
|
|
pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2008-01-04 01:05:45 +00:00
|
|
|
|
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
|
|
|
|
|
|
CpuSSE4_2_Or_ABM.
|
|
|
|
|
|
(cpu_flags): Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (CpuSSE4_1_Or_5): Removed.
|
|
|
|
|
|
(CpuSSE4_2_Or_ABM): Likewise.
|
|
|
|
|
|
(CpuLM): Updated.
|
|
|
|
|
|
(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
|
|
|
|
|
|
Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
|
|
|
|
|
|
and CpuPadLock, respectively.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Likewise.
|
|
|
|
|
|
|
2008-01-03 20:09:38 +00:00
|
|
|
|
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (opcode_modifiers): Remove No_xSuf.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (No_xSuf): Removed.
|
|
|
|
|
|
(CheckSize): Updated.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2008-01-03 05:29:53 +00:00
|
|
|
|
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
|
|
|
|
|
|
CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
|
|
|
|
|
|
CPU_SSE5_FLAGS.
|
|
|
|
|
|
(cpu_flags): Add CpuSSE4_2_Or_ABM.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (CpuSSE4_2_Or_ABM): New.
|
|
|
|
|
|
(CpuLM): Updated.
|
|
|
|
|
|
(i386_cpu_flags): Add cpusse4_2_or_abm.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
|
|
|
|
|
|
CpuABM|CpuSSE4_2 on popcnt.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Likewise.
|
|
|
|
|
|
|
2008-01-03 03:28:35 +00:00
|
|
|
|
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h: Update comments.
|
|
|
|
|
|
|
2008-01-02 23:54:47 +00:00
|
|
|
|
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
|
|
|
|
|
|
* i386-opc.h: Likewise.
|
|
|
|
|
|
* i386-opc.tbl: Likewise.
|
|
|
|
|
|
|
gas/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
Check memory size in Intel mode.
(process_suffix): Handle XMMWORD_MNEM_SUFFIX.
(intel_e09): Likewise.
* config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.
gas/testsuite/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/intel.s: Use QWORD on movq instead of DWORD.
* gas/i386/inval.s: Add tests for movq.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/inval.l: Updated.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
Byte, Word, Dword, QWord and Xmmword.
* i386-opc.h (No_xSuf): New.
(CheckSize): Likewise.
(Byte): Likewise.
(Word): Likewise.
(Dword): Likewise.
(QWord): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
Dword, QWord and Xmmword.
* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
used.
* i386-tbl.h: Regenerated.
2008-01-02 21:43:34 +00:00
|
|
|
|
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/5534
|
|
|
|
|
|
* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
|
|
|
|
|
|
Byte, Word, Dword, QWord and Xmmword.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (No_xSuf): New.
|
|
|
|
|
|
(CheckSize): Likewise.
|
|
|
|
|
|
(Byte): Likewise.
|
|
|
|
|
|
(Word): Likewise.
|
|
|
|
|
|
(Dword): Likewise.
|
|
|
|
|
|
(QWord): Likewise.
|
|
|
|
|
|
(Xmmword): Likewise.
|
|
|
|
|
|
(FWait): Updated.
|
|
|
|
|
|
(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
|
|
|
|
|
|
Dword, QWord and Xmmword.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
|
|
|
|
|
|
used.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2008-01-02 00:37:44 +00:00
|
|
|
|
2008-01-02 Mark Kettenis <kettenis@gnu.org>
|
|
|
|
|
|
|
|
|
|
|
|
* m88k-dis.c (instructions): Fix fcvt.* instructions.
|
|
|
|
|
|
From Miod Vallat.
|
|
|
|
|
|
|
2008-01-02 21:41:02 +00:00
|
|
|
|
For older changes see ChangeLog-2007
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
|
Local Variables:
|
2001-01-11 19:01:42 +00:00
|
|
|
|
mode: change-log
|
|
|
|
|
|
left-margin: 8
|
|
|
|
|
|
fill-column: 74
|
1999-05-03 07:29:11 +00:00
|
|
|
|
version-control: never
|
|
|
|
|
|
End:
|
