opcodes:
From Robin Getz <robin.getz@analog.com>
* bfin-dis.c (bu32): Typedef.
(enum const_forms_t): Add c_uimm32 and c_huimm32.
(constant_formats[]): Add uimm32 and huimm16.
(fmtconst_val): New.
(uimm32): Define.
(huimm32): Define.
(imm16_val): Define.
(luimm16_val): Define.
(struct saved_state): Define.
(GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
(get_allreg): New.
(decode_LDIMMhalf_0): Print out the whole register value.
gas/testsuite:
From Jie Zhang <jie.zhang@analog.com>
* gas/bfin/load.d: Update.
2008-03-26 14:50:52 +00:00
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2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
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From Robin Getz <robin.getz@analog.com>
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* bfin-dis.c (bu32): Typedef.
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(enum const_forms_t): Add c_uimm32 and c_huimm32.
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(constant_formats[]): Add uimm32 and huimm16.
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(fmtconst_val): New.
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(uimm32): Define.
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(huimm32): Define.
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(imm16_val): Define.
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(luimm16_val): Define.
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(struct saved_state): Define.
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(GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
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A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
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LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
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(get_allreg): New.
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(decode_LDIMMhalf_0): Print out the whole register value.
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2008-03-26 16:21:10 +00:00
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From Jie Zhang <jie.zhang@analog.com>
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* bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
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multiply and multiply-accumulate to data register instruction.
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2008-03-17 22:17:33 +00:00
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2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
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* aclocal.m4: Regenerate.
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* configure: Likewise.
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* Makefile.in: Likewise.
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2008-03-13 02:05:23 +00:00
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2008-03-13 Alan Modra <amodra@bigpond.net.au>
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* Makefile.am: Run "make dep-am".
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* Makefile.in: Regenerate.
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* configure: Regenerate.
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2008-03-06 23:00:34 +00:00
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2008-03-07 Alan Modra <amodra@bigpond.net.au>
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* ppc-opc.c (powerpc_opcodes): Order and format.
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2008-03-01 23:30:51 +00:00
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2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
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* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
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* i386-tbl.h: Regenerated.
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2008-02-23 17:29:17 +00:00
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2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
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* i386-opc.tbl: Disallow 16-bit near indirect branches for
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x86-64.
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* i386-tbl.h: Regenerated.
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2008-02-21 16:18:04 +00:00
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2008-02-21 Jan Beulich <jbeulich@novell.com>
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* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
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and Fword for far indirect jmp. Allow Reg16 and Word for near
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indirect jmp on x86-64. Disallow Fword for lcall.
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* i386-tbl.h: Re-generate.
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2008-02-18 13:46:45 +00:00
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2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
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* cr16-opc.c (cr16_num_optab): Defined
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2008-02-16 16:16:48 +00:00
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2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
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* i386-init.h: Regenerated.
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2008-02-14 12:33:17 +00:00
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2008-02-14 Nick Clifton <nickc@redhat.com>
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PR binutils/5524
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* configure.in (SHARED_LIBADD): Select the correct host specific
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file extension for shared libraries.
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* configure: Regenerate.
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2008-02-13 13:41:26 +00:00
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2008-02-13 Jan Beulich <jbeulich@novell.com>
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* i386-opc.h (RegFlat): New.
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* i386-reg.tbl (flat): Add.
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* i386-tbl.h: Re-generate.
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2008-02-13 13:29:31 +00:00
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2008-02-13 Jan Beulich <jbeulich@novell.com>
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* i386-dis.c (a_mode): New.
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(cond_jump_mode): Adjust.
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(Ma): Change to a_mode.
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(intel_operand_size): Handle a_mode.
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* i386-opc.tbl: Allow Dword and Qword for bound.
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* i386-tbl.h: Re-generate.
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2008-02-13 10:14:40 +00:00
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2008-02-13 Jan Beulich <jbeulich@novell.com>
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* i386-gen.c (process_i386_registers): Process new fields.
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* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
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unsigned char. Add dw2_regnum and Dw2Inval.
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* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
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register names.
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* i386-tbl.h: Re-generate.
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2008-02-12 05:35:36 +00:00
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2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
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2008-02-12 17:22:02 +00:00
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* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
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2008-02-12 05:35:36 +00:00
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* i386-init.h: Updated.
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2008-02-12 00:04:45 +00:00
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2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (cpu_flags): Add CpuXsave.
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* i386-opc.h (CpuXsave): New.
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2008-02-12 17:22:02 +00:00
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(CpuLM): Updated.
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2008-02-12 00:04:45 +00:00
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(i386_cpu_flags): Add cpuxsave.
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* i386-dis.c (MOD_0FAE_REG_4): New.
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(RM_0F01_REG_2): Likewise.
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(MOD_0FAE_REG_5): Updated.
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(RM_0F01_REG_3): Likewise.
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(reg_table): Use MOD_0FAE_REG_4.
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(mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
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for xrstor.
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(rm_table): Add RM_0F01_REG_2.
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* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
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* i386-init.h: Regenerated.
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* i386-tbl.h: Likewise.
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2008-02-11 15:11:06 +00:00
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2008-02-11 Jan Beulich <jbeulich@novell.com>
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2008-02-11 22:56:13 +00:00
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2008-02-11 15:11:06 +00:00
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* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
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Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
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* i386-tbl.h: Re-generate.
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2008-02-04 19:43:51 +00:00
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2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
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PR 5715
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* configure: Regenerated.
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2008-02-04 19:26:11 +00:00
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2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
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* mips-dis.c: Update copyright.
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(mips_arch_choices): Add Octeon.
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* mips-opc.c: Update copyright.
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(IOCT): New macro.
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(mips_builtin_opcodes): Add Octeon instruction synciobdma.
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2008-01-29 08:24:43 +00:00
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2008-01-29 Alan Modra <amodra@bigpond.net.au>
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* ppc-opc.c: Support optional L form mtmsr.
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2008-01-24 15:11:35 +00:00
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2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (OP_E_extended): Handle r12 like rsp.
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2008-01-23 19:05:12 +00:00
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2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
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* i386-init.h: Regenerated.
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2008-01-23 08:53:44 +00:00
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2008-01-23 Tristan Gingold <gingold@adacore.com>
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* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
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ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
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2008-01-22 19:57:30 +00:00
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2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
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(cpu_flags): Likewise.
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* i386-opc.h (CpuMMX2): Removed.
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(CpuSSE): Updated.
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* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
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* i386-init.h: Regenerated.
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* i386-tbl.h: Likewise.
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2008-01-22 19:16:45 +00:00
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2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
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CPU_SMX_FLAGS.
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* i386-init.h: Regenerated.
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2008-01-16 00:05:56 +00:00
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2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
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* i386-opc.tbl: Use Qword on movddup.
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* i386-tbl.h: Regenerated.
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2008-01-15 18:50:44 +00:00
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2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
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* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
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* i386-tbl.h: Regenerated.
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2008-01-15 17:20:50 +00:00
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2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (Mx): New.
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(PREFIX_0FC3): Likewise.
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(PREFIX_0FC7_REG_6): Updated.
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(dis386_twobyte): Use PREFIX_0FC3.
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(prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
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Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
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movntss.
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2008-01-15 01:37:56 +00:00
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2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (opcode_modifiers): Add IntelSyntax.
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(operand_types): Add Mem.
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* i386-opc.h (IntelSyntax): New.
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* i386-opc.h (Mem): New.
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(Byte): Updated.
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(Opcode_Modifier_Max): Updated.
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(i386_opcode_modifier): Add intelsyntax.
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(i386_operand_type): Add mem.
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* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
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instructions.
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* i386-reg.tbl: Add size for accumulator.
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* i386-init.h: Regenerated.
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* i386-tbl.h: Likewise.
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|
2008-01-14 05:15:06 +00:00
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2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
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* i386-opc.h (Byte): Fix a typo.
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|
gas/testsuite/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/i386.s: Add tests for fnstsw and fstsw.
* gas/i386/inval.s: Likewise.
* gas/i386/x86_64.s: Likewise.
* gas/i386/intel.s: Use word instead of dword on ss.
* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
and out.
* gas/i386/prefix.s: Remove invalid fstsw.
* gas/i386/inval.l: Updated.
* gas/i386/intelbad.l: Likewise.
* gas/i386/i386.d: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/prefix.d: Updated.
gas/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (_i386_insn): Update comment.
(operand_type_match): Also clear unspecified.
(operand_type_register_match): Likewise.
(parse_operands): Initialize unspecified.
(i386_intel_operand): Likewise.
(match_template): Check memory and accumulator operand size.
(i386_att_operand): Clear unspecified on register operand.
(intel_e11): Likewise.
(intel_e09): Set operand size and clean unspecified for
"XXX PTR".
opcodes/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (operand_type_init): Add Dword to
OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
Qword and Xmmword.
(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
Xmmword, Unspecified and Anysize.
(set_bitfield): Make Mmword an alias of Qword. Make Oword
an alias of Xmmword.
* i386-opc.h (CheckSize): Removed.
(Byte): Updated.
(Word): Likewise.
(Dword): Likewise.
(Qword): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(OTMax): Likewise.
(i386_opcode_modifier): Remove checksize, byte, word, dword,
qword and xmmword.
(Fword): New.
(TBYTE): Likewise.
(Unspecified): Likewise.
(Anysize): Likewise.
(i386_operand_type): Add byte, word, dword, fword, qword,
tbyte xmmword, unspecified and anysize.
* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
Tbyte, Xmmword, Unspecified and Anysize.
* i386-reg.tbl: Add size for accumulator.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-12 16:05:42 +00:00
|
|
|
|
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
|
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PR gas/5534
|
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|
|
* i386-gen.c (operand_type_init): Add Dword to
|
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|
|
|
OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
|
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(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
|
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|
Qword and Xmmword.
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(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
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Xmmword, Unspecified and Anysize.
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(set_bitfield): Make Mmword an alias of Qword. Make Oword
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|
an alias of Xmmword.
|
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* i386-opc.h (CheckSize): Removed.
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(Byte): Updated.
|
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(Word): Likewise.
|
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(Dword): Likewise.
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(Qword): Likewise.
|
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|
(Xmmword): Likewise.
|
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|
|
(FWait): Updated.
|
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|
(OTMax): Likewise.
|
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|
|
|
(i386_opcode_modifier): Remove checksize, byte, word, dword,
|
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|
|
|
qword and xmmword.
|
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(Fword): New.
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|
(TBYTE): Likewise.
|
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|
(Unspecified): Likewise.
|
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|
(Anysize): Likewise.
|
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|
|
(i386_operand_type): Add byte, word, dword, fword, qword,
|
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|
|
tbyte xmmword, unspecified and anysize.
|
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* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
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|
Tbyte, Xmmword, Unspecified and Anysize.
|
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* i386-reg.tbl: Add size for accumulator.
|
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|
* i386-init.h: Regenerated.
|
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|
* i386-tbl.h: Likewise.
|
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|
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|
|
2008-01-10 14:52:35 +00:00
|
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|
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
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|
|
* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
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|
(REG_0F18): Updated.
|
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|
(reg_table): Updated.
|
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|
|
(dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
|
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|
(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
|
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|
2008-01-09 01:24:07 +00:00
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|
2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
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|
* i386-gen.c (set_bitfield): Use fail () on error.
|
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|
2008-01-08 21:24:16 +00:00
|
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|
2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
|
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|
* i386-gen.c (lineno): New.
|
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|
(filename): Likewise.
|
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|
|
(set_bitfield): Report filename and line numer on error.
|
|
|
|
|
|
(process_i386_opcodes): Set filename and update lineno.
|
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|
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|
|
(process_i386_registers): Likewise.
|
|
|
|
|
|
|
gas/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
only.
(md_assemble): Remove Intel mode workaround.
(match_template): Check support for old gcc, AT&T mnemonic
and Intel Syntax.
(md_parse_option): Don't set intel_mnemonic to 0 for
OPTION_MOLD_GCC.
gas/testsuite/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.
* gas/i386/intel.d: Updated.
* gas/i386/intel.e: Likewise.
opcodes/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
ATTSyntax.
* i386-opc.h (IntelMnemonic): Renamed to ..
(ATTSyntax): This
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
and intelsyntax.
* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
* i386-tbl.h: Regenerated.
2008-01-05 17:07:25 +00:00
|
|
|
|
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
|
|
|
|
|
|
ATTSyntax.
|
|
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|
|
|
|
|
|
|
|
|
* i386-opc.h (IntelMnemonic): Renamed to ..
|
|
|
|
|
|
(ATTSyntax): This
|
|
|
|
|
|
(Opcode_Modifier_Max): Updated.
|
|
|
|
|
|
(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
|
|
|
|
|
|
and intelsyntax.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
|
|
|
|
|
|
on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
|
|
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|
|
|
* i386-tbl.h: Regenerated.
|
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|
2008-01-04 18:10:08 +00:00
|
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|
|
2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
|
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|
|
|
* i386-gen.c: Update copyright to 2008.
|
|
|
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|
|
* i386-opc.h: Likewise.
|
|
|
|
|
|
* i386-opc.tbl: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Likewise.
|
|
|
|
|
|
|
2008-01-04 18:03:02 +00:00
|
|
|
|
2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
|
|
|
|
|
|
pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2008-01-04 01:05:45 +00:00
|
|
|
|
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
|
|
|
|
|
|
CpuSSE4_2_Or_ABM.
|
|
|
|
|
|
(cpu_flags): Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (CpuSSE4_1_Or_5): Removed.
|
|
|
|
|
|
(CpuSSE4_2_Or_ABM): Likewise.
|
|
|
|
|
|
(CpuLM): Updated.
|
|
|
|
|
|
(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
|
|
|
|
|
|
Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
|
|
|
|
|
|
and CpuPadLock, respectively.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Likewise.
|
|
|
|
|
|
|
2008-01-03 20:09:38 +00:00
|
|
|
|
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (opcode_modifiers): Remove No_xSuf.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (No_xSuf): Removed.
|
|
|
|
|
|
(CheckSize): Updated.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2008-01-03 05:29:53 +00:00
|
|
|
|
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
|
|
|
|
|
|
CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
|
|
|
|
|
|
CPU_SSE5_FLAGS.
|
|
|
|
|
|
(cpu_flags): Add CpuSSE4_2_Or_ABM.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (CpuSSE4_2_Or_ABM): New.
|
|
|
|
|
|
(CpuLM): Updated.
|
|
|
|
|
|
(i386_cpu_flags): Add cpusse4_2_or_abm.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
|
|
|
|
|
|
CpuABM|CpuSSE4_2 on popcnt.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Likewise.
|
|
|
|
|
|
|
2008-01-03 03:28:35 +00:00
|
|
|
|
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h: Update comments.
|
|
|
|
|
|
|
2008-01-02 23:54:47 +00:00
|
|
|
|
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
|
|
|
|
|
|
* i386-opc.h: Likewise.
|
|
|
|
|
|
* i386-opc.tbl: Likewise.
|
|
|
|
|
|
|
gas/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
Check memory size in Intel mode.
(process_suffix): Handle XMMWORD_MNEM_SUFFIX.
(intel_e09): Likewise.
* config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.
gas/testsuite/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/intel.s: Use QWORD on movq instead of DWORD.
* gas/i386/inval.s: Add tests for movq.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/inval.l: Updated.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
Byte, Word, Dword, QWord and Xmmword.
* i386-opc.h (No_xSuf): New.
(CheckSize): Likewise.
(Byte): Likewise.
(Word): Likewise.
(Dword): Likewise.
(QWord): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
Dword, QWord and Xmmword.
* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
used.
* i386-tbl.h: Regenerated.
2008-01-02 21:43:34 +00:00
|
|
|
|
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/5534
|
|
|
|
|
|
* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
|
|
|
|
|
|
Byte, Word, Dword, QWord and Xmmword.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.h (No_xSuf): New.
|
|
|
|
|
|
(CheckSize): Likewise.
|
|
|
|
|
|
(Byte): Likewise.
|
|
|
|
|
|
(Word): Likewise.
|
|
|
|
|
|
(Dword): Likewise.
|
|
|
|
|
|
(QWord): Likewise.
|
|
|
|
|
|
(Xmmword): Likewise.
|
|
|
|
|
|
(FWait): Updated.
|
|
|
|
|
|
(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
|
|
|
|
|
|
Dword, QWord and Xmmword.
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
|
|
|
|
|
|
used.
|
|
|
|
|
|
* i386-tbl.h: Regenerated.
|
|
|
|
|
|
|
2008-01-02 00:37:44 +00:00
|
|
|
|
2008-01-02 Mark Kettenis <kettenis@gnu.org>
|
|
|
|
|
|
|
|
|
|
|
|
* m88k-dis.c (instructions): Fix fcvt.* instructions.
|
|
|
|
|
|
From Miod Vallat.
|
|
|
|
|
|
|
2008-01-02 21:41:02 +00:00
|
|
|
|
For older changes see ChangeLog-2007
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
|
|
|
Local Variables:
|
2001-01-11 19:01:42 +00:00
|
|
|
|
mode: change-log
|
|
|
|
|
|
left-margin: 8
|
|
|
|
|
|
fill-column: 74
|
1999-05-03 07:29:11 +00:00
|
|
|
|
version-control: never
|
|
|
|
|
|
End:
|
