old-cross-binutils/bfd/config.bfd

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# config.bfd
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#
# Copyright 2012, 2013 Free Software Foundation
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#
# This file is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
#
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# Convert a canonical host type into a BFD host type.
# Set shell variable targ to canonical target name, and run
# using ``. config.bfd''.
# Sets the following shell variables:
# targ_defvec Default vector for this target
# targ_selvecs Vectors to build for this target
# targ64_selvecs Vectors to build if --enable-64-bit-bfd is given
# or if host is 64 bit.
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# targ_archs Architectures for this target
# targ_cflags $(CFLAGS) for this target (FIXME: pretty bogus)
# targ_underscore Whether underscores are used: yes or no
# Part of this file is processed by targmatch.sed to generate the
# targmatch.h file. The #ifdef and #endif lines that appear below are
# copied directly into targmatch.h.
# The binutils c++filt program wants to know whether underscores are
# stripped or not. That is why we set targ_underscore. c++filt uses
# this information to choose a default. This information is
# duplicated in the symbol_leading_char field of the BFD target
# vector, but c++filt does not deal with object files and is not
# linked against libbfd.a. It is not terribly important that c++filt
# get this right; it is just convenient.
targ_defvec=
targ_selvecs=
targ64_selvecs=
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targ_cflags=
targ_underscore=no
# Catch obsolete configurations.
case $targ in
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null)
if test "x$enable_obsolete" != xyes; then
echo "*** Configuration $targ is obsolete." >&2
echo "*** Specify --enable-obsolete to build it anyway." >&2
echo "*** Support will be REMOVED in the next major release of BINUTILS," >&2
echo "*** unless a maintainer comes forward." >&2
exit 1
fi;;
esac
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case $targ in
m68*-apple-aux* | \
m68*-apollo-* | \
m68*-bull-sysv* | \
m68*-*-rtemscoff* | \
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maxq-*-coff | \
i960-*-rtems* | \
or32-*-rtems* | \
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m68*-*-lynxos* | \
sparc-*-lynxos* | \
vax-*-vms* | \
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arm-*-oabi | \
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a29k-* | \
hppa*-*-rtems* | \
*-go32-rtems* | \
i[3-7]86*-*-rtemscoff* | \
mips*el-*-rtems* | \
powerpcle-*-rtems* | \
sparc*-*-rtemsaout* | \
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null)
echo "*** Configuration $targ is obsolete." >&2
echo "*** Support has been REMOVED." >&2
exit 1
;;
esac
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targ_cpu=`echo $targ | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
case "${targ_cpu}" in
aarch64*) targ_archs="bfd_aarch64_arch bfd_arm_arch";;
alpha*) targ_archs=bfd_alpha_arch ;;
am34*|am33_2.0*) targ_archs=bfd_mn10300_arch ;;
arm*) targ_archs=bfd_arm_arch ;;
bfin*) targ_archs=bfd_bfin_arch ;;
c30*) targ_archs=bfd_tic30_arch ;;
c4x*) targ_archs=bfd_tic4x_arch ;;
c54x*) targ_archs=bfd_tic54x_arch ;;
cr16*) targ_archs=bfd_cr16_arch ;;
* config.bfd: Support crisv32-*-* like cris-*-*. * archures.c (bfd_mach_cris_v0_v10, bfd_mach_cris_v32) (bfd_mach_cris_v10_v32): New macros. * cpu-cris.c: Tweak formatting. (get_compatible): New function. (N): New macro. (bfd_cris_arch_compat_v10_v32, bfd_cris_arch_v32): New bfd_arch_info_type:s. (bfd_cris_arch): Use bfd_mach_cris_v0_v10 for member mach, get_compatible for member compatible and link bfd_cris_arch_v32 as next. * elf32-cris.c (cris_elf_pcrel_reloc) (cris_elf_set_mach_from_flags): New functions. (cris_elf_howto_table) <R_CRIS_8_PCREL, R_CRIS_16_PCREL> <R_CRIS_32_PCREL>: Use cris_elf_pcrel_reloc. (cris_elf_grok_prstatus, cris_elf_grok_psinfo): Give correct numbers for bfd_mach_cris_v32. (PLT_ENTRY_SIZE_V32): New macro. (elf_cris_plt0_entry): Drop last comma in initializer. (elf_cris_plt0_entry_v32, elf_cris_plt_entry_v32) (elf_cris_pic_plt0_entry_v32, elf_cris_pic_plt_entry_v32): New PLT initializers. (cris_elf_relocate_section): Change all "%B(%A)" messages to "%B, section %A". (elf_cris_finish_dynamic_symbol): Do V32-specific PLT entries. (elf_cris_finish_dynamic_sections): Similar. (elf_cris_adjust_dynamic_symbol): Similar. (cris_elf_check_relocs): Change all "%B(%A)" messages to "%B, section %A". <switch with PIC relocs>: Emit error and return FALSE for bfd_mach_cris_v10_v32. <case R_CRIS_8_PCREL, case R_CRIS_16_PCREL, case R_CRIS_32_PCREL>: Emit warning when generating textrel reloc. (cris_elf_object_p): Call cris_elf_set_mach_from_flags. (cris_elf_final_write_processing): Set flags according to mach. (cris_elf_print_private_bfd_data): Display EF_CRIS_VARIANT_COMMON_V10_V32 and EF_CRIS_VARIANT_V32. (cris_elf_merge_private_bfd_data): Drop variables old_flags, new_flags. Don't call cris_elf_final_write_processing. Don't look at the actual elf header flags at all; use bfd_get_symbol_leading_char to check ibfd, obfd. Trap difference in bfd_get_mach for ibfd and obfd and handle merging of compatible objects. (bfd_elf32_bfd_copy_private_bfd_data): Define. * reloc.c (BFD_RELOC_CRIS_SIGNED_8, BFD_RELOC_CRIS_UNSIGNED_8) (BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_UNSIGNED_16) (BFD_RELOC_CRIS_LAPCQ_OFFSET): New relocs. * bfd-in2.h, libbfd.h: Regenerate.
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crisv32) targ_archs=bfd_cris_arch ;;
crx*) targ_archs=bfd_crx_arch ;;
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dlx*) targ_archs=bfd_dlx_arch ;;
fido*) targ_archs=bfd_m68k_arch ;;
hppa*) targ_archs=bfd_hppa_arch ;;
i[3-7]86) targ_archs=bfd_i386_arch ;;
i370) targ_archs=bfd_i370_arch ;;
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lm32) targ_archs=bfd_lm32_arch ;;
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
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m6811*|m68hc11*) targ_archs="bfd_m68hc11_arch bfd_m68hc12_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;;
m6812*|m68hc12*) targ_archs="bfd_m68hc12_arch bfd_m68hc11_arch bfd_m9s12x_arch bfd_m9s12xg_arch" ;;
m68*) targ_archs=bfd_m68k_arch ;;
m88*) targ_archs=bfd_m88k_arch ;;
Add support for Xilinx MicroBlaze processor. * bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}. * bfd/Makefile.in: Same. * bfd/archures.c: Add bfd_arch_microblaze. * bfd/bfd-in2.h: Regenerate. * bfd/config.bfd: Add microblaze target. * bfd/configure: Add bfd_elf32_microblaze_vec target. * bfd/configure.in: Same. * bfd/cpu-microblaze.c: New. * bfd/elf32-microblaze.c: New. * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc(). * bfd/libbfd.h: Regenerate. * bfd/reloc.c: Add MICROBLAZE relocations. * bfd/section.c: Add struct relax_table and relax_count to section. * bfd/targets.c: Add bfd_elf32_microblaze_vec. * binutils/MAINTAINERS: Add self as maintainer. * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE & EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(), get_machine_name(). * config.sub: Add microblaze target. * configure: Same. * configure.ac: Same. * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add DEP_microblaze_elf target. * gas/Makefile.in: Same. * gas/config/tc-microblaze.c: Add MicroBlaze assembler. * gas/config/tc-microblaze.h: Add header for tc-microblaze.c. * gas/configure: Add microblaze target. * gas/configure.in: Same. * gas/configure.tgt: Same. * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS. * gas/doc/Makefile.in: Same. * gas/doc/all.texi: Set MICROBLAZE. * gas/doc/as.texinfo: Add MicroBlaze doc links. * gas/doc/c-microblaze.texi: New MicroBlaze docs. * include/dis-asm.h: Decl print_insn_microblaze(). * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. * include/elf/microblaze.h: New reloc definitions. * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to ALL_EMULATIONS, targets. * ld/Makefile.in: Same. * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets. * ld/emulparams/elf32mb_linux.sh: New. * ld/emulparams/elf32microblaze.sh. New. * ld/scripttempl/elfmicroblaze.sc: New. * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to CFILES, microblaze-dis.lo to ALL_MACHINES, targets. * opcodes/Makefile.in: Same. * opcodes/configure: Add bfd_microblaze_arch target. * opcodes/configure.in: Same. * opcodes/disassemble.c: Define ARCH_microblaze, return print_insn_microblaze(). * opcodes/microblaze-dis.c: New MicroBlaze disassembler. * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions. * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
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microblaze*) targ_archs=bfd_microblaze_arch ;;
mips*) targ_archs=bfd_mips_arch ;;
or32*) targ_archs=bfd_or32_arch ;;
pdp11*) targ_archs=bfd_pdp11_arch ;;
pj*) targ_archs="bfd_pj_arch bfd_i386_arch";;
powerpc*) targ_archs="bfd_rs6000_arch bfd_powerpc_arch" ;;
rs6000) targ_archs="bfd_rs6000_arch bfd_powerpc_arch" ;;
s390*) targ_archs=bfd_s390_arch ;;
sh*) targ_archs=bfd_sh_arch ;;
sparc*) targ_archs=bfd_sparc_arch ;;
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spu*) targ_archs=bfd_spu_arch ;;
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. (ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c. (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo, and elfxx-tilegx.lo. (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and elfxx-tilegx.c. (BFD64_BACKENDS): Add elf64-tilegx.lo. (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c. * Makefile.in: Regenerate. * arctures.c (bfd_architecture): Define bfd_arch_tilepro, bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx. (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch. (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch. bfd-in2.h: Regenerate. * config.bfd: Handle tilegx-*-* and tilepro-*-*. * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * configure: Regenerate. * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and TILEPRO_ELF_DATA. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1, IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI, IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL, IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL, IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL, IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO, IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI, IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0, MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO, IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI, IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE, IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO, IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA, IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST, HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0, IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2, IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST, IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST, IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL, IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL, IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL, IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL, IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL, IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL, IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT, IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT, IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT, IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT, IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT, IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD, IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD, IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD, IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD, IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD, IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD, IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE, IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE, IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE, IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE, IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE, IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE, IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} * targets.c (bfd_elf32_tilegx_vec): Declare. (bfd_elf32_tilepro_vec): Declare. (bfd_elf64_tilegx_vec): Declare. (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * cpu-tilegx.c: New file. * cpu-tilepro.c: New file. * elf32-tilepro.h: New file. * elf32-tilepro.c: New file. * elf32-tilegx.c: New file. * elf32-tilegx.h: New file. * elf64-tilegx.c: New file. * elf64-tilegx.h: New file. * elfxx-tilegx.c: New file. * elfxx-tilegx.h: New file. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and config/tc-tilepro.c. (TARGET_CPU_HFILES): Add config/tc-tilegx.h and config/tc-tilepro.h. * Makefile.in: Regenerate. * configure.tgt (tilepro-*-*): New. (tilegx-*-*): Likewise. * config/tc-tilegx.c: New file. * config/tc-tilegx.h: Likewise. * config/tc-tilepro.h: Likewise. * config/tc-tilepro.c: Likewise. * doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and c-tilepro.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TILEGX): Define. (TILEPRO): Define. * doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include c-tilegx.texi and c-tilepro.texi. * doc/c-tilegx.texi: New. * doc/c-tilepro.texi: New. * gas/tilepro/t_constants.s: New file. * gas/tilepro/t_constants.d: Likewise. * gas/tilepro/t_insns.s: Likewise. * gas/tilepro/tilepro.exp: Likewise. * gas/tilepro/t_insns.d: Likewise. * gas/tilegx/tilegx.exp: Likewise. * gas/tilegx/t_insns.d: Likewise. * gas/tilegx/t_insns.s: Likewise. * dis-asm.h (print_insn_tilegx): Declare. (print_insn_tilepro): Likewise. * tilegx.h: New file. * tilepro.h: New file. * common.h: Add EM_TILEGX. * tilegx.h: New file. * tilepro.h: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and eelf32tilepro.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c. (eelf32tilegx.c): New target. (eelf32tilepro.c): Likewise. (eelf64tilegx.c): Likewise. * Makefile.in: Regenerate. * configure.tgt: Handle tilegx-*-* and tilepro-*-*. * emulparams/elf32tilegx.sh: New file. * emulparams/elf64tilegx.sh: New file. * emulparams/elf32tilepro.sh: New file. * ld-elf/eh5.d: Don't run on tile*. * ld-srec/srec.exp: xfail on tile*. * ld-tilegx/external.s: New file. * ld-tilegx/reloc.d: New file. * ld-tilegx/reloc.s: New file. * ld-tilegx/tilegx.exp: New file. * ld-tilepro/external.s: New file. * ld-tilepro/reloc.d: New file. * ld-tilepro/reloc.s: New file. * ld-tilepro/tilepro.exp: New file. * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. * Makefile.in: Regenerate. * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. * configure: Regenerate. * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. * po/POTFILES.in: Regenerate. * tilegx-dis.c: New file. * tilegx-opc.c: New file. * tilepro-dis.c: New file. * tilepro-opc.c: New file.
2011-06-13 15:18:54 +00:00
tilegx*) targ_archs=bfd_tilegx_arch ;;
tilepro*) targ_archs=bfd_tilepro_arch ;;
2012-11-09 Nick Clifton <nickc@redhat.com> * Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo. (ALL_MACHINES_CFILES): Add cpu-v850-rh850.c. * archures.c (bfd_arch_info): Add bfd_v850_rh850_arch. * config.bfd: Likewise. * configure.in: Add bfd_elf32_v850_rh850_vec. * cpu-v850.c: Update printed description. * cpu-v850_rh850.c: New file. * elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI relocs. (v850_elf_perform_relocation): Likewise. (v850_elf_final_link_relocate): Likewise. (v850_elf_relocate_section): Likewise. (v850_elf_relax_section): Likewise. (v800_elf_howto_table): New. (v850_elf_object_p): Add support for RH850 ABI values. (v850_elf_final_write_processing): Likewise. (v850_elf_merge_private_bfd_data): Likewise. (v850_elf_print_private_bfd_data): Likewise. (v800_elf_reloc_map): New. (v800_elf_reloc_type_lookup): New. (v800_elf_reloc_name_lookup): New. (v800_elf_info_to_howto): New. (bfd_elf32_v850_rh850_vec): New. (bfd_arch_v850_rh850): New. * targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI. (guess_is_rela): Add EM_V800. (dump_relocations): Likewise. (get_machine_name): Update EM_V800. (get_machine_flags): Add support for RH850 ABI flags. (is_32bit_abs_reloc): Add support for RH850 ABI reloc. * config/tc-v850.c (v850_target_arch): New. (v850_target_format): New. (set_machine): Use v850_target_arch. (md_begin): Likewise. (md_show_usage): Document new switches. (md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and -m4byte-align. * config/tc-v850.c (TARGET_ARCH) Use v850_target_arch. (TARGET_FORMAT): Use v850_target_format. * doc/c-v850.texi: Document new options. * v850.h: Add RH850 ABI values. * Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c. * Makefile.in: Regenerate. * configure.tgt (v850*-*-*): Make v850_rh850 the default emulation. Add vanilla v850 as an extra emulation. * emulparams/v850_rh850.sh: New file. * scripttempl/v850_rh850.sc: New file. * configure.in: Add bfd_v850_rh850_arch. * configure: Regenerate. * disassemble.c (disassembler): Likewise.
2012-11-09 17:36:19 +00:00
v850*) targ_archs="bfd_v850_arch bfd_v850_rh850_arch" ;;
2006-09-20 11:35:11 +00:00
x86_64*) targ_archs=bfd_i386_arch ;;
xtensa*) targ_archs=bfd_xtensa_arch ;;
xgate) targ_archs=bfd_xgate_arch ;;
z80|r800) targ_archs=bfd_z80_arch ;;
z8k*) targ_archs=bfd_z8k_arch ;;
*) targ_archs=bfd_${targ_cpu}_arch ;;
1999-05-03 07:29:11 +00:00
esac
# WHEN ADDING ENTRIES TO THIS MATRIX:
# Make sure that the left side always has two dashes. Otherwise you
# can get spurious matches. Even for unambiguous cases, do this as a
# convention, else the table becomes a real mess to understand and maintain.
#
# Keep obsolete entries above the START comment, to keep them out of
# targmatch.h.
1999-05-03 07:29:11 +00:00
case "${targ}" in
mips*-dec-bsd*)
echo "This target is obsolete and has been removed."
exit 1
;;
mips*-*-mach3*)
echo "This target is obsolete and has been removed."
exit 1
;;
mips*-*-pe*)
echo "This target is obsolete and has been removed."
exit 1
;;
plugin)
targ_defvec=plugin_vec
targ_selvecs="plugin_vec"
;;
1999-05-03 07:29:11 +00:00
# START OF targmatch.h
#ifdef BFD64
aarch64-*-elf)
targ_defvec=bfd_elf64_littleaarch64_vec
targ_selvecs="bfd_elf64_bigaarch64_vec bfd_elf32_littlearm_vec bfd_elf32_bigarm_vec"
want64=true
;;
aarch64_be-*-elf)
targ_defvec=bfd_elf64_bigaarch64_vec
targ_selvecs="bfd_elf64_littleaarch64_vec bfd_elf32_bigarm_vec bfd_elf32_littlearm_vec"
want64=true
;;
aarch64-*-linux*)
targ_defvec=bfd_elf64_littleaarch64_vec
targ_selvecs="bfd_elf64_bigaarch64_vec bfd_elf32_littlearm_vec bfd_elf32_bigarm_vec"
want64=true
;;
aarch64_be-*-linux*)
targ_defvec=bfd_elf64_bigaarch64_vec
targ_selvecs="bfd_elf64_littleaarch64_vec bfd_elf32_bigarm_vec bfd_elf32_littlearm_vec"
want64=true
;;
alpha*-*-freebsd* | alpha*-*-kfreebsd*-gnu)
targ_defvec=bfd_elf64_alpha_freebsd_vec
targ_selvecs="bfd_elf64_alpha_vec ecoffalpha_little_vec"
want64=true
# FreeBSD <= 4.0 supports only the old nonstandard way of ABI labelling.
case "${targ}" in
alpha*-*-freebsd3* | alpha*-*-freebsd4 | alpha*-*-freebsd4.0*)
targ_cflags=-DOLD_FREEBSD_ABI_LABEL ;;
esac
;;
alpha*-*-netbsd* | alpha*-*-openbsd*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf64_alpha_vec
targ_selvecs=ecoffalpha_little_vec
want64=true
1999-05-03 07:29:11 +00:00
;;
alpha*-*-netware*)
targ_defvec=ecoffalpha_little_vec
targ_selvecs=nlm32_alpha_vec
want64=true
1999-05-03 07:29:11 +00:00
;;
alpha*-*-linuxecoff*)
targ_defvec=ecoffalpha_little_vec
targ_selvecs=bfd_elf64_alpha_vec
want64=true
1999-05-03 07:29:11 +00:00
;;
alpha*-*-linux-* | alpha*-*-elf*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf64_alpha_vec
targ_selvecs=ecoffalpha_little_vec
want64=true
1999-05-03 07:29:11 +00:00
;;
alpha*-*-*vms*)
targ_defvec=vms_alpha_vec
targ_selvecs=vms_lib_txt_vec
want64=true
1999-05-03 07:29:11 +00:00
;;
alpha*-*-*)
targ_defvec=ecoffalpha_little_vec
want64=true
1999-05-03 07:29:11 +00:00
;;
ia64*-*-freebsd* | ia64*-*-netbsd* | ia64*-*-linux-* | ia64*-*-elf* | ia64*-*-kfreebsd*-gnu)
2000-04-21 20:22:24 +00:00
targ_defvec=bfd_elf64_ia64_little_vec
bfd/ 2009-04-17 H.J. Lu <hongjiu.lu@intel.com> PR binutils/10074 * coffcode.h (bfd_pei_p): New. * config.bfd: Remove bfd_efi_bsdrv_ia32_vec, bfd_efi_rtdrv_ia32_vec, bfd_efi_bsdrv_x86_64_vec, bfd_efi_rtdrv_x86_64_vec, bfd_efi_bsdrv_ia64_vec and bfd_efi_rtdrv_ia64_vec. Replace bfd_efi_app_ia32_vec, bfd_efi_app_x86_64_vec and bfd_efi_app_ia64_vec with i386pei_vec, x86_64pei_vec and bfd_pei_ia64_vec, respectively. * configure.in: Remove bfd_efi_bsdrv_ia32_vec, bfd_efi_rtdrv_ia32_vec, bfd_efi_bsdrv_x86_64_vec, bfd_efi_rtdrv_x86_64_vec, bfd_efi_bsdrv_ia64_vec and bfd_efi_rtdrv_ia64_vec. Replace bfd_efi_ia64_vec with bfd_pei_ia64_vec. * targets.c: Likewise. * configure: Regenerated. * libcoff.h: Likewise. * Makefile.in: Likewise. * efi-app-ia32.c: Removed. * efi-app-x86_64.c: Likewise. * efi-bsdrv-ia32.c: Likewise. * efi-bsdrv-ia64.c: Likewise. * efi-bsdrv-x86_64.c: Likewise. * efi-rtdrv-ia32.c: Likewise. * efi-rtdrv-ia64.c: Likewise. * efi-rtdrv-x86_64.c: Likewise. * efi-rtdrv-ia32.c: Likewise. * efi-app-ia64.c: Moved to ... * pei-ia64.c: This. (TARGET_SYM): Set to bfd_pei_ia64_vec. (TARGET_NAME): Set to pei-ia64. * libpei.h (bfd_target_pei_p): Removed. (bfd_target_pei_arch): Likewise. (bfd_target_efi_app_p): Likewise. (bfd_target_efi_app_arch): Likewise. (bfd_target_efi_bsdrv_p): Likewise. (bfd_target_efi_bsdrv_arch): Likewise. (bfd_target_efi_rtdrv_p): Likewise. (bfd_target_efi_rtdrv_arch): Likewise. (bfd_pe_executable_p): Likewise. * Makefile.am (BFD32_BACKENDS): Remove efi-app-ia32.lo, efi-bsdrv-ia32.lo and efi-rtdrv-ia32.lo. (BFD32_BACKENDS_CFILES): Remove efi-app-ia32.c, efi-bsdrv-ia32.c and efi-rtdrv-ia32.c. (BFD64_BACKENDS): Remove efi-app-ia64.lo, efi-bsdrv-ia64.lo, efi-rtdrv-ia64.lo, efi-app-x86_64.lo, efi-bsdrv-x86_64.lo and efi-rtdrv-x86_64.lo. Add pei-ia64.lo. (BFD64_BACKENDS_CFILES): Remove efi-app-ia64.c, efi-bsdrv-ia64.c, efi-rtdrv-ia64.c, efi-app-x86_64.c, efi-bsdrv-x86_64.c and efi-rtdrv-x86_64.c. Add pei-ia64.c. (efi-app-ia64.lo): Removed. (efi-bsdrv-ia32.lo): Likewise. (efi-rtdrv-ia32.lo): Likewise. (efi-app-ia64.lo): Likewise. (efi-bsdrv-ia64.lo): Likewise. (efi-rtdrv-ia64.lo): Likewise. (efi-app-x86_64.lo): Likewise. (efi-bsdrv-x86_64.lo): Likewise. (efi-rtdrv-x86_64.lo): Likewise. (pei-ia64.lo): New. * peicode.h (coff_swap_scnhdr_in): Replace bfd_pe_executable_p with bfd_pei_p. (arch_type): Removed. (pe_arch): Likewise. (pe_bfd_object_p): Just return coff_object_p. * peXXigen.c (_bfd_XXi_swap_scnhdr_out): Replace bfd_pe_executable_p with bfd_pei_p. binutils/ 2009-04-17 H.J. Lu <hongjiu.lu@intel.com> PR binutils/10074 * objcopy.c: Include coff/i386.h and coff/pe.h. (pe_file_alignment): New. (pe_heap_commit): Likewise. (pe_heap_reserve): Likewise. (pe_image_base): Likewise. (pe_section_alignment): Likewise. (pe_stack_commit): Likewise. (pe_stack_reserve): Likewise. (pe_subsystem): Likewise. (pe_major_subsystem_version): Likewise. (pe_minor_subsystem_version): Likewise. (set_pe_subsystem): Likewise. (convert_efi_target): Likewise. (command_line_switch): Add OPTION_FILE_ALIGNMENT, OPTION_HEAP, OPTION_IMAGE_BASE, OPTION_SECTION_ALIGNMENT, OPTION_STACK and OPTION_SUBSYSTEM. (copy_options): Likewise. (copy_usage): Add --file-alignment, --heap, --image-base, --section-alignment, --stack and --subsystem. (copy_object): Set up PE parameters. (copy_main): Process Add OPTION_FILE_ALIGNMENT, OPTION_HEAP, OPTION_IMAGE_BASE, OPTION_SECTION_ALIGNMENT, OPTION_STACK and OPTION_SUBSYSTEM. Convert EFI target to PEI target. * NEWS: Mention --file-alignment, --heap, --image-base, --section-alignment, --stack and --subsystem command line options for objcopy. * doc/binutils.texi: Document --file-alignment, --heap, --image-base, --section-alignment, --stack and --subsystem command line options for objcopy.
2009-04-17 13:46:18 +00:00
targ_selvecs="bfd_elf64_ia64_big_vec bfd_pei_ia64_vec"
want64=true
2000-04-21 20:22:24 +00:00
;;
ia64*-*-hpux*)
2001-12-19 02:14:37 +00:00
targ_defvec=bfd_elf32_ia64_hpux_big_vec
targ_selvecs="bfd_elf64_ia64_hpux_big_vec"
want64=true
;;
* include/elf/ia64.h (SHT_IA_64_VMS_DISPLAY_NAME_INFO, EF_IA_64_ARCHVER_1): New macros. Minor reformatting. * bfd/Makefile.am (BFD32_BACKENDS): Add new object vmsutil.lo (BFD32_BACKENDS_CFILES): Add new file vmsutil.c (vmsutil.lo): Add dependency rule * bfd/Makefile.in: Regenerate * bfd/config.bfd (ia64*-*-*vms*): Add case. * bfd/configure.in (bfd_elf64_ia64_vms_vec): Add case. * bfd/configure: Regenerate * bfd/vmsutil.[ch]: New files * bfd/elf-bfd.h (struct bfd_elf_special_section): Change type of attr to bfd_vma. * bfd/elfxx-ia64.c (elfNN_vms_post_process_headers, elfNN_vms_section_processing, elfNN_vms_final_write_processing, elfNN_vms_close_and_cleanup, elfNN_vms_section_from_shdr, elfNN_vms_object_p): New functions * bfd/targets.c (bfd_elf64_ia64_vms_vec): New target. * gas/configure.tgt(ia64-*-*vms*): New target. * gas/dwarf2dbg.h (dwarf2_loc_mark_labels): Make extern. * gas/tc.h (md_number_to_chars): Declare iff undefined. * gas/config/obj-elf.c (obj_elf_change_section): Change type of arg attr to bfd_vma. (obj_elf_parse_section_letters): Return a bfd_vma. Change type of variables attr, md_attr to bfd_vma. (obj_elf_section_word): Likewise. (obj_elf_section): Change type of variable attr to bfd_vma * gas/config/obj-elf.h (obj_elf_change_section): Change type of arg attr to bfd_vma * gas/config/tc-ia64.c (bfdver.h,time.h): Include. (ia64_elf_section_letter): Now returns a bfd_vma. Handle VMS specific attributes. (ia64_elf_section_flags): Arg attr now a bfd_vma. (ia64_init): Don't turn on dependency checking for VMS. (ia64_target_format): Check for VMS flag bit. (do_alias): Hande decc$ functions. (get_vms_time): New function. (ia64_vms_note): New function. * gas/config/tc-ia64.h (ia64_elf_section_letter): Now returns a bfd_vma. (ia64_elf_section_flags): Arg attr now a bfd_vma. (tc_init_after_args): Define for VMS. * gas/config/tc-alpha.c (alpha_elf_section_letter): Return a bfd_vma. (alpha_elf_section_flags): Change type of arg attr to bfd_vma. * gas/config/tc-alpha.h: Likewise. * gas/config/tc-i386.c (x86_64_section_letter): Return a bfd_vma. (x86_64_section_word): Return a bfd_vma. * gas/config/tc-i386.h: Likewise. * gas/config/tc-ip2k.c (ip2k_elf_section_flags): Change type of arg attr to bfd_vma. * gas/config/tc-ip2k.h: Likewise. * gas/config/tc-mep.c (mep_elf_section_letter): Return a bfd_vma. (mep_elf_section_flags): Change type of arg attr to bfd_vma. * gas/config/tc-mep.h: Likewise. * gas/config/tc-ppc.c (ppc_section_letter): Return a bfd_vma. (ppc_section_word): Return a bfd_vma. (ppc_section_flags): Change type of arg attr to bfd_vma. * gas/config/tc-ppc.h: Likewise. * gas/config/te-vms.h (DWARF2_DIR_SHOULD_END_WITH_SEPARATOR, DWAR2_FILE_TIME_NAME, DWARF2_FILE_SIZE_NAME, DWARF2_FILEN_NAME): New file with new macros * gas/dwarf2dbg.c (get_filenum, out_file_list): Default and call new macros.
2009-01-15 12:42:52 +00:00
ia64*-*-*vms*)
targ_defvec=bfd_elf64_ia64_vms_vec
targ_selvecs=vms_lib_txt_vec
* include/elf/ia64.h (SHT_IA_64_VMS_DISPLAY_NAME_INFO, EF_IA_64_ARCHVER_1): New macros. Minor reformatting. * bfd/Makefile.am (BFD32_BACKENDS): Add new object vmsutil.lo (BFD32_BACKENDS_CFILES): Add new file vmsutil.c (vmsutil.lo): Add dependency rule * bfd/Makefile.in: Regenerate * bfd/config.bfd (ia64*-*-*vms*): Add case. * bfd/configure.in (bfd_elf64_ia64_vms_vec): Add case. * bfd/configure: Regenerate * bfd/vmsutil.[ch]: New files * bfd/elf-bfd.h (struct bfd_elf_special_section): Change type of attr to bfd_vma. * bfd/elfxx-ia64.c (elfNN_vms_post_process_headers, elfNN_vms_section_processing, elfNN_vms_final_write_processing, elfNN_vms_close_and_cleanup, elfNN_vms_section_from_shdr, elfNN_vms_object_p): New functions * bfd/targets.c (bfd_elf64_ia64_vms_vec): New target. * gas/configure.tgt(ia64-*-*vms*): New target. * gas/dwarf2dbg.h (dwarf2_loc_mark_labels): Make extern. * gas/tc.h (md_number_to_chars): Declare iff undefined. * gas/config/obj-elf.c (obj_elf_change_section): Change type of arg attr to bfd_vma. (obj_elf_parse_section_letters): Return a bfd_vma. Change type of variables attr, md_attr to bfd_vma. (obj_elf_section_word): Likewise. (obj_elf_section): Change type of variable attr to bfd_vma * gas/config/obj-elf.h (obj_elf_change_section): Change type of arg attr to bfd_vma * gas/config/tc-ia64.c (bfdver.h,time.h): Include. (ia64_elf_section_letter): Now returns a bfd_vma. Handle VMS specific attributes. (ia64_elf_section_flags): Arg attr now a bfd_vma. (ia64_init): Don't turn on dependency checking for VMS. (ia64_target_format): Check for VMS flag bit. (do_alias): Hande decc$ functions. (get_vms_time): New function. (ia64_vms_note): New function. * gas/config/tc-ia64.h (ia64_elf_section_letter): Now returns a bfd_vma. (ia64_elf_section_flags): Arg attr now a bfd_vma. (tc_init_after_args): Define for VMS. * gas/config/tc-alpha.c (alpha_elf_section_letter): Return a bfd_vma. (alpha_elf_section_flags): Change type of arg attr to bfd_vma. * gas/config/tc-alpha.h: Likewise. * gas/config/tc-i386.c (x86_64_section_letter): Return a bfd_vma. (x86_64_section_word): Return a bfd_vma. * gas/config/tc-i386.h: Likewise. * gas/config/tc-ip2k.c (ip2k_elf_section_flags): Change type of arg attr to bfd_vma. * gas/config/tc-ip2k.h: Likewise. * gas/config/tc-mep.c (mep_elf_section_letter): Return a bfd_vma. (mep_elf_section_flags): Change type of arg attr to bfd_vma. * gas/config/tc-mep.h: Likewise. * gas/config/tc-ppc.c (ppc_section_letter): Return a bfd_vma. (ppc_section_word): Return a bfd_vma. (ppc_section_flags): Change type of arg attr to bfd_vma. * gas/config/tc-ppc.h: Likewise. * gas/config/te-vms.h (DWARF2_DIR_SHOULD_END_WITH_SEPARATOR, DWAR2_FILE_TIME_NAME, DWARF2_FILE_SIZE_NAME, DWARF2_FILEN_NAME): New file with new macros * gas/dwarf2dbg.c (get_filenum, out_file_list): Default and call new macros.
2009-01-15 12:42:52 +00:00
want64=true
;;
sparc64-*-freebsd* | sparc64-*-kfreebsd*-gnu)
targ_defvec=bfd_elf64_sparc_freebsd_vec
targ_selvecs="bfd_elf64_sparc_vec bfd_elf32_sparc_vec sunos_big_vec"
;;
sparc64-*-netbsd* | sparc64-*-openbsd*)
targ_defvec=bfd_elf64_sparc_vec
targ_selvecs="bfd_elf32_sparc_vec sunos_big_vec"
want64=true
;;
1999-05-03 07:29:11 +00:00
#endif /* BFD64 */
am34-*-linux* | am33_2.0-*-linux*)
targ_defvec=bfd_elf32_am33lin_vec
;;
1999-05-03 07:29:11 +00:00
arc-*-elf*)
targ_defvec=bfd_elf32_littlearc_vec
targ_selvecs=bfd_elf32_bigarc_vec
;;
* elf32-arm.c (elf32_arm_nacl_plt0_entry, elf32_arm_nacl_plt_entry): New variables. (struct elf32_arm_link_hash_table): New member `nacl_p'. (elf32_arm_link_hash_table_create): Initialize it. (elf32_arm_nacl_link_hash_table_create): New function. (arm_movw_immediate, arm_movt_immediate): New functions. (elf32_arm_populate_plt_entry): Test HTAB->nacl_p. (elf32_arm_finish_dynamic_sections): Likewise. (elf32_arm_output_plt_map_1): Likewise. (bfd_elf32_littlearm_nacl_vec, bfd_elf32_bigarm_nacl_vec): New backend vector stanza. (elf32_arm_nacl_modify_segment_map): New function. * config.bfd: Handle arm-*-nacl*, armeb-*-nacl*. * targets.c: Support bfd_elf32_{big,little}_nacl_vec. * configure.in: Likewise. (bfd_elf32_bigarm_nacl_vec): Add elf-nacl.lo here. (bfd_elf32_littlearm_nacl_vec): Likewise. (bfd_elf32_bigarm_vec, bfd_elf32_littlearm_vec): Likewise. (bfd_elf32_bigarm_symbian_vec): Likewise. (bfd_elf32_littlearm_symbian_vec): Likewise. (bfd_elf32_bigarm_vxworks_vec): Likewise. (bfd_elf32_littlearm_vxworks_vec): Likewise. * configure: Regenerated. * configure.tgt (arm-*-nacl*): Match it. * config/te-nacl.h (FPU_DEFAULT, EABI_DEFAULT): Define. (LOCAL_LABELS_DOLLAR): Define. * config/tc-arm.c (elf32_arm_target_format) [TE_NACL]: Use nacl format variants. * gas/elf/elf.exp (run_elf_list_test): Treat arm-*-nacl* targets as -armeabi. * gas/arm/any-idiv.d: Match *-*-nacl* targets too. * gas/arm/arch4t.d: Likewise. * gas/arm/arch4t-eabi.d: Likewise. * gas/arm/attr-any-armv4t.d: Likewise. * gas/arm/attr-any-thumbv6.d: Likewise. * gas/arm/attr-cpu-directive.d: Likewise. * gas/arm/attr-default.d: Likewise. * gas/arm/attr-march-all.d: Likewise. * gas/arm/attr-march-armv1.d: Likewise. * gas/arm/attr-march-armv2a.d: Likewise. * gas/arm/attr-march-armv2.d: Likewise. * gas/arm/attr-march-armv2s.d: Likewise. * gas/arm/attr-march-armv3.d: Likewise. * gas/arm/attr-march-armv3m.d: Likewise. * gas/arm/attr-march-armv4.d: Likewise. * gas/arm/attr-march-armv4t.d: Likewise. * gas/arm/attr-march-armv4txm.d: Likewise. * gas/arm/attr-march-armv4xm.d: Likewise. * gas/arm/attr-march-armv5.d: Likewise. * gas/arm/attr-march-armv5t.d: Likewise. * gas/arm/attr-march-armv5te.d: Likewise. * gas/arm/attr-march-armv5tej.d: Likewise. * gas/arm/attr-march-armv5texp.d: Likewise. * gas/arm/attr-march-armv5txm.d: Likewise. * gas/arm/attr-march-armv6.d: Likewise. * gas/arm/attr-march-armv6j.d: Likewise. * gas/arm/attr-march-armv6k.d: Likewise. * gas/arm/attr-march-armv6k+sec.d: Likewise. * gas/arm/attr-march-armv6kt2.d: Likewise. * gas/arm/attr-march-armv6-m.d: Likewise. * gas/arm/attr-march-armv6-m+os.d: Likewise. * gas/arm/attr-march-armv6s-m.d: Likewise. * gas/arm/attr-march-armv6t2.d: Likewise. * gas/arm/attr-march-armv6z.d: Likewise. * gas/arm/attr-march-armv6zk.d: Likewise. * gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/arm/attr-march-armv6zt2.d: Likewise. * gas/arm/attr-march-armv7-a.d: Likewise. * gas/arm/attr-march-armv7a.d: Likewise. * gas/arm/attr-march-armv7-a+idiv.d: Likewise. * gas/arm/attr-march-armv7-a+mp.d: Likewise. * gas/arm/attr-march-armv7-a+sec.d: Likewise. * gas/arm/attr-march-armv7-a+sec+virt.d: Likewise. * gas/arm/attr-march-armv7-a+virt.d: Likewise. * gas/arm/attr-march-armv7.d: Likewise. * gas/arm/attr-march-armv7em.d: Likewise. * gas/arm/attr-march-armv7-m.d: Likewise. * gas/arm/attr-march-armv7m.d: Likewise. * gas/arm/attr-march-armv7-r.d: Likewise. * gas/arm/attr-march-armv7r.d: Likewise. * gas/arm/attr-march-armv7-r+mp.d: Likewise. * gas/arm/attr-march-iwmmxt2.d: Likewise. * gas/arm/attr-march-iwmmxt.d: Likewise. * gas/arm/attr-march-xscale.d: Likewise. * gas/arm/attr-mcpu.d: Likewise. * gas/arm/attr-mfpu-arm1020e.d: Likewise. * gas/arm/attr-mfpu-arm1020t.d: Likewise. * gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * gas/arm/attr-mfpu-arm7500fe.d: Likewise. * gas/arm/attr-mfpu-fpa10.d: Likewise. * gas/arm/attr-mfpu-fpa11.d: Likewise. * gas/arm/attr-mfpu-fpa.d: Likewise. * gas/arm/attr-mfpu-fpe2.d: Likewise. * gas/arm/attr-mfpu-fpe3.d: Likewise. * gas/arm/attr-mfpu-fpe.d: Likewise. * gas/arm/attr-mfpu-maverick.d: Likewise. * gas/arm/attr-mfpu-neon.d: Likewise. * gas/arm/attr-mfpu-neon-fp16.d: Likewise. * gas/arm/attr-mfpu-softfpa.d: Likewise. * gas/arm/attr-mfpu-softvfp.d: Likewise. * gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * gas/arm/attr-mfpu-vfp10.d: Likewise. * gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * gas/arm/attr-mfpu-vfp3.d: Likewise. * gas/arm/attr-mfpu-vfp9.d: Likewise. * gas/arm/attr-mfpu-vfp.d: Likewise. * gas/arm/attr-mfpu-vfpv2.d: Likewise. * gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv3.d: Likewise. * gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/arm/attr-mfpu-vfpxd.d: Likewise. * gas/arm/attr-names.d: Likewise. * gas/arm/attr-order.d: Likewise. * gas/arm/attr-override-cpu-directive.d: Likewise. * gas/arm/attr-override-mcpu.d: Likewise. * gas/arm/got_prel.d: Likewise. * gas/arm/mapdir.d: Likewise. * gas/arm/mapmisc.d: Likewise. * gas/arm/mapsecs.d: Likewise. * gas/arm/mapshort-eabi.d: Likewise. * gas/arm/mapshort-elf.d: Likewise. * gas/arm/mov-highregs-any.d: Likewise. * gas/arm/mov-lowregs-any.d: Likewise. * gas/arm/pr12198-1.d: Likewise. * gas/arm/pr12198-2.d: Likewise. * gas/arm/thumb.d: Likewise. * gas/arm/thumb-eabi.d: Likewise. * gas/arm/thumbrel.d: Likewise. * configure.tgt (arm*-*-nacl*, arm*b-*-nacl*): Handle them. * emulparams/armelf_nacl.sh: New file. * emulparams/armelfb_nacl.sh: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add earmelf_nacl.c and earmelfb_nacl.c here. (earmelf_nacl.c, earmelfb_nacl.c): New targets. * Makefile.in: Regenerated. * ld-arm/arm-elf.exp (armelftests): Split out into ... (armelftests_common, armelftests_nonacl): ... these two. (armeabitests): Split out into ... (armeabitests_common, armeabitests_nonacl): ... these two. Omit _nonacl sets for arm*-*-nacl* targets. * ld-arm/farcall-mix.d: Don't match exact addresses, only symbolic ones. * ld-arm/farcall-mix2.d: Likewise. * ld-arm/farcall-group.d: Likewise. * ld-arm/tls-gdesc-got.d: Match variant file formats too. Accept some variation in exact addresses. * ld-arm/thumb2-b-interwork.d: Match variant file formats too. Fix regexps not to care about exact addresses where not relevant. * ld-arm/thumb2-bl-undefweak.d: Match any hex strings, not any strings of particular exact lengths. * ld-arm/thumb2-bl-undefweak1.d: Likewise. * ld-arm/arm-app.r: Match variant file formats too. * ld-arm/arm-app-abs32.r: Likewise. * ld-arm/arm-lib.d: Likewise. * ld-arm/arm-lib.r: Likewise. * ld-arm/arm-static-app.r: Likewise. * ld-arm/armv4-bx.d: Likewise. * ld-arm/data-only-map.d: Likewise. * ld-arm/group-relocs.d: Likewise. * ld-arm/jump19.d: Likewise. * ld-arm/reloc-boundaries.d: Likewise. * ld-arm/thumb1-bl.d: Likewise. * ld-arm/thumb2-bl.d: Likewise. * ld-arm/tls-app.d: Likewise. * ld-arm/tls-app.r: Likewise. * ld-arm/tls-gdierelax.d: Likewise. * ld-arm/tls-gdierelax2.d: Likewise. * ld-arm/tls-gdlerelax.d: Likewise. * ld-arm/tls-lib.d: Likewise. * ld-arm/tls-lib.r: Likewise. * ld-arm/tls-mixed.r: Likewise. * ld-arm/vfp11-fix-none.d: Likewise. * ld-arm/vfp11-fix-scalar.d: Likewise. * ld-arm/vfp11-fix-vector.d: Likewise. * ld-arm/arm-static-app.d: Likewise. Fix regexps not to care about exact number of leading spaces. * ld-arm/arm-app-abs32.d: Likewise. * ld-arm/fix-arm1176-off.d: Likewise. * ld-arm/fix-arm1176-on.d: Likewise. * ld-arm/arm-elf.exp: Treat nacl targets like eabi targets.
2012-04-12 13:01:15 +00:00
arm-*-nacl*)
targ_defvec=bfd_elf32_littlearm_nacl_vec
targ_selvecs="bfd_elf32_bigarm_nacl_vec bfd_elf32_i386_nacl_vec"
targ64_selvecs="bfd_elf32_x86_64_nacl_vec bfd_elf64_x86_64_nacl_vec"
targ_archs="$targ_archs bfd_i386_arch"
;;
armeb-*-nacl*)
targ_defvec=bfd_elf32_bigarm_nacl_vec
targ_selvecs="bfd_elf32_littlearm_nacl_vec bfd_elf32_i386_nacl_vec"
targ64_selvecs="bfd_elf32_x86_64_nacl_vec bfd_elf64_x86_64_nacl_vec"
targ_archs="$targ_archs bfd_i386_arch"
;;
armeb-*-netbsdelf*)
targ_defvec=bfd_elf32_bigarm_vec
targ_selvecs="bfd_elf32_littlearm_vec armnetbsd_vec"
;;
arm-*-netbsdelf*)
targ_defvec=bfd_elf32_littlearm_vec
targ_selvecs="bfd_elf32_bigarm_vec armnetbsd_vec"
;;
2001-09-14 11:46:40 +00:00
arm-*-netbsd* | arm-*-openbsd*)
targ_defvec=armnetbsd_vec
targ_selvecs="bfd_elf32_littlearm_vec bfd_elf32_bigarm_vec"
targ_underscore=yes
2003-07-12 11:16:46 +00:00
targ_cflags=-D__QNXTARGET__
;;
2002-07-30 17:32:30 +00:00
arm-*-nto* | nto*arm*)
targ_defvec=bfd_elf32_littlearm_vec
targ_selvecs=bfd_elf32_bigarm_vec
2002-07-30 17:32:30 +00:00
;;
1999-05-03 07:29:11 +00:00
arm-*-riscix*)
targ_defvec=riscix_vec
;;
arm-epoc-pe*)
targ_defvec=arm_epoc_pe_little_vec
targ_selvecs="arm_epoc_pe_little_vec arm_epoc_pe_big_vec arm_epoc_pei_little_vec arm_epoc_pei_big_vec"
targ_underscore=no
2001-08-01 15:18:32 +00:00
targ_cflags=-DARM_COFF_BUGFIX
1999-05-03 07:29:11 +00:00
;;
arm-wince-pe | arm-*-wince | arm*-*-mingw32ce* | arm*-*-cegcc*)
bfd * Makefile.am: Add rules to build pe-arm-wince.lo and pei-arm-wince.lo objects. * Makefile.in: Regenerate. * pe-arm-wince.c: New file. * pei-arm-wince.c: New file. * pei-arm.c: Remove ARM_WINCE block. * pe-arm.c: Remove ARM_WINCE block. Rename bfd_arm_pe_allocate_interworking_sections, bfd_arm_pe_get_bfd_for_interworking, and bfd_arm_pe_process_before_allocation to bfd_armpe_allocate_interworking_sections, bfd_armpe_get_bfd_for_interworking, and bfd_armpe_process_before_allocation. Move them before including bfd.h. * bfd.c: ARM wince bfd format names were renamed. Adjust. * coff-arm.c [ARM_WINCE]: Adjust so Windows CE doesn't end up with unexpected/conflicting relocs. * targets.c: The arm-wince-pe target got its own new vector. Adjust. * config.bfd: Likewise. * configure.in: Likewise. * configure: Regenerate. binutils * configure.in: Split arm-pe and arm-wince-pe. Build dlltool with -DDLLTOOL_ARM_WINCE for Windows CE case. * configure: Regenerate. * dlltool.c: Add support for arm-wince. gas * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h. * Makefile.in: Regenerate. * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were renamed. Adjust. ld * Makefile.am: Split arm-wince into its own emulation. * Makefile.in: Regenerate. * configure.tgt: Set targ_emul to arm_wince_pe for ARM Windows CE targets. * pe-dll.c : Define PE_ARCH_arm_wince. (pe_detail_list): Add PE_ARCH_arm_wince case. (make_one): Handle PE_ARCH_arm_epoc and PE_ARCH_arm_wince cases. * emulparams/arm_wince_pe.sh: New file. * emultempl/pe.em: Handle new TARGET_IS_arm_wince_pe define. Remap bfd_arm_allocate_interworking_sections, bfd_arm_get_bfd_for_interworking and bfd_arm_process_before_allocation for arm-pe and arm-wince-pe targets too. (gld_${EMULATION_NAME}_recognized_file): Handle arm-wince and arm-epoc bfd format names.
2006-08-21 08:12:46 +00:00
targ_defvec=arm_wince_pe_little_vec
targ_selvecs="arm_wince_pe_little_vec arm_wince_pe_big_vec arm_wince_pei_little_vec arm_wince_pei_big_vec"
2000-02-28 18:56:11 +00:00
targ_underscore=no
targ_cflags="-DARM_WINCE -DARM_COFF_BUGFIX"
2000-02-28 18:56:11 +00:00
;;
1999-05-03 07:29:11 +00:00
arm-*-pe*)
targ_defvec=armpe_little_vec
targ_selvecs="armpe_little_vec armpe_big_vec armpei_little_vec armpei_big_vec"
targ_underscore=yes
;;
arm-*-aout | armel-*-aout)
1999-05-03 07:29:11 +00:00
targ_defvec=aout_arm_little_vec
targ_selvecs=aout_arm_big_vec
;;
armeb-*-aout)
targ_defvec=aout_arm_big_vec
targ_selvecs=aout_arm_little_vec
;;
arm-*-coff)
targ_defvec=armcoff_little_vec
targ_selvecs=armcoff_big_vec
targ_underscore=yes
;;
2000-12-01 18:37:16 +00:00
arm-*-rtems*)
targ_defvec=bfd_elf32_littlearm_vec
targ_selvecs=bfd_elf32_bigarm_vec
;;
armeb-*-elf | arm*b-*-linux-*)
targ_defvec=bfd_elf32_bigarm_vec
targ_selvecs=bfd_elf32_littlearm_vec
;;
bfd: * config.bfd (thumb-*-oabi): Don't handle in list of obsolete targets. (strongarm*, thumb*, xscale*): Remove architectures. (strongarm-*-kaos*, thumb-*-coff, thumb-*-elf, thumb-epoc-pe*, thumb-*-pe*, strongarm-*-elf, strongarm-*-coff, xscale-*-elf, xscale-*-coff): Remove targets. binutils: * configure.in (thumb-*-pe*): Remove. * configure: Regenerate. binutils/testsuite: * binutils-all/objcopy.exp (*arm*-*-coff): Change to arm*-*-coff. (xscale-*-coff, thumb*-*-coff, thumb*-*-pe): Don't handle. gas: * configure.tgt (strongarm*be, strongarm*b, strongarm*, xscale*be|xscale*b, xscale*): Remove architectures. (thumb-*-coff, thumb-*-rtems*, thumb-*-elf, thumb-epoc-pe, thumb-*-pe, xscale-*-coff, xscale-*-elf): Remove targets. gas/testsuite: * gas/all/gas.exp (*arm*-*-coff): Change to arm*-*-coff. (thumb*-*-coff, thumb*-*-pe*): Don;t handle. * gas/arm/arm.exp (*arm*-*-*): Change to arm*-*-*. (*xscale*-*-*): Don't handle. * gas/cfi/cfi.exp (xscale*-*): Don't handle. * gas/elf/elf.exp (*arm*-*-*): Change to arm*-*-*. (xscale*-*-*): Don't handle. ld: * configure.tgt (thumb-*-linux-* | thumb-*-uclinux*, strongarm-*-coff, strongarm-*-elf, strongarm-*-kaos*, thumb-*-coff, thumb-*-elf, thumb-epoc-pe, thumb-*-pe, xscale-*-coff, xscale-*-elf): Remove targets. ld/testsuite: * ld-selective/selective.exp (xscale-*-*): Don't handle. * ld-srec/srec.exp (strongarm*-*-*, xscale*-*-*, thumb-*-*): Don't handle. (*arm*-*-*): Change to arm*-*-*. (strongarm*-*-coff, xscale*-*-coff, thumb-*-coff*, thumb-*-pe*, thumb-*-elf*, strongarm*-*-*, thumb-*-*): Remove xfails. * ld-undefined/undefined.exp (thumb*-*-pe*, thumb*-*-pe*): Remove commented-out xfails. (thumb-elf): Remove reference in comment. * lib/ld-lib.exp (strongarm*-*-*, xscale*-*-*, thumb-*-*): Don't handle.
2011-04-06 17:09:56 +00:00
arm-*-kaos*)
targ_defvec=bfd_elf32_littlearm_vec
targ_selvecs=bfd_elf32_bigarm_vec
;;
arm-*-elf | arm-*-freebsd* | arm*-*-linux-* | arm*-*-conix* | \
arm*-*-uclinux* | arm-*-kfreebsd*-gnu | \
* config.bfd (arm*-*-symbianelf*): Use OS-specific target vectors. * configure.in (bfd_elf32_bigarm_symbian_vec): Add it. (bfd_elf32_littlearm_symbian_vec): Likewise. * configure: Regenerated. * elf-bfd.h (elf_backend_data): Add dynamic_sec_flags. * elf32-arm.h (PLT_HEADER_SIZE): Do not define. (PLT_ENTRY_SIZE): Likewise. (bfd_vma_elf32_arm_symbian_plt_entry): New variable. (elf32_arm_link_hash_table): Add plt_header_size, plt_entry_size, and symbian_p. (create_got_section): Don't create sections when generating BPABI objects. (elf32_arm_create_dynamic_sections): Tidy. (elf32_arm_link_hash_table_create): Set plt_header_size, plt_entry_size, and symbian_p. (elf32_arm_check_relocs): Do not mark .rel.dyn as loadable when generating BPABI objects. (allocate_dynrelocs): Use htab->plt_header_size, not PLT_HEADER_SIZE. Do not add to .got.plt when generating BPABI objects. (elf32_arm_finish_dynamic_symbol): Generate Symbian OS PLTs. * elfarm-nabi.c: Add SymbianOS target vectors. * elflink.c (_bfd_elf_create_got_section): Use dynamic_sec_flags. (_bfd_elf_link_create_dynamic_sections): Likewise. * elfxx-target.h (ELF_DYNAMIC_SEC_FLAGS): New macro. (elfNN_bed): Use it. * targets.c (bfd_elf32_bigarm_symbian_vec): New variable. (bfd_elf32_littlearm_symbian_vec): Likewise. (_bfd_target_vector): Add them. * Makefile.am (TARG_ENV_HFILES): Add te-symbian.h. * Makefile.in: Regenerated. * configure.in: Set em for arm*-*-symbianelf*. * configure: Regenerated. * config/tc-arm.c (elf32_arm_target_format): Use Symbian target vectors when appropriate. * config/te-symbian.h: New file. * Makefile.am (ALL_EMULATIONS): Add earmsymbian.o. (earmsymbian.c): New target. * configure.tgt: Use armsymbian emulation for arm*-*-symbianelf*. * Makefile.in: Regenerated. * aclocal.m4: Likewise. * configure: Likewise. * emulparams/armsymbian.sh: New file.
2004-09-03 17:15:44 +00:00
arm*-*-eabi* )
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_littlearm_vec
targ_selvecs=bfd_elf32_bigarm_vec
;;
arm*-*-vxworks | arm*-*-windiss)
targ_defvec=bfd_elf32_littlearm_vxworks_vec
targ_selvecs=bfd_elf32_bigarm_vxworks_vec
;;
* config.bfd (arm*-*-symbianelf*): Use OS-specific target vectors. * configure.in (bfd_elf32_bigarm_symbian_vec): Add it. (bfd_elf32_littlearm_symbian_vec): Likewise. * configure: Regenerated. * elf-bfd.h (elf_backend_data): Add dynamic_sec_flags. * elf32-arm.h (PLT_HEADER_SIZE): Do not define. (PLT_ENTRY_SIZE): Likewise. (bfd_vma_elf32_arm_symbian_plt_entry): New variable. (elf32_arm_link_hash_table): Add plt_header_size, plt_entry_size, and symbian_p. (create_got_section): Don't create sections when generating BPABI objects. (elf32_arm_create_dynamic_sections): Tidy. (elf32_arm_link_hash_table_create): Set plt_header_size, plt_entry_size, and symbian_p. (elf32_arm_check_relocs): Do not mark .rel.dyn as loadable when generating BPABI objects. (allocate_dynrelocs): Use htab->plt_header_size, not PLT_HEADER_SIZE. Do not add to .got.plt when generating BPABI objects. (elf32_arm_finish_dynamic_symbol): Generate Symbian OS PLTs. * elfarm-nabi.c: Add SymbianOS target vectors. * elflink.c (_bfd_elf_create_got_section): Use dynamic_sec_flags. (_bfd_elf_link_create_dynamic_sections): Likewise. * elfxx-target.h (ELF_DYNAMIC_SEC_FLAGS): New macro. (elfNN_bed): Use it. * targets.c (bfd_elf32_bigarm_symbian_vec): New variable. (bfd_elf32_littlearm_symbian_vec): Likewise. (_bfd_target_vector): Add them. * Makefile.am (TARG_ENV_HFILES): Add te-symbian.h. * Makefile.in: Regenerated. * configure.in: Set em for arm*-*-symbianelf*. * configure: Regenerated. * config/tc-arm.c (elf32_arm_target_format): Use Symbian target vectors when appropriate. * config/te-symbian.h: New file. * Makefile.am (ALL_EMULATIONS): Add earmsymbian.o. (earmsymbian.c): New target. * configure.tgt: Use armsymbian emulation for arm*-*-symbianelf*. * Makefile.in: Regenerated. * aclocal.m4: Likewise. * configure: Likewise. * emulparams/armsymbian.sh: New file.
2004-09-03 17:15:44 +00:00
arm*-*-symbianelf*)
targ_defvec=bfd_elf32_littlearm_symbian_vec
targ_selvecs=bfd_elf32_bigarm_symbian_vec
;;
arm9e-*-elf)
targ_defvec=bfd_elf32_littlearm_vec
targ_selvecs=bfd_elf32_bigarm_vec
;;
1999-05-03 07:29:11 +00:00
2000-03-27 08:39:14 +00:00
avr-*-*)
targ_defvec=bfd_elf32_avr_vec
;;
bfin-*-*)
targ_defvec=bfd_elf32_bfin_vec
* config.bfd (bfin-*-*): Add bfd_elf32_bfinfdpic_vec. * configure.in: Likewise. * configure: Regenerate. * elf32-bfin.c: Include "elf/dwarf2.h" and "hashtab.h". (BFIN_RELOC_MAX): Now 0x21. (bfin_howto_table, bfin_reloc_map): Add FD-PIC relocs. (bfd_elf32_bfinfdpic_vec): Declare. (IS_FDPIC): New macro. (struct bfinfdpic_elf_link_hash_table): New struct. (bfinfdpic_hash_table, bfinfdpic_got_section, bfinfdpic_gotrel_section, bfinfdpic_gotfixup_section, bfinfdpic_plt_setion, bfinfdpic_pltrel_section, bfinfdpic_relocs_info, bfinfdpic_got_initial_offset, bfinfdpic_plt_initial_offset): Accessor macros for it. (BFINFDPIC_SYM_LOCAL, BFINFDPIC_FUNCDESC_LOCAL): New macros. (struct bfinfdpic_relocs_info): New struct. (LZPLT_RESOLVER_EXTRA, LZPLT_NORMAL_SIZE, LZPLT_ENTRIES, BFINFDPIC_LZPLT_BLOCK_SIZE, BFINFDPIC_LZPLT_RESOLV_LOC, DEFAULT_STACK_SIZE): New macros. (bfinfdpic_elf_link_hash_table_create, bfinfdpic_relocs_info_hash, bfinfdpic_relocs_info_eq, bfinfdpics_relocs_info_find, bfinfdpic_relocs_info_for_global, bfinfdpic_relocs_info_for_local, bfinfdpic_pic_merge_early_relocs_info, _bfinfdpic_add_dyn_reloc, _bfinfdpic_add_rofixup, _bfinfdpic_osec_to_segment, _bfinfdpic_osec_readonly_p, bfinfdpic_relocate_section, bfinfdpic_check_relocs, bfinfdpic_gc_sweep_hook, _bfinfdpic_link_omit_section_dynsym, _bfin_create_got_section, elf32_bfinfdpic_create_dynamic_sections, _bfinfdpic_get_fd_entry, _bfinfdpic_compute_got_alloc_data, _bfinfdpic_get_got_entry, _bfinfdpic_assign_got_entries, _bfinfdpic_assign_plt_entries, _bfinfdpic_resolve_final_relocs_info, elf32_bfinfdpic_size_dynamic_sections, elf32_bfinfdpic_always_size_sections, elf32_bfinfdpic_modify_segment_map, _bfinfdpic_count_got_plt_entries, elf32_bfinfdpic_finish_dynamic_sections, elf32_bfinfdpic_adjust_dynamic_symbol, elf32_bfinfdpic_finish_dynamic_symbol, elf32_bfinfdpic_elf_use_relative_eh_frame, elf32_bfinfdpic_elf_encode_eh_address, elf32_bfin_object_p, bfin_elf_copy_private_bfd_data, elf32_bfinfdpic_copy_private_bfd_data, (struct _bfinfdpic_dynamic_got_info, struct _bfinfdpic_dynamic_got_plt_info): New structs. (elf32_bfin_print_private_bfd_data): Print PIC flags. (elf32_bfin_merge_private_bfd_data): Extend to support FD-PIC. (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, elf32_bed, elf_backend_got_header_size, bfd_elf32_bfd_link_hash_table_create, elf_backend_always_size_sectinos, elf_backend_modify_segment_map, bfd_elf32_bfd_copy_private_bfd_data, elf_backend_create_dynamic_sections, elf_backend_adjust_dynamic_symbol, elf_backend_size_dynamic_sections, elf_backend_finish_dynamic_symbol, elf_backend_finish_dynamic_sections, elf_backend_relocate_section, elf_backend_can_make_relative_eh_frame, elf_backend_check_relocs, elf_backend_can_make_ldsa_relative_eh_frame, elf_backend_may_use_rel_p, elf_backend_may_use_rela_p, elf_backend_default_use_rela_p, elf_backend_omit_section_dynsym): Redefine these macros and include "elf32-target.h" again to create the elf32-bfinfdpic target. * reloc.c (BFD_RELOC_BFIN_GOT17M4, BFD_RELOC_BFIN_GOTHI, BFD_RELOC_BFIN_GOTLO, BFD_RELOC_BFIN_FUNCDESC, BFD_RELOC_BFIN_FUNCDESC_GOT17M4, BFD_RELOC_BFIN_FUNCDESC_GOTHI, BFD_RELOC_BFIN_FUNCDESC_GOTLO, BFD_RELOC_BFIN_FUNCDESC_VALUE, BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4, BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI, BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO, BFD_RELOC_BFIN_GOTOFFHI, BFD_RELOC_BFIN_GOTOFFLO): New. * targets.c (bfd_elf32_bfinfdpic_vec): New bfd_target. (_bfd_target_vector): Add it. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate.
2006-03-26 00:38:42 +00:00
targ_selvecs=bfd_elf32_bfinfdpic_vec
targ_underscore=yes
;;
1999-05-03 07:29:11 +00:00
c30-*-*aout* | tic30-*-*aout*)
targ_defvec=tic30_aout_vec
;;
c30-*-*coff* | tic30-*-*coff*)
targ_defvec=tic30_coff_vec
;;
2003-06-20 08:36:19 +00:00
c4x-*-*coff* | tic4x-*-*coff* | tic4x-*-rtems*)
2002-08-28 10:38:51 +00:00
targ_defvec=tic4x_coff1_vec
targ_selvecs="tic4x_coff1_beh_vec tic4x_coff2_vec tic4x_coff2_beh_vec tic4x_coff0_vec tic4x_coff0_beh_vec"
targ_underscore=yes
;;
c54x*-*-*coff* | tic54x-*-*coff*)
targ_defvec=tic54x_coff1_vec
targ_selvecs="tic54x_coff1_beh_vec tic54x_coff2_vec tic54x_coff2_beh_vec tic54x_coff0_vec tic54x_coff0_beh_vec"
targ_underscore=yes
;;
cr16-*-elf* | cr16*-*-uclinux*)
targ_defvec=bfd_elf32_cr16_vec
targ_underscore=yes
;;
cr16c-*-elf*)
targ_defvec=bfd_elf32_cr16c_vec
targ_underscore=yes
;;
* config.bfd: Support crisv32-*-* like cris-*-*. * archures.c (bfd_mach_cris_v0_v10, bfd_mach_cris_v32) (bfd_mach_cris_v10_v32): New macros. * cpu-cris.c: Tweak formatting. (get_compatible): New function. (N): New macro. (bfd_cris_arch_compat_v10_v32, bfd_cris_arch_v32): New bfd_arch_info_type:s. (bfd_cris_arch): Use bfd_mach_cris_v0_v10 for member mach, get_compatible for member compatible and link bfd_cris_arch_v32 as next. * elf32-cris.c (cris_elf_pcrel_reloc) (cris_elf_set_mach_from_flags): New functions. (cris_elf_howto_table) <R_CRIS_8_PCREL, R_CRIS_16_PCREL> <R_CRIS_32_PCREL>: Use cris_elf_pcrel_reloc. (cris_elf_grok_prstatus, cris_elf_grok_psinfo): Give correct numbers for bfd_mach_cris_v32. (PLT_ENTRY_SIZE_V32): New macro. (elf_cris_plt0_entry): Drop last comma in initializer. (elf_cris_plt0_entry_v32, elf_cris_plt_entry_v32) (elf_cris_pic_plt0_entry_v32, elf_cris_pic_plt_entry_v32): New PLT initializers. (cris_elf_relocate_section): Change all "%B(%A)" messages to "%B, section %A". (elf_cris_finish_dynamic_symbol): Do V32-specific PLT entries. (elf_cris_finish_dynamic_sections): Similar. (elf_cris_adjust_dynamic_symbol): Similar. (cris_elf_check_relocs): Change all "%B(%A)" messages to "%B, section %A". <switch with PIC relocs>: Emit error and return FALSE for bfd_mach_cris_v10_v32. <case R_CRIS_8_PCREL, case R_CRIS_16_PCREL, case R_CRIS_32_PCREL>: Emit warning when generating textrel reloc. (cris_elf_object_p): Call cris_elf_set_mach_from_flags. (cris_elf_final_write_processing): Set flags according to mach. (cris_elf_print_private_bfd_data): Display EF_CRIS_VARIANT_COMMON_V10_V32 and EF_CRIS_VARIANT_V32. (cris_elf_merge_private_bfd_data): Drop variables old_flags, new_flags. Don't call cris_elf_final_write_processing. Don't look at the actual elf header flags at all; use bfd_get_symbol_leading_char to check ibfd, obfd. Trap difference in bfd_get_mach for ibfd and obfd and handle merging of compatible objects. (bfd_elf32_bfd_copy_private_bfd_data): Define. * reloc.c (BFD_RELOC_CRIS_SIGNED_8, BFD_RELOC_CRIS_UNSIGNED_8) (BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_UNSIGNED_16) (BFD_RELOC_CRIS_LAPCQ_OFFSET): New relocs. * bfd-in2.h, libbfd.h: Regenerate.
2004-11-04 14:58:13 +00:00
cris-*-* | crisv32-*-*)
targ_defvec=cris_aout_vec
targ_selvecs="bfd_elf32_us_cris_vec bfd_elf32_cris_vec ieee_vec"
targ_underscore=yes # Note: not true for bfd_elf32_cris_vec.
;;
2004-07-07 17:28:53 +00:00
crx-*-elf*)
targ_defvec=bfd_elf32_crx_vec
targ_underscore=yes
;;
1999-05-03 07:29:11 +00:00
d10v-*-*)
targ_defvec=bfd_elf32_d10v_vec
;;
2002-05-28 14:08:47 +00:00
dlx-*-elf*)
targ_defvec=bfd_elf32_dlx_big_vec
targ_selvecs="bfd_elf32_dlx_big_vec"
;;
1999-05-03 07:29:11 +00:00
d30v-*-*)
targ_defvec=bfd_elf32_d30v_vec
;;
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
epiphany-*-elf)
targ_defvec=bfd_elf32_epiphany_vec
;;
fido-*-elf* )
targ_defvec=bfd_elf32_m68k_vec
targ_selvecs="m68kcoff_vec ieee_vec"
;;
1999-05-03 07:29:11 +00:00
fr30-*-elf)
targ_defvec=bfd_elf32_fr30_vec
;;
* configure.in (bfd_elf32_frvfdpic_vec): New. * configure: Rebuilt. * targets.c (bfd_elf32_frvfdpic_vec): New. * config.bfd: Enable it on frv-*-elf and frv-*-*linux*, as default on the latter. * elf32-frv.c: Prefix all identifiers added for FDPIC support with frvfdpic instead of frv. Rearrange elf-target macros such that the FDPIC-specific ones are only defined for this new target vector. (bfd_elf32_frvfdpic_vec): Declare. (IS_FDPIC): New. (elf32_frv_relocate_section): Use it to enable segment checking and to control rofixup emission. Add output section vma to applied relocation in non-LOAD non-ALLOC sections. Use _bfd_error_handler for errors. (_frv_create_got_section): Create .rel.got and .rofixup only in FDPIC. Create non-dynamic _gp at .got+2048 in non-FDPIC, like the linker script. (elf32_frvfdpic_size_dynamic_sections): Assume FDPIC. (elf32_frvfdpic_modify_segment_map): Likewise. (elf32_frv_finish_dynamic_sections): New, do-nothing. (elf32_frvfdpic_finish_dynamic_sections): Assume FDPIC. Improve error message if we miscompute the rofixup size. (frvfdpic_elf_use_relative_eh_frame): Assume FDPIC. (frvfdpic_elf_encode_eh_address): Likewise. (elf32_frv_check_relocs): Reject FDPIC-only relocs in non-FDPIC. Record relocs only in FDPIC. Make sure _gp is defined for GPREL relocs. Reject unknown relocation types. (elf32_frv_object_p): Make sure target vector matches FDPIC bits. (frv_elf_merge_private_bfd_data): Likewise. (ELF_MAXPAGESIZE): Revert to 0x1000 for elf32-frv; keep it as 0x4000 for newly-added elf32-frvfdpic.
2004-05-06 02:46:29 +00:00
frv-*-elf)
targ_defvec=bfd_elf32_frv_vec
* configure.in (bfd_elf32_frvfdpic_vec): New. * configure: Rebuilt. * targets.c (bfd_elf32_frvfdpic_vec): New. * config.bfd: Enable it on frv-*-elf and frv-*-*linux*, as default on the latter. * elf32-frv.c: Prefix all identifiers added for FDPIC support with frvfdpic instead of frv. Rearrange elf-target macros such that the FDPIC-specific ones are only defined for this new target vector. (bfd_elf32_frvfdpic_vec): Declare. (IS_FDPIC): New. (elf32_frv_relocate_section): Use it to enable segment checking and to control rofixup emission. Add output section vma to applied relocation in non-LOAD non-ALLOC sections. Use _bfd_error_handler for errors. (_frv_create_got_section): Create .rel.got and .rofixup only in FDPIC. Create non-dynamic _gp at .got+2048 in non-FDPIC, like the linker script. (elf32_frvfdpic_size_dynamic_sections): Assume FDPIC. (elf32_frvfdpic_modify_segment_map): Likewise. (elf32_frv_finish_dynamic_sections): New, do-nothing. (elf32_frvfdpic_finish_dynamic_sections): Assume FDPIC. Improve error message if we miscompute the rofixup size. (frvfdpic_elf_use_relative_eh_frame): Assume FDPIC. (frvfdpic_elf_encode_eh_address): Likewise. (elf32_frv_check_relocs): Reject FDPIC-only relocs in non-FDPIC. Record relocs only in FDPIC. Make sure _gp is defined for GPREL relocs. Reject unknown relocation types. (elf32_frv_object_p): Make sure target vector matches FDPIC bits. (frv_elf_merge_private_bfd_data): Likewise. (ELF_MAXPAGESIZE): Revert to 0x1000 for elf32-frv; keep it as 0x4000 for newly-added elf32-frvfdpic.
2004-05-06 02:46:29 +00:00
targ_selvecs=bfd_elf32_frvfdpic_vec
;;
* configure.in (bfd_elf32_frvfdpic_vec): New. * configure: Rebuilt. * targets.c (bfd_elf32_frvfdpic_vec): New. * config.bfd: Enable it on frv-*-elf and frv-*-*linux*, as default on the latter. * elf32-frv.c: Prefix all identifiers added for FDPIC support with frvfdpic instead of frv. Rearrange elf-target macros such that the FDPIC-specific ones are only defined for this new target vector. (bfd_elf32_frvfdpic_vec): Declare. (IS_FDPIC): New. (elf32_frv_relocate_section): Use it to enable segment checking and to control rofixup emission. Add output section vma to applied relocation in non-LOAD non-ALLOC sections. Use _bfd_error_handler for errors. (_frv_create_got_section): Create .rel.got and .rofixup only in FDPIC. Create non-dynamic _gp at .got+2048 in non-FDPIC, like the linker script. (elf32_frvfdpic_size_dynamic_sections): Assume FDPIC. (elf32_frvfdpic_modify_segment_map): Likewise. (elf32_frv_finish_dynamic_sections): New, do-nothing. (elf32_frvfdpic_finish_dynamic_sections): Assume FDPIC. Improve error message if we miscompute the rofixup size. (frvfdpic_elf_use_relative_eh_frame): Assume FDPIC. (frvfdpic_elf_encode_eh_address): Likewise. (elf32_frv_check_relocs): Reject FDPIC-only relocs in non-FDPIC. Record relocs only in FDPIC. Make sure _gp is defined for GPREL relocs. Reject unknown relocation types. (elf32_frv_object_p): Make sure target vector matches FDPIC bits. (frv_elf_merge_private_bfd_data): Likewise. (ELF_MAXPAGESIZE): Revert to 0x1000 for elf32-frv; keep it as 0x4000 for newly-added elf32-frvfdpic.
2004-05-06 02:46:29 +00:00
frv-*-*linux*)
targ_defvec=bfd_elf32_frvfdpic_vec
targ_selvecs=bfd_elf32_frv_vec
;;
1999-05-03 07:29:11 +00:00
2010-07-30 07:32:18 +00:00
moxie-*-elf | moxie-*-rtems | moxie-*-uclinux)
2012-09-13 22:24:51 +00:00
targ_defvec=bfd_elf32_bigmoxie_vec
targ_selvecs=bfd_elf32_littlemoxie_vec
2009-04-16 15:39:48 +00:00
;;
h8300*-*-rtemscoff*)
targ_defvec=h8300coff_vec
targ_underscore=yes
;;
h8300*-*-elf | h8300*-*-rtems*)
targ_defvec=bfd_elf32_h8300_vec
targ_underscore=yes
;;
1999-05-03 07:29:11 +00:00
h8300*-*-*)
targ_defvec=h8300coff_vec
targ_underscore=yes
;;
h8500-*-*)
targ_defvec=h8500coff_vec
targ_underscore=yes
;;
#ifdef BFD64
hppa*64*-*-linux-*)
2001-01-14 11:12:53 +00:00
targ_defvec=bfd_elf64_hppa_linux_vec
targ_selvecs=bfd_elf64_hppa_vec
want64=true
2000-07-09 07:23:07 +00:00
;;
hppa*64*-*-hpux11*)
targ_defvec=bfd_elf64_hppa_vec
2001-01-14 11:12:53 +00:00
targ_selvecs=bfd_elf64_hppa_linux_vec
targ_cflags=-DHPUX_LARGE_AR_IDS
want64=true
;;
#endif
2000-07-09 07:23:07 +00:00
hppa*-*-linux-*)
2001-01-14 11:12:53 +00:00
targ_defvec=bfd_elf32_hppa_linux_vec
targ_selvecs=bfd_elf32_hppa_vec
;;
hppa*-*-netbsd*)
targ_defvec=bfd_elf32_hppa_nbsd_vec
targ_selvecs="bfd_elf32_hppa_vec bfd_elf32_hppa_linux_vec"
;;
hppa*-*-*elf* | hppa*-*-lites* | hppa*-*-sysv4* | hppa*-*-openbsd*)
2000-07-09 07:23:07 +00:00
targ_defvec=bfd_elf32_hppa_vec
2001-01-14 11:12:53 +00:00
targ_selvecs=bfd_elf32_hppa_linux_vec
2000-07-09 07:23:07 +00:00
;;
1999-05-03 07:29:11 +00:00
hppa*-*-bsd*)
targ_defvec=som_vec
targ_selvecs=bfd_elf32_hppa_vec
;;
1999-05-03 07:29:11 +00:00
hppa*-*-hpux* | hppa*-*-hiux* | hppa*-*-mpeix*)
targ_defvec=som_vec
;;
hppa*-*-osf*)
targ_defvec=som_vec
targ_selvecs=bfd_elf32_hppa_vec
;;
1999-05-03 07:29:11 +00:00
i370-*-*)
2000-02-23 13:52:23 +00:00
targ_defvec=bfd_elf32_i370_vec
targ_selvecs="bfd_elf32_i370_vec"
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-sco3.2v5*coff)
1999-05-03 07:29:11 +00:00
targ_defvec=i386coff_vec
targ_selvecs=bfd_elf32_i386_vec
;;
i[3-7]86-*-sysv4* | i[3-7]86-*-unixware* | \
2003-05-16 16:30:27 +00:00
i[3-7]86-*-elf | i[3-7]86-*-sco3.2v5* | \
i[3-7]86-*-dgux* | i[3-7]86-*-sysv5*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_i386_vec
targ_selvecs=i386coff_vec
;;
i[3-7]86-*-solaris2*)
ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_sparc_sol2.o, eelf_i386_sol2.o. (ALL_64_EMULATIONS): Add eelf_x86_64_sol2.o, eelf64_sparc_sol2.o. (eelf32_sparc_sol2.c): New rule. (eelf64_sparc_sol2.c): Likewise. (eelf_x86_64_sol2.c): Likewise. (eelf_i386_sol2.c): Likewise. * Makefile.in: Regenerate. * configure.tgt (i[3-7]86-*-solaris2*): Change targ_emul to elf_i386_sol2. Add elf_i386_ldso, elf_x86_64_sol2 to targ_extra_emuls. (x86_64-*-solaris2*): Change targ_emul to elf_x86_64_sol2. Add elf_x86_64, elf_i386_sol2, elf_i386 to targ_extra_emuls. (sparc-*-solaris2.[0-6]*): Change targ_emul to elf32_sparc_sol2. Add target_extra_emuls. (sparc-*-solaris2*): Change targ_emul to elf32_sparc_sol2. Add elf32_sparc, elf64_sparc_sol2 to targ_extra_emuls. (sparcv9-*-solaris2*): Change targ_emul to elf64_sparc_sol2. Add elf64_sparc, elf32_sparc_sol2 to target_extra_emuls. * emulparams/elf32_sparc_sol2.sh: New file. * emulparams/elf64_sparc_sol2.sh: New file. * emulparams/elf_i386_sol2.sh: New file. * emulparams/elf_x86_64_sol2.sh: New file. * emultempl/solaris2.em: New file. bfd: * elflink.c (bfd_elf_size_dynamic_sections): Don't emit base version twice. Skip it when constructing def.vd_next. * elf32-i386.c (TARGET_LITTLE_SYM): Redefine to bfd_elf32_i386_sol2_vec. (TARGET_LITTLE_NAME): Redefine to elf32-i386-sol2. (elf32_bed): Redefine to elf32_i386_sol2_bed. (elf_backend_want_plt_sym): Redefine to 1. * elf64-x86-64.c (TARGET_LITTLE_SYM): Redefine to bfd_elf64_x86_64_sol2_vec. (TARGET_LITTLE_NAME): Redefine to elf64-x86-64-sol2. (elf64_bed): Redefine to elf64_x86_64_sol2_bed. (elf_backend_want_plt_sym): Redefine to 1. * config.bfd (i[3-7]86-*-solaris2*): Set targ_defvec to bfd_elf32_i386_sol2_vec. Replace bfd_elf64_x86_64_vec by bfd_elf64_x86_64_sol2_vec in targ64_selvecs. (x86_64-*-solaris2*): Set targ_defvec to bfd_elf32_i386_sol2_vec. Replace bfd_elf64_x86_64_vec by bfd_elf64_x86_64_sol2_vec in targ_selvecs. * configure.in: Handle bfd_elf32_i386_sol2_vec, bfd_elf64_x86_64_sol2_vec. * configure: Regenerate. * targets.c (bfd_elf32_i386_sol2_vec): Declare. (bfd_elf64_x86_64_sol2_vec): Declare. (_bfd_target_vector): Add bfd_elf32_i386_sol2_vec, bfd_elf64_x86_64_sol2_vec.
2010-03-05 19:49:00 +00:00
targ_defvec=bfd_elf32_i386_sol2_vec
targ_selvecs="i386coff_vec"
Add initial Intel K1OM support. bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
targ64_selvecs="bfd_elf64_x86_64_sol2_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec"
want64=true
;;
#ifdef BFD64
x86_64-*-solaris2*)
ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_sparc_sol2.o, eelf_i386_sol2.o. (ALL_64_EMULATIONS): Add eelf_x86_64_sol2.o, eelf64_sparc_sol2.o. (eelf32_sparc_sol2.c): New rule. (eelf64_sparc_sol2.c): Likewise. (eelf_x86_64_sol2.c): Likewise. (eelf_i386_sol2.c): Likewise. * Makefile.in: Regenerate. * configure.tgt (i[3-7]86-*-solaris2*): Change targ_emul to elf_i386_sol2. Add elf_i386_ldso, elf_x86_64_sol2 to targ_extra_emuls. (x86_64-*-solaris2*): Change targ_emul to elf_x86_64_sol2. Add elf_x86_64, elf_i386_sol2, elf_i386 to targ_extra_emuls. (sparc-*-solaris2.[0-6]*): Change targ_emul to elf32_sparc_sol2. Add target_extra_emuls. (sparc-*-solaris2*): Change targ_emul to elf32_sparc_sol2. Add elf32_sparc, elf64_sparc_sol2 to targ_extra_emuls. (sparcv9-*-solaris2*): Change targ_emul to elf64_sparc_sol2. Add elf64_sparc, elf32_sparc_sol2 to target_extra_emuls. * emulparams/elf32_sparc_sol2.sh: New file. * emulparams/elf64_sparc_sol2.sh: New file. * emulparams/elf_i386_sol2.sh: New file. * emulparams/elf_x86_64_sol2.sh: New file. * emultempl/solaris2.em: New file. bfd: * elflink.c (bfd_elf_size_dynamic_sections): Don't emit base version twice. Skip it when constructing def.vd_next. * elf32-i386.c (TARGET_LITTLE_SYM): Redefine to bfd_elf32_i386_sol2_vec. (TARGET_LITTLE_NAME): Redefine to elf32-i386-sol2. (elf32_bed): Redefine to elf32_i386_sol2_bed. (elf_backend_want_plt_sym): Redefine to 1. * elf64-x86-64.c (TARGET_LITTLE_SYM): Redefine to bfd_elf64_x86_64_sol2_vec. (TARGET_LITTLE_NAME): Redefine to elf64-x86-64-sol2. (elf64_bed): Redefine to elf64_x86_64_sol2_bed. (elf_backend_want_plt_sym): Redefine to 1. * config.bfd (i[3-7]86-*-solaris2*): Set targ_defvec to bfd_elf32_i386_sol2_vec. Replace bfd_elf64_x86_64_vec by bfd_elf64_x86_64_sol2_vec in targ64_selvecs. (x86_64-*-solaris2*): Set targ_defvec to bfd_elf32_i386_sol2_vec. Replace bfd_elf64_x86_64_vec by bfd_elf64_x86_64_sol2_vec in targ_selvecs. * configure.in: Handle bfd_elf32_i386_sol2_vec, bfd_elf64_x86_64_sol2_vec. * configure: Regenerate. * targets.c (bfd_elf32_i386_sol2_vec): Declare. (bfd_elf64_x86_64_sol2_vec): Declare. (_bfd_target_vector): Add bfd_elf32_i386_sol2_vec, bfd_elf64_x86_64_sol2_vec.
2010-03-05 19:49:00 +00:00
targ_defvec=bfd_elf32_i386_sol2_vec
Add initial Intel K1OM support. bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
targ_selvecs="bfd_elf64_x86_64_sol2_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec i386coff_vec"
want64=true
;;
#endif
2003-05-16 16:30:27 +00:00
i[3-7]86-*-kaos*)
targ_defvec=bfd_elf32_i386_vec
targ_selvecs=bfd_elf32_i386_vec
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-nto*)
targ_defvec=bfd_elf32_i386_vec
targ_selvecs=i386coff_vec
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-aros*)
2003-01-21 16:08:31 +00:00
targ_defvec=bfd_elf32_i386_vec
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-chorus*)
targ_defvec=bfd_elf32_i386_vec
;;
i[3-7]86-*-dicos*)
targ_defvec=bfd_elf32_i386_vec
Add initial Intel K1OM support. bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
targ64_selvecs="bfd_elf64_x86_64_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec"
;;
*-*-msdosdjgpp* | *-*-go32* )
1999-05-03 07:29:11 +00:00
targ_defvec=go32coff_vec
targ_selvecs="go32stubbedcoff_vec i386aout_vec"
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-sysv* | i[3-7]86-*-isc* | i[3-7]86-*-sco* | i[3-7]86-*-coff | \
i[3-7]86-*-aix*)
targ_defvec=i386coff_vec
;;
i[3-7]86-*-rtems*)
targ_defvec=bfd_elf32_i386_vec
targ_selvecs="i386coff_vec i386aout_vec"
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-darwin* | i[3-7]86-*-macos10* | i[3-7]86-*-rhapsody*)
2009-06-05 Tristan Gingold <gingold@adacore.com> * mach-o.h: Update copyright year. (bfd_mach_o_mach_header_magic): New enum. (bfd_mach_o_cpu_subtype): Now an enum. (BFD_MACH_O_HEADER_SIZE, BFD_MACH_O_HEADER_64_SIZE): New macros. (BFD_MACH_O_SECTION_SIZE, BFD_MACH_O_SECTION_64_SIZE): Ditto. (BFD_MACH_O_LC_SEGMENT_SIZE, BFD_MACH_O_LC_SEGMENT_64_SIZE): Ditto. (bfd_mach_o_load_command): Field type_required is now a boolean. Reindent prototypes. (bfd_mach_o_object_p, bfd_mach_o_core_p): Remove. (bfd_mach_o_bfd_copy_private_symbol_data): Add a prototype. (bfd_mach_o_bfd_copy_private_section_data): Ditto. (bfd_mach_o_bfd_copy_private_bfd_data): Ditto. (bfd_mach_o_get_symtab_upper_bound): Ditto. (bfd_mach_o_canonicalize_symtab): Ditto. (bfd_mach_o_get_symbol_info): Ditto. (bfd_mach_o_print_symbol): Ditto. (bfd_mach_o_bfd_print_private_bfd_data): Ditto. (bfd_mach_o_make_empty_symbol): Ditto. (bfd_mach_o_write_contents): Ditto. * mach-o.c (bfd_mach_o_object_p, bfd_mach_o_core_p, bfd_mach_o_mkobject): Defines. (bfd_mach_o_valid): Returns FALSE/TRUE instead of 0/1. Do not check with target vector but with flavour. (struct mach_o_section_name_xlat): New declaration. (dwarf_section_names_xlat): Ditto. (text_section_names_xlat): Ditto. (data_section_names_xlat): Ditto. (struct mach_o_segment_name_xlat): Ditto. (segsec_names_xlat): Ditto. (bfd_mach_o_convert_section_name_to_bfd): New function. (bfd_mach_o_convert_section_name_to_mach_o): Ditto. (bfd_mach_o_bfd_copy_private_symbol_data): Make it public. (bfd_mach_o_bfd_copy_private_section_data): Ditto. (bfd_mach_o_bfd_copy_private_bfd_data): Ditto. Accept any input and output flavour. Do not share private data anymore. (bfd_mach_o_count_symbols): Add a comment. (bfd_mach_o_get_symtab_upper_bound): Make it public. (bfd_mach_o_canonicalize_symtab): Ditto. (bfd_mach_o_get_symbol_info): Ditto. (bfd_mach_o_print_symbol): Ditto. (bfd_mach_o_write_header): Now returns a boolean instead of an int. Use constants instead of hard-coded values. (bfd_mach_o_scan_write_section_32): Use constants instead of hard-coded values. (bfd_mach_o_scan_write_section_64): Ditto. (bfd_mach_o_scan_write_segment): Ditto. Do not copy sections anymore. (bfd_mach_o_write_contents): Make it public. Remove dead code. Rewrite typeflag assignment. (bfd_mach_o_build_commands): New function. (bfd_mach_o_set_section_contents): Ditto. (bfd_mach_o_make_empty_symbol): Make it public. (bfd_mach_o_read_header): Make it static. Convert to bfd_boolean. Use constants instead of hard-coded values. (bfd_mach_o_make_bfd_section): Call bfd_mach_o_convert_section_name_to_bfd to create name. (bfd_mach_o_scan_read_section_32): Use constants instead of hard-coded values. (bfd_mach_o_scan_read_section_64): Ditto. (bfd_mach_o_scan_read_segment): Do not create a bfd section for a segment anymore. Use constants instead of hard-coded values. (bfd_mach_o_scan_read_command): Fix style. (bfd_mach_o_scan): Use constants instead of hard-coded values. Get rid of BFD_IO_FUNCS. (bfd_mach_o_mkobject_init): Renamed from bfd_mach_o_mkobject. (bfd_mach_o_header_p): Created from bfd_mach_o_object_p. (bfd_mach_o_gen_object_p): New function, replaces bfd_mach_o_object_p. (bfd_mach_o_object_p): Removed. (bfd_mach_o_gen_core_p): New function, replaces ... (bfd_mach_o_core_p): ... deleted. (bfd_mach_o_bfd_print_private_bfd_data): Make it public. * mach-o-i386.c: New file. * config.bfd: Use mach_o_i386_vec as targ_defvec for ix86-darwin. * configure.in (TDEFINES): Add mach_o_i386_vec. * configure: Regenerated. * targets.c: Add mach_o_i386_vec. * mach-o.c: Update copyright years. (BFD_IO_FUNCS): Remove (was not used). (bfd_mach_o_mkarchive, bfd_mach_o_read_ar_hdr, bfd_mach_o_slurp_armap bfd_mach_o_slurp_extended_name_table, bfd_mach_o_construct_extended_name_table, bfd_mach_o_truncate_arname, bfd_mach_o_write_armap, bfd_mach_o_get_elt_at_index, bfd_mach_o_generic_stat_arch_elt, bfd_mach_o_update_armap_timestamp, bfd_mach_o_close_and_cleanup, bfd_mach_o_bfd_free_cached_info, bfd_mach_o_new_section_hook, bfd_mach_o_get_section_contents_in_window, bfd_mach_o_bfd_is_local_label_name, bfd_mach_o_bfd_is_target_special_symbol, bfd_mach_o_bfd_is_local_label_name, bfd_mach_o_get_lineno, bfd_mach_o_find_nearest_line, bfd_mach_o_find_inliner_info, bfd_mach_o_bfd_make_debug_symbol, bfd_mach_o_read_minisymbols, bfd_mach_o_minisymbol_to_symbol, bfd_mach_o_bfd_get_relocated_section_contents, bfd_mach_o_bfd_relax_section, bfd_mach_o_bfd_link_hash_table_create, bfd_mach_o_bfd_link_hash_table_free, bfd_mach_o_bfd_link_add_symbols, bfd_mach_o_bfd_link_just_syms, bfd_mach_o_bfd_final_link, bfd_mach_o_bfd_link_split_section, bfd_mach_o_set_arch_mach, bfd_mach_o_bfd_merge_private_bfd_data, bfd_mach_o_bfd_set_private_flags, bfd_mach_o_get_section_contents, bfd_mach_o_bfd_gc_sections, bfd_mach_o_bfd_merge_sections, bfd_mach_o_bfd_is_group_section, bfd_mach_o_bfd_discard_group, bfd_mach_o_section_already_linked, bfd_mach_o_bfd_define_common_symbol, bfd_mach_o_bfd_copy_private_header_data, bfd_mach_o_core_file_matches_executable_p): Move these defines ... * mach-o-target.c: ... here. Update copyright years.
2009-06-05 09:19:44 +00:00
targ_defvec=mach_o_i386_vec
targ_selvecs="mach_o_le_vec mach_o_be_vec mach_o_fat_vec pef_vec pef_xlib_vec sym_vec"
targ64_selvecs=mach_o_x86_64_vec
targ_archs="$targ_archs bfd_powerpc_arch bfd_rs6000_arch"
;;
i[3-7]86-sequent-bsd*)
1999-05-03 07:29:11 +00:00
targ_defvec=i386dynix_vec
targ_underscore=yes
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-bsd*)
1999-05-03 07:29:11 +00:00
targ_defvec=i386bsd_vec
targ_underscore=yes
;;
2011-03-28 11:18:27 +00:00
i[3-7]86-*-dragonfly*)
targ_defvec=bfd_elf32_i386_vec
Add initial Intel K1OM support. bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
targ64_selvecs="bfd_elf64_x86_64_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec"
2011-03-28 11:18:27 +00:00
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-freebsdaout* | i[3-7]86-*-freebsd[12].* | \
i[3-7]86-*-freebsd[12])
1999-05-03 07:29:11 +00:00
targ_defvec=i386freebsd_vec
targ_selvecs=i386bsd_vec
targ_underscore=yes
;;
2011-03-28 11:18:27 +00:00
i[3-7]86-*-freebsd* | i[3-7]86-*-kfreebsd*-gnu)
targ_defvec=bfd_elf32_i386_freebsd_vec
bfd/ 2009-04-17 H.J. Lu <hongjiu.lu@intel.com> PR binutils/10074 * coffcode.h (bfd_pei_p): New. * config.bfd: Remove bfd_efi_bsdrv_ia32_vec, bfd_efi_rtdrv_ia32_vec, bfd_efi_bsdrv_x86_64_vec, bfd_efi_rtdrv_x86_64_vec, bfd_efi_bsdrv_ia64_vec and bfd_efi_rtdrv_ia64_vec. Replace bfd_efi_app_ia32_vec, bfd_efi_app_x86_64_vec and bfd_efi_app_ia64_vec with i386pei_vec, x86_64pei_vec and bfd_pei_ia64_vec, respectively. * configure.in: Remove bfd_efi_bsdrv_ia32_vec, bfd_efi_rtdrv_ia32_vec, bfd_efi_bsdrv_x86_64_vec, bfd_efi_rtdrv_x86_64_vec, bfd_efi_bsdrv_ia64_vec and bfd_efi_rtdrv_ia64_vec. Replace bfd_efi_ia64_vec with bfd_pei_ia64_vec. * targets.c: Likewise. * configure: Regenerated. * libcoff.h: Likewise. * Makefile.in: Likewise. * efi-app-ia32.c: Removed. * efi-app-x86_64.c: Likewise. * efi-bsdrv-ia32.c: Likewise. * efi-bsdrv-ia64.c: Likewise. * efi-bsdrv-x86_64.c: Likewise. * efi-rtdrv-ia32.c: Likewise. * efi-rtdrv-ia64.c: Likewise. * efi-rtdrv-x86_64.c: Likewise. * efi-rtdrv-ia32.c: Likewise. * efi-app-ia64.c: Moved to ... * pei-ia64.c: This. (TARGET_SYM): Set to bfd_pei_ia64_vec. (TARGET_NAME): Set to pei-ia64. * libpei.h (bfd_target_pei_p): Removed. (bfd_target_pei_arch): Likewise. (bfd_target_efi_app_p): Likewise. (bfd_target_efi_app_arch): Likewise. (bfd_target_efi_bsdrv_p): Likewise. (bfd_target_efi_bsdrv_arch): Likewise. (bfd_target_efi_rtdrv_p): Likewise. (bfd_target_efi_rtdrv_arch): Likewise. (bfd_pe_executable_p): Likewise. * Makefile.am (BFD32_BACKENDS): Remove efi-app-ia32.lo, efi-bsdrv-ia32.lo and efi-rtdrv-ia32.lo. (BFD32_BACKENDS_CFILES): Remove efi-app-ia32.c, efi-bsdrv-ia32.c and efi-rtdrv-ia32.c. (BFD64_BACKENDS): Remove efi-app-ia64.lo, efi-bsdrv-ia64.lo, efi-rtdrv-ia64.lo, efi-app-x86_64.lo, efi-bsdrv-x86_64.lo and efi-rtdrv-x86_64.lo. Add pei-ia64.lo. (BFD64_BACKENDS_CFILES): Remove efi-app-ia64.c, efi-bsdrv-ia64.c, efi-rtdrv-ia64.c, efi-app-x86_64.c, efi-bsdrv-x86_64.c and efi-rtdrv-x86_64.c. Add pei-ia64.c. (efi-app-ia64.lo): Removed. (efi-bsdrv-ia32.lo): Likewise. (efi-rtdrv-ia32.lo): Likewise. (efi-app-ia64.lo): Likewise. (efi-bsdrv-ia64.lo): Likewise. (efi-rtdrv-ia64.lo): Likewise. (efi-app-x86_64.lo): Likewise. (efi-bsdrv-x86_64.lo): Likewise. (efi-rtdrv-x86_64.lo): Likewise. (pei-ia64.lo): New. * peicode.h (coff_swap_scnhdr_in): Replace bfd_pe_executable_p with bfd_pei_p. (arch_type): Removed. (pe_arch): Likewise. (pe_bfd_object_p): Just return coff_object_p. * peXXigen.c (_bfd_XXi_swap_scnhdr_out): Replace bfd_pe_executable_p with bfd_pei_p. binutils/ 2009-04-17 H.J. Lu <hongjiu.lu@intel.com> PR binutils/10074 * objcopy.c: Include coff/i386.h and coff/pe.h. (pe_file_alignment): New. (pe_heap_commit): Likewise. (pe_heap_reserve): Likewise. (pe_image_base): Likewise. (pe_section_alignment): Likewise. (pe_stack_commit): Likewise. (pe_stack_reserve): Likewise. (pe_subsystem): Likewise. (pe_major_subsystem_version): Likewise. (pe_minor_subsystem_version): Likewise. (set_pe_subsystem): Likewise. (convert_efi_target): Likewise. (command_line_switch): Add OPTION_FILE_ALIGNMENT, OPTION_HEAP, OPTION_IMAGE_BASE, OPTION_SECTION_ALIGNMENT, OPTION_STACK and OPTION_SUBSYSTEM. (copy_options): Likewise. (copy_usage): Add --file-alignment, --heap, --image-base, --section-alignment, --stack and --subsystem. (copy_object): Set up PE parameters. (copy_main): Process Add OPTION_FILE_ALIGNMENT, OPTION_HEAP, OPTION_IMAGE_BASE, OPTION_SECTION_ALIGNMENT, OPTION_STACK and OPTION_SUBSYSTEM. Convert EFI target to PEI target. * NEWS: Mention --file-alignment, --heap, --image-base, --section-alignment, --stack and --subsystem command line options for objcopy. * doc/binutils.texi: Document --file-alignment, --heap, --image-base, --section-alignment, --stack and --subsystem command line options for objcopy.
2009-04-17 13:46:18 +00:00
targ_selvecs="bfd_elf32_i386_vec i386pei_vec i386coff_vec"
Add initial Intel K1OM support. bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
targ64_selvecs="bfd_elf64_x86_64_freebsd_vec bfd_elf64_x86_64_vec x86_64pei_vec bfd_elf64_l1om_vec bfd_elf64_l1om_freebsd_vec bfd_elf64_k1om_vec bfd_elf64_k1om_freebsd_vec"
# FreeBSD <= 4.0 supports only the old nonstandard way of ABI labelling.
case "${targ}" in
2003-05-16 16:30:27 +00:00
i[3-7]86-*-freebsd3* | i[3-7]86-*-freebsd4 | i[3-7]86-*-freebsd4.0*)
targ_cflags=-DOLD_FREEBSD_ABI_LABEL ;;
esac
;;
2003-10-06 09:12:39 +00:00
i[3-7]86-*-netbsdelf* | i[3-7]86-*-netbsd*-gnu* | i[3-7]86-*-knetbsd*-gnu)
targ_defvec=bfd_elf32_i386_vec
targ_selvecs=i386netbsd_vec
Add initial Intel K1OM support. bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
targ64_selvecs="bfd_elf64_x86_64_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec"
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-netbsdpe*)
2002-05-24 09:26:58 +00:00
targ_defvec=i386pe_vec
targ_selvecs="i386pe_vec i386pei_vec bfd_elf32_i386_vec"
;;
i[3-7]86-*-netbsdaout* | i[3-7]86-*-netbsd* | \
i[3-7]86-*-openbsd[0-2].* | i[3-7]86-*-openbsd3.[0-3])
1999-05-03 07:29:11 +00:00
targ_defvec=i386netbsd_vec
targ_selvecs="bfd_elf32_i386_vec i386bsd_vec"
1999-05-03 07:29:11 +00:00
targ_underscore=yes
;;
i[3-7]86-*-openbsd*)
targ_defvec=bfd_elf32_i386_vec
targ_selvecs=i386netbsd_vec
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-netware*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_i386_vec
targ_selvecs="nlm32_i386_vec i386coff_vec i386aout_vec"
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-linux*aout*)
1999-05-03 07:29:11 +00:00
targ_defvec=i386linux_vec
targ_selvecs=bfd_elf32_i386_vec
targ_underscore=yes
;;
i[3-7]86-*-linux-*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_i386_vec
bfd/ 2009-04-17 H.J. Lu <hongjiu.lu@intel.com> PR binutils/10074 * coffcode.h (bfd_pei_p): New. * config.bfd: Remove bfd_efi_bsdrv_ia32_vec, bfd_efi_rtdrv_ia32_vec, bfd_efi_bsdrv_x86_64_vec, bfd_efi_rtdrv_x86_64_vec, bfd_efi_bsdrv_ia64_vec and bfd_efi_rtdrv_ia64_vec. Replace bfd_efi_app_ia32_vec, bfd_efi_app_x86_64_vec and bfd_efi_app_ia64_vec with i386pei_vec, x86_64pei_vec and bfd_pei_ia64_vec, respectively. * configure.in: Remove bfd_efi_bsdrv_ia32_vec, bfd_efi_rtdrv_ia32_vec, bfd_efi_bsdrv_x86_64_vec, bfd_efi_rtdrv_x86_64_vec, bfd_efi_bsdrv_ia64_vec and bfd_efi_rtdrv_ia64_vec. Replace bfd_efi_ia64_vec with bfd_pei_ia64_vec. * targets.c: Likewise. * configure: Regenerated. * libcoff.h: Likewise. * Makefile.in: Likewise. * efi-app-ia32.c: Removed. * efi-app-x86_64.c: Likewise. * efi-bsdrv-ia32.c: Likewise. * efi-bsdrv-ia64.c: Likewise. * efi-bsdrv-x86_64.c: Likewise. * efi-rtdrv-ia32.c: Likewise. * efi-rtdrv-ia64.c: Likewise. * efi-rtdrv-x86_64.c: Likewise. * efi-rtdrv-ia32.c: Likewise. * efi-app-ia64.c: Moved to ... * pei-ia64.c: This. (TARGET_SYM): Set to bfd_pei_ia64_vec. (TARGET_NAME): Set to pei-ia64. * libpei.h (bfd_target_pei_p): Removed. (bfd_target_pei_arch): Likewise. (bfd_target_efi_app_p): Likewise. (bfd_target_efi_app_arch): Likewise. (bfd_target_efi_bsdrv_p): Likewise. (bfd_target_efi_bsdrv_arch): Likewise. (bfd_target_efi_rtdrv_p): Likewise. (bfd_target_efi_rtdrv_arch): Likewise. (bfd_pe_executable_p): Likewise. * Makefile.am (BFD32_BACKENDS): Remove efi-app-ia32.lo, efi-bsdrv-ia32.lo and efi-rtdrv-ia32.lo. (BFD32_BACKENDS_CFILES): Remove efi-app-ia32.c, efi-bsdrv-ia32.c and efi-rtdrv-ia32.c. (BFD64_BACKENDS): Remove efi-app-ia64.lo, efi-bsdrv-ia64.lo, efi-rtdrv-ia64.lo, efi-app-x86_64.lo, efi-bsdrv-x86_64.lo and efi-rtdrv-x86_64.lo. Add pei-ia64.lo. (BFD64_BACKENDS_CFILES): Remove efi-app-ia64.c, efi-bsdrv-ia64.c, efi-rtdrv-ia64.c, efi-app-x86_64.c, efi-bsdrv-x86_64.c and efi-rtdrv-x86_64.c. Add pei-ia64.c. (efi-app-ia64.lo): Removed. (efi-bsdrv-ia32.lo): Likewise. (efi-rtdrv-ia32.lo): Likewise. (efi-app-ia64.lo): Likewise. (efi-bsdrv-ia64.lo): Likewise. (efi-rtdrv-ia64.lo): Likewise. (efi-app-x86_64.lo): Likewise. (efi-bsdrv-x86_64.lo): Likewise. (efi-rtdrv-x86_64.lo): Likewise. (pei-ia64.lo): New. * peicode.h (coff_swap_scnhdr_in): Replace bfd_pe_executable_p with bfd_pei_p. (arch_type): Removed. (pe_arch): Likewise. (pe_bfd_object_p): Just return coff_object_p. * peXXigen.c (_bfd_XXi_swap_scnhdr_out): Replace bfd_pe_executable_p with bfd_pei_p. binutils/ 2009-04-17 H.J. Lu <hongjiu.lu@intel.com> PR binutils/10074 * objcopy.c: Include coff/i386.h and coff/pe.h. (pe_file_alignment): New. (pe_heap_commit): Likewise. (pe_heap_reserve): Likewise. (pe_image_base): Likewise. (pe_section_alignment): Likewise. (pe_stack_commit): Likewise. (pe_stack_reserve): Likewise. (pe_subsystem): Likewise. (pe_major_subsystem_version): Likewise. (pe_minor_subsystem_version): Likewise. (set_pe_subsystem): Likewise. (convert_efi_target): Likewise. (command_line_switch): Add OPTION_FILE_ALIGNMENT, OPTION_HEAP, OPTION_IMAGE_BASE, OPTION_SECTION_ALIGNMENT, OPTION_STACK and OPTION_SUBSYSTEM. (copy_options): Likewise. (copy_usage): Add --file-alignment, --heap, --image-base, --section-alignment, --stack and --subsystem. (copy_object): Set up PE parameters. (copy_main): Process Add OPTION_FILE_ALIGNMENT, OPTION_HEAP, OPTION_IMAGE_BASE, OPTION_SECTION_ALIGNMENT, OPTION_STACK and OPTION_SUBSYSTEM. Convert EFI target to PEI target. * NEWS: Mention --file-alignment, --heap, --image-base, --section-alignment, --stack and --subsystem command line options for objcopy. * doc/binutils.texi: Document --file-alignment, --heap, --image-base, --section-alignment, --stack and --subsystem command line options for objcopy.
2009-04-17 13:46:18 +00:00
targ_selvecs="i386linux_vec i386pei_vec"
targ64_selvecs="bfd_elf64_x86_64_vec bfd_elf32_x86_64_vec x86_64pei_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec"
1999-05-03 07:29:11 +00:00
;;
i[3-7]86-*-nacl*)
targ_defvec=bfd_elf32_i386_nacl_vec
* elf32-arm.c (elf32_arm_nacl_plt0_entry, elf32_arm_nacl_plt_entry): New variables. (struct elf32_arm_link_hash_table): New member `nacl_p'. (elf32_arm_link_hash_table_create): Initialize it. (elf32_arm_nacl_link_hash_table_create): New function. (arm_movw_immediate, arm_movt_immediate): New functions. (elf32_arm_populate_plt_entry): Test HTAB->nacl_p. (elf32_arm_finish_dynamic_sections): Likewise. (elf32_arm_output_plt_map_1): Likewise. (bfd_elf32_littlearm_nacl_vec, bfd_elf32_bigarm_nacl_vec): New backend vector stanza. (elf32_arm_nacl_modify_segment_map): New function. * config.bfd: Handle arm-*-nacl*, armeb-*-nacl*. * targets.c: Support bfd_elf32_{big,little}_nacl_vec. * configure.in: Likewise. (bfd_elf32_bigarm_nacl_vec): Add elf-nacl.lo here. (bfd_elf32_littlearm_nacl_vec): Likewise. (bfd_elf32_bigarm_vec, bfd_elf32_littlearm_vec): Likewise. (bfd_elf32_bigarm_symbian_vec): Likewise. (bfd_elf32_littlearm_symbian_vec): Likewise. (bfd_elf32_bigarm_vxworks_vec): Likewise. (bfd_elf32_littlearm_vxworks_vec): Likewise. * configure: Regenerated. * configure.tgt (arm-*-nacl*): Match it. * config/te-nacl.h (FPU_DEFAULT, EABI_DEFAULT): Define. (LOCAL_LABELS_DOLLAR): Define. * config/tc-arm.c (elf32_arm_target_format) [TE_NACL]: Use nacl format variants. * gas/elf/elf.exp (run_elf_list_test): Treat arm-*-nacl* targets as -armeabi. * gas/arm/any-idiv.d: Match *-*-nacl* targets too. * gas/arm/arch4t.d: Likewise. * gas/arm/arch4t-eabi.d: Likewise. * gas/arm/attr-any-armv4t.d: Likewise. * gas/arm/attr-any-thumbv6.d: Likewise. * gas/arm/attr-cpu-directive.d: Likewise. * gas/arm/attr-default.d: Likewise. * gas/arm/attr-march-all.d: Likewise. * gas/arm/attr-march-armv1.d: Likewise. * gas/arm/attr-march-armv2a.d: Likewise. * gas/arm/attr-march-armv2.d: Likewise. * gas/arm/attr-march-armv2s.d: Likewise. * gas/arm/attr-march-armv3.d: Likewise. * gas/arm/attr-march-armv3m.d: Likewise. * gas/arm/attr-march-armv4.d: Likewise. * gas/arm/attr-march-armv4t.d: Likewise. * gas/arm/attr-march-armv4txm.d: Likewise. * gas/arm/attr-march-armv4xm.d: Likewise. * gas/arm/attr-march-armv5.d: Likewise. * gas/arm/attr-march-armv5t.d: Likewise. * gas/arm/attr-march-armv5te.d: Likewise. * gas/arm/attr-march-armv5tej.d: Likewise. * gas/arm/attr-march-armv5texp.d: Likewise. * gas/arm/attr-march-armv5txm.d: Likewise. * gas/arm/attr-march-armv6.d: Likewise. * gas/arm/attr-march-armv6j.d: Likewise. * gas/arm/attr-march-armv6k.d: Likewise. * gas/arm/attr-march-armv6k+sec.d: Likewise. * gas/arm/attr-march-armv6kt2.d: Likewise. * gas/arm/attr-march-armv6-m.d: Likewise. * gas/arm/attr-march-armv6-m+os.d: Likewise. * gas/arm/attr-march-armv6s-m.d: Likewise. * gas/arm/attr-march-armv6t2.d: Likewise. * gas/arm/attr-march-armv6z.d: Likewise. * gas/arm/attr-march-armv6zk.d: Likewise. * gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/arm/attr-march-armv6zt2.d: Likewise. * gas/arm/attr-march-armv7-a.d: Likewise. * gas/arm/attr-march-armv7a.d: Likewise. * gas/arm/attr-march-armv7-a+idiv.d: Likewise. * gas/arm/attr-march-armv7-a+mp.d: Likewise. * gas/arm/attr-march-armv7-a+sec.d: Likewise. * gas/arm/attr-march-armv7-a+sec+virt.d: Likewise. * gas/arm/attr-march-armv7-a+virt.d: Likewise. * gas/arm/attr-march-armv7.d: Likewise. * gas/arm/attr-march-armv7em.d: Likewise. * gas/arm/attr-march-armv7-m.d: Likewise. * gas/arm/attr-march-armv7m.d: Likewise. * gas/arm/attr-march-armv7-r.d: Likewise. * gas/arm/attr-march-armv7r.d: Likewise. * gas/arm/attr-march-armv7-r+mp.d: Likewise. * gas/arm/attr-march-iwmmxt2.d: Likewise. * gas/arm/attr-march-iwmmxt.d: Likewise. * gas/arm/attr-march-xscale.d: Likewise. * gas/arm/attr-mcpu.d: Likewise. * gas/arm/attr-mfpu-arm1020e.d: Likewise. * gas/arm/attr-mfpu-arm1020t.d: Likewise. * gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * gas/arm/attr-mfpu-arm7500fe.d: Likewise. * gas/arm/attr-mfpu-fpa10.d: Likewise. * gas/arm/attr-mfpu-fpa11.d: Likewise. * gas/arm/attr-mfpu-fpa.d: Likewise. * gas/arm/attr-mfpu-fpe2.d: Likewise. * gas/arm/attr-mfpu-fpe3.d: Likewise. * gas/arm/attr-mfpu-fpe.d: Likewise. * gas/arm/attr-mfpu-maverick.d: Likewise. * gas/arm/attr-mfpu-neon.d: Likewise. * gas/arm/attr-mfpu-neon-fp16.d: Likewise. * gas/arm/attr-mfpu-softfpa.d: Likewise. * gas/arm/attr-mfpu-softvfp.d: Likewise. * gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * gas/arm/attr-mfpu-vfp10.d: Likewise. * gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * gas/arm/attr-mfpu-vfp3.d: Likewise. * gas/arm/attr-mfpu-vfp9.d: Likewise. * gas/arm/attr-mfpu-vfp.d: Likewise. * gas/arm/attr-mfpu-vfpv2.d: Likewise. * gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv3.d: Likewise. * gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/arm/attr-mfpu-vfpxd.d: Likewise. * gas/arm/attr-names.d: Likewise. * gas/arm/attr-order.d: Likewise. * gas/arm/attr-override-cpu-directive.d: Likewise. * gas/arm/attr-override-mcpu.d: Likewise. * gas/arm/got_prel.d: Likewise. * gas/arm/mapdir.d: Likewise. * gas/arm/mapmisc.d: Likewise. * gas/arm/mapsecs.d: Likewise. * gas/arm/mapshort-eabi.d: Likewise. * gas/arm/mapshort-elf.d: Likewise. * gas/arm/mov-highregs-any.d: Likewise. * gas/arm/mov-lowregs-any.d: Likewise. * gas/arm/pr12198-1.d: Likewise. * gas/arm/pr12198-2.d: Likewise. * gas/arm/thumb.d: Likewise. * gas/arm/thumb-eabi.d: Likewise. * gas/arm/thumbrel.d: Likewise. * configure.tgt (arm*-*-nacl*, arm*b-*-nacl*): Handle them. * emulparams/armelf_nacl.sh: New file. * emulparams/armelfb_nacl.sh: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add earmelf_nacl.c and earmelfb_nacl.c here. (earmelf_nacl.c, earmelfb_nacl.c): New targets. * Makefile.in: Regenerated. * ld-arm/arm-elf.exp (armelftests): Split out into ... (armelftests_common, armelftests_nonacl): ... these two. (armeabitests): Split out into ... (armeabitests_common, armeabitests_nonacl): ... these two. Omit _nonacl sets for arm*-*-nacl* targets. * ld-arm/farcall-mix.d: Don't match exact addresses, only symbolic ones. * ld-arm/farcall-mix2.d: Likewise. * ld-arm/farcall-group.d: Likewise. * ld-arm/tls-gdesc-got.d: Match variant file formats too. Accept some variation in exact addresses. * ld-arm/thumb2-b-interwork.d: Match variant file formats too. Fix regexps not to care about exact addresses where not relevant. * ld-arm/thumb2-bl-undefweak.d: Match any hex strings, not any strings of particular exact lengths. * ld-arm/thumb2-bl-undefweak1.d: Likewise. * ld-arm/arm-app.r: Match variant file formats too. * ld-arm/arm-app-abs32.r: Likewise. * ld-arm/arm-lib.d: Likewise. * ld-arm/arm-lib.r: Likewise. * ld-arm/arm-static-app.r: Likewise. * ld-arm/armv4-bx.d: Likewise. * ld-arm/data-only-map.d: Likewise. * ld-arm/group-relocs.d: Likewise. * ld-arm/jump19.d: Likewise. * ld-arm/reloc-boundaries.d: Likewise. * ld-arm/thumb1-bl.d: Likewise. * ld-arm/thumb2-bl.d: Likewise. * ld-arm/tls-app.d: Likewise. * ld-arm/tls-app.r: Likewise. * ld-arm/tls-gdierelax.d: Likewise. * ld-arm/tls-gdierelax2.d: Likewise. * ld-arm/tls-gdlerelax.d: Likewise. * ld-arm/tls-lib.d: Likewise. * ld-arm/tls-lib.r: Likewise. * ld-arm/tls-mixed.r: Likewise. * ld-arm/vfp11-fix-none.d: Likewise. * ld-arm/vfp11-fix-scalar.d: Likewise. * ld-arm/vfp11-fix-vector.d: Likewise. * ld-arm/arm-static-app.d: Likewise. Fix regexps not to care about exact number of leading spaces. * ld-arm/arm-app-abs32.d: Likewise. * ld-arm/fix-arm1176-off.d: Likewise. * ld-arm/fix-arm1176-on.d: Likewise. * ld-arm/arm-elf.exp: Treat nacl targets like eabi targets.
2012-04-12 13:01:15 +00:00
targ_selvecs="bfd_elf32_bigarm_nacl_vec bfd_elf32_littlearm_nacl_vec"
targ64_selvecs="bfd_elf64_x86_64_nacl_vec bfd_elf32_x86_64_nacl_vec"
* elf32-arm.c (elf32_arm_nacl_plt0_entry, elf32_arm_nacl_plt_entry): New variables. (struct elf32_arm_link_hash_table): New member `nacl_p'. (elf32_arm_link_hash_table_create): Initialize it. (elf32_arm_nacl_link_hash_table_create): New function. (arm_movw_immediate, arm_movt_immediate): New functions. (elf32_arm_populate_plt_entry): Test HTAB->nacl_p. (elf32_arm_finish_dynamic_sections): Likewise. (elf32_arm_output_plt_map_1): Likewise. (bfd_elf32_littlearm_nacl_vec, bfd_elf32_bigarm_nacl_vec): New backend vector stanza. (elf32_arm_nacl_modify_segment_map): New function. * config.bfd: Handle arm-*-nacl*, armeb-*-nacl*. * targets.c: Support bfd_elf32_{big,little}_nacl_vec. * configure.in: Likewise. (bfd_elf32_bigarm_nacl_vec): Add elf-nacl.lo here. (bfd_elf32_littlearm_nacl_vec): Likewise. (bfd_elf32_bigarm_vec, bfd_elf32_littlearm_vec): Likewise. (bfd_elf32_bigarm_symbian_vec): Likewise. (bfd_elf32_littlearm_symbian_vec): Likewise. (bfd_elf32_bigarm_vxworks_vec): Likewise. (bfd_elf32_littlearm_vxworks_vec): Likewise. * configure: Regenerated. * configure.tgt (arm-*-nacl*): Match it. * config/te-nacl.h (FPU_DEFAULT, EABI_DEFAULT): Define. (LOCAL_LABELS_DOLLAR): Define. * config/tc-arm.c (elf32_arm_target_format) [TE_NACL]: Use nacl format variants. * gas/elf/elf.exp (run_elf_list_test): Treat arm-*-nacl* targets as -armeabi. * gas/arm/any-idiv.d: Match *-*-nacl* targets too. * gas/arm/arch4t.d: Likewise. * gas/arm/arch4t-eabi.d: Likewise. * gas/arm/attr-any-armv4t.d: Likewise. * gas/arm/attr-any-thumbv6.d: Likewise. * gas/arm/attr-cpu-directive.d: Likewise. * gas/arm/attr-default.d: Likewise. * gas/arm/attr-march-all.d: Likewise. * gas/arm/attr-march-armv1.d: Likewise. * gas/arm/attr-march-armv2a.d: Likewise. * gas/arm/attr-march-armv2.d: Likewise. * gas/arm/attr-march-armv2s.d: Likewise. * gas/arm/attr-march-armv3.d: Likewise. * gas/arm/attr-march-armv3m.d: Likewise. * gas/arm/attr-march-armv4.d: Likewise. * gas/arm/attr-march-armv4t.d: Likewise. * gas/arm/attr-march-armv4txm.d: Likewise. * gas/arm/attr-march-armv4xm.d: Likewise. * gas/arm/attr-march-armv5.d: Likewise. * gas/arm/attr-march-armv5t.d: Likewise. * gas/arm/attr-march-armv5te.d: Likewise. * gas/arm/attr-march-armv5tej.d: Likewise. * gas/arm/attr-march-armv5texp.d: Likewise. * gas/arm/attr-march-armv5txm.d: Likewise. * gas/arm/attr-march-armv6.d: Likewise. * gas/arm/attr-march-armv6j.d: Likewise. * gas/arm/attr-march-armv6k.d: Likewise. * gas/arm/attr-march-armv6k+sec.d: Likewise. * gas/arm/attr-march-armv6kt2.d: Likewise. * gas/arm/attr-march-armv6-m.d: Likewise. * gas/arm/attr-march-armv6-m+os.d: Likewise. * gas/arm/attr-march-armv6s-m.d: Likewise. * gas/arm/attr-march-armv6t2.d: Likewise. * gas/arm/attr-march-armv6z.d: Likewise. * gas/arm/attr-march-armv6zk.d: Likewise. * gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/arm/attr-march-armv6zt2.d: Likewise. * gas/arm/attr-march-armv7-a.d: Likewise. * gas/arm/attr-march-armv7a.d: Likewise. * gas/arm/attr-march-armv7-a+idiv.d: Likewise. * gas/arm/attr-march-armv7-a+mp.d: Likewise. * gas/arm/attr-march-armv7-a+sec.d: Likewise. * gas/arm/attr-march-armv7-a+sec+virt.d: Likewise. * gas/arm/attr-march-armv7-a+virt.d: Likewise. * gas/arm/attr-march-armv7.d: Likewise. * gas/arm/attr-march-armv7em.d: Likewise. * gas/arm/attr-march-armv7-m.d: Likewise. * gas/arm/attr-march-armv7m.d: Likewise. * gas/arm/attr-march-armv7-r.d: Likewise. * gas/arm/attr-march-armv7r.d: Likewise. * gas/arm/attr-march-armv7-r+mp.d: Likewise. * gas/arm/attr-march-iwmmxt2.d: Likewise. * gas/arm/attr-march-iwmmxt.d: Likewise. * gas/arm/attr-march-xscale.d: Likewise. * gas/arm/attr-mcpu.d: Likewise. * gas/arm/attr-mfpu-arm1020e.d: Likewise. * gas/arm/attr-mfpu-arm1020t.d: Likewise. * gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * gas/arm/attr-mfpu-arm7500fe.d: Likewise. * gas/arm/attr-mfpu-fpa10.d: Likewise. * gas/arm/attr-mfpu-fpa11.d: Likewise. * gas/arm/attr-mfpu-fpa.d: Likewise. * gas/arm/attr-mfpu-fpe2.d: Likewise. * gas/arm/attr-mfpu-fpe3.d: Likewise. * gas/arm/attr-mfpu-fpe.d: Likewise. * gas/arm/attr-mfpu-maverick.d: Likewise. * gas/arm/attr-mfpu-neon.d: Likewise. * gas/arm/attr-mfpu-neon-fp16.d: Likewise. * gas/arm/attr-mfpu-softfpa.d: Likewise. * gas/arm/attr-mfpu-softvfp.d: Likewise. * gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * gas/arm/attr-mfpu-vfp10.d: Likewise. * gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * gas/arm/attr-mfpu-vfp3.d: Likewise. * gas/arm/attr-mfpu-vfp9.d: Likewise. * gas/arm/attr-mfpu-vfp.d: Likewise. * gas/arm/attr-mfpu-vfpv2.d: Likewise. * gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv3.d: Likewise. * gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/arm/attr-mfpu-vfpxd.d: Likewise. * gas/arm/attr-names.d: Likewise. * gas/arm/attr-order.d: Likewise. * gas/arm/attr-override-cpu-directive.d: Likewise. * gas/arm/attr-override-mcpu.d: Likewise. * gas/arm/got_prel.d: Likewise. * gas/arm/mapdir.d: Likewise. * gas/arm/mapmisc.d: Likewise. * gas/arm/mapsecs.d: Likewise. * gas/arm/mapshort-eabi.d: Likewise. * gas/arm/mapshort-elf.d: Likewise. * gas/arm/mov-highregs-any.d: Likewise. * gas/arm/mov-lowregs-any.d: Likewise. * gas/arm/pr12198-1.d: Likewise. * gas/arm/pr12198-2.d: Likewise. * gas/arm/thumb.d: Likewise. * gas/arm/thumb-eabi.d: Likewise. * gas/arm/thumbrel.d: Likewise. * configure.tgt (arm*-*-nacl*, arm*b-*-nacl*): Handle them. * emulparams/armelf_nacl.sh: New file. * emulparams/armelfb_nacl.sh: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add earmelf_nacl.c and earmelfb_nacl.c here. (earmelf_nacl.c, earmelfb_nacl.c): New targets. * Makefile.in: Regenerated. * ld-arm/arm-elf.exp (armelftests): Split out into ... (armelftests_common, armelftests_nonacl): ... these two. (armeabitests): Split out into ... (armeabitests_common, armeabitests_nonacl): ... these two. Omit _nonacl sets for arm*-*-nacl* targets. * ld-arm/farcall-mix.d: Don't match exact addresses, only symbolic ones. * ld-arm/farcall-mix2.d: Likewise. * ld-arm/farcall-group.d: Likewise. * ld-arm/tls-gdesc-got.d: Match variant file formats too. Accept some variation in exact addresses. * ld-arm/thumb2-b-interwork.d: Match variant file formats too. Fix regexps not to care about exact addresses where not relevant. * ld-arm/thumb2-bl-undefweak.d: Match any hex strings, not any strings of particular exact lengths. * ld-arm/thumb2-bl-undefweak1.d: Likewise. * ld-arm/arm-app.r: Match variant file formats too. * ld-arm/arm-app-abs32.r: Likewise. * ld-arm/arm-lib.d: Likewise. * ld-arm/arm-lib.r: Likewise. * ld-arm/arm-static-app.r: Likewise. * ld-arm/armv4-bx.d: Likewise. * ld-arm/data-only-map.d: Likewise. * ld-arm/group-relocs.d: Likewise. * ld-arm/jump19.d: Likewise. * ld-arm/reloc-boundaries.d: Likewise. * ld-arm/thumb1-bl.d: Likewise. * ld-arm/thumb2-bl.d: Likewise. * ld-arm/tls-app.d: Likewise. * ld-arm/tls-app.r: Likewise. * ld-arm/tls-gdierelax.d: Likewise. * ld-arm/tls-gdierelax2.d: Likewise. * ld-arm/tls-gdlerelax.d: Likewise. * ld-arm/tls-lib.d: Likewise. * ld-arm/tls-lib.r: Likewise. * ld-arm/tls-mixed.r: Likewise. * ld-arm/vfp11-fix-none.d: Likewise. * ld-arm/vfp11-fix-scalar.d: Likewise. * ld-arm/vfp11-fix-vector.d: Likewise. * ld-arm/arm-static-app.d: Likewise. Fix regexps not to care about exact number of leading spaces. * ld-arm/arm-app-abs32.d: Likewise. * ld-arm/fix-arm1176-off.d: Likewise. * ld-arm/fix-arm1176-on.d: Likewise. * ld-arm/arm-elf.exp: Treat nacl targets like eabi targets.
2012-04-12 13:01:15 +00:00
targ_archs="$targ_archs bfd_arm_arch"
;;
#ifdef BFD64
x86_64-*-darwin*)
targ_defvec=mach_o_x86_64_vec
targ_selvecs="mach_o_i386_vec mach_o_le_vec mach_o_be_vec mach_o_fat_vec pef_vec pef_xlib_vec sym_vec"
targ_archs="$targ_archs bfd_powerpc_arch bfd_rs6000_arch"
want64=true
;;
x86_64-*-dicos*)
targ_defvec=bfd_elf64_x86_64_vec
Add initial Intel K1OM support. bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
targ_selvecs="bfd_elf32_i386_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec"
want64=true
;;
2005-03-15 14:14:08 +00:00
x86_64-*-elf*)
targ_defvec=bfd_elf64_x86_64_vec
Add initial Intel K1OM support. bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
targ_selvecs="bfd_elf32_i386_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec i386coff_vec"
want64=true
2005-03-15 14:14:08 +00:00
;;
2011-03-28 11:18:27 +00:00
x86_64-*-dragonfly*)
targ_defvec=bfd_elf64_x86_64_vec
Add initial Intel K1OM support. bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
targ_selvecs="bfd_elf32_i386_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec"
2011-03-28 11:18:27 +00:00
want64=true
;;
x86_64-*-freebsd* | x86_64-*-kfreebsd*-gnu)
targ_defvec=bfd_elf64_x86_64_freebsd_vec
Add initial Intel K1OM support. bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
targ_selvecs="bfd_elf32_i386_freebsd_vec i386coff_vec i386pei_vec x86_64pei_vec bfd_elf32_i386_vec bfd_elf64_x86_64_vec bfd_elf64_l1om_vec bfd_elf64_l1om_freebsd_vec bfd_elf64_k1om_vec bfd_elf64_k1om_freebsd_vec"
want64=true
;;
x86_64-*-netbsd* | x86_64-*-openbsd*)
targ_defvec=bfd_elf64_x86_64_vec
Add initial Intel K1OM support. bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
targ_selvecs="bfd_elf32_i386_vec i386netbsd_vec i386coff_vec i386pei_vec x86_64pei_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec"
want64=true
;;
x86_64-*-linux-*)
targ_defvec=bfd_elf64_x86_64_vec
Add initial Intel K1OM support. bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
targ_selvecs="bfd_elf32_i386_vec bfd_elf32_x86_64_vec i386linux_vec i386pei_vec x86_64pei_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec"
want64=true
;;
x86_64-*-nacl*)
targ_defvec=bfd_elf32_x86_64_nacl_vec
* elf32-arm.c (elf32_arm_nacl_plt0_entry, elf32_arm_nacl_plt_entry): New variables. (struct elf32_arm_link_hash_table): New member `nacl_p'. (elf32_arm_link_hash_table_create): Initialize it. (elf32_arm_nacl_link_hash_table_create): New function. (arm_movw_immediate, arm_movt_immediate): New functions. (elf32_arm_populate_plt_entry): Test HTAB->nacl_p. (elf32_arm_finish_dynamic_sections): Likewise. (elf32_arm_output_plt_map_1): Likewise. (bfd_elf32_littlearm_nacl_vec, bfd_elf32_bigarm_nacl_vec): New backend vector stanza. (elf32_arm_nacl_modify_segment_map): New function. * config.bfd: Handle arm-*-nacl*, armeb-*-nacl*. * targets.c: Support bfd_elf32_{big,little}_nacl_vec. * configure.in: Likewise. (bfd_elf32_bigarm_nacl_vec): Add elf-nacl.lo here. (bfd_elf32_littlearm_nacl_vec): Likewise. (bfd_elf32_bigarm_vec, bfd_elf32_littlearm_vec): Likewise. (bfd_elf32_bigarm_symbian_vec): Likewise. (bfd_elf32_littlearm_symbian_vec): Likewise. (bfd_elf32_bigarm_vxworks_vec): Likewise. (bfd_elf32_littlearm_vxworks_vec): Likewise. * configure: Regenerated. * configure.tgt (arm-*-nacl*): Match it. * config/te-nacl.h (FPU_DEFAULT, EABI_DEFAULT): Define. (LOCAL_LABELS_DOLLAR): Define. * config/tc-arm.c (elf32_arm_target_format) [TE_NACL]: Use nacl format variants. * gas/elf/elf.exp (run_elf_list_test): Treat arm-*-nacl* targets as -armeabi. * gas/arm/any-idiv.d: Match *-*-nacl* targets too. * gas/arm/arch4t.d: Likewise. * gas/arm/arch4t-eabi.d: Likewise. * gas/arm/attr-any-armv4t.d: Likewise. * gas/arm/attr-any-thumbv6.d: Likewise. * gas/arm/attr-cpu-directive.d: Likewise. * gas/arm/attr-default.d: Likewise. * gas/arm/attr-march-all.d: Likewise. * gas/arm/attr-march-armv1.d: Likewise. * gas/arm/attr-march-armv2a.d: Likewise. * gas/arm/attr-march-armv2.d: Likewise. * gas/arm/attr-march-armv2s.d: Likewise. * gas/arm/attr-march-armv3.d: Likewise. * gas/arm/attr-march-armv3m.d: Likewise. * gas/arm/attr-march-armv4.d: Likewise. * gas/arm/attr-march-armv4t.d: Likewise. * gas/arm/attr-march-armv4txm.d: Likewise. * gas/arm/attr-march-armv4xm.d: Likewise. * gas/arm/attr-march-armv5.d: Likewise. * gas/arm/attr-march-armv5t.d: Likewise. * gas/arm/attr-march-armv5te.d: Likewise. * gas/arm/attr-march-armv5tej.d: Likewise. * gas/arm/attr-march-armv5texp.d: Likewise. * gas/arm/attr-march-armv5txm.d: Likewise. * gas/arm/attr-march-armv6.d: Likewise. * gas/arm/attr-march-armv6j.d: Likewise. * gas/arm/attr-march-armv6k.d: Likewise. * gas/arm/attr-march-armv6k+sec.d: Likewise. * gas/arm/attr-march-armv6kt2.d: Likewise. * gas/arm/attr-march-armv6-m.d: Likewise. * gas/arm/attr-march-armv6-m+os.d: Likewise. * gas/arm/attr-march-armv6s-m.d: Likewise. * gas/arm/attr-march-armv6t2.d: Likewise. * gas/arm/attr-march-armv6z.d: Likewise. * gas/arm/attr-march-armv6zk.d: Likewise. * gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/arm/attr-march-armv6zt2.d: Likewise. * gas/arm/attr-march-armv7-a.d: Likewise. * gas/arm/attr-march-armv7a.d: Likewise. * gas/arm/attr-march-armv7-a+idiv.d: Likewise. * gas/arm/attr-march-armv7-a+mp.d: Likewise. * gas/arm/attr-march-armv7-a+sec.d: Likewise. * gas/arm/attr-march-armv7-a+sec+virt.d: Likewise. * gas/arm/attr-march-armv7-a+virt.d: Likewise. * gas/arm/attr-march-armv7.d: Likewise. * gas/arm/attr-march-armv7em.d: Likewise. * gas/arm/attr-march-armv7-m.d: Likewise. * gas/arm/attr-march-armv7m.d: Likewise. * gas/arm/attr-march-armv7-r.d: Likewise. * gas/arm/attr-march-armv7r.d: Likewise. * gas/arm/attr-march-armv7-r+mp.d: Likewise. * gas/arm/attr-march-iwmmxt2.d: Likewise. * gas/arm/attr-march-iwmmxt.d: Likewise. * gas/arm/attr-march-xscale.d: Likewise. * gas/arm/attr-mcpu.d: Likewise. * gas/arm/attr-mfpu-arm1020e.d: Likewise. * gas/arm/attr-mfpu-arm1020t.d: Likewise. * gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * gas/arm/attr-mfpu-arm7500fe.d: Likewise. * gas/arm/attr-mfpu-fpa10.d: Likewise. * gas/arm/attr-mfpu-fpa11.d: Likewise. * gas/arm/attr-mfpu-fpa.d: Likewise. * gas/arm/attr-mfpu-fpe2.d: Likewise. * gas/arm/attr-mfpu-fpe3.d: Likewise. * gas/arm/attr-mfpu-fpe.d: Likewise. * gas/arm/attr-mfpu-maverick.d: Likewise. * gas/arm/attr-mfpu-neon.d: Likewise. * gas/arm/attr-mfpu-neon-fp16.d: Likewise. * gas/arm/attr-mfpu-softfpa.d: Likewise. * gas/arm/attr-mfpu-softvfp.d: Likewise. * gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * gas/arm/attr-mfpu-vfp10.d: Likewise. * gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * gas/arm/attr-mfpu-vfp3.d: Likewise. * gas/arm/attr-mfpu-vfp9.d: Likewise. * gas/arm/attr-mfpu-vfp.d: Likewise. * gas/arm/attr-mfpu-vfpv2.d: Likewise. * gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv3.d: Likewise. * gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/arm/attr-mfpu-vfpxd.d: Likewise. * gas/arm/attr-names.d: Likewise. * gas/arm/attr-order.d: Likewise. * gas/arm/attr-override-cpu-directive.d: Likewise. * gas/arm/attr-override-mcpu.d: Likewise. * gas/arm/got_prel.d: Likewise. * gas/arm/mapdir.d: Likewise. * gas/arm/mapmisc.d: Likewise. * gas/arm/mapsecs.d: Likewise. * gas/arm/mapshort-eabi.d: Likewise. * gas/arm/mapshort-elf.d: Likewise. * gas/arm/mov-highregs-any.d: Likewise. * gas/arm/mov-lowregs-any.d: Likewise. * gas/arm/pr12198-1.d: Likewise. * gas/arm/pr12198-2.d: Likewise. * gas/arm/thumb.d: Likewise. * gas/arm/thumb-eabi.d: Likewise. * gas/arm/thumbrel.d: Likewise. * configure.tgt (arm*-*-nacl*, arm*b-*-nacl*): Handle them. * emulparams/armelf_nacl.sh: New file. * emulparams/armelfb_nacl.sh: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add earmelf_nacl.c and earmelfb_nacl.c here. (earmelf_nacl.c, earmelfb_nacl.c): New targets. * Makefile.in: Regenerated. * ld-arm/arm-elf.exp (armelftests): Split out into ... (armelftests_common, armelftests_nonacl): ... these two. (armeabitests): Split out into ... (armeabitests_common, armeabitests_nonacl): ... these two. Omit _nonacl sets for arm*-*-nacl* targets. * ld-arm/farcall-mix.d: Don't match exact addresses, only symbolic ones. * ld-arm/farcall-mix2.d: Likewise. * ld-arm/farcall-group.d: Likewise. * ld-arm/tls-gdesc-got.d: Match variant file formats too. Accept some variation in exact addresses. * ld-arm/thumb2-b-interwork.d: Match variant file formats too. Fix regexps not to care about exact addresses where not relevant. * ld-arm/thumb2-bl-undefweak.d: Match any hex strings, not any strings of particular exact lengths. * ld-arm/thumb2-bl-undefweak1.d: Likewise. * ld-arm/arm-app.r: Match variant file formats too. * ld-arm/arm-app-abs32.r: Likewise. * ld-arm/arm-lib.d: Likewise. * ld-arm/arm-lib.r: Likewise. * ld-arm/arm-static-app.r: Likewise. * ld-arm/armv4-bx.d: Likewise. * ld-arm/data-only-map.d: Likewise. * ld-arm/group-relocs.d: Likewise. * ld-arm/jump19.d: Likewise. * ld-arm/reloc-boundaries.d: Likewise. * ld-arm/thumb1-bl.d: Likewise. * ld-arm/thumb2-bl.d: Likewise. * ld-arm/tls-app.d: Likewise. * ld-arm/tls-app.r: Likewise. * ld-arm/tls-gdierelax.d: Likewise. * ld-arm/tls-gdierelax2.d: Likewise. * ld-arm/tls-gdlerelax.d: Likewise. * ld-arm/tls-lib.d: Likewise. * ld-arm/tls-lib.r: Likewise. * ld-arm/tls-mixed.r: Likewise. * ld-arm/vfp11-fix-none.d: Likewise. * ld-arm/vfp11-fix-scalar.d: Likewise. * ld-arm/vfp11-fix-vector.d: Likewise. * ld-arm/arm-static-app.d: Likewise. Fix regexps not to care about exact number of leading spaces. * ld-arm/arm-app-abs32.d: Likewise. * ld-arm/fix-arm1176-off.d: Likewise. * ld-arm/fix-arm1176-on.d: Likewise. * ld-arm/arm-elf.exp: Treat nacl targets like eabi targets.
2012-04-12 13:01:15 +00:00
targ_selvecs="bfd_elf32_i386_nacl_vec bfd_elf64_x86_64_nacl_vec bfd_elf32_bigarm_nacl_vec bfd_elf32_littlearm_nacl_vec"
targ_archs="$targ_archs bfd_arm_arch"
want64=true
;;
x86_64-*-mingw* | x86_64-*-pe | x86_64-*-pep)
2006-09-20 11:35:11 +00:00
targ_defvec=x86_64pe_vec
Add initial Intel K1OM support. bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
targ_selvecs="x86_64pe_vec x86_64pei_vec bfd_elf64_x86_64_vec bfd_elf64_l1om_vec bfd_elf64_k1om_vec i386pe_vec i386pei_vec bfd_elf32_i386_vec"
2006-09-20 11:35:11 +00:00
want64=true
targ_underscore=no
2006-09-20 11:35:11 +00:00
;;
2012-12-05 05:48:19 +00:00
x86_64-*-rdos*)
targ_defvec=bfd_elf64_x86_64_vec
want64=true
;;
#endif
2003-05-16 16:30:27 +00:00
i[3-7]86-*-lynxos*)
2004-05-17 19:50:16 +00:00
targ_defvec=bfd_elf32_i386_vec
targ_selvecs="i386lynx_coff_vec i386lynx_aout_vec"
1999-05-03 07:29:11 +00:00
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-gnu*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_i386_vec
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-mach* | i[3-7]86-*-osf1mk*)
1999-05-03 07:29:11 +00:00
targ_defvec=i386mach3_vec
targ_cflags=-DSTAT_FOR_EXEC
targ_underscore=yes
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-os9k)
1999-05-03 07:29:11 +00:00
targ_defvec=i386os9k_vec
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-msdos*)
1999-05-03 07:29:11 +00:00
targ_defvec=i386aout_vec
targ_selvecs=i386msdos_vec
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-moss*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_i386_vec
targ_selvecs="i386msdos_vec i386aout_vec"
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-beospe*)
1999-05-03 07:29:11 +00:00
targ_defvec=i386pe_vec
targ_selvecs="i386pe_vec i386pei_vec"
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-beoself* | i[3-7]86-*-beos*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_i386_vec
targ_selvecs="i386pe_vec i386pei_vec"
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-interix*)
targ_defvec=i386pei_vec
targ_selvecs="i386pe_vec"
# FIXME: This should eventually be checked at runtime.
targ_cflags=-DSTRICT_PE_FORMAT
;;
2005-12-27 17:42:45 +00:00
i[3-7]86-*-rdos*)
targ_defvec=bfd_elf32_i386_vec
targ_selvecs=i386coff_vec
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-mingw32* | i[3-7]86-*-cygwin* | i[3-7]86-*-winnt | i[3-7]86-*-pe)
1999-05-03 07:29:11 +00:00
targ_defvec=i386pe_vec
targ_selvecs="i386pe_vec i386pei_vec bfd_elf32_i386_vec"
targ_underscore=yes
1999-05-03 07:29:11 +00:00
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-none-*)
1999-05-03 07:29:11 +00:00
targ_defvec=i386coff_vec
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-aout* | i[3-7]86*-*-vsta*)
1999-05-03 07:29:11 +00:00
targ_defvec=i386aout_vec
;;
i[3-7]86-*-vxworks*)
2005-05-05 Paul Brook <paul@codesourcery.com> bfd/ * config.bfd: Use bfd_elf32_i386_vxworks_vec for i?86-*-vxworks. * configure.in: Add bfd_elf32_i386_vxworks_vec. i386 targets need elf-vxworks.lo. * configure: Regenerate. * Makefile.am (BFD32_BACKENDS): Add elf-vxworks.lo. (BFD32_BACKENDS_CFILES): Add elf-vxworks.c. (elf32-i386.lo): Depend on elf-vxworks.h. (elf-vxworks.lo): New rule. * Makefile.in: Regenerate. * elf-bfd.h (elf_backend_data): Update type of elf_backend_emit_relocs. (_bfd_elf_link_output_relocs): Update prototype. * elflink.c (_bfd_elf_link_output_relocs): Always use bed->elf_backend_emit_relocs when outputting relocations. * elfxx-target.h (elf_backend_emit_relocs): Default to _bfd_elf_link_output_relocs. * targets.c (bfd_elf32_i386_vxworks_vec): Declare. (_bfd_target_vector): Add bfd_elf32_i386_vxworks_vec. * elf32-i386.c: Add elf32-i386-vxworks target BFD. (elf_i386_plt0_entry): Remove padding. (elf_i386_pic_plt0_entry): Ditto. (PLTRESOLVE_RELOCS_SHLIB, PLTRESOLVE_RELOCS): Define. (PLT_NON_JUMP_SLOT_RELOCS): Define. (elf_i386_link_hash_table): Add srelplt2, hgot, hplt, is_vxworks and plt0_pad_byte fields. (elf_i386_link_hash_table_create): Zero them. (elf_i386_create_dynamic_sections): Create static relocation section. (allocate_dynrelocs): Allocate space for static PLT relocations. (elf_i386_size_dynamic_sections): Save shortcuts to PLT and GOT symbols. Give PLT symbols function type. Don't strip PLT sections if we have exported symbols from them. (elf_i386_finish_dynamic_symbol): Fill in VxWorks PLT static relocation section. Don't mark _GLOBAL_OFFSET_TABLE_ as absolute on VxWorks. (elf_i386_finish_dynamic_sections): Allow different pad bytes. Add relocation for GOT location. Fill in PLT static relocations. (elf_i386_vxworks_link_hash_table_create): New function. (elf_i386_vxworks_link_output_symbol_hook): New function. * elf-vxworks.h: New file. gas/ * config/tc-i386.h (ELF_TARGET_FORMAT): Define for TE_VXWORKS. gas/testsuite/ * gas/i386/i386.exp: Don't run divide test on vxworks. ld/ * Makefile.am: Add eelf_i386_vxworks. * Makefile.in: Regenerate. * configure.tgt: Make i?86-*-vxworks use targ_emul=elf_i386_vxworks. * emulparams/elf_i386_vxworks.sh: New file. * emulparams/vxworks.sh: New file. * scripttempl/elf.sc: Add DATA_END_SYMBOLS and ETEXT_NAME.
2005-05-05 14:37:27 +00:00
targ_defvec=bfd_elf32_i386_vxworks_vec
targ_underscore=yes
;;
2003-05-16 16:30:27 +00:00
i[3-7]86-*-chaos)
2000-11-02 23:03:24 +00:00
targ_defvec=bfd_elf32_i386_vec
targ_selfvecs=i386chaos_vec
;;
1999-05-03 07:29:11 +00:00
i860-*-mach3* | i860-*-osf1* | i860-*-coff*)
targ_defvec=i860coff_vec
;;
2000-07-22 Jason Eckhardt <jle@cygnus.com> * include/opcode/i860.h (btne, bte, bla): Changed these opcodes to use sbroff ('r') instead of split16 ('s'). (J, K, L, M): New operand types for 16-bit aligned fields. (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to use I, J, K, L, M instead of just I. (T, U): New operand types for split 16-bit aligned fields. (st.x): Changed these opcodes to use S, T, U instead of just S. (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not exist on the i860. (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860. (pfeq.ss, pfeq.dd): New opcodes. (st.s): Fixed incorrect mask bits. (fmlow): Fixed incorrect mask bits. (fzchkl, pfzchkl): Fixed incorrect mask bits. (faddz, pfaddz): Fixed incorrect mask bits. (form, pform): Fixed incorrect mask bits. (pfld.l): Fixed incorrect mask bits. (fst.q): Fixed incorrect mask bits. (all floating point opcodes): Fixed incorrect mask bits for handling of dual bit. * include/elf/i860.h: New file. (elf_i860_reloc_type): Defined ELF32 i860 relocations. * bfd/cpu-i860.c: Added comments. * bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to bfd_elf32_i860_little_vec. (TARGET_LITTLE_NAME): Defined to "elf32-i860-little". (ELF_MAXPAGESIZE): Changed to 4096. * bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of new target. (bfd_target_vector): Added bfd_elf32_i860_little_vec. * bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added config for little endian elf32 i860. (targ_defvec): Define for the new config above as "bfd_elf32_i860_little_vec". (targ_selvecs): Define for the new config above as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec" * bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition of new target vec. * bfd/configure: Regenerated. * opcodes/i860-dis.c: New file. (print_insn_i860): New function. (print_br_address): New function. (sign_extend): New function. (BITWISE_OP): New macro. (I860_REG_PREFIX): New macro. (grnames, frnames, crnames): New structures. * opcodes/disassemble.c (ARCH_i860): Define. (disassembler): Add check for bfd_arch_i860 to set disassemble function to print_insn_i860. * include/dis-asm.h (print_insn_i860): Add prototype. * opcodes/Makefile.in (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences. * opcodes/configure.in: New bits for bfd_i860_arch. * opcodes/configure: Regenerated.
2000-07-28 21:10:20 +00:00
i860-stardent-sysv4* | i860-stardent-elf*)
targ_defvec=bfd_elf32_i860_little_vec
targ_selvecs="bfd_elf32_i860_vec bfd_elf32_i860_little_vec"
;;
1999-05-03 07:29:11 +00:00
i860-*-sysv4* | i860-*-elf*)
targ_defvec=bfd_elf32_i860_vec
;;
i960-*-vxworks4* | i960-*-vxworks5.0)
targ_defvec=b_out_vec_little_host
targ_selvecs="b_out_vec_big_host icoff_little_vec icoff_big_vec ieee_vec"
targ_underscore=yes
;;
i960-*-vxworks5.* | i960-*-coff* | i960-*-sysv*)
1999-05-03 07:29:11 +00:00
targ_defvec=icoff_little_vec
targ_selvecs="icoff_big_vec b_out_vec_little_host b_out_vec_big_host ieee_vec"
targ_underscore=yes
;;
i960-*-vxworks* | i960-*-aout* | i960-*-bout* | i960-*-nindy*)
targ_defvec=b_out_vec_little_host
targ_selvecs="b_out_vec_big_host icoff_little_vec icoff_big_vec ieee_vec"
targ_underscore=yes
;;
i960-*-elf*)
targ_defvec=bfd_elf32_i960_vec
targ_selvecs="icoff_little_vec icoff_big_vec"
;;
1999-05-03 07:29:11 +00:00
2002-07-17 14:15:52 +00:00
ip2k-*-elf)
targ_defvec=bfd_elf32_ip2k_vec
;;
iq2000-*-elf)
targ_defvec=bfd_elf32_iq2000_vec
;;
lm32-*-elf | lm32-*-rtems*)
2008-12-23 19:10:25 +00:00
targ_defvec=bfd_elf32_lm32_vec
targ_selvecs=bfd_elf32_lm32fdpic_vec
;;
2008-12-23 19:10:25 +00:00
lm32-*-*linux*)
targ_defvec=bfd_elf32_lm32fdpic_vec
targ_selvecs=bfd_elf32_lm32_vec
;;
m32c-*-elf | m32c-*-rtems*)
targ_defvec=bfd_elf32_m32c_vec
;;
m32r*le-*-linux*)
targ_defvec=bfd_elf32_m32rlelin_vec
targ_selvecs="bfd_elf32_m32rlin_vec bfd_elf32_m32rlelin_vec"
;;
m32r*-*-linux*)
targ_defvec=bfd_elf32_m32rlin_vec
targ_selvecs="bfd_elf32_m32rlin_vec bfd_elf32_m32rlelin_vec"
;;
m32r*le-*-*)
targ_defvec=bfd_elf32_m32rle_vec
targ_selvecs="bfd_elf32_m32r_vec bfd_elf32_m32rle_vec"
;;
1999-05-03 07:29:11 +00:00
m32r-*-*)
targ_defvec=bfd_elf32_m32r_vec
;;
m68hc11-*-* | m6811-*-*)
targ_defvec=bfd_elf32_m68hc11_vec
targ_selvecs="bfd_elf32_m68hc11_vec bfd_elf32_m68hc12_vec"
;;
m68hc12-*-* | m6812-*-*)
targ_defvec=bfd_elf32_m68hc12_vec
targ_selvecs="bfd_elf32_m68hc11_vec bfd_elf32_m68hc12_vec"
;;
1999-05-03 07:29:11 +00:00
m68*-motorola-sysv*)
targ_defvec=m68ksysvcoff_vec
;;
m68*-hp-bsd*)
targ_defvec=hp300bsd_vec
targ_underscore=yes
;;
m68*-*-aout*)
targ_defvec=aout0_big_vec
# We include cisco_core_big_vec here, rather than making a separate cisco
1999-05-03 07:29:11 +00:00
# configuration, so that cisco-core.c gets routinely tested at
# least for compilation.
targ_selvecs="cisco_core_big_vec ieee_vec"
1999-05-03 07:29:11 +00:00
targ_underscore=yes
;;
2004-01-02 16:37:12 +00:00
m68*-*-elf* | m68*-*-sysv4* | m68*-*-uclinux*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_m68k_vec
targ_selvecs="m68kcoff_vec ieee_vec"
;;
m68*-*-rtems*)
targ_defvec=bfd_elf32_m68k_vec
targ_selvecs="m68kcoff_vec versados_vec ieee_vec aout0_big_vec"
;;
m68*-*-coff* | m68*-*-sysv*)
1999-05-03 07:29:11 +00:00
targ_defvec=m68kcoff_vec
targ_selvecs="m68kcoff_vec versados_vec ieee_vec"
;;
m68*-*-hpux*)
targ_defvec=hp300hpux_vec
targ_underscore=yes
;;
m68*-*-linux*aout*)
targ_defvec=m68klinux_vec
targ_selvecs=bfd_elf32_m68k_vec
targ_underscore=yes
;;
m68*-*-linux-*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_m68k_vec
targ_selvecs=m68klinux_vec
;;
m68*-*-gnu*)
targ_defvec=bfd_elf32_m68k_vec
# targ_selvecs=m68kmach3_vec
# targ_cflags=-DSTAT_FOR_EXEC
;;
m68*-hp*-netbsd*)
targ_defvec=m68k4knetbsd_vec
targ_selvecs="m68knetbsd_vec hp300bsd_vec sunos_big_vec"
targ_underscore=yes
;;
m68*-*-netbsdelf*)
targ_defvec=bfd_elf32_m68k_vec
targ_selvecs="m68knetbsd_vec m68k4knetbsd_vec hp300bsd_vec sunos_big_vec"
;;
m68*-*-netbsdaout* | m68*-*-netbsd*)
targ_defvec=m68knetbsd_vec
targ_selvecs="m68k4knetbsd_vec bfd_elf32_m68k_vec hp300bsd_vec sunos_big_vec"
targ_underscore=yes
;;
m68*-*-openbsd*)
1999-05-03 07:29:11 +00:00
targ_defvec=m68knetbsd_vec
targ_selvecs="m68k4knetbsd_vec hp300bsd_vec sunos_big_vec"
targ_underscore=yes
;;
m68*-*-sunos* | m68*-*-os68k* | m68*-*-vxworks* | m68*-netx-* | \
m68*-*-bsd* | m68*-*-vsta*)
targ_defvec=sunos_big_vec
targ_underscore=yes
;;
m68*-ericsson-*)
targ_defvec=sunos_big_vec
targ_selvecs="m68kcoff_vec versados_vec tekhex_vec"
targ_underscore=yes
;;
m68*-cbm-*)
targ_defvec=bfd_elf32_m68k_vec
targ_selvecs=m68kcoff_vec
;;
m68*-*-psos*)
targ_defvec=bfd_elf32_m68k_vec
targ_selvecs=ieee_vec
targ_underscore=yes
;;
m88*-harris-cxux* | m88*-*-dgux* | m88*-*-sysv4*)
targ_defvec=bfd_elf32_m88k_vec
targ_selvecs=m88kbcs_vec
;;
m88*-*-mach3*)
targ_defvec=m88kmach3_vec
targ_cflags=-DSTAT_FOR_EXEC
;;
m88*-*-openbsd*)
2004-05-24 14:48:18 +00:00
targ_defvec=m88kopenbsd_vec
targ_underscore=yes
;;
1999-05-03 07:29:11 +00:00
m88*-*-*)
targ_defvec=m88kbcs_vec
targ_underscore=yes
;;
mcore-*-elf)
targ_defvec=bfd_elf32_mcore_big_vec
targ_selvecs="bfd_elf32_mcore_big_vec bfd_elf32_mcore_little_vec"
;;
mcore-*-pe)
targ_defvec=mcore_pe_big_vec
targ_selvecs="mcore_pe_big_vec mcore_pe_little_vec mcore_pei_big_vec mcore_pei_little_vec"
;;
mep-*-elf)
targ_defvec=bfd_elf32_mep_vec
targ_selvecs=bfd_elf32_mep_little_vec
;;
* common.h: Fix case of "Meta". * metag.h: New file. * dis-asm.h (print_insn_metag): New declaration. * metag.h: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure: Regenerate. * configure.in: Add Meta. * disassemble.c: Add Meta support. * metag-dis.c: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * archures.c (bfd_mach_metag): New. * bfd-in2.h: Regenerate. * config.bfd: Add Meta. * configure: Regenerate. * configure.in: Add Meta. * cpu-metag.c: New file. * elf-bfd.h: Add Meta. * elf32-metag.c: New file. * elf32-metag.h: New file. * libbfd.h: Regenerate. * reloc.c: Add Meta relocations. * targets.c: Add Meta. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * config/tc-metag.c: New file. * config/tc-metag.h: New file. * configure.tgt: Add Meta. * doc/Makefile.am: Add Meta. * doc/Makefile.in: Regenerate. * doc/all.texi: Add Meta. * doc/as.texiinfo: Document Meta options. * doc/c-metag.texi: New file. * gas/metag/labelarithmetic.d: New file. * gas/metag/labelarithmetic.s: New file. * gas/metag/metacore12.d: New file. * gas/metag/metacore12.s: New file. * gas/metag/metacore21-invalid.l: New file. * gas/metag/metacore21-invalid.s: New file. * gas/metag/metacore21.d: New file. * gas/metag/metacore21.s: New file. * gas/metag/metacore21ext.d: New file. * gas/metag/metacore21ext.s: New file. * gas/metag/metadsp21-invalid.l: New file. * gas/metag/metadsp21-invalid.s: New file. * gas/metag/metadsp21.d: New file. * gas/metag/metadsp21.s: New file. * gas/metag/metadsp21ext.d: New file. * gas/metag/metadsp21ext.s: New file. * gas/metag/metafpu21.d: New file. * gas/metag/metafpu21.s: New file. * gas/metag/metafpu21ext.d: New file. * gas/metag/metafpu21ext.s: New file. * gas/metag/metag.exp: New file. * gas/metag/tls.d: New file. * gas/metag/tls.s: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure.tgt: Add Meta. * emulparams/elf32metag.sh: New file. * emultempl/metagelf.em: New file. * ld-elf/merge.d: Mark Meta as xfail. * ld-gc/start.d: Skip this test on Meta. * ld-gc/personality.d: Skip this test on Meta. * ld-metag/external.s: New file. * ld-metag/metag.exp: New file. * ld-metag/pcrel.d: New file. * ld-metag/pcrel.s: New file. * ld-metag/shared.d: New file. * ld-metag/shared.r: New file. * ld-metag/shared.s: New file. * ld-metag/stub.d: New file. * ld-metag/stub.s: New file. * ld-metag/stub_pic_app.d: New file. * ld-metag/stub_pic_app.r: New file. * ld-metag/stub_pic_app.s: New file. * ld-metag/stub_pic_shared.d: New file. * ld-metag/stub_pic_shared.s: New file. * ld-metag/stub_shared.d: New file. * ld-metag/stub_shared.r: New file. * ld-metag/stub_shared.s: New file. * binutils/readelf.c: (guess_is_rela): Add EM_METAG. (dump_relocations): Add EM_METAG. (get_machine_name): Correct case for Meta. (is_32bit_abs_reloc): Add support for Meta ADDR32 reloc. (is_none_reloc): Add support for Meta NONE reloc.
2013-01-10 09:49:22 +00:00
metag-*-*)
targ_defvec=bfd_elf32_metag_vec
targ_underscore=yes
;;
Add microblazeel target support to bfd, gas and ld. binutils/bfd/Changelog 2012-11-09 Edgar E. Iglesias <edgar.iglesias@gmail.com> * config.bfd: Add microblazeel-*-* * configure.in: Likewise. * configure: Regenerate. * elf32-microblaze.c (microblaze_elf_relocate_section): Add endian awareness. (microblaze_elf_merge_private_bfd_data): New. (microblaze_bfd_write_imm_value_32): New. (microblaze_bfd_write_imm_value_64): New. (microblaze_elf_relax_section): Add endian awareness. (microblaze_elf_add_symbol_hook): Define TARGET_LITTLE_NAME, TARGET_LITTLE_SYM and bfd_elf32_bfd_merge_private_bfd_data. * targets.c: Add bfd target bfd_elf32_microblazeel_vec. binutils/gas/Changelog 2012-11-09 Edgar E. Iglesias <edgar.iglesias@gmail.com> * tc-microblaze.c (md_longopts): Define OPTION_EB and OPTION_EL for target. (md_parse_option): Likewise. * tc-microblaze.h: Set elf32-microblazeel if not target_big_endian for TARGET_FORMAT. * configure.tgt: Add microblazeel and set endian per target. binutils/gas/testsuite/Changelog 2012-11-09 David Holsgrove <david.holsgrove@xilinx.com> * gas/microblaze/endian.exp: New file - endian testcase for microblaze / microblazeel. * gas/microblaze/endian.s: Likewise. * gas/microblaze/endian_be.d: Likewise. * gas/microblaze/endian_le.d: Likewise. * gas/microblaze/endian_le_elf.d: Likewise. * gas/microblaze/reloc_sym.d: Update to accept targets other than elf32-microblaze. * gas/microblaze/special_reg.d: Likewise. binutils/ld/Changelog 2012-11-09 Edgar E. Iglesias <edgar.iglesias@gmail.com> * Makefile.am: Add eelf32microblazeel.c and eelf32mbel_linux.c. * Makefile.in: Regenerated. * configure.tgt: Add microblazeel and set endian per target. * emulparams/elf32mb_linux.sh: Add OUTPUT_FORMAT. * emulparams/elf32microblaze.sh: Likewise. * emulparams/elf32mbel_linux.sh: New file. * emulparams/elf32microblazeel.sh: Likewise.
2012-11-09 16:25:12 +00:00
microblazeel*-*)
targ_defvec=bfd_elf32_microblazeel_vec
targ_selvecs=bfd_elf32_microblaze_vec
;;
Add support for Xilinx MicroBlaze processor. * bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}. * bfd/Makefile.in: Same. * bfd/archures.c: Add bfd_arch_microblaze. * bfd/bfd-in2.h: Regenerate. * bfd/config.bfd: Add microblaze target. * bfd/configure: Add bfd_elf32_microblaze_vec target. * bfd/configure.in: Same. * bfd/cpu-microblaze.c: New. * bfd/elf32-microblaze.c: New. * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc(). * bfd/libbfd.h: Regenerate. * bfd/reloc.c: Add MICROBLAZE relocations. * bfd/section.c: Add struct relax_table and relax_count to section. * bfd/targets.c: Add bfd_elf32_microblaze_vec. * binutils/MAINTAINERS: Add self as maintainer. * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE & EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(), get_machine_name(). * config.sub: Add microblaze target. * configure: Same. * configure.ac: Same. * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add DEP_microblaze_elf target. * gas/Makefile.in: Same. * gas/config/tc-microblaze.c: Add MicroBlaze assembler. * gas/config/tc-microblaze.h: Add header for tc-microblaze.c. * gas/configure: Add microblaze target. * gas/configure.in: Same. * gas/configure.tgt: Same. * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS. * gas/doc/Makefile.in: Same. * gas/doc/all.texi: Set MICROBLAZE. * gas/doc/as.texinfo: Add MicroBlaze doc links. * gas/doc/c-microblaze.texi: New MicroBlaze docs. * include/dis-asm.h: Decl print_insn_microblaze(). * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. * include/elf/microblaze.h: New reloc definitions. * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to ALL_EMULATIONS, targets. * ld/Makefile.in: Same. * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets. * ld/emulparams/elf32mb_linux.sh: New. * ld/emulparams/elf32microblaze.sh. New. * ld/scripttempl/elfmicroblaze.sc: New. * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to CFILES, microblaze-dis.lo to ALL_MACHINES, targets. * opcodes/Makefile.in: Same. * opcodes/configure: Add bfd_microblaze_arch target. * opcodes/configure.in: Same. * opcodes/disassemble.c: Define ARCH_microblaze, return print_insn_microblaze(). * opcodes/microblaze-dis.c: New MicroBlaze disassembler. * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions. * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 17:38:04 +00:00
microblaze*-*)
targ_defvec=bfd_elf32_microblaze_vec
Add microblazeel target support to bfd, gas and ld. binutils/bfd/Changelog 2012-11-09 Edgar E. Iglesias <edgar.iglesias@gmail.com> * config.bfd: Add microblazeel-*-* * configure.in: Likewise. * configure: Regenerate. * elf32-microblaze.c (microblaze_elf_relocate_section): Add endian awareness. (microblaze_elf_merge_private_bfd_data): New. (microblaze_bfd_write_imm_value_32): New. (microblaze_bfd_write_imm_value_64): New. (microblaze_elf_relax_section): Add endian awareness. (microblaze_elf_add_symbol_hook): Define TARGET_LITTLE_NAME, TARGET_LITTLE_SYM and bfd_elf32_bfd_merge_private_bfd_data. * targets.c: Add bfd target bfd_elf32_microblazeel_vec. binutils/gas/Changelog 2012-11-09 Edgar E. Iglesias <edgar.iglesias@gmail.com> * tc-microblaze.c (md_longopts): Define OPTION_EB and OPTION_EL for target. (md_parse_option): Likewise. * tc-microblaze.h: Set elf32-microblazeel if not target_big_endian for TARGET_FORMAT. * configure.tgt: Add microblazeel and set endian per target. binutils/gas/testsuite/Changelog 2012-11-09 David Holsgrove <david.holsgrove@xilinx.com> * gas/microblaze/endian.exp: New file - endian testcase for microblaze / microblazeel. * gas/microblaze/endian.s: Likewise. * gas/microblaze/endian_be.d: Likewise. * gas/microblaze/endian_le.d: Likewise. * gas/microblaze/endian_le_elf.d: Likewise. * gas/microblaze/reloc_sym.d: Update to accept targets other than elf32-microblaze. * gas/microblaze/special_reg.d: Likewise. binutils/ld/Changelog 2012-11-09 Edgar E. Iglesias <edgar.iglesias@gmail.com> * Makefile.am: Add eelf32microblazeel.c and eelf32mbel_linux.c. * Makefile.in: Regenerated. * configure.tgt: Add microblazeel and set endian per target. * emulparams/elf32mb_linux.sh: Add OUTPUT_FORMAT. * emulparams/elf32microblaze.sh: Likewise. * emulparams/elf32mbel_linux.sh: New file. * emulparams/elf32microblazeel.sh: Likewise.
2012-11-09 16:25:12 +00:00
targ_selvecs=bfd_elf32_microblazeel_vec
Add support for Xilinx MicroBlaze processor. * bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}. * bfd/Makefile.in: Same. * bfd/archures.c: Add bfd_arch_microblaze. * bfd/bfd-in2.h: Regenerate. * bfd/config.bfd: Add microblaze target. * bfd/configure: Add bfd_elf32_microblaze_vec target. * bfd/configure.in: Same. * bfd/cpu-microblaze.c: New. * bfd/elf32-microblaze.c: New. * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc(). * bfd/libbfd.h: Regenerate. * bfd/reloc.c: Add MICROBLAZE relocations. * bfd/section.c: Add struct relax_table and relax_count to section. * bfd/targets.c: Add bfd_elf32_microblaze_vec. * binutils/MAINTAINERS: Add self as maintainer. * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE & EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(), get_machine_name(). * config.sub: Add microblaze target. * configure: Same. * configure.ac: Same. * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add DEP_microblaze_elf target. * gas/Makefile.in: Same. * gas/config/tc-microblaze.c: Add MicroBlaze assembler. * gas/config/tc-microblaze.h: Add header for tc-microblaze.c. * gas/configure: Add microblaze target. * gas/configure.in: Same. * gas/configure.tgt: Same. * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS. * gas/doc/Makefile.in: Same. * gas/doc/all.texi: Set MICROBLAZE. * gas/doc/as.texinfo: Add MicroBlaze doc links. * gas/doc/c-microblaze.texi: New MicroBlaze docs. * include/dis-asm.h: Decl print_insn_microblaze(). * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. * include/elf/microblaze.h: New reloc definitions. * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to ALL_EMULATIONS, targets. * ld/Makefile.in: Same. * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets. * ld/emulparams/elf32mb_linux.sh: New. * ld/emulparams/elf32microblaze.sh. New. * ld/scripttempl/elfmicroblaze.sc: New. * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to CFILES, microblaze-dis.lo to ALL_MACHINES, targets. * opcodes/Makefile.in: Same. * opcodes/configure: Add bfd_microblaze_arch target. * opcodes/configure.in: Same. * opcodes/disassemble.c: Define ARCH_microblaze, return print_insn_microblaze(). * opcodes/microblaze-dis.c: New MicroBlaze disassembler. * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions. * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 17:38:04 +00:00
;;
1999-05-03 07:29:11 +00:00
mips*-big-*)
targ_defvec=ecoff_big_vec
targ_selvecs=ecoff_little_vec
;;
mips*el-*-netbsd*)
targ_defvec=bfd_elf32_tradlittlemips_vec
targ_selvecs="bfd_elf32_tradbigmips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec ecoff_little_vec ecoff_big_vec"
1999-05-03 07:29:11 +00:00
;;
mips*-*-netbsd*)
targ_defvec=bfd_elf32_tradbigmips_vec
targ_selvecs="bfd_elf32_tradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec ecoff_big_vec ecoff_little_vec"
1999-05-03 07:29:11 +00:00
;;
mips*-dec-* | mips*el-*-ecoff*)
targ_defvec=ecoff_little_vec
targ_selvecs=ecoff_big_vec
;;
mips*-*-ecoff*)
targ_defvec=ecoff_big_vec
targ_selvecs=ecoff_little_vec
;;
#ifdef BFD64
1999-05-03 07:29:11 +00:00
mips*-*-irix6*)
targ_defvec=bfd_elf32_nbigmips_vec
targ_selvecs="bfd_elf32_nlittlemips_vec bfd_elf32_bigmips_vec bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
want64=true
1999-05-03 07:29:11 +00:00
;;
* archures.c: Add support for MIPS r5900 * bfd-in2.h: Add support for MIPS r5900 * config.bfd: Add support for Sony Playstation 2 * cpu-mips.c: Add support for MIPS r5900 * elfxx-mips.c: Add support for MIPS r5900 (extension of r4000) * config/tc-mips.c: Add support for MIPS r5900 Add M_LQ_AB and M_SQ_AB to support large values for instructions lq and sq. * config/tc-mips.c (can_swap_branch_p, get_append_method): Detect some conditional short loops to fix a bug on the r5900 by NOP in the branch delay slot. * config/tc-mips.c (M_MUL): Support 3 operands in multu on r5900. * config/tc-mips.c (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I. * config/tc-mips.c (s_mipsset): Force 32 bit floating point on r5900. * configure.in: Detect CPU type when target string contains r5900 (e.g. mips64r5900el-linux-gnu). * config/tc-mips.c (mips_ip): Check parameter range of instructions mfps and mtps on r5900. * elf/mips.h: Add MIPS machine variant number for r5900 which is compatible with old Playstation 2 software. * opcode/mips.h: Add support for r5900 instructions including lq and sq. * configure.tgt: Support ELF files for Sony Playstation 2 (for ps2dev and ps2sdk). * emulparams/elf32lr5900n32.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI n32. * emulparams/elf32lr5900.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI o32. * Makefile.am: Add linker scripts for Sony Playstation 2 ELF files. * opcodes/mips-dis.c: Add names for CP0 registers of r5900. * opcodes/mips-opc.c: Add M_SQ_AB and M_LQ_AB to support larger range for instructions sq and lq. * opcodes/mips-opc.c: Add support for MIPS r5900 CPU. Add support for 128 bit MMI (Multimedia Instructions). Add support for EE instructions (Emotion Engine). Disable unsupported floating point instructions (64 bit and undefined compare operations). Enable instructions of MIPS ISA IV which are supported by r5900. Disable 64 bit co processor instructions. Disable 64 bit multiplication and division instructions. Disable instructions for co-processor 2 and 3, because these are not supported (preparation for later VU0 support (Vector Unit)). Disable cvt.w.s because this behaves like trunc.w.s and the correct execution can't be ensured on r5900. Add trunc.w.s using the opcode encoding of cvt.w.s on r5900. This will confuse less developers and compilers.
2013-01-04 17:22:53 +00:00
mips64*-ps2-elf*)
targ_defvec=bfd_elf32_nlittlemips_vec
targ_selvecs="bfd_elf32_nlittlemips_vec bfd_elf32_nbigmips_vec bfd_elf32_bigmips_vec bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
want64=true
;;
#endif
* archures.c: Add support for MIPS r5900 * bfd-in2.h: Add support for MIPS r5900 * config.bfd: Add support for Sony Playstation 2 * cpu-mips.c: Add support for MIPS r5900 * elfxx-mips.c: Add support for MIPS r5900 (extension of r4000) * config/tc-mips.c: Add support for MIPS r5900 Add M_LQ_AB and M_SQ_AB to support large values for instructions lq and sq. * config/tc-mips.c (can_swap_branch_p, get_append_method): Detect some conditional short loops to fix a bug on the r5900 by NOP in the branch delay slot. * config/tc-mips.c (M_MUL): Support 3 operands in multu on r5900. * config/tc-mips.c (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I. * config/tc-mips.c (s_mipsset): Force 32 bit floating point on r5900. * configure.in: Detect CPU type when target string contains r5900 (e.g. mips64r5900el-linux-gnu). * config/tc-mips.c (mips_ip): Check parameter range of instructions mfps and mtps on r5900. * elf/mips.h: Add MIPS machine variant number for r5900 which is compatible with old Playstation 2 software. * opcode/mips.h: Add support for r5900 instructions including lq and sq. * configure.tgt: Support ELF files for Sony Playstation 2 (for ps2dev and ps2sdk). * emulparams/elf32lr5900n32.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI n32. * emulparams/elf32lr5900.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI o32. * Makefile.am: Add linker scripts for Sony Playstation 2 ELF files. * opcodes/mips-dis.c: Add names for CP0 registers of r5900. * opcodes/mips-opc.c: Add M_SQ_AB and M_LQ_AB to support larger range for instructions sq and lq. * opcodes/mips-opc.c: Add support for MIPS r5900 CPU. Add support for 128 bit MMI (Multimedia Instructions). Add support for EE instructions (Emotion Engine). Disable unsupported floating point instructions (64 bit and undefined compare operations). Enable instructions of MIPS ISA IV which are supported by r5900. Disable 64 bit co processor instructions. Disable 64 bit multiplication and division instructions. Disable instructions for co-processor 2 and 3, because these are not supported (preparation for later VU0 support (Vector Unit)). Disable cvt.w.s because this behaves like trunc.w.s and the correct execution can't be ensured on r5900. Add trunc.w.s using the opcode encoding of cvt.w.s on r5900. This will confuse less developers and compilers.
2013-01-04 17:22:53 +00:00
mips*-ps2-elf*)
targ_defvec=bfd_elf32_littlemips_vec
targ_selvecs="bfd_elf32_bigmips_vec bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
;;
1999-05-03 07:29:11 +00:00
mips*-*-irix5*)
targ_defvec=bfd_elf32_bigmips_vec
targ_selvecs="bfd_elf32_littlemips_vec ecoff_big_vec ecoff_little_vec"
;;
mips*-sgi-* | mips*-*-bsd*)
targ_defvec=ecoff_big_vec
targ_selvecs=ecoff_little_vec
;;
mips*-*-lnews*)
targ_defvec=ecoff_biglittle_vec
targ_selvecs="ecoff_little_vec ecoff_big_vec"
;;
mips*-*-sysv4*)
targ_defvec=bfd_elf32_tradbigmips_vec
targ_selvecs="bfd_elf32_tradlittlemips_vec ecoff_big_vec ecoff_little_vec"
1999-05-03 07:29:11 +00:00
;;
mips*-*-sysv* | mips*-*-riscos*)
targ_defvec=ecoff_big_vec
targ_selvecs=ecoff_little_vec
;;
Richard Sandiford <richard@codesourcery.com> Daniel Jacobowitz <dan@codesourcery.com> Phil Edwards <phil@codesourcery.com> Zack Weinberg <zack@codesourcery.com> Mark Mitchell <mark@codesourcery.com> Nathan Sidwell <nathan@codesourcery.com> bfd/ * bfd-in2.h: Regenerate. * config.bfd (mips*-*-vxworks*, mips*el-*-vxworks*): New stanzas. * configure.in (bfd_elf32_bigmips_vxworks_vec): New stanza. (bfd_elf32_littlemips_vxworks_vec): Likewise. (bfd_elf32_bigmips_vec): Add elf-vxworks.lo. (bfd_elf32_littlemips_vec): Likewise. (bfd_elf32_nbigmips_vec): Likewise. (bfd_elf32_nlittlemips_vec): Likewise. (bfd_elf32_ntradbigmips_vec): Likewise. (bfd_elf32_ntradlittlemips_vec): Likewise. (bfd_elf32_tradbigmips_vec): Likewise. (bfd_elf32_tradlittlemips_vec): Likewise. (bfd_elf64_bigmips_vec): Likewise. (bfd_elf64_littlemips_vec): Likewise. (bfd_elf64_tradbigmips_vec): Likewise. (bfd_elf64_tradlittlemips_vec): Likewise. * elf32-mips.c: Include elf-vxworks.h. (mips_info_to_howto_rel): Use elf_backend_mips_rtype_to_howto instead of calling mips_elf32_rtype_to_howto directly. (mips_vxworks_copy_howto_rela): New reloc howto. (mips_vxworks_jump_slot_howto_rela): Likewise. (mips_vxworks_bfd_reloc_type_lookup): New function. (mips_vxworks_rtype_to_howto): Likewise. (mips_vxworks_final_write_processing): Likewise. (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME): Override for VxWorks. (TARGET_BIG_SYM, TARGET_BIG_NAME, elf_bed, ELF_MAXPAGESIZE): Likewise. (elf_backend_want_got_plt): Likewise. (elf_backend_want_plt_sym): Likewise. (elf_backend_got_symbol_offset): Likewise. (elf_backend_want_dynbss): Likewise. (elf_backend_may_use_rel_p): Likewise. (elf_backend_may_use_rela_p): Likewise. (elf_backend_default_use_rela_p): Likewise. (elf_backend_got_header_size: Likewise. (elf_backend_plt_readonly): Likewise. (bfd_elf32_bfd_reloc_type_lookup): Likewise. (elf_backend_mips_rtype_to_howto): Likewise. (elf_backend_adjust_dynamic_symbol): Likewise. (elf_backend_finish_dynamic_symbol): Likewise. (bfd_elf32_bfd_link_hash_table_create): Likewise. (elf_backend_add_symbol_hook): Likewise. (elf_backend_link_output_symbol_hook): Likewise. (elf_backend_emit_relocs): Likewise. (elf_backend_final_write_processing: Likewise. (elf_backend_additional_program_headers): Likewise. (elf_backend_modify_segment_map): Likewise. (elf_backend_symbol_processing): Likewise. * elfxx-mips.c: Include elf-vxworks.h. (mips_elf_link_hash_entry): Add is_relocation_target and is_branch_target fields. (mips_elf_link_hash_table): Add is_vxworks, srelbss, sdynbss, srelplt, srelplt2, sgotplt, splt, plt_header_size and plt_entry_size fields. (MIPS_ELF_RELA_SIZE, MIPS_ELF_REL_DYN_NAME): New macros. (MIPS_RESERVED_GOTNO): Take a mips_elf_link_hash_table argument. Return 3 for VxWorks. (ELF_MIPS_GP_OFFSET): Change the argument from a bfd to a mips_elf_link_hash_table. Return 0 for VxWorks. (MIPS_ELF_GOT_MAX_SIZE): Change the argument from a bfd to a mips_elf_link_hash_table. Update the call to ELF_MIPS_GP_OFFSET. (mips_vxworks_exec_plt0_entry): New variable. (mips_vxworks_exec_plt_entry): Likewise. (mips_vxworks_shared_plt0_entry): Likewise. (mips_vxworks_shared_plt_entry): Likewise. (mips_elf_link_hash_newfunc): Initialize the new hash_entry fields. (mips_elf_rel_dyn_section): Change the bfd argument to a mips_elf_link_hash_table. Use MIPS_ELF_REL_DYN_NAME to get the name of the section. (mips_elf_initialize_tls_slots): Update the call to mips_elf_rel_dyn_section. (mips_elf_gotplt_index): New function. (mips_elf_local_got_index): Add an input_section argument. Update the call to mips_elf_create_local_got_entry. (mips_elf_got_page): Likewise. (mips_elf_got16_entry): Likewise. (mips_elf_create_local_got_entry): Add bfd_link_info and input_section arguments. Create dynamic relocations for each entry on VxWorks. (mips_elf_merge_gots): Update the use of MIPS_ELF_GOT_MAX_SIZE. (mips_elf_multi_got): Update the uses of MIPS_ELF_GOT_MAX_SIZE and MIPS_RESERVED_GOTNO. (mips_elf_create_got_section): Update the uses of MIPS_ELF_GOT_MAX_SIZE. Create .got.plt on VxWorks. (is_gott_symbol): New function. (mips_elf_calculate_relocation): Use a dynobj local variable. Update the calls to mips_elf_local_got_index, mips_elf_got16_entry and mips_elf_got_page_entry. Set G to the .got.plt entry when calculating VxWorks R_MIPS_CALL* relocations. Calculate and use G for all GOT relocations on VxWorks. Add dynamic relocations for references to the VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Don't create dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables. (mips_elf_allocate_dynamic_relocations): Add a bfd_link_info argument. Use MIPS_ELF_RELA_SIZE to calculate the size of a VxWorks entry. Don't allocate a null entry on VxWorks. (mips_elf_create_dynamic_relocation): Update the call to mips_elf_rel_dyn_section. Use absolute rather than relative relocations for VxWorks, and make them RELA rather than REL. (_bfd_mips_elf_create_dynamic_sections): Don't make .dynamic read-only on VxWorks. Update the call to mips_elf_rel_dyn_section. Create the .plt, .rela.plt, .dynbss and .rela.bss sections on VxWorks. Likewise create the _PROCEDURE_LINKAGE_TABLE symbol. Call elf_vxworks_create_dynamic_sections for VxWorks and initialize the plt_header_size and plt_entry_size fields. (_bfd_mips_elf_check_relocs): Don't allow GOT relocations to be used in VxWorks executables. Don't allocate dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables. Set is_relocation_target for each symbol referenced by a relocation. Allocate .rela.dyn entries for relocations against the special VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Create GOT entries for all VxWorks R_MIPS_GOT16 relocations. Don't allocate a global GOT entry for symbols mentioned in VxWorks R_MIPS_CALL*, R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 relocations. Update the calls to mips_elf_rel_dyn_section and mips_elf_allocate_dynamic_relocations. Set is_branch_target for symbols mentioned in R_MIPS_PC16 or R_MIPS_26 relocations. Don't set no_fn_stub on VxWorks. (_bfd_mips_elf_adjust_dynamic_symbol): Update the call to mips_elf_allocate_dynamic_relocations. (_bfd_mips_vxworks_adjust_dynamic_symbol): New function. (_bfd_mips_elf_always_size_sections): Do not allocate GOT page entries for VxWorks, and do not create multiple GOTs. (_bfd_mips_elf_size_dynamic_sections): Use MIPS_ELF_REL_DYN_NAME. Handle .got specially for VxWorks. Update the uses of MIPS_RESERVED_GOTNO and mips_elf_allocate_dynamic_relocations. Check for sgotplt and splt. Allocate the .rel(a).dyn contents last, once its final size is known. Set DF_TEXTREL for VxWorks. Add DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL tags on VxWorks. Do not add the MIPS-specific tags for VxWorks. (_bfd_mips_vxworks_finish_dynamic_symbol): New function. (mips_vxworks_finish_exec_plt): Likewise. (mips_vxworks_finish_shared_plt): Likewise. (_bfd_mips_elf_finish_dynamic_sections): Remove an unncessary call to mips_elf_rel_dyn_section. Use a VxWorks-specific value of DT_PLTGOT. Handle DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL. Update the uses of MIPS_RESERVED_GOTNO and mips_elf_rel_dyn_section. Use a different GOT header for VxWorks. Don't sort .rela.dyn on VxWorks. Finish the PLT on VxWorks. (_bfd_mips_elf_link_hash_table_create): Initialize the new mips_elf_link_hash_table fields. (_bfd_mips_vxworks_link_hash_table_create): New function. (_bfd_mips_elf_final_link): Set the GP value to _GLOBAL_OFFSET_TABLE_ on VxWorks. Update the call to ELF_MIPS_GP_OFFSET. * elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Declare. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. (_bfd_mips_vxworks_link_hash_table_create): Likewise. * libbfd.h: Regenerate. * Makefile.am (elfxx-mips.lo): Depend on elf-vxworks.h. (elf32-mips.lo): Likewise. * Makefile.in: Regenerate. * reloc.c (BFD_RELOC_MIPS_COPY, BFD_RELOC_MIPS_JUMP_SLOT): Declare. * targets.c (bfd_elf32_bigmips_vxworks_vec): Declare. (bfd_elf32_littlemips_vxworks_vec): Likewise. (_bfd_target_vector): Add entries for them. gas/ * config/tc-mips.c (mips_target_format): Handle vxworks targets. (md_begin): Complain about -G being used for PIC. Don't change the text, data and bss alignments on VxWorks. (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when generating VxWorks PIC. (load_address): Extend SVR4_PIC handling to VXWORKS_PIC. (macro): Likewise, but do not treat la $25 specially for VxWorks PIC, and do not handle jal. (OPTION_MVXWORKS_PIC): New macro. (md_longopts): Add -mvxworks-pic. (md_parse_option): Don't complain about using PIC and -G together here. Handle OPTION_MVXWORKS_PIC. (md_estimate_size_before_relax): Always use the first relaxation sequence on VxWorks. * config/tc-mips.h (VXWORKS_PIC): New. gas/testsuite/ * gas/mips/vxworks1.s, gas/mips/vxworks1.d, * gas/mips/vxworks1-xgot.d: New tests. * gas/mips/mips.exp: Run them. Do not run other tests on VxWorks. include/elf/ * mips.h (R_MIPS_COPY, R_MIPS_JUMP_SLOT): New relocs. ld/ * configure.tgt (mips*el-*-vxworks*, mips*-*-vxworks*): Use separate VxWorks emulations. * emulparams/elf32ebmipvxworks.sh: New file. * emulparams/elf32elmipvxworks.sh: New file. * Makefile.am (ALL_EMULATIONS): Add eelf32ebmipvxworks.o and eelf32elmipvxworks.o. (eelf32ebmipvxworks.c, eelf32elmipvxworks.c): New rules. * Makefile.in: Regenerate. ld/testsuite/ * ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd, * ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd, * ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s, * ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd, * ld-mips/vxworks2-static.sd: New tests. * ld-mips/mips-elf.exp: Run them.
2006-03-22 09:28:15 +00:00
#ifdef BFD64
mips*el-*-vxworks*)
targ_defvec=bfd_elf32_littlemips_vxworks_vec
targ_selvecs="bfd_elf32_littlemips_vec bfd_elf32_bigmips_vxworks_vec bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
want64=true
Richard Sandiford <richard@codesourcery.com> Daniel Jacobowitz <dan@codesourcery.com> Phil Edwards <phil@codesourcery.com> Zack Weinberg <zack@codesourcery.com> Mark Mitchell <mark@codesourcery.com> Nathan Sidwell <nathan@codesourcery.com> bfd/ * bfd-in2.h: Regenerate. * config.bfd (mips*-*-vxworks*, mips*el-*-vxworks*): New stanzas. * configure.in (bfd_elf32_bigmips_vxworks_vec): New stanza. (bfd_elf32_littlemips_vxworks_vec): Likewise. (bfd_elf32_bigmips_vec): Add elf-vxworks.lo. (bfd_elf32_littlemips_vec): Likewise. (bfd_elf32_nbigmips_vec): Likewise. (bfd_elf32_nlittlemips_vec): Likewise. (bfd_elf32_ntradbigmips_vec): Likewise. (bfd_elf32_ntradlittlemips_vec): Likewise. (bfd_elf32_tradbigmips_vec): Likewise. (bfd_elf32_tradlittlemips_vec): Likewise. (bfd_elf64_bigmips_vec): Likewise. (bfd_elf64_littlemips_vec): Likewise. (bfd_elf64_tradbigmips_vec): Likewise. (bfd_elf64_tradlittlemips_vec): Likewise. * elf32-mips.c: Include elf-vxworks.h. (mips_info_to_howto_rel): Use elf_backend_mips_rtype_to_howto instead of calling mips_elf32_rtype_to_howto directly. (mips_vxworks_copy_howto_rela): New reloc howto. (mips_vxworks_jump_slot_howto_rela): Likewise. (mips_vxworks_bfd_reloc_type_lookup): New function. (mips_vxworks_rtype_to_howto): Likewise. (mips_vxworks_final_write_processing): Likewise. (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME): Override for VxWorks. (TARGET_BIG_SYM, TARGET_BIG_NAME, elf_bed, ELF_MAXPAGESIZE): Likewise. (elf_backend_want_got_plt): Likewise. (elf_backend_want_plt_sym): Likewise. (elf_backend_got_symbol_offset): Likewise. (elf_backend_want_dynbss): Likewise. (elf_backend_may_use_rel_p): Likewise. (elf_backend_may_use_rela_p): Likewise. (elf_backend_default_use_rela_p): Likewise. (elf_backend_got_header_size: Likewise. (elf_backend_plt_readonly): Likewise. (bfd_elf32_bfd_reloc_type_lookup): Likewise. (elf_backend_mips_rtype_to_howto): Likewise. (elf_backend_adjust_dynamic_symbol): Likewise. (elf_backend_finish_dynamic_symbol): Likewise. (bfd_elf32_bfd_link_hash_table_create): Likewise. (elf_backend_add_symbol_hook): Likewise. (elf_backend_link_output_symbol_hook): Likewise. (elf_backend_emit_relocs): Likewise. (elf_backend_final_write_processing: Likewise. (elf_backend_additional_program_headers): Likewise. (elf_backend_modify_segment_map): Likewise. (elf_backend_symbol_processing): Likewise. * elfxx-mips.c: Include elf-vxworks.h. (mips_elf_link_hash_entry): Add is_relocation_target and is_branch_target fields. (mips_elf_link_hash_table): Add is_vxworks, srelbss, sdynbss, srelplt, srelplt2, sgotplt, splt, plt_header_size and plt_entry_size fields. (MIPS_ELF_RELA_SIZE, MIPS_ELF_REL_DYN_NAME): New macros. (MIPS_RESERVED_GOTNO): Take a mips_elf_link_hash_table argument. Return 3 for VxWorks. (ELF_MIPS_GP_OFFSET): Change the argument from a bfd to a mips_elf_link_hash_table. Return 0 for VxWorks. (MIPS_ELF_GOT_MAX_SIZE): Change the argument from a bfd to a mips_elf_link_hash_table. Update the call to ELF_MIPS_GP_OFFSET. (mips_vxworks_exec_plt0_entry): New variable. (mips_vxworks_exec_plt_entry): Likewise. (mips_vxworks_shared_plt0_entry): Likewise. (mips_vxworks_shared_plt_entry): Likewise. (mips_elf_link_hash_newfunc): Initialize the new hash_entry fields. (mips_elf_rel_dyn_section): Change the bfd argument to a mips_elf_link_hash_table. Use MIPS_ELF_REL_DYN_NAME to get the name of the section. (mips_elf_initialize_tls_slots): Update the call to mips_elf_rel_dyn_section. (mips_elf_gotplt_index): New function. (mips_elf_local_got_index): Add an input_section argument. Update the call to mips_elf_create_local_got_entry. (mips_elf_got_page): Likewise. (mips_elf_got16_entry): Likewise. (mips_elf_create_local_got_entry): Add bfd_link_info and input_section arguments. Create dynamic relocations for each entry on VxWorks. (mips_elf_merge_gots): Update the use of MIPS_ELF_GOT_MAX_SIZE. (mips_elf_multi_got): Update the uses of MIPS_ELF_GOT_MAX_SIZE and MIPS_RESERVED_GOTNO. (mips_elf_create_got_section): Update the uses of MIPS_ELF_GOT_MAX_SIZE. Create .got.plt on VxWorks. (is_gott_symbol): New function. (mips_elf_calculate_relocation): Use a dynobj local variable. Update the calls to mips_elf_local_got_index, mips_elf_got16_entry and mips_elf_got_page_entry. Set G to the .got.plt entry when calculating VxWorks R_MIPS_CALL* relocations. Calculate and use G for all GOT relocations on VxWorks. Add dynamic relocations for references to the VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Don't create dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables. (mips_elf_allocate_dynamic_relocations): Add a bfd_link_info argument. Use MIPS_ELF_RELA_SIZE to calculate the size of a VxWorks entry. Don't allocate a null entry on VxWorks. (mips_elf_create_dynamic_relocation): Update the call to mips_elf_rel_dyn_section. Use absolute rather than relative relocations for VxWorks, and make them RELA rather than REL. (_bfd_mips_elf_create_dynamic_sections): Don't make .dynamic read-only on VxWorks. Update the call to mips_elf_rel_dyn_section. Create the .plt, .rela.plt, .dynbss and .rela.bss sections on VxWorks. Likewise create the _PROCEDURE_LINKAGE_TABLE symbol. Call elf_vxworks_create_dynamic_sections for VxWorks and initialize the plt_header_size and plt_entry_size fields. (_bfd_mips_elf_check_relocs): Don't allow GOT relocations to be used in VxWorks executables. Don't allocate dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables. Set is_relocation_target for each symbol referenced by a relocation. Allocate .rela.dyn entries for relocations against the special VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Create GOT entries for all VxWorks R_MIPS_GOT16 relocations. Don't allocate a global GOT entry for symbols mentioned in VxWorks R_MIPS_CALL*, R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 relocations. Update the calls to mips_elf_rel_dyn_section and mips_elf_allocate_dynamic_relocations. Set is_branch_target for symbols mentioned in R_MIPS_PC16 or R_MIPS_26 relocations. Don't set no_fn_stub on VxWorks. (_bfd_mips_elf_adjust_dynamic_symbol): Update the call to mips_elf_allocate_dynamic_relocations. (_bfd_mips_vxworks_adjust_dynamic_symbol): New function. (_bfd_mips_elf_always_size_sections): Do not allocate GOT page entries for VxWorks, and do not create multiple GOTs. (_bfd_mips_elf_size_dynamic_sections): Use MIPS_ELF_REL_DYN_NAME. Handle .got specially for VxWorks. Update the uses of MIPS_RESERVED_GOTNO and mips_elf_allocate_dynamic_relocations. Check for sgotplt and splt. Allocate the .rel(a).dyn contents last, once its final size is known. Set DF_TEXTREL for VxWorks. Add DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL tags on VxWorks. Do not add the MIPS-specific tags for VxWorks. (_bfd_mips_vxworks_finish_dynamic_symbol): New function. (mips_vxworks_finish_exec_plt): Likewise. (mips_vxworks_finish_shared_plt): Likewise. (_bfd_mips_elf_finish_dynamic_sections): Remove an unncessary call to mips_elf_rel_dyn_section. Use a VxWorks-specific value of DT_PLTGOT. Handle DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL. Update the uses of MIPS_RESERVED_GOTNO and mips_elf_rel_dyn_section. Use a different GOT header for VxWorks. Don't sort .rela.dyn on VxWorks. Finish the PLT on VxWorks. (_bfd_mips_elf_link_hash_table_create): Initialize the new mips_elf_link_hash_table fields. (_bfd_mips_vxworks_link_hash_table_create): New function. (_bfd_mips_elf_final_link): Set the GP value to _GLOBAL_OFFSET_TABLE_ on VxWorks. Update the call to ELF_MIPS_GP_OFFSET. * elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Declare. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. (_bfd_mips_vxworks_link_hash_table_create): Likewise. * libbfd.h: Regenerate. * Makefile.am (elfxx-mips.lo): Depend on elf-vxworks.h. (elf32-mips.lo): Likewise. * Makefile.in: Regenerate. * reloc.c (BFD_RELOC_MIPS_COPY, BFD_RELOC_MIPS_JUMP_SLOT): Declare. * targets.c (bfd_elf32_bigmips_vxworks_vec): Declare. (bfd_elf32_littlemips_vxworks_vec): Likewise. (_bfd_target_vector): Add entries for them. gas/ * config/tc-mips.c (mips_target_format): Handle vxworks targets. (md_begin): Complain about -G being used for PIC. Don't change the text, data and bss alignments on VxWorks. (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when generating VxWorks PIC. (load_address): Extend SVR4_PIC handling to VXWORKS_PIC. (macro): Likewise, but do not treat la $25 specially for VxWorks PIC, and do not handle jal. (OPTION_MVXWORKS_PIC): New macro. (md_longopts): Add -mvxworks-pic. (md_parse_option): Don't complain about using PIC and -G together here. Handle OPTION_MVXWORKS_PIC. (md_estimate_size_before_relax): Always use the first relaxation sequence on VxWorks. * config/tc-mips.h (VXWORKS_PIC): New. gas/testsuite/ * gas/mips/vxworks1.s, gas/mips/vxworks1.d, * gas/mips/vxworks1-xgot.d: New tests. * gas/mips/mips.exp: Run them. Do not run other tests on VxWorks. include/elf/ * mips.h (R_MIPS_COPY, R_MIPS_JUMP_SLOT): New relocs. ld/ * configure.tgt (mips*el-*-vxworks*, mips*-*-vxworks*): Use separate VxWorks emulations. * emulparams/elf32ebmipvxworks.sh: New file. * emulparams/elf32elmipvxworks.sh: New file. * Makefile.am (ALL_EMULATIONS): Add eelf32ebmipvxworks.o and eelf32elmipvxworks.o. (eelf32ebmipvxworks.c, eelf32elmipvxworks.c): New rules. * Makefile.in: Regenerate. ld/testsuite/ * ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd, * ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd, * ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s, * ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd, * ld-mips/vxworks2-static.sd: New tests. * ld-mips/mips-elf.exp: Run them.
2006-03-22 09:28:15 +00:00
;;
mips*-*-vxworks*)
targ_defvec=bfd_elf32_bigmips_vxworks_vec
targ_selvecs="bfd_elf32_bigmips_vec bfd_elf32_littlemips_vxworks_vec bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
want64=true
Richard Sandiford <richard@codesourcery.com> Daniel Jacobowitz <dan@codesourcery.com> Phil Edwards <phil@codesourcery.com> Zack Weinberg <zack@codesourcery.com> Mark Mitchell <mark@codesourcery.com> Nathan Sidwell <nathan@codesourcery.com> bfd/ * bfd-in2.h: Regenerate. * config.bfd (mips*-*-vxworks*, mips*el-*-vxworks*): New stanzas. * configure.in (bfd_elf32_bigmips_vxworks_vec): New stanza. (bfd_elf32_littlemips_vxworks_vec): Likewise. (bfd_elf32_bigmips_vec): Add elf-vxworks.lo. (bfd_elf32_littlemips_vec): Likewise. (bfd_elf32_nbigmips_vec): Likewise. (bfd_elf32_nlittlemips_vec): Likewise. (bfd_elf32_ntradbigmips_vec): Likewise. (bfd_elf32_ntradlittlemips_vec): Likewise. (bfd_elf32_tradbigmips_vec): Likewise. (bfd_elf32_tradlittlemips_vec): Likewise. (bfd_elf64_bigmips_vec): Likewise. (bfd_elf64_littlemips_vec): Likewise. (bfd_elf64_tradbigmips_vec): Likewise. (bfd_elf64_tradlittlemips_vec): Likewise. * elf32-mips.c: Include elf-vxworks.h. (mips_info_to_howto_rel): Use elf_backend_mips_rtype_to_howto instead of calling mips_elf32_rtype_to_howto directly. (mips_vxworks_copy_howto_rela): New reloc howto. (mips_vxworks_jump_slot_howto_rela): Likewise. (mips_vxworks_bfd_reloc_type_lookup): New function. (mips_vxworks_rtype_to_howto): Likewise. (mips_vxworks_final_write_processing): Likewise. (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME): Override for VxWorks. (TARGET_BIG_SYM, TARGET_BIG_NAME, elf_bed, ELF_MAXPAGESIZE): Likewise. (elf_backend_want_got_plt): Likewise. (elf_backend_want_plt_sym): Likewise. (elf_backend_got_symbol_offset): Likewise. (elf_backend_want_dynbss): Likewise. (elf_backend_may_use_rel_p): Likewise. (elf_backend_may_use_rela_p): Likewise. (elf_backend_default_use_rela_p): Likewise. (elf_backend_got_header_size: Likewise. (elf_backend_plt_readonly): Likewise. (bfd_elf32_bfd_reloc_type_lookup): Likewise. (elf_backend_mips_rtype_to_howto): Likewise. (elf_backend_adjust_dynamic_symbol): Likewise. (elf_backend_finish_dynamic_symbol): Likewise. (bfd_elf32_bfd_link_hash_table_create): Likewise. (elf_backend_add_symbol_hook): Likewise. (elf_backend_link_output_symbol_hook): Likewise. (elf_backend_emit_relocs): Likewise. (elf_backend_final_write_processing: Likewise. (elf_backend_additional_program_headers): Likewise. (elf_backend_modify_segment_map): Likewise. (elf_backend_symbol_processing): Likewise. * elfxx-mips.c: Include elf-vxworks.h. (mips_elf_link_hash_entry): Add is_relocation_target and is_branch_target fields. (mips_elf_link_hash_table): Add is_vxworks, srelbss, sdynbss, srelplt, srelplt2, sgotplt, splt, plt_header_size and plt_entry_size fields. (MIPS_ELF_RELA_SIZE, MIPS_ELF_REL_DYN_NAME): New macros. (MIPS_RESERVED_GOTNO): Take a mips_elf_link_hash_table argument. Return 3 for VxWorks. (ELF_MIPS_GP_OFFSET): Change the argument from a bfd to a mips_elf_link_hash_table. Return 0 for VxWorks. (MIPS_ELF_GOT_MAX_SIZE): Change the argument from a bfd to a mips_elf_link_hash_table. Update the call to ELF_MIPS_GP_OFFSET. (mips_vxworks_exec_plt0_entry): New variable. (mips_vxworks_exec_plt_entry): Likewise. (mips_vxworks_shared_plt0_entry): Likewise. (mips_vxworks_shared_plt_entry): Likewise. (mips_elf_link_hash_newfunc): Initialize the new hash_entry fields. (mips_elf_rel_dyn_section): Change the bfd argument to a mips_elf_link_hash_table. Use MIPS_ELF_REL_DYN_NAME to get the name of the section. (mips_elf_initialize_tls_slots): Update the call to mips_elf_rel_dyn_section. (mips_elf_gotplt_index): New function. (mips_elf_local_got_index): Add an input_section argument. Update the call to mips_elf_create_local_got_entry. (mips_elf_got_page): Likewise. (mips_elf_got16_entry): Likewise. (mips_elf_create_local_got_entry): Add bfd_link_info and input_section arguments. Create dynamic relocations for each entry on VxWorks. (mips_elf_merge_gots): Update the use of MIPS_ELF_GOT_MAX_SIZE. (mips_elf_multi_got): Update the uses of MIPS_ELF_GOT_MAX_SIZE and MIPS_RESERVED_GOTNO. (mips_elf_create_got_section): Update the uses of MIPS_ELF_GOT_MAX_SIZE. Create .got.plt on VxWorks. (is_gott_symbol): New function. (mips_elf_calculate_relocation): Use a dynobj local variable. Update the calls to mips_elf_local_got_index, mips_elf_got16_entry and mips_elf_got_page_entry. Set G to the .got.plt entry when calculating VxWorks R_MIPS_CALL* relocations. Calculate and use G for all GOT relocations on VxWorks. Add dynamic relocations for references to the VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Don't create dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables. (mips_elf_allocate_dynamic_relocations): Add a bfd_link_info argument. Use MIPS_ELF_RELA_SIZE to calculate the size of a VxWorks entry. Don't allocate a null entry on VxWorks. (mips_elf_create_dynamic_relocation): Update the call to mips_elf_rel_dyn_section. Use absolute rather than relative relocations for VxWorks, and make them RELA rather than REL. (_bfd_mips_elf_create_dynamic_sections): Don't make .dynamic read-only on VxWorks. Update the call to mips_elf_rel_dyn_section. Create the .plt, .rela.plt, .dynbss and .rela.bss sections on VxWorks. Likewise create the _PROCEDURE_LINKAGE_TABLE symbol. Call elf_vxworks_create_dynamic_sections for VxWorks and initialize the plt_header_size and plt_entry_size fields. (_bfd_mips_elf_check_relocs): Don't allow GOT relocations to be used in VxWorks executables. Don't allocate dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables. Set is_relocation_target for each symbol referenced by a relocation. Allocate .rela.dyn entries for relocations against the special VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Create GOT entries for all VxWorks R_MIPS_GOT16 relocations. Don't allocate a global GOT entry for symbols mentioned in VxWorks R_MIPS_CALL*, R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 relocations. Update the calls to mips_elf_rel_dyn_section and mips_elf_allocate_dynamic_relocations. Set is_branch_target for symbols mentioned in R_MIPS_PC16 or R_MIPS_26 relocations. Don't set no_fn_stub on VxWorks. (_bfd_mips_elf_adjust_dynamic_symbol): Update the call to mips_elf_allocate_dynamic_relocations. (_bfd_mips_vxworks_adjust_dynamic_symbol): New function. (_bfd_mips_elf_always_size_sections): Do not allocate GOT page entries for VxWorks, and do not create multiple GOTs. (_bfd_mips_elf_size_dynamic_sections): Use MIPS_ELF_REL_DYN_NAME. Handle .got specially for VxWorks. Update the uses of MIPS_RESERVED_GOTNO and mips_elf_allocate_dynamic_relocations. Check for sgotplt and splt. Allocate the .rel(a).dyn contents last, once its final size is known. Set DF_TEXTREL for VxWorks. Add DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL tags on VxWorks. Do not add the MIPS-specific tags for VxWorks. (_bfd_mips_vxworks_finish_dynamic_symbol): New function. (mips_vxworks_finish_exec_plt): Likewise. (mips_vxworks_finish_shared_plt): Likewise. (_bfd_mips_elf_finish_dynamic_sections): Remove an unncessary call to mips_elf_rel_dyn_section. Use a VxWorks-specific value of DT_PLTGOT. Handle DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL. Update the uses of MIPS_RESERVED_GOTNO and mips_elf_rel_dyn_section. Use a different GOT header for VxWorks. Don't sort .rela.dyn on VxWorks. Finish the PLT on VxWorks. (_bfd_mips_elf_link_hash_table_create): Initialize the new mips_elf_link_hash_table fields. (_bfd_mips_vxworks_link_hash_table_create): New function. (_bfd_mips_elf_final_link): Set the GP value to _GLOBAL_OFFSET_TABLE_ on VxWorks. Update the call to ELF_MIPS_GP_OFFSET. * elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Declare. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. (_bfd_mips_vxworks_link_hash_table_create): Likewise. * libbfd.h: Regenerate. * Makefile.am (elfxx-mips.lo): Depend on elf-vxworks.h. (elf32-mips.lo): Likewise. * Makefile.in: Regenerate. * reloc.c (BFD_RELOC_MIPS_COPY, BFD_RELOC_MIPS_JUMP_SLOT): Declare. * targets.c (bfd_elf32_bigmips_vxworks_vec): Declare. (bfd_elf32_littlemips_vxworks_vec): Likewise. (_bfd_target_vector): Add entries for them. gas/ * config/tc-mips.c (mips_target_format): Handle vxworks targets. (md_begin): Complain about -G being used for PIC. Don't change the text, data and bss alignments on VxWorks. (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when generating VxWorks PIC. (load_address): Extend SVR4_PIC handling to VXWORKS_PIC. (macro): Likewise, but do not treat la $25 specially for VxWorks PIC, and do not handle jal. (OPTION_MVXWORKS_PIC): New macro. (md_longopts): Add -mvxworks-pic. (md_parse_option): Don't complain about using PIC and -G together here. Handle OPTION_MVXWORKS_PIC. (md_estimate_size_before_relax): Always use the first relaxation sequence on VxWorks. * config/tc-mips.h (VXWORKS_PIC): New. gas/testsuite/ * gas/mips/vxworks1.s, gas/mips/vxworks1.d, * gas/mips/vxworks1-xgot.d: New tests. * gas/mips/mips.exp: Run them. Do not run other tests on VxWorks. include/elf/ * mips.h (R_MIPS_COPY, R_MIPS_JUMP_SLOT): New relocs. ld/ * configure.tgt (mips*el-*-vxworks*, mips*-*-vxworks*): Use separate VxWorks emulations. * emulparams/elf32ebmipvxworks.sh: New file. * emulparams/elf32elmipvxworks.sh: New file. * Makefile.am (ALL_EMULATIONS): Add eelf32ebmipvxworks.o and eelf32elmipvxworks.o. (eelf32ebmipvxworks.c, eelf32elmipvxworks.c): New rules. * Makefile.in: Regenerate. ld/testsuite/ * ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd, * ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd, * ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s, * ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd, * ld-mips/vxworks2-static.sd: New tests. * ld-mips/mips-elf.exp: Run them.
2006-03-22 09:28:15 +00:00
;;
#endif
mips*el-sde-elf*)
targ_defvec=bfd_elf32_tradlittlemips_vec
targ_selvecs="bfd_elf32_tradbigmips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
want64=true
;;
mips*-sde-elf* | mips*-mti-elf*)
targ_defvec=bfd_elf32_tradbigmips_vec
targ_selvecs="bfd_elf32_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
want64=true
;;
mips*el-*-elf* | mips*el-*-vxworks* | mips*-*-chorus*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_littlemips_vec
targ_selvecs="bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
;;
mips*-*-elf* | mips*-*-rtems* | mips*-*-vxworks | mips*-*-windiss)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_bigmips_vec
targ_selvecs="bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
;;
mips*-*-none)
targ_defvec=bfd_elf32_bigmips_vec
targ_selvecs="bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
;;
2004-10-23 12:23:15 +00:00
#ifdef BFD64
mips64*-*-openbsd*)
targ_defvec=bfd_elf64_tradbigmips_vec
targ_selvecs="bfd_elf32_ntradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
want64=true
2004-10-23 12:23:15 +00:00
;;
#endif
mips*el-*-openbsd*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_littlemips_vec
targ_selvecs="bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec ecoff_little_vec ecoff_big_vec"
;;
mips*-*-openbsd*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_bigmips_vec
targ_selvecs="bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec ecoff_big_vec ecoff_little_vec"
;;
#ifdef BFD64
mips64*el-*-linux*)
targ_defvec=bfd_elf32_ntradlittlemips_vec
targ_selvecs="bfd_elf32_ntradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf64_tradlittlemips_vec bfd_elf64_tradbigmips_vec"
want64=true
;;
mips64*-*-linux*)
targ_defvec=bfd_elf32_ntradbigmips_vec
targ_selvecs="bfd_elf32_ntradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
want64=true
;;
mips*el-*-linux*)
targ_defvec=bfd_elf32_tradlittlemips_vec
targ_selvecs="bfd_elf32_tradbigmips_vec ecoff_little_vec ecoff_big_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec"
2002-08-14 15:18:54 +00:00
want64=true
;;
mips*-*-linux*)
targ_defvec=bfd_elf32_tradbigmips_vec
targ_selvecs="bfd_elf32_tradlittlemips_vec ecoff_big_vec ecoff_little_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec"
2002-08-14 15:18:54 +00:00
want64=true
;;
bfd/ 2010-12-23 Robert Millan <rmh@gnu.org> * config.bfd: Recognize mips-freebsd and mips-kfreebsd-gnu. * configure.host: Likewise. * configure.in: Support for `bfd_elf32_ntradbigmips_freebsd_vec', `bfd_elf32_ntradlittlemips_freebsd_vec', `bfd_elf32_tradbigmips_freebsd_vec', `bfd_elf32_tradlittlemips_freebsd_vec', `bfd_elf64_tradbigmips_freebsd_vec' and `bfd_elf64_tradlittlemips_freebsd_vec'. * configure: Regenerate. * elf32-mips.c: New target for FreeBSD support (same as traditional MIPS but overrides ELF_OSABI with ELFOSABI_FREEBSD). * elf64-mips.c: Likewise. * elfn32-mips.c: Likewise. * targets.c (_bfd_target_vector): Add `bfd_elf32_ntradbigmips_freebsd_vec', `bfd_elf32_ntradlittlemips_freebsd_vec', `bfd_elf32_tradbigmips_freebsd_vec', `bfd_elf32_tradlittlemips_freebsd_vec', `bfd_elf64_tradbigmips_freebsd_vec' and `bfd_elf64_tradlittlemips_freebsd_vec'. ld/ 2010-12-14 Robert Millan <rmh@gnu.org> * configure.tgt: Recognize mips-freebsd and mips-kfreebsd-gnu. * emulparams/elf32btsmip_fbsd.sh: New file. * emulparams/elf32btsmipn32_fbsd.sh: Likewise. * emulparams/elf32ltsmip_fbsd.sh: Likewise. * emulparams/elf32ltsmipn32_fbsd.sh: Likewise. * emulparams/elf64btsmip_fbsd.sh: Likewise. * emulparams/elf64ltsmip_fbsd.sh: Likewise. * Makefile.am: Add build rules for `eelf32btsmip_fbsd.c', `eelf32btsmipn32_fbsd.c', `eelf32ltsmip_fbsd.c', `eelf32ltsmipn32_fbsd.c', `eelf64btsmip_fbsd.c' and `eelf64ltsmip_fbsd.c'. * Makefile.in: Regenerate. gas/ 2010-12-19 Robert Millan <rmh@gnu.org> Richard Sandiford <rdsandiford@googlemail.com> * config/tc-mips.c (ELF_TARGET): New macro. Generates target names accordingly to whether TE_FreeBSD and whether TE_TMIPS are defined. (mips_target_format): Refactor code using ELF_TARGET(). (support_64bit_objects): Likewise. * configure.in: Recognize mips-freebsd and mips-kfreebsd-gnu. * configure.tgt: Likewise. * configure: Regenerate. binutils/testsuite/ * binutils-all/readelf.exp: Handle MIPS FreeBSD targets. gas/testsuite/ * gas/mips/e32el-rel2.d: Accept any file format. * gas/mips/elf-rel.d: Likewise. * gas/mips/elf-rel2.d: Likewise. * gas/mips/elf-rel3.d: Likewise. * gas/mips/elfel-rel.d: Likewise. * gas/mips/elfel-rel2.d: Likewise. * gas/mips/elfel-rel3.d: Likewise. * gas/mips/ldstla-32-mips3-shared.d: Likewise. * gas/mips/ldstla-32-mips3.d: Likewise. * gas/mips/ldstla-32-shared.d: Likewise. * gas/mips/ldstla-32.d: Likewise. * gas/mips/ldstla-n64-shared.d: Likewise. * gas/mips/ldstla-n64.d: Likewise. * gas/mips/noat-1.d: Likewise. * gas/mips/set-arch.d: Likewise. * gas/mips/tls-o32.d: Likewise. ld/testsuite/ * ld-mips-elf/mips-elf-flags.exp: Handle FreeBSD targets. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mips-elf/mips16-call-global.d: Accept any file format. * ld-mips-elf/mips16-intermix.d: Likewise.
2010-12-31 11:01:00 +00:00
mips64*el-*-freebsd* | mips64*el-*-kfreebsd*-gnu)
# FreeBSD vectors
targ_defvec=bfd_elf32_ntradlittlemips_freebsd_vec
targ_selvecs="bfd_elf32_ntradbigmips_freebsd_vec bfd_elf32_tradlittlemips_freebsd_vec bfd_elf32_tradbigmips_freebsd_vec bfd_elf64_tradlittlemips_freebsd_vec bfd_elf64_tradbigmips_freebsd_vec"
# Generic vectors
targ_selvecs="${targ_selvecs} bfd_elf32_ntradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf64_tradlittlemips_vec bfd_elf64_tradbigmips_vec"
want64=true
;;
mips64*-*-freebsd* | mips64*-*-kfreebsd*-gnu)
# FreeBSD vectors
targ_defvec=bfd_elf32_ntradbigmips_freebsd_vec
targ_selvecs="bfd_elf32_ntradlittlemips_freebsd_vec bfd_elf32_tradbigmips_freebsd_vec bfd_elf32_tradlittlemips_freebsd_vec bfd_elf64_tradbigmips_freebsd_vec bfd_elf64_tradlittlemips_freebsd_vec"
# Generic vectors
targ_selvecs="${targ_selvecs} bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
want64=true
;;
#endif
mips*el-*-freebsd* | mips*el-*-kfreebsd*-gnu)
# FreeBSD vectors
targ_defvec=bfd_elf32_tradlittlemips_freebsd_vec
targ_selvecs="bfd_elf32_tradbigmips_freebsd_vec bfd_elf32_ntradlittlemips_freebsd_vec bfd_elf64_tradlittlemips_freebsd_vec bfd_elf32_ntradbigmips_freebsd_vec bfd_elf64_tradbigmips_freebsd_vec"
# Generic vectors
targ_selvecs="${targ_selvecs} bfd_elf32_tradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec"
want64=true
;;
mips*-*-freebsd* | mips*-*-kfreebsd*-gnu)
# FreeBSD vectors
targ_defvec=bfd_elf32_tradbigmips_freebsd_vec
targ_selvecs="bfd_elf32_tradlittlemips_freebsd_vec bfd_elf32_ntradbigmips_freebsd_vec bfd_elf64_tradbigmips_freebsd_vec bfd_elf32_ntradlittlemips_freebsd_vec bfd_elf64_tradlittlemips_freebsd_vec"
# Generic vectors
targ_selvecs="${targ_selvecs} bfd_elf32_tradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec"
want64=true
;;
2001-10-30 15:20:14 +00:00
#ifdef BFD64
mmix-*-*)
targ_defvec=bfd_elf64_mmix_vec
targ_selvecs=bfd_mmo_vec
want64=true
2001-10-30 15:20:14 +00:00
;;
#endif
1999-05-03 07:29:11 +00:00
mn10200-*-*)
targ_defvec=bfd_elf32_mn10200_vec
;;
mn10300-*-*)
targ_defvec=bfd_elf32_mn10300_vec
targ_underscore=yes
1999-05-03 07:29:11 +00:00
;;
Rename ms1 to mt, part 1 * config.sub: Replace ms1 arch with mt. Allow ms1 as alias. * configure.in: Replace ms1 arch with mt. * configure: Rebuilt. * bfd/Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES, BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Replace ms1 with mt. (cpu_mt.lo, elf32-mt.lo): Update target and dependency names. * bfd/Makefile.in: Rebuilt. * bfd/config.bfd: Replace ms1 arch with mt. * bfd/configure.in: Replace ms1 files with mt files. * bfd/configure: Rebuilt. * bfd/elf32-mt.c: Renamed from elf32-ms1.c. Update include files. * bfd/cpu-mt.c: Renamed from cpu-ms1.c. * cpu/mt.cpu: Rename from ms1.cpu. * cpu/mt.opc: Rename from ms1.opc. * binutils/Makefile.am: Replace ms1 files with mt files. * binutils/Makefile.in: Rebuilt. * binutils/readelf.c (elf/mt.h): Adjust #include. * gas/configure.in: Replace ms1 arch with mt arch. * gas/configure: Rebuilt. * gas/configure.tgt: Replace ms1 arch with mt arch. * gas/config/tc-mt.c: Renamed from tc-ms1.c: Update include files. * gas/doc/Makefile.am (CPU_DOCS): Replace ms1 files with mt files. * gas/doc/Makefile.in: Rebuilt. * gas/testsuite/gas/mt: Renamed from ms1 dir. Update file names as needed. * gas/testsuite/gas/mt/errors.exp: Replace ms1 arch with mt arch. * gas/testsuite/gas/mt/mt.exp: Replace ms1 arch with mt arch. * gas/testsuite/gas/mt/relocs.exp: Replace ms1 arch with mt arch. * gdb/configure.tgt: Replace ms1 arch with mt arch. * gdb/config/mt: Renamed from ms1 dir. Update file names as needed. * gdb/config/mt/mt.mt (TDEPFILES): Replace ms1 file with mt file. * include/elf/mt.h: Renamed from ms1.h * ld/Makefile.am (ALL_EMULATIONS): Replace ms1 files with mt files. (eelf32mt.c): Update target name and dependencies. * ld/Makefile.in: Rebuilt. * ld/configure.tgt: Replace ms1 arch with mt arch. * ld/emulparams/elf32mt.sh: Renamed from elf32ms1.sh. Update comment. * libgloss/configure.in: Replace ms1 arch with mt arch. * libgloss/configure: Rebuilt. * libgloss/mt: Renamed from ms1 dir. * newlib/configure.host: Replace ms1 arch with mt arch. * newlib/libc/machine/mt: Renamed from ms1 dir. * opcodes/Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1 with mt. * opcodes/Makefile.in: Rebuilt. * opcodes/configure.in: Replace ms1 files with mt files. * opcodes/configure: Rebuilt. * sid/component/cgen-cpu/mt: Renamed from ms1 dir. Update file names as appropriate. * sid/component/cgen-cpu/mt/Makefile.am: Replace ms1 files with mt files. * sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
2005-12-12 11:25:08 +00:00
mt-*-elf)
Second part of ms1 to mt renaming. * bfd/archures.c (bfd_arch_mt): Renamed. (bfd_mt_arch): Renamed. (bfd_archures_list): Adjusted. * bfd/bfd-in2.h: Rebuilt. * bfd/config.bfd (mt): Remove special case targ_archs. (mt-*-elf): Rename bfd_elf32_mt_vec. * bfd/configure: Rebuilt. * bfd/configure.in (bfd_elf32_mt_vec): Renamed. (selarchs) Remove mt special case. * bfd/cpu-mt.c (arch_info_struct): Adjust. (bfd_mt_arch): Renamed, adjust. * bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela, mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section, mt_elf_howto_table): Renamed, adjusted. (mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs, elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags, mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data, mt_elf_print_private_bfd_data): Renamed, adjusted. (TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE, ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section, bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook, elf_backend_gc_sweep_hook, elf_backend_check_relocs, eld_backend_object_p, bfd_elf32_bfd_set_private_flags, bfd_elf32_bfd_copy_private_bfd_data, bfd_elf32_bfd_merge_private_bfd_data, bfd_elf32_bfd_print_private_bfd_data): Adjusted. * bfd/libbfd.h: Regenerated. * bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16, BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT, BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed. * bfd/targets.c (bfd_elf32_mt_vec): Renamed. (_bfd_target_vector): Adjusted. * binutils/readelf.c (guess_is_rela): Use EM_MT. (dump_relocations, get_machine_name): Adjust. * cpu/mt.cpu (define-arch, define-isa): Set name to mt. (define-mach): Adjust. * cpu/mt.opc (CGEN_ASM_HASH): Update. (mt_asm_hash, mt_cgen_insn_supported): Renamed. (parse_loopsize, parse_imm16): Adjust. * gas/configure: Rebuilt. * gas/configure.in (mt): Remove special case. * gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change #includes. (mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures): Rename, adjust. (md_parse_option, md_show_usage, md_begin, md_assemble, md_cgen_lookup_reloc, md_atof): Adjust. (mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust. * gas/config/tc-mt.h (TC_MT): Rename. (LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust. (md_apply_fix): Adjust. (mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename. (TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust. * gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust. (mt_register_name, mt_register_type, mt_register_reggroup_p, mt_return_value, mt_skip_prologue, mt_breapoint_from_pc, mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align, mt_registers_info, mt_push_dummy_call, mt_unwind_cache, mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id, mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address, mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init, _initialize_mt_tdep): Rename & adjust. * include/dis-asm.h (print_insn_mt): Renamed. * include/elf/common.h (EM_MT): Renamed. * include/elf/mt.h: Rename relocs, cpu & other defines. * ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust. * opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust. (stamp-mt): Adjust rule. (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename & adjust. * opcodes/Makefile.in: Rebuilt. * opcodes/configure: Rebuilt. * opcodes/configure.in (bfd_mt_arch): Rename & adjust. * opcodes/disassemble.c (ARCH_mt): Renamed. (disassembler): Adjust. * opcodes/mt-asm.c: Renamed, rebuilt. * opcodes/mt-desc.c: Renamed, rebuilt. * opcodes/mt-desc.h: Renamed, rebuilt. * opcodes/mt-dis.c: Renamed, rebuilt. * opcodes/mt-ibld.c: Renamed, rebuilt. * opcodes/mt-opc.c: Renamed, rebuilt. * opcodes/mt-opc.h: Renamed, rebuilt. * sid/Makefile.in: Rebuilt. * sid/aclocal.m4: Rebuilt. * sid/configure: Rebuilt. * sid/sid.spec: Adjust. * sid/bsp/Makefile.am: Adjust. * sid/bsp/Makefile.in: Rebuilt. * sid/bsp/aclocal.m4: Rebuilt. * sid/bsp/configrun-sid.in: Adjust. * sid/bsp/pregen/Makefile.in: Rebuilt. * sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt. * sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt. * sid/bsp/pregen/pregen-configs.in: Adjust. * sid/component/aclocal.m4: Rebuilt. * sid/component/configure: Rebuilt. * sid/component/tconfig.in: Adjust. * sid/component/bochs/aclocal.m4: Rebuilt. * sid/component/cache/Makefile.in: Rebuilt. * sid/component/cgen-cpu/Makefile.in: Rebuilt. * sid/component/cgen-cpu/aclocal.m4: Rebuilt. * sid/component/cgen-cpu/compCGEN.cxx: Adjust. * sid/component/cgen-cpu/configure: Rebuilt. * sid/component/cgen-cpu/configure.in: Rebult. * sid/component/cgen-cpu/mt/Makefile.am: Adjust. * sid/component/cgen-cpu/mt/Makefile.in: Rebuilt. * sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust. * sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt.cxx: Adjust. * sid/component/cgen-cpu/mt/mt.h: Adjust. * sid/component/consoles/Makefile.in: Rebuilt. * sid/component/families/aclocal.m4: Rebuilt. * sid/component/families/configure: Rebuilt. * sid/component/gdb/Makefile.in: Rebuilt. * sid/component/gloss/Makefile.in: Rebuilt. * sid/component/glue/Makefile.in: Rebuilt. * sid/component/ide/Makefile.in: Rebuilt. * sid/component/interrupt/Makefile.in: Rebuilt. * sid/component/lcd/Makefile.in: Rebuilt. * sid/component/lcd/testsuite/Makefile.in: Rebuilt. * sid/component/loader/Makefile.am: Rebuilt. * sid/component/loader/Makefile.in: Rebuilt. * sid/component/mapper/Makefile.in: Rebuilt. * sid/component/mapper/testsuite/Makefile.in: Rebuilt. * sid/component/memory/Makefile.in: Rebuilt. * sid/component/mmu/Makefile.in: Rebuilt. * sid/component/parport/Makefile.in: Rebuilt. * sid/component/profiling/Makefile.in: Rebuilt. * sid/component/rtc/Makefile.in: Rebuilt. * sid/component/sched/Makefile.in: Rebuilt. * sid/component/testsuite/Makefile.in: Rebuilt. * sid/component/timers/aclocal.m4: Rebuilt. * sid/component/timers/configure: Rebuilt. * sid/component/uart/Makefile.in: Rebuilt. * sid/component/uart/testsuite/Makefile.in: Rebuilt. * sid/config/config.sub: Adjust. * sid/config/info.tcl.in: Adjust. * sid/config/sidtargets.m4: Adjust. * sid/doc/Makefile.in: Rebuilt. * sid/main/dynamic/Makefile.am: Rebuilt. * sid/main/dynamic/Makefile.in: Rebuilt. * sid/main/dynamic/aclocal.m4: Rebuilt. * sid/main/dynamic/configure: Rebuilt.
2005-12-16 10:23:12 +00:00
targ_defvec=bfd_elf32_mt_vec
;;
2002-12-30 19:25:13 +00:00
msp430-*-*)
targ_defvec=bfd_elf32_msp430_vec
;;
1999-05-03 07:29:11 +00:00
ns32k-pc532-mach* | ns32k-pc532-ux*)
targ_defvec=pc532machaout_vec
targ_underscore=yes
;;
ns32k-*-netbsd* | ns32k-*-lites* | ns32k-*-openbsd*)
targ_defvec=pc532netbsd_vec
targ_underscore=yes
;;
2001-04-24 15:08:16 +00:00
openrisc-*-elf)
targ_defvec=bfd_elf32_openrisc_vec
;;
or32-*-coff)
targ_defvec=or32coff_big_vec
targ_underscore=yes
;;
or32-*-elf)
targ_defvec=bfd_elf32_or32_big_vec
;;
2001-02-18 23:33:11 +00:00
pdp11-*-*)
targ_defvec=pdp11_aout_vec
targ_underscore=yes
;;
pj-*-*)
targ_defvec=bfd_elf32_pj_vec
targ_selvecs="bfd_elf32_pj_vec bfd_elf32_pjl_vec"
;;
pjl-*-*)
targ_defvec=bfd_elf32_pjl_vec
targ_selvecs="bfd_elf32_pjl_vec bfd_elf32_pj_vec bfd_elf32_i386_vec"
;;
powerpc-*-aix5.[01] | rs6000-*-aix5.[01])
2003-12-03 15:07:17 +00:00
targ_defvec=rs6000coff_vec
targ_selvecs="aix5coff64_vec"
want64=true
;;
#ifdef BFD64
powerpc64-*-aix5.[01] | rs6000-*-aix5.[01])
2003-12-03 15:07:17 +00:00
targ_defvec=aix5coff64_vec
targ_selvecs="rs6000coff_vec"
want64=true
;;
#endif
powerpc-*-aix[5-9]* | rs6000-*-aix[5-9]*)
2003-12-03 15:07:17 +00:00
targ_cflags=-DAIX_WEAK_SUPPORT
targ_defvec=rs6000coff_vec
targ_selvecs="aix5coff64_vec"
want64=true
;;
#ifdef BFD64
powerpc64-*-aix[5-9]* | rs6000-*-aix[5-9]*)
2003-12-03 15:07:17 +00:00
targ_cflags=-DAIX_WEAK_SUPPORT
targ_defvec=aix5coff64_vec
targ_selvecs="rs6000coff_vec"
want64=true
;;
#endif
powerpc-*-aix* | powerpc-*-beos* | rs6000-*-*)
1999-05-03 07:29:11 +00:00
targ_defvec=rs6000coff_vec
targ64_selvecs=rs6000coff64_vec
case "${targ}" in
*-*-aix4.[3456789]* | *-*-aix[56789]*)
want64=true;;
2002-02-01 05:47:14 +00:00
*)
targ_cflags=-DSMALL_ARCHIVE;;
esac
1999-05-03 07:29:11 +00:00
;;
#ifdef BFD64
2001-05-24 20:50:50 +00:00
powerpc64-*-aix*)
targ_defvec=rs6000coff64_vec
targ_selvecs=rs6000coff_vec
want64=true
2001-05-24 20:50:50 +00:00
;;
powerpc64-*-freebsd*)
targ_defvec=bfd_elf64_powerpc_freebsd_vec
targ_selvecs="bfd_elf64_powerpc_vec bfd_elf32_powerpc_vec bfd_elf32_powerpc_freebsd_vec bfd_elf32_powerpcle_vec rs6000coff_vec rs6000coff64_vec aix5coff64_vec"
want64=true
;;
2002-08-22 17:45:36 +00:00
powerpc64-*-elf* | powerpc-*-elf64* | powerpc64-*-linux* | \
powerpc64-*-*bsd*)
targ_defvec=bfd_elf64_powerpc_vec
targ_selvecs="bfd_elf64_powerpcle_vec bfd_elf32_powerpc_vec bfd_elf32_powerpcle_vec rs6000coff_vec rs6000coff64_vec aix5coff64_vec"
want64=true
;;
powerpc64le-*-elf* | powerpcle-*-elf64*)
targ_defvec=bfd_elf64_powerpcle_vec
targ_selvecs="bfd_elf64_powerpc_vec bfd_elf32_powerpcle_vec bfd_elf32_powerpc_vec rs6000coff_vec rs6000coff64_vec aix5coff64_vec"
want64=true
;;
#endif
powerpc-*-*freebsd*)
targ_defvec=bfd_elf32_powerpc_freebsd_vec
targ_selvecs="rs6000coff_vec bfd_elf32_powerpc_vec bfd_elf32_powerpcle_vec ppcboot_vec"
targ64_selvecs="bfd_elf64_powerpc_vec bfd_elf64_powerpcle_vec bfd_elf64_powerpc_freebsd_vec"
;;
1999-05-03 07:29:11 +00:00
powerpc-*-*bsd* | powerpc-*-elf* | powerpc-*-sysv4* | powerpc-*-eabi* | \
powerpc-*-solaris2* | powerpc-*-linux-* | powerpc-*-rtems* | \
2005-05-07 Paul Brook <paul@codesourcery.com> bfd/ * config.bfd: Add separate case for ppc-vxworks. * configure: Regenerate. * configure.in: Include elf-vxworks.lo on ppc targets. * elf-vxworks.c (elf_vxworks_final_write_processing): Handle .rela.plt.unloaded. * elf32-ppc.c: Add VxWorks target vec. Include elf-vxworks.h. (PLT_ENTRY_SIZE, PLT_INITIAL_ENTRY_SIZE, PLT_SLOT_SIZE): Remove. (VXWORKS_PLT_ENTRY_SIZE, ppc_elf_vxworks_plt_entry, ppc_elf_vxworks_pic_plt_entry, VXWORKS_PLT_INITIAL_ENTRY_SIZE, ppc_elf_vxworks_plt0_entry, ppc_elf_vxworks_pic_plt0_entry, VXWORKS_PLT_NON_JMP_SLOT_RELOCS, VXWORKS_PLTRESOLVE_RELOCS, VXWORKS_PLTRESOLVE_RELOCS_SHLIB): New. (ppc_elf_link_hash_table): Add srelplt2, sgotplt, hgot, hplt, is_vxworks, plt_entry_size, plt_slot_size, plt_initial_entry_size. (ppc_elf_link_hash_table_create): Initialize hadtab plt fields. (ppc_elf_create_got): Create .got.plt for VxWorks. (ppc_elf_create_dynamic_sections): Create unloaded plt relocation section for VxWorks. (ppc_elf_select_plt_layout): Handle VxWorks plt format. (allocate_got): VxWorks does not need a got header. (allocate_dynrelocs): Handle VxWorks plt format. (ppc_elf_size_dynamic_sections): Save _G_O_T_ and _P_L_T_ symbols for VxWorks. Handle VxWorks plt/got. (ppc_elf_finish_dynamic_sections): Fill in VxWorks plt. (ppc_elf_vxworks_special_sections): New. (ppc_elf_vxworks_link_hash_table_create, ppc_elf_vxworks_add_symbol_hook, elf_i386_vxworks_link_output_symbol_hook, ppc_elf_vxworks_final_write_processing): New functions. * targets.c (bfd_elf32_powerpc_vxworks_vec): Declare. (_bfd_target_vector): Use it. gas/ * config/tc-ppc.c (ppc_target_format): Add VxWorks. gas/testsuite/ * gas/ppc/altivec.d: Match all powerpc target vecs. * gas/ppc/booke.d: Ditto. * gas/ppc/e500.d: Ditto. ld/ * Makefile.am (ALL_EMULATIONS): Add eelf32ppcvxworks.o. (eelf32ppcvxworks.o): Add dependencies. * Makefile.in: Regenerate. * configure.tgt: Add entry for powerpc-vxworks. * emulparams/elf32-ppc.c: Mention elf32ppcvxworks.sh in comment. * emulparams/elf32ppcvxworks.sh: New file. * emultempl/ppc32elf.em (bfd_elf32_powerpc_vxworks_vec): Declare. (is_ppc_elf32_vec): New function. (ppc_after_open, ppc_before_allocation, gld${EMULATION_NAME}_after_allocation): Use it.
2005-07-05 13:25:56 +00:00
powerpc-*-chorus*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_powerpc_vec
targ_selvecs="rs6000coff_vec bfd_elf32_powerpcle_vec ppcboot_vec"
targ64_selvecs="bfd_elf64_powerpc_vec bfd_elf64_powerpcle_vec"
1999-05-03 07:29:11 +00:00
;;
powerpc-*-kaos*)
targ_defvec=bfd_elf32_powerpc_vec
targ_selvecs="bfd_elf32_powerpcle_vec ppcboot_vec"
targ64_selvecs="bfd_elf64_powerpc_vec bfd_elf64_powerpcle_vec"
;;
powerpc-*-darwin* | powerpc-*-macos10* | powerpc-*-rhapsody*)
targ_defvec=mach_o_be_vec
targ_selvecs="mach_o_be_vec mach_o_le_vec mach_o_fat_vec pef_vec pef_xlib_vec sym_vec"
targ_archs="$targ_archs bfd_i386_arch"
;;
powerpc-*-macos*)
1999-05-03 07:29:11 +00:00
targ_defvec=pmac_xcoff_vec
;;
2004-05-17 19:50:16 +00:00
powerpc-*-lynxos*)
targ_defvec=bfd_elf32_powerpc_vec
targ_selvecs="rs6000coff_vec"
targ_cflags=-DSMALL_ARCHIVE
;;
1999-05-03 07:29:11 +00:00
powerpc-*-netware*)
targ_defvec=bfd_elf32_powerpc_vec
targ_selvecs="nlm32_powerpc_vec rs6000coff_vec"
;;
powerpc-*-nto*)
targ_defvec=bfd_elf32_powerpc_vec
targ_selvecs="rs6000coff_vec bfd_elf32_powerpcle_vec ppcboot_vec"
;;
2005-05-07 Paul Brook <paul@codesourcery.com> bfd/ * config.bfd: Add separate case for ppc-vxworks. * configure: Regenerate. * configure.in: Include elf-vxworks.lo on ppc targets. * elf-vxworks.c (elf_vxworks_final_write_processing): Handle .rela.plt.unloaded. * elf32-ppc.c: Add VxWorks target vec. Include elf-vxworks.h. (PLT_ENTRY_SIZE, PLT_INITIAL_ENTRY_SIZE, PLT_SLOT_SIZE): Remove. (VXWORKS_PLT_ENTRY_SIZE, ppc_elf_vxworks_plt_entry, ppc_elf_vxworks_pic_plt_entry, VXWORKS_PLT_INITIAL_ENTRY_SIZE, ppc_elf_vxworks_plt0_entry, ppc_elf_vxworks_pic_plt0_entry, VXWORKS_PLT_NON_JMP_SLOT_RELOCS, VXWORKS_PLTRESOLVE_RELOCS, VXWORKS_PLTRESOLVE_RELOCS_SHLIB): New. (ppc_elf_link_hash_table): Add srelplt2, sgotplt, hgot, hplt, is_vxworks, plt_entry_size, plt_slot_size, plt_initial_entry_size. (ppc_elf_link_hash_table_create): Initialize hadtab plt fields. (ppc_elf_create_got): Create .got.plt for VxWorks. (ppc_elf_create_dynamic_sections): Create unloaded plt relocation section for VxWorks. (ppc_elf_select_plt_layout): Handle VxWorks plt format. (allocate_got): VxWorks does not need a got header. (allocate_dynrelocs): Handle VxWorks plt format. (ppc_elf_size_dynamic_sections): Save _G_O_T_ and _P_L_T_ symbols for VxWorks. Handle VxWorks plt/got. (ppc_elf_finish_dynamic_sections): Fill in VxWorks plt. (ppc_elf_vxworks_special_sections): New. (ppc_elf_vxworks_link_hash_table_create, ppc_elf_vxworks_add_symbol_hook, elf_i386_vxworks_link_output_symbol_hook, ppc_elf_vxworks_final_write_processing): New functions. * targets.c (bfd_elf32_powerpc_vxworks_vec): Declare. (_bfd_target_vector): Use it. gas/ * config/tc-ppc.c (ppc_target_format): Add VxWorks. gas/testsuite/ * gas/ppc/altivec.d: Match all powerpc target vecs. * gas/ppc/booke.d: Ditto. * gas/ppc/e500.d: Ditto. ld/ * Makefile.am (ALL_EMULATIONS): Add eelf32ppcvxworks.o. (eelf32ppcvxworks.o): Add dependencies. * Makefile.in: Regenerate. * configure.tgt: Add entry for powerpc-vxworks. * emulparams/elf32-ppc.c: Mention elf32ppcvxworks.sh in comment. * emulparams/elf32ppcvxworks.sh: New file. * emultempl/ppc32elf.em (bfd_elf32_powerpc_vxworks_vec): Declare. (is_ppc_elf32_vec): New function. (ppc_after_open, ppc_before_allocation, gld${EMULATION_NAME}_after_allocation): Use it.
2005-07-05 13:25:56 +00:00
powerpc-*-vxworks* | powerpc-*-windiss*)
targ_defvec=bfd_elf32_powerpc_vxworks_vec
targ_selvecs="rs6000coff_vec bfd_elf32_powerpc_vec bfd_elf32_powerpcle_vec ppcboot_vec"
targ64_selvecs="bfd_elf64_powerpc_vec bfd_elf64_powerpcle_vec"
;;
powerpcle-*-nto*)
targ_defvec=bfd_elf32_powerpcle_vec
targ_selvecs="rs6000coff_vec bfd_elf32_powerpc_vec ppcboot_vec"
;;
1999-05-03 07:29:11 +00:00
powerpcle-*-elf* | powerpcle-*-sysv4* | powerpcle-*-eabi* | \
powerpcle-*-solaris2* | powerpcle-*-linux-* | powerpcle-*-vxworks*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_powerpcle_vec
targ_selvecs="rs6000coff_vec bfd_elf32_powerpc_vec ppcboot_vec"
targ64_selvecs="bfd_elf64_powerpc_vec bfd_elf64_powerpcle_vec"
1999-05-03 07:29:11 +00:00
;;
powerpcle-*-pe | powerpcle-*-winnt* | powerpcle-*-cygwin*)
targ_defvec=bfd_powerpcle_pe_vec
targ_selvecs="bfd_powerpcle_pei_vec bfd_powerpc_pei_vec bfd_powerpcle_pe_vec bfd_powerpc_pe_vec"
;;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 03:09:11 +00:00
rl78-*-elf)
targ_defvec=bfd_elf32_rl78_vec
;;
bfd * Makefile.am (ALL_MACHINES): Add cpu-rx.lo. (ALL_MACHINES_CFILES): Add cpu-rx.c. (BFD32_BACKENDS): Add elf32-rx.lo. (BFD32_BACKENDS_CFILES): Add elf32-rx.c. * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx. Export bfd_rx_arch. (bfd_archures_list): Add bfd_rx_arch. * config.bfd: Add entry for rx-*-elf. * configure.in: Add entries for bfd_elf32_rx_le_vec and bfd_elf32_rx_be_vec. * reloc.c: Add RX relocations. * targets.c: Add RX target vectors. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rx.c: New file. * elf32-rx.c: New file. binutils * readelf.c: Add support for RX target. * MAINTAINERS: Add DJ and NickC as maintainers for RX. gas * Makefile.am: Add RX target. * configure.in: Likewise. * configure.tgt: Likewise. * read.c (do_repeat_with_expander): New function. * read.h: Provide a prototype for do_repeat_with_expander. * doc/Makefile.am: Add RX target documentation. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * Makefile.in: Regenerate. * NEWS: Mention support for RX architecture. * configure: Regenerate. * doc/Makefile.in: Regenerate. * config/rx-defs.h: New file. * config/rx-parse.y: New file. * config/tc-rx.h: New file. * config/tc-rx.c: New file. * doc/c-rx.texi: New file. gas/testsuite * gas/rx: New directory. * gas/rx/*: New set of test cases. * gas/elf/section2.e-rx: New expected output file. * gas/all/gas.exp: Add support for RX target. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Likewise. * gas/macros/macros.exp: Likewise. include * dis-asm.h: Add prototype for print_insn_rx. include/elf * rx.h: New file. include/opcode * rx.h: New file. ld * Makefile.am: Add rules to build RX emulation. * configure.tgt: Likewise. * NEWS: Mention support for RX architecture. * Makefile.in: Regenerate. * emulparams/elf32rx.sh: New file. * emultempl/rxelf.em: New file. opcodes * Makefile.am: Add RX files. * configure.in: Add support for RX target. * disassemble.c: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * opc2c.c: New file. * rx-decode.c: New file. * rx-decode.opc: New file. * rx-dis.c: New file.
2009-09-29 14:17:19 +00:00
rx-*-elf)
targ_defvec=bfd_elf32_rx_le_vec
targ_selvecs="bfd_elf32_rx_be_vec bfd_elf32_rx_le_vec bfd_elf32_rx_be_ns_vec"
bfd * Makefile.am (ALL_MACHINES): Add cpu-rx.lo. (ALL_MACHINES_CFILES): Add cpu-rx.c. (BFD32_BACKENDS): Add elf32-rx.lo. (BFD32_BACKENDS_CFILES): Add elf32-rx.c. * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx. Export bfd_rx_arch. (bfd_archures_list): Add bfd_rx_arch. * config.bfd: Add entry for rx-*-elf. * configure.in: Add entries for bfd_elf32_rx_le_vec and bfd_elf32_rx_be_vec. * reloc.c: Add RX relocations. * targets.c: Add RX target vectors. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rx.c: New file. * elf32-rx.c: New file. binutils * readelf.c: Add support for RX target. * MAINTAINERS: Add DJ and NickC as maintainers for RX. gas * Makefile.am: Add RX target. * configure.in: Likewise. * configure.tgt: Likewise. * read.c (do_repeat_with_expander): New function. * read.h: Provide a prototype for do_repeat_with_expander. * doc/Makefile.am: Add RX target documentation. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * Makefile.in: Regenerate. * NEWS: Mention support for RX architecture. * configure: Regenerate. * doc/Makefile.in: Regenerate. * config/rx-defs.h: New file. * config/rx-parse.y: New file. * config/tc-rx.h: New file. * config/tc-rx.c: New file. * doc/c-rx.texi: New file. gas/testsuite * gas/rx: New directory. * gas/rx/*: New set of test cases. * gas/elf/section2.e-rx: New expected output file. * gas/all/gas.exp: Add support for RX target. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Likewise. * gas/macros/macros.exp: Likewise. include * dis-asm.h: Add prototype for print_insn_rx. include/elf * rx.h: New file. include/opcode * rx.h: New file. ld * Makefile.am: Add rules to build RX emulation. * configure.tgt: Likewise. * NEWS: Mention support for RX architecture. * Makefile.in: Regenerate. * emulparams/elf32rx.sh: New file. * emultempl/rxelf.em: New file. opcodes * Makefile.am: Add RX files. * configure.in: Add support for RX target. * disassemble.c: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * opc2c.c: New file. * rx-decode.c: New file. * rx-decode.opc: New file. * rx-dis.c: New file.
2009-09-29 14:17:19 +00:00
;;
2001-02-10 00:58:38 +00:00
s390-*-linux*)
targ_defvec=bfd_elf32_s390_vec
targ64_selvecs=bfd_elf64_s390_vec
want64=true
2001-02-10 00:58:38 +00:00
;;
#ifdef BFD64
s390x-*-linux*)
targ_defvec=bfd_elf64_s390_vec
targ_selvecs=bfd_elf32_s390_vec
want64=true
2001-02-10 00:58:38 +00:00
;;
2004-12-16 16:02:59 +00:00
s390x-*-tpf*)
targ_defvec=bfd_elf64_s390_vec
want64=true
2004-12-16 16:02:59 +00:00
;;
2001-02-10 00:58:38 +00:00
2006-09-16 23:51:50 +00:00
score*-*-elf*)
targ_defvec=bfd_elf32_bigscore_vec
targ_selvecs=bfd_elf32_littlescore_vec
;;
sh64l*-*-elf*)
targ_defvec=bfd_elf32_sh64l_vec
targ_selvecs="bfd_elf32_sh64_vec bfd_elf64_sh64l_vec bfd_elf64_sh64_vec bfd_elf32_shl_vec bfd_elf32_sh_vec"
targ_underscore=yes
want64=true
;;
Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * reloc.c (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. * libbfd.h, bfd-in2.h: Rebuilt. * elf32-sh.c (sh_elf_howto_table): Define new relocs. (sh_reloc_map): Map them. (PLT_ENTRY_SIZE, elf_sh_plt0_entry_be, elf_sh_plt0_entry_le, elf_sh_plt_entry_be, elf_sh_plt_entry_le, elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le, elf_sh_plt0_entry, elf_sh_plt_entry, elf_sh_pic_plt_entry, elf_sh_sizeof_plt, elf_sh_plt_plt0_offset, elf_sh_plt0_gotplt_offset, elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset, elf_sh_plt_reloc_offset, movi_shori_putval) [INCLUDE_SHMEDIA]: New. (elf_sh_link_hash_entry) [INCLUDE_SHMEDIA]: Add datalabel_got_offset. (sh_elf_link_hash_newfunc): Initialize it. (sh_elf_relocate_section): Augment the scope of seen_stt_datalabel. Introduce GOTPLT support. Extend GOTPC, PLT, GOT and GOTOFF handling to new SHmedia relocation types. Support GOT_BIAS. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol) [TARGET_SHMEDIA]: Set up values in PLT entries using movi_shori_putval. Support GOT_BIAS. (sh_elf_finish_dynamic_sections): Likewise. * elf32-sh64.c (shmedia_prepare_reloc): Do not add addend to relocation, it's now done by the caller. (GOT_BIAS): New. * elf64-sh64.c (GOT_BIAS, PLT_ENTRY_SIZE, elf_sh64_sizeof_plt, elf_sh64_plt_plt0_offset, elf_sh64_plt0_gotplt_offset, elf_sh64_plt_temp_offset, elf_sh64_plt_symbol_offset, elf_sh64_plt_reloc_offset, ELF_DYNAMIC_INTERPRETER, elf_sh64_pcrel_relocs_copied, elf_sh64_link_hash_entry, elf_sh64_link_hash_table, sh64_elf64_link_hash_traverse, sh64_elf64_hash_table): New. (sh_elf64_howto_table): Introduce new relocs. (sh_elf64_info_to_howto): Accept new PIC relocs. (sh_elf64_relocate_section): Augment the scope of seen_stt_datalabel. Support new PIC relocs. (sh_elf64_check_relocs): Support new PIC relocs. (elf_sh64_plt0_entry_be, elf_sh64_plt0_entry_le, elf_sh64_plt_entry_be, elf_sh64_plt_entry_le, elf_sh64_pic_plt_entry_be, elf_sh64_pic_plt_entry_le, elf_sh64_plt0_entry, elf_sh64_plt_entry, elf_sh64_pic_plt_entry, sh64_elf64_link_hash_newfunc, sh64_elf64_link_hash_table_create, movi_shori_putval, movi_3shori_putval, sh64_elf64_create_dynamic_sections, sh64_elf64_adjust_dynamic_symbol, sh64_elf64_discard_copies, sh64_elf64_size_dynamic_sections, sh64_elf64_finish_dynamic_symbol, sh64_elf64_finish_dynamic_sections): New. (elf_backend_create_dynamic-sections, bfd_elf64_bfd_link_hash_table_create, elf_backend_adjust_dynamic_symbol, elf_backend_size_dynamic_sections, elf_backend_finish_dynamic_symbol, elf_backend_finish_dynamic_sections, elf_backend_want_got_plt, elf_backend_plt_readonly, elf_backend_want_plt_sym, elf_backend_got_header_size, elf_backend_plt_header_size): Define. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * elf32-sh.c: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. * elf32-sh64.c, elf64-sh64.c: Likewise. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh.c (sh_elf_relax_section): Don't relax SHmedia sections. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh64.c (shmedia_prepare_reloc): Validate relocs that must be aligned. * elf64-sh64.c (sh_elf64_relocate_section): Ditto. 2001-01-14 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (bfd_elf32_bfd_copy_private_section_data): Define. (sh64_elf_fake_sections): Set type to SHT_SH5_CR_SORTED for a .cranges section with SEC_SORT_ENTRIES set. (sh64_backend_section_from_shdr): Set SEC_SORT_ENTRIES on an incoming sorted .cranges section. (sh64_bfd_elf_copy_private_section_data): New. (sh64_elf_final_write_processing): Only sort .cranges and modify start address if called by linker. 2001-01-08 Ben Elliston <bje@redhat.com> * elf32-sh64.c (sh64_elf_final_write_processing): Activate Hans-Peter Nilsson's set bit 0 patch from 2001-01-06. * elf64-sh64.c (sh64_elf64_final_write_processing): Ditto. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh_elf64_howto_table): No open brace at start of line. Add comments before all entries. <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct and clarify describing comment. (sh_elf64_reloc): Correct head comment. (sh_elf64_relocate_section): Correct spacing. <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. <case R_SH_SHMEDIA_CODE>: New case. (sh_elf64_gc_mark_hook): Correct spacing. (sh_elf64_check_relocs): Ditto. * elf32-sh64.c (shmedia_prepare_reloc) <case R_SH_SHMEDIA_CODE>: New case. * elf32-sh.c: Correct #endif comments for #ifndef-wrapped functions. (sh_elf_howto_table) <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct, clarify describing comment. Add comments before all entries. (sh_elf_relocate_section) <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> Sort .cranges section in final link. Prepare to set bit 0 on entry address. * elf32-sh64.c (struct sh64_find_section_vma_data): New. (sh64_elf_link_output_symbol_hook): Fix typo in prototype. (sh64_elf_set_mach_from_flags): Set SEC_DEBUGGING on incoming .cranges section. (sh64_backend_section_from_shdr): New, to recognize SHT_SH5_CR_SORTED on incoming .cranges section. (elf_backend_section_from_shdr): Define. (sh64_elf_final_write_processing): Sort outgoing .cranges section. (New, temporarily disabled:) Set bit 0 on entry address according to ISA type. (sh64_find_section_for_address): New. (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb, crange_bsearch_cmpl): Move here from opcodes/sh64-dis.c. (sh64_address_in_cranges): Move here from opcodes/sh64-dis.c. Use bfd_malloc, not xmalloc. (sh64_get_contents_type): Move here from opcodes/sh64-dis.c. Make global. * elf32-sh64.c (sh64_elf64_final_write_processing): New, (but temporarily disabled) setting bit 0 on entry address. (elf_backend_final_write_processing): Define. 2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_PT_16>: Adjust fields to be a proper relocation for PTA and PTB rather than a marker. <R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL>: Zero src_mask. * elf64-sh64.c: Ditto. (sh_elf64_relocate_section) <case R_SH_PT_16>: New case. * elf32-sh64.c: Include opcodes/sh64-opc.h (shmedia_prepare_reloc): Take a bfd_link_info pointer as first argument. Drop const qualifiers from "bfd *" and "bfd_byte *" parameters. No unused parameters. Caller changed. <case R_SH_PT_16>: New case. * Makefile.am (elf32-sh64.lo): Add dependency on sh64-opc.h. * Makefile.in: Regenerate. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): Set SHF_SH5_ISA32 for all code sections. (sh_elf64_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh64_elf_merge_private_data): Ditto. * elf32-sh64.c (sh64_elf_fake_sections): Use sh64_elf_section_data to access stored section flags. (sh64_elf_final_write_processing): Return immediately unless called by linker. Use sh64_elf_section_data (cranges) to get size of linker-generated cranges entries. (sh64_elf_copy_private_data): Add missing "return true". (sh64_elf_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh_elf64_merge_private_data): Ditto. 2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): New, copy of elf64-sh64.c:sh64_elf_fake_sections. (elf_backend_fake_sections): Define as sh64_elf64_fake_sections. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_copy_private_data_internal): Delete. (sh64_elf_final_write_processing): New. (elf_backend_final_write_processing): Define. (sh64_elf_fake_sections): Get header flags from tdata field. (sh64_elf_copy_private_data): Do not call sh64_elf_copy_private_data_internal, just copy e_flags field. (sh64_elf_merge_private_data): Do not call sh64_elf_copy_private_data_internal. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> Remove EF_SH64_ABI64, let ELF size make difference. Remove SH64-specific BFD section flag. * elf32-sh64.c (sh64_elf_fake_sections): Recognize section as containing SHmedia through elf_section_data (asect)->tdata non-zero, not using a BFD section flag. (sh64_elf_set_mach_from_flags): Don't recognize EF_SH64_ABI64. (sh64_elf_merge_private_data): Similar. (elf_backend_section_flags): Don't define. (sh64_elf_backend_section_flags): Delete. * elf64-sh64.c (sh_elf64_set_mach_from_flags): Recognize EF_SH64, not EF_SH64_ABI64. (sh_elf64_merge_private_data): Similar. * section.c (Section flags definitions): Don't define SEC_SH_ISA_SHMEDIA. (bfd-in2.h): Regenerate. 2000-12-09 Hans-Peter Nilsson <hpn@cygnus.com> Make DataLabel references work with partial linking. * elf32-sh64.c: Fix formatting. (sh64_elf_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf_link_output_symbol_hook. (sh64_elf_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. * elf64-sh64.c (sh64_elf64_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf64_link_output_symbol_hook. (sh64_elf64_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. 2000-12-07 Hans-Peter Nilsson <hpn@cygnus.com> Implement semantics for inter-file DataLabel references. * elf64-sh64.c (DATALABEL_SUFFIX): Define. (sh64_elf64_add_symbol_hook): New. (sh_elf64_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. (elf_backend_add_symbol_hook): Define to sh64_elf64_add_symbol_hook. * elf64-sh32.c: Tweak comments. (DATALABEL_SUFFIX): Define. (sh64_elf_add_symbol_hook): New. (elf_backend_add_symbol_hook): Define to sh64_elf_add_symbol_hook. * elf32-sh.c (sh_elf_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. 2000-12-05 Hans-Peter Nilsson <hpn@cygnus.com> Pass through STT_DATALABEL. * elf32-sh64.c (sh64_elf_get_symbol_type): New. (elf_backend_get_symbol_type): Define. * elf64-sh64.c (sh64_elf64_get_symbol_type): New. (elf_backend_get_symbol_type): Define. 2000-11-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c: Tweak comments. (sh64_elf_copy_private_data_internal): Add prototype. (bfd_elf32_bfd_set_private_flags): Define. (sh64_elf_copy_private_data_internal): Compare machine name, not textual BFD target name, to check whether to copy section flag SHF_SH5_ISA32. (sh64_elf_merge_private_data): Validize bfd_get_arch_size. Tweak section-contents-type-mismatch message. (shmedia_prepare_reloc): Add ATTRIBUTE_UNUSED markers. Validize reloc-types. * elf64-sh64.c: New file. * targets.c (bfd_elf64_sh64_vec, bfd_elf64_sh64l_vec): Declare. * Makefile.am (BFD64_BACKENDS): Add elf64-sh64.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * config.bfd (sh64-*-elf*): Add bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure.in: Handle bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. 2000-11-29 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_set_mach_from_flags): Do not recognize anything else but EF_SH64 and EF_SH64_ABI64. (sh64_elf_merge_private_data): Emit error for anything else but EF_SH64 and EF_SH64_ABI64. * config.bfd: Remove bfd_elf32_shblin_vec and bfd_elf32_shlin_vec from targ_selvecs. * configure.in: Add cofflink.lo to bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec as a temporary measure. * configure: Regenerate. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * cpu-sh.c (arch_info_struct): Include sh5 item unconditionalized. * config.bfd (sh64-*-elf*): Do not set targ_cflags. Add targ_selvecs bfd_elf32_sh_vec, bfd_elf32_shl_vec, bfd_elf32_shblin_vec and bfd_elf32_shlin_vec. * elf32-sh64.c: Tweak comments. (sh64_elf_set_mach_from_flags): Recognize all machine flags that are proper subsets of SH64 as bfd_mach_sh5. Add EF_SH64_ABI64. (sh64_elf_copy_private_data_internal): Wrap long line. (sh64_elf_merge_private_data): Rewrite to allow objects from SH64 subsets to be linked together. (INCLUDE_SHMEDIA): Define. * elf32-sh.c (sh_elf_relocate_section) <local symbol>: Parenthesize plus-expression inside or-expression. <global symbol>: Ditto. (sh_elf_set_mach_from_flags): Remove code refusing deleted EF_SH64_32BIT_ABI flag. 2000-11-26 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16_PCREL, R_SH_64_PCREL>: Set pcrel_offset to true. (sh_elf_relocate_section) <local symbol>: Or 1 in calculation of relocation if sym->st_other & STO_SH5_ISA32. <global symbol>: Ditto if h->other & STO_SH5_ISA32. * elf32-sh64.c (shmedia_prepare_reloc): Add rel->r_addend to relocation. 2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com> * Makefile.am (BFD32_BACKENDS): Add elf32-sh64.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * archures.c: Add bfd_mach_sh5. * config.bfd: Map targ_cpu sh* to bfd_sh_arch. Handle sh64-*-elf*. Set targ_cflags to -DINCLUDE_SHMEDIA. * configure.in: Handle bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec. * configure: Regenerate. * reloc.c (BFD_RELOC_SH_SHMEDIA_CODE, BFD_RELOC_SH_IMMU5, BFD_RELOC_SH_IMMS6, BFD_RELOC_SH_IMMS6BY32, BFD_RELOC_SH_IMMU6, BFD_RELOC_SH_IMMS10, BFD_RELOC_SH_IMMS10BY2, BFD_RELOC_SH_IMMS10BY4, BFD_RELOC_SH_IMMS10BY8, BFD_RELOC_SH_IMMS16, BFD_RELOC_SH_IMMU16, BFD_RELOC_SH_IMM_LOW16, BFD_RELOC_SH_IMM_LOW16_PCREL, BFD_RELOC_SH_IMM_MEDLOW16, BFD_RELOC_SH_IMM_MEDLOW16_PCREL, BFD_RELOC_SH_IMM_MEDHI16, BFD_RELOC_SH_IMM_MEDHI16_PCREL, BFD_RELOC_SH_IMM_HI16, BFD_RELOC_SH_IMM_HI16_PCREL, BFD_RELOC_SH_PT_16): New relocations. * cpu-sh.c [INCLUDE_SHMEDIA] (arch_info_struct): Define and link in item for SH5. * elf32-sh.c [INCLUDE_SHMEDIA] (sh_elf_howto_table): Add howto items for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_rel): Add mappings for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_elf_relocate_section) [default]: Call shmedia_prepare_reloc, goto final_link_relocate if it returns non-zero, else fail as before. (sh_elf_set_mach_from_flags): Provide function only if not defined as macro. Do not recognize objects with EF_SH64_32BIT_ABI set. (sh_elf_set_private_flags): Provide function only if not defined as a macro. (sh_elf_copy_private_data): Similar. (sh_elf_merge_private_data): Similar. * section.c (SEC_SH_ISA_SHMEDIA): New. * targets.c (bfd_elf32_sh64_vec, bfd_elf32_sh64l_vec): Declare. * elf32-sh64.c: New file. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate.
2002-02-08 05:33:27 +00:00
sh64-*-elf*)
targ_defvec=bfd_elf32_sh64_vec
targ_selvecs="bfd_elf32_sh64l_vec bfd_elf64_sh64_vec bfd_elf64_sh64l_vec bfd_elf32_sh_vec bfd_elf32_shl_vec"
targ_underscore=yes
want64=true
Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * reloc.c (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. * libbfd.h, bfd-in2.h: Rebuilt. * elf32-sh.c (sh_elf_howto_table): Define new relocs. (sh_reloc_map): Map them. (PLT_ENTRY_SIZE, elf_sh_plt0_entry_be, elf_sh_plt0_entry_le, elf_sh_plt_entry_be, elf_sh_plt_entry_le, elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le, elf_sh_plt0_entry, elf_sh_plt_entry, elf_sh_pic_plt_entry, elf_sh_sizeof_plt, elf_sh_plt_plt0_offset, elf_sh_plt0_gotplt_offset, elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset, elf_sh_plt_reloc_offset, movi_shori_putval) [INCLUDE_SHMEDIA]: New. (elf_sh_link_hash_entry) [INCLUDE_SHMEDIA]: Add datalabel_got_offset. (sh_elf_link_hash_newfunc): Initialize it. (sh_elf_relocate_section): Augment the scope of seen_stt_datalabel. Introduce GOTPLT support. Extend GOTPC, PLT, GOT and GOTOFF handling to new SHmedia relocation types. Support GOT_BIAS. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol) [TARGET_SHMEDIA]: Set up values in PLT entries using movi_shori_putval. Support GOT_BIAS. (sh_elf_finish_dynamic_sections): Likewise. * elf32-sh64.c (shmedia_prepare_reloc): Do not add addend to relocation, it's now done by the caller. (GOT_BIAS): New. * elf64-sh64.c (GOT_BIAS, PLT_ENTRY_SIZE, elf_sh64_sizeof_plt, elf_sh64_plt_plt0_offset, elf_sh64_plt0_gotplt_offset, elf_sh64_plt_temp_offset, elf_sh64_plt_symbol_offset, elf_sh64_plt_reloc_offset, ELF_DYNAMIC_INTERPRETER, elf_sh64_pcrel_relocs_copied, elf_sh64_link_hash_entry, elf_sh64_link_hash_table, sh64_elf64_link_hash_traverse, sh64_elf64_hash_table): New. (sh_elf64_howto_table): Introduce new relocs. (sh_elf64_info_to_howto): Accept new PIC relocs. (sh_elf64_relocate_section): Augment the scope of seen_stt_datalabel. Support new PIC relocs. (sh_elf64_check_relocs): Support new PIC relocs. (elf_sh64_plt0_entry_be, elf_sh64_plt0_entry_le, elf_sh64_plt_entry_be, elf_sh64_plt_entry_le, elf_sh64_pic_plt_entry_be, elf_sh64_pic_plt_entry_le, elf_sh64_plt0_entry, elf_sh64_plt_entry, elf_sh64_pic_plt_entry, sh64_elf64_link_hash_newfunc, sh64_elf64_link_hash_table_create, movi_shori_putval, movi_3shori_putval, sh64_elf64_create_dynamic_sections, sh64_elf64_adjust_dynamic_symbol, sh64_elf64_discard_copies, sh64_elf64_size_dynamic_sections, sh64_elf64_finish_dynamic_symbol, sh64_elf64_finish_dynamic_sections): New. (elf_backend_create_dynamic-sections, bfd_elf64_bfd_link_hash_table_create, elf_backend_adjust_dynamic_symbol, elf_backend_size_dynamic_sections, elf_backend_finish_dynamic_symbol, elf_backend_finish_dynamic_sections, elf_backend_want_got_plt, elf_backend_plt_readonly, elf_backend_want_plt_sym, elf_backend_got_header_size, elf_backend_plt_header_size): Define. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * elf32-sh.c: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. * elf32-sh64.c, elf64-sh64.c: Likewise. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh.c (sh_elf_relax_section): Don't relax SHmedia sections. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh64.c (shmedia_prepare_reloc): Validate relocs that must be aligned. * elf64-sh64.c (sh_elf64_relocate_section): Ditto. 2001-01-14 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (bfd_elf32_bfd_copy_private_section_data): Define. (sh64_elf_fake_sections): Set type to SHT_SH5_CR_SORTED for a .cranges section with SEC_SORT_ENTRIES set. (sh64_backend_section_from_shdr): Set SEC_SORT_ENTRIES on an incoming sorted .cranges section. (sh64_bfd_elf_copy_private_section_data): New. (sh64_elf_final_write_processing): Only sort .cranges and modify start address if called by linker. 2001-01-08 Ben Elliston <bje@redhat.com> * elf32-sh64.c (sh64_elf_final_write_processing): Activate Hans-Peter Nilsson's set bit 0 patch from 2001-01-06. * elf64-sh64.c (sh64_elf64_final_write_processing): Ditto. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh_elf64_howto_table): No open brace at start of line. Add comments before all entries. <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct and clarify describing comment. (sh_elf64_reloc): Correct head comment. (sh_elf64_relocate_section): Correct spacing. <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. <case R_SH_SHMEDIA_CODE>: New case. (sh_elf64_gc_mark_hook): Correct spacing. (sh_elf64_check_relocs): Ditto. * elf32-sh64.c (shmedia_prepare_reloc) <case R_SH_SHMEDIA_CODE>: New case. * elf32-sh.c: Correct #endif comments for #ifndef-wrapped functions. (sh_elf_howto_table) <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct, clarify describing comment. Add comments before all entries. (sh_elf_relocate_section) <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> Sort .cranges section in final link. Prepare to set bit 0 on entry address. * elf32-sh64.c (struct sh64_find_section_vma_data): New. (sh64_elf_link_output_symbol_hook): Fix typo in prototype. (sh64_elf_set_mach_from_flags): Set SEC_DEBUGGING on incoming .cranges section. (sh64_backend_section_from_shdr): New, to recognize SHT_SH5_CR_SORTED on incoming .cranges section. (elf_backend_section_from_shdr): Define. (sh64_elf_final_write_processing): Sort outgoing .cranges section. (New, temporarily disabled:) Set bit 0 on entry address according to ISA type. (sh64_find_section_for_address): New. (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb, crange_bsearch_cmpl): Move here from opcodes/sh64-dis.c. (sh64_address_in_cranges): Move here from opcodes/sh64-dis.c. Use bfd_malloc, not xmalloc. (sh64_get_contents_type): Move here from opcodes/sh64-dis.c. Make global. * elf32-sh64.c (sh64_elf64_final_write_processing): New, (but temporarily disabled) setting bit 0 on entry address. (elf_backend_final_write_processing): Define. 2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_PT_16>: Adjust fields to be a proper relocation for PTA and PTB rather than a marker. <R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL>: Zero src_mask. * elf64-sh64.c: Ditto. (sh_elf64_relocate_section) <case R_SH_PT_16>: New case. * elf32-sh64.c: Include opcodes/sh64-opc.h (shmedia_prepare_reloc): Take a bfd_link_info pointer as first argument. Drop const qualifiers from "bfd *" and "bfd_byte *" parameters. No unused parameters. Caller changed. <case R_SH_PT_16>: New case. * Makefile.am (elf32-sh64.lo): Add dependency on sh64-opc.h. * Makefile.in: Regenerate. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): Set SHF_SH5_ISA32 for all code sections. (sh_elf64_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh64_elf_merge_private_data): Ditto. * elf32-sh64.c (sh64_elf_fake_sections): Use sh64_elf_section_data to access stored section flags. (sh64_elf_final_write_processing): Return immediately unless called by linker. Use sh64_elf_section_data (cranges) to get size of linker-generated cranges entries. (sh64_elf_copy_private_data): Add missing "return true". (sh64_elf_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh_elf64_merge_private_data): Ditto. 2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): New, copy of elf64-sh64.c:sh64_elf_fake_sections. (elf_backend_fake_sections): Define as sh64_elf64_fake_sections. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_copy_private_data_internal): Delete. (sh64_elf_final_write_processing): New. (elf_backend_final_write_processing): Define. (sh64_elf_fake_sections): Get header flags from tdata field. (sh64_elf_copy_private_data): Do not call sh64_elf_copy_private_data_internal, just copy e_flags field. (sh64_elf_merge_private_data): Do not call sh64_elf_copy_private_data_internal. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> Remove EF_SH64_ABI64, let ELF size make difference. Remove SH64-specific BFD section flag. * elf32-sh64.c (sh64_elf_fake_sections): Recognize section as containing SHmedia through elf_section_data (asect)->tdata non-zero, not using a BFD section flag. (sh64_elf_set_mach_from_flags): Don't recognize EF_SH64_ABI64. (sh64_elf_merge_private_data): Similar. (elf_backend_section_flags): Don't define. (sh64_elf_backend_section_flags): Delete. * elf64-sh64.c (sh_elf64_set_mach_from_flags): Recognize EF_SH64, not EF_SH64_ABI64. (sh_elf64_merge_private_data): Similar. * section.c (Section flags definitions): Don't define SEC_SH_ISA_SHMEDIA. (bfd-in2.h): Regenerate. 2000-12-09 Hans-Peter Nilsson <hpn@cygnus.com> Make DataLabel references work with partial linking. * elf32-sh64.c: Fix formatting. (sh64_elf_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf_link_output_symbol_hook. (sh64_elf_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. * elf64-sh64.c (sh64_elf64_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf64_link_output_symbol_hook. (sh64_elf64_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. 2000-12-07 Hans-Peter Nilsson <hpn@cygnus.com> Implement semantics for inter-file DataLabel references. * elf64-sh64.c (DATALABEL_SUFFIX): Define. (sh64_elf64_add_symbol_hook): New. (sh_elf64_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. (elf_backend_add_symbol_hook): Define to sh64_elf64_add_symbol_hook. * elf64-sh32.c: Tweak comments. (DATALABEL_SUFFIX): Define. (sh64_elf_add_symbol_hook): New. (elf_backend_add_symbol_hook): Define to sh64_elf_add_symbol_hook. * elf32-sh.c (sh_elf_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. 2000-12-05 Hans-Peter Nilsson <hpn@cygnus.com> Pass through STT_DATALABEL. * elf32-sh64.c (sh64_elf_get_symbol_type): New. (elf_backend_get_symbol_type): Define. * elf64-sh64.c (sh64_elf64_get_symbol_type): New. (elf_backend_get_symbol_type): Define. 2000-11-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c: Tweak comments. (sh64_elf_copy_private_data_internal): Add prototype. (bfd_elf32_bfd_set_private_flags): Define. (sh64_elf_copy_private_data_internal): Compare machine name, not textual BFD target name, to check whether to copy section flag SHF_SH5_ISA32. (sh64_elf_merge_private_data): Validize bfd_get_arch_size. Tweak section-contents-type-mismatch message. (shmedia_prepare_reloc): Add ATTRIBUTE_UNUSED markers. Validize reloc-types. * elf64-sh64.c: New file. * targets.c (bfd_elf64_sh64_vec, bfd_elf64_sh64l_vec): Declare. * Makefile.am (BFD64_BACKENDS): Add elf64-sh64.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * config.bfd (sh64-*-elf*): Add bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure.in: Handle bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. 2000-11-29 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_set_mach_from_flags): Do not recognize anything else but EF_SH64 and EF_SH64_ABI64. (sh64_elf_merge_private_data): Emit error for anything else but EF_SH64 and EF_SH64_ABI64. * config.bfd: Remove bfd_elf32_shblin_vec and bfd_elf32_shlin_vec from targ_selvecs. * configure.in: Add cofflink.lo to bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec as a temporary measure. * configure: Regenerate. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * cpu-sh.c (arch_info_struct): Include sh5 item unconditionalized. * config.bfd (sh64-*-elf*): Do not set targ_cflags. Add targ_selvecs bfd_elf32_sh_vec, bfd_elf32_shl_vec, bfd_elf32_shblin_vec and bfd_elf32_shlin_vec. * elf32-sh64.c: Tweak comments. (sh64_elf_set_mach_from_flags): Recognize all machine flags that are proper subsets of SH64 as bfd_mach_sh5. Add EF_SH64_ABI64. (sh64_elf_copy_private_data_internal): Wrap long line. (sh64_elf_merge_private_data): Rewrite to allow objects from SH64 subsets to be linked together. (INCLUDE_SHMEDIA): Define. * elf32-sh.c (sh_elf_relocate_section) <local symbol>: Parenthesize plus-expression inside or-expression. <global symbol>: Ditto. (sh_elf_set_mach_from_flags): Remove code refusing deleted EF_SH64_32BIT_ABI flag. 2000-11-26 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16_PCREL, R_SH_64_PCREL>: Set pcrel_offset to true. (sh_elf_relocate_section) <local symbol>: Or 1 in calculation of relocation if sym->st_other & STO_SH5_ISA32. <global symbol>: Ditto if h->other & STO_SH5_ISA32. * elf32-sh64.c (shmedia_prepare_reloc): Add rel->r_addend to relocation. 2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com> * Makefile.am (BFD32_BACKENDS): Add elf32-sh64.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * archures.c: Add bfd_mach_sh5. * config.bfd: Map targ_cpu sh* to bfd_sh_arch. Handle sh64-*-elf*. Set targ_cflags to -DINCLUDE_SHMEDIA. * configure.in: Handle bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec. * configure: Regenerate. * reloc.c (BFD_RELOC_SH_SHMEDIA_CODE, BFD_RELOC_SH_IMMU5, BFD_RELOC_SH_IMMS6, BFD_RELOC_SH_IMMS6BY32, BFD_RELOC_SH_IMMU6, BFD_RELOC_SH_IMMS10, BFD_RELOC_SH_IMMS10BY2, BFD_RELOC_SH_IMMS10BY4, BFD_RELOC_SH_IMMS10BY8, BFD_RELOC_SH_IMMS16, BFD_RELOC_SH_IMMU16, BFD_RELOC_SH_IMM_LOW16, BFD_RELOC_SH_IMM_LOW16_PCREL, BFD_RELOC_SH_IMM_MEDLOW16, BFD_RELOC_SH_IMM_MEDLOW16_PCREL, BFD_RELOC_SH_IMM_MEDHI16, BFD_RELOC_SH_IMM_MEDHI16_PCREL, BFD_RELOC_SH_IMM_HI16, BFD_RELOC_SH_IMM_HI16_PCREL, BFD_RELOC_SH_PT_16): New relocations. * cpu-sh.c [INCLUDE_SHMEDIA] (arch_info_struct): Define and link in item for SH5. * elf32-sh.c [INCLUDE_SHMEDIA] (sh_elf_howto_table): Add howto items for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_rel): Add mappings for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_elf_relocate_section) [default]: Call shmedia_prepare_reloc, goto final_link_relocate if it returns non-zero, else fail as before. (sh_elf_set_mach_from_flags): Provide function only if not defined as macro. Do not recognize objects with EF_SH64_32BIT_ABI set. (sh_elf_set_private_flags): Provide function only if not defined as a macro. (sh_elf_copy_private_data): Similar. (sh_elf_merge_private_data): Similar. * section.c (SEC_SH_ISA_SHMEDIA): New. * targets.c (bfd_elf32_sh64_vec, bfd_elf32_sh64l_vec): Declare. * elf32-sh64.c: New file. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate.
2002-02-08 05:33:27 +00:00
;;
sh64eb-*-linux*)
targ_defvec=bfd_elf32_sh64blin_vec
targ_selvecs="bfd_elf32_sh64lin_vec bfd_elf64_sh64blin_vec bfd_elf64_sh64lin_vec bfd_elf32_shblin_vec bfd_elf32_shlin_vec"
want64=true
;;
sh64-*-linux*)
targ_defvec=bfd_elf32_sh64lin_vec
targ_selvecs="bfd_elf32_sh64blin_vec bfd_elf64_sh64lin_vec bfd_elf64_sh64blin_vec bfd_elf32_shlin_vec bfd_elf32_shblin_vec"
want64=true
;;
sh-*-linux*)
targ_defvec=bfd_elf32_shblin_vec
targ_selvecs="bfd_elf32_shlin_vec bfd_elf32_sh64lin_vec bfd_elf32_sh64blin_vec bfd_elf64_sh64lin_vec bfd_elf64_sh64blin_vec"
want64=true
;;
#endif /* BFD64 */
sh*eb-*-linux*)
targ_defvec=bfd_elf32_shblin_vec
targ_selvecs=bfd_elf32_shlin_vec
;;
sh*-*-linux*)
targ_defvec=bfd_elf32_shlin_vec
targ_selvecs=bfd_elf32_shblin_vec
;;
sh-*-uclinux* | sh[12]-*-uclinux*)
targ_defvec=bfd_elf32_sh_vec
2010-05-21 Daniel Jacobowitz <dan@codesourcery.com> Joseph Myers <joseph@codesourcery.com> Andrew Stubbs <ams@codesourcery.com> bfd/ * config.bfd (sh-*-uclinux* | sh[12]-*-uclinux*): Add bfd_elf32_shl_vec, and FDPIC vectors to targ_selvecs. * configure.in: Handle FDPIC vectors. * elf32-sh-relocs.h: Add FDPIC and movi20 relocations. * elf32-sh.c (DEFAULT_STACK_SIZE): Define. (SYMBOL_FUNCDESC_LOCAL): Define. Use it instead of SYMBOL_REFERENCES_LOCAL for function descriptors. (fdpic_object_p): New. (sh_reloc_map): Add FDPIC and movi20 relocations. (sh_elf_info_to_howto, sh_elf_relocate_section): Handle new invalid range. (struct elf_sh_plt_info): Add got20 and short_plt. Update all definitions. (FDPIC_PLT_ENTRY_SIZE, FDPIC_PLT_LAZY_OFFSET): Define. (fdpic_sh_plt_entry_be, fdpic_sh_plt_entry_le, fdpic_sh_plts): New. (FDPIC_SH2A_PLT_ENTRY_SIZE, FDPIC_SH2A_PLT_LAZY_OFFSET): Define. (fdpic_sh2a_plt_entry_be, fdpic_sh2a_plt_entry_le) (fdpic_sh2a_short_plt_be, fdpic_sh2a_short_plt_le, fdpic_sh2a_plts): New. (get_plt_info): Handle FDPIC. (MAX_SHORT_PLT): Define. (get_plt_index, get_plt_offset): Handle short_plt. (union gotref): New. (struct elf_sh_link_hash_entry): Add funcdesc, rename tls_type to got_type and adjust all uses. Add GOT_FUNCDESC. (struct sh_elf_obj_tdata): Add local_funcdesc. Rename local_got_tls_type to local_got_type. (sh_elf_local_got_type): Renamed from sh_elf_local_got_tls_type. All users changed. (sh_elf_local_funcdesc): Define. (struct elf_sh_link_hash_table): Add sfuncdesc, srelfuncdesc, fdpic_p, and srofixup. (sh_elf_link_hash_newfunc): Initialize new fields. (sh_elf_link_hash_table_create): Set fdpic_p. (sh_elf_omit_section_dynsym): New. (create_got_section): Create .got.funcdesc, .rela.got.funcdesc and .rofixup. (allocate_dynrelocs): Allocate local function descriptors and space for R_SH_FUNCDESC-related relocations, and for rofixups. Handle GOT_FUNCDESC. Create fixups. Handle GOT entries which require function descriptors. (sh_elf_always_size_sections): Handle PT_GNU_STACK and __stacksize. (sh_elf_modify_program_headers): New. (sh_elf_size_dynamic_sections): Allocate function descriptors for local symbols. Allocate .got.funcdesc contents. Allocate rofixups. Handle local GOT entries of type GOT_FUNCDESC. Create fixups for local GOT entries. Ensure that FDPIC libraries always have a PLTGOT entry in the .dynamic section. (sh_elf_add_dyn_reloc, sh_elf_got_offset, sh_elf_initialize_funcdesc) (sh_elf_add_rofixup, sh_elf_osec_to_segment) (sh_elf_osec_readonly_p, install_movi20_field): New functions. (sh_elf_relocate_section): Handle new relocations, R_SH_FUNCDESC, R_SH_GOTFUNCDESC and R_SH_GOTOFFFUNCDESC. Use sh_elf_got_offset and .got.plt throughout to find _GLOBAL_OFFSET_TABLE_. Add rofixup read-only section warnings. Handle undefined weak symbols. Generate fixups for R_SH_DIR32 and GOT entries. Check for cross-segment relocations and clear EF_SH_PIC. Handle 20-bit relocations. Always generate R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE. (sh_elf_gc_sweep_hook): Handle R_SH_FUNCDESC, R_SH_GOTOFF20, R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20, and R_SH_GOTOFFFUNCDESC. Handle 20-bit relocations. (sh_elf_copy_indirect_symbol): Copy function descriptor reference counts. (sh_elf_check_relocs): Handle new relocations. Make symbols dynamic for FDPIC relocs. Account for rofixups. Error for FDPIC symbol mismatches. Allocate a GOT for R_SH_DIR32. Allocate fixups for R_SH_DIR32. (sh_elf_copy_private_data): Copy PT_GNU_STACK size. (sh_elf_merge_private_data): Copy initial flags. Do not clobber non-mach flags. Set EF_SH_PIC for FDPIC. Reject FDPIC mismatches. (sh_elf_finish_dynamic_symbol): Do not handle got_funcdesc entries here. Rename sgot to sgotplt and srel to srelplt. Handle short_plt, FDPIC descriptors, and got20. Create R_SH_FUNCDESC_VALUE for FDPIC. Use install_movi20_field. Rename srel to srelgot. Always generate R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE. (sh_elf_finish_dynamic_sections): Fill in the GOT pointer in rofixup. Do not fill in reserved GOT entries for FDPIC. Correct DT_PLTGOT. Rename sgot to sgotplt. Assert that the right number of rofixups and dynamic relocations were allocated. (sh_elf_use_relative_eh_frame, sh_elf_encode_eh_address): New. (elf_backend_omit_section_dynsym): Use sh_elf_omit_section_dynsym. (elf_backend_can_make_relative_eh_frame) (elf_backend_can_make_lsda_relative_eh_frame) (elf_backend_encode_eh_address): Define. (TARGET_BIG_SYM, TARGET_BIG_NAME, TARGET_LITTLE_SYM) (TARGET_LITTLE_NAME, elf_backend_modify_program_headers, elf32_bed): Redefine for FDPIC vector. * reloc.c: Add SH FDPIC and movi20 relocations. * targets.c (_bfd_target_vector): Add FDPIC vectors. * configure, bfd-in2.h, libbfd.h: Regenerated. binutils/ * readelf.c (get_machine_flags): Handle EF_SH_PIC and EF_SH_FDPIC. gas/ * config/tc-sh.c (sh_fdpic): New. (sh_check_fixup): Handle relocations on movi20. (parse_exp): Do not reject PIC operators here. (build_Mytes): Check for unhandled PIC operators here. Use sh_check_fixup for movi20. (enum options): Add OPTION_FDPIC. (md_longopts, md_parse_option, md_show_usage): Add --fdpic. (sh_fix_adjustable, md_apply_fix): Handle FDPIC and movi20 relocations. (sh_elf_final_processing): Handle --fdpic. (sh_uclinux_target_format): New. (sh_parse_name): Handle FDPIC relocation operators. * config/tc-sh.h (TARGET_FORMAT): Define specially for TE_UCLINUX. (sh_uclinux_target_format): Declare for TE_UCLINUX. * configure.tgt (sh-*-uclinux* | sh[12]-*-uclinux*): Set em=uclinux. * doc/c-sh.texi (SH Options): Document --fdpic. gas/testsuite/ * gas/sh/basic.exp: Run new tests. Handle uClinux like Linux. * gas/sh/fdpic.d: New file. * gas/sh/fdpic.s: New file. * gas/sh/reg-prefix.d: Force big-endian. * gas/sh/sh2a-pic.d: New file. * gas/sh/sh2a-pic.s: New file. * lib/gas-defs.exp (is_elf_format): Include sh*-*-uclinux*. include/elf/ * sh.h (EF_SH_PIC, EF_SH_FDPIC): Define. (R_SH_FIRST_INVALID_RELOC_6, R_SH_LAST_INVALID_RELOC_6): New. Adjust other invalid ranges. (R_SH_GOT20, R_SH_GOTOFF20, R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20) (R_SH_GOTOFFFUNCDESC, R_SH_GOTOFFFUNCDESC20, R_SH_FUNCDESC) (R_SH_FUNCDESC_VALUE): New. ld/ * Makefile.am (ALL_EMULATIONS): Add eshelf_fd.o and eshlelf_fd.o. (eshelf_fd.c, eshlelf_fd.c): New rules. * Makefile.in: Regenerate. * configure.tgt (sh-*-uclinux*): Add shelf_fd and shlelf_fd emulations. * emulparams/shelf_fd.sh: New file. * emulparams/shlelf_fd.sh: New file. * emulparams/shlelf_linux.sh: Update comment. ld/testsuite/ * ld-sh/sh.exp: Handle uClinux like Linux. * lib/ld-lib.exp (is_elf_format): Include sh*-*-uclinux*. * ld-sh/fdpic-funcdesc-shared.d: New file. * ld-sh/fdpic-funcdesc-shared.s: New file. * ld-sh/fdpic-funcdesc-static.d: New file. * ld-sh/fdpic-funcdesc-static.s: New file. * ld-sh/fdpic-gotfuncdesc-shared.d: New file. * ld-sh/fdpic-gotfuncdesc-shared.s: New file. * ld-sh/fdpic-gotfuncdesc-static.d: New file. * ld-sh/fdpic-gotfuncdesc-static.s: New file. * ld-sh/fdpic-gotfuncdesci20-shared.d: New file. * ld-sh/fdpic-gotfuncdesci20-shared.s: New file. * ld-sh/fdpic-gotfuncdesci20-static.d: New file. * ld-sh/fdpic-gotfuncdesci20-static.s: New file. * ld-sh/fdpic-goti20-shared.d: New file. * ld-sh/fdpic-goti20-shared.s: New file. * ld-sh/fdpic-goti20-static.d: New file. * ld-sh/fdpic-goti20-static.s: New file. * ld-sh/fdpic-gotofffuncdesc-shared.d: New file. * ld-sh/fdpic-gotofffuncdesc-shared.s: New file. * ld-sh/fdpic-gotofffuncdesc-static.d: New file. * ld-sh/fdpic-gotofffuncdesc-static.s: New file. * ld-sh/fdpic-gotofffuncdesci20-shared.d: New file. * ld-sh/fdpic-gotofffuncdesci20-shared.s: New file. * ld-sh/fdpic-gotofffuncdesci20-static.d: New file. * ld-sh/fdpic-gotofffuncdesci20-static.s: New file. * ld-sh/fdpic-gotoffi20-shared.d: New file. * ld-sh/fdpic-gotoffi20-shared.s: New file. * ld-sh/fdpic-gotoffi20-static.d: New file. * ld-sh/fdpic-gotoffi20-static.s: New file. * ld-sh/fdpic-plt-be.d: New file. * ld-sh/fdpic-plt-le.d: New file. * ld-sh/fdpic-plt.s: New file. * ld-sh/fdpic-plti20-be.d: New file. * ld-sh/fdpic-plti20-le.d: New file. * ld-sh/fdpic-stack-default.d: New file. * ld-sh/fdpic-stack-size.d: New file. * ld-sh/fdpic-stack.s: New file.
2010-05-25 14:12:43 +00:00
targ_selvecs="bfd_elf32_shl_vec bfd_elf32_shblin_vec bfd_elf32_shlin_vec bfd_elf32_shfd_vec bfd_elf32_shbfd_vec"
#ifdef BFD64
targ_selvecs="${targ_selvecs} bfd_elf32_sh64lin_vec bfd_elf32_sh64blin_vec bfd_elf64_sh64lin_vec bfd_elf64_sh64blin_vec"
#endif
;;
bfd: * Makefile.am (BFD32_BACKENDS): Add elf32-sh64-nbsd.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64-nbsd.c. (BFD64_BACKENDS): Add elf64-sh64-nbsd.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64-nbsd.c. (elf32-sh64-nbsd.lo, elf64-sh64-nbsd.lo): New rules. * Makefile.in: Regenerate. * config.bfd (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * configure.in: Add bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. * configure: Regenerate. * elf32-sh64-nbsd.c: New file. * elf64-sh64-nbsd.c: New file. * targets.c: Add extern decls for bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. gas: * configure.in (sh5*): Set cpu_type to sh64 and endian to big. (sh5le*, sh64le*): Set cpu_type to sh64 and endian to little. (sh5*-*-netbsd*, sh64*-*-netbsd*): New targets. * configure: Regenerate. * config/tc-sh64.c (sh64_target_format): Add support for NetBSD environment. ld: * Makefile.am (ALL_EMULATIONS): Add eshelf32_nbsd.o, eshlelf32_nbsd.o, eshelf64_nbsd.o, and eshlelf64_nbsd.o. (eshelf32_nbsd.c, eshelf64_nbsd.c, eshlelf32_nbsd.c) (eshlelf64_nbsd.c): New rules. * Makefile.in: Regenerate. * configure.tgt (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * emulparams/shelf32_nbsd.sh: New file. * emulparams/shelf64_nbsd.sh: New file. * emulparams/shlelf32_nbsd.sh: New file. * emulparams/shlelf64_nbsd.sh: New file. opcodes: * configure.in: Add "sh5*-*" to list of targets which include sh64 support. * configure: Regenerate.
2002-06-04 02:57:44 +00:00
#ifdef BFD64
sh5le-*-netbsd*)
targ_defvec=bfd_elf32_sh64lnbsd_vec
targ_selvecs="bfd_elf32_sh64nbsd_vec bfd_elf64_sh64lnbsd_vec bfd_elf64_sh64nbsd_vec bfd_elf32_shnbsd_vec bfd_elf32_shlnbsd_vec"
want64=true
bfd: * Makefile.am (BFD32_BACKENDS): Add elf32-sh64-nbsd.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64-nbsd.c. (BFD64_BACKENDS): Add elf64-sh64-nbsd.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64-nbsd.c. (elf32-sh64-nbsd.lo, elf64-sh64-nbsd.lo): New rules. * Makefile.in: Regenerate. * config.bfd (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * configure.in: Add bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. * configure: Regenerate. * elf32-sh64-nbsd.c: New file. * elf64-sh64-nbsd.c: New file. * targets.c: Add extern decls for bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. gas: * configure.in (sh5*): Set cpu_type to sh64 and endian to big. (sh5le*, sh64le*): Set cpu_type to sh64 and endian to little. (sh5*-*-netbsd*, sh64*-*-netbsd*): New targets. * configure: Regenerate. * config/tc-sh64.c (sh64_target_format): Add support for NetBSD environment. ld: * Makefile.am (ALL_EMULATIONS): Add eshelf32_nbsd.o, eshlelf32_nbsd.o, eshelf64_nbsd.o, and eshlelf64_nbsd.o. (eshelf32_nbsd.c, eshelf64_nbsd.c, eshlelf32_nbsd.c) (eshlelf64_nbsd.c): New rules. * Makefile.in: Regenerate. * configure.tgt (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * emulparams/shelf32_nbsd.sh: New file. * emulparams/shelf64_nbsd.sh: New file. * emulparams/shlelf32_nbsd.sh: New file. * emulparams/shlelf64_nbsd.sh: New file. opcodes: * configure.in: Add "sh5*-*" to list of targets which include sh64 support. * configure: Regenerate.
2002-06-04 02:57:44 +00:00
;;
sh5-*-netbsd*)
targ_defvec=bfd_elf32_sh64nbsd_vec
targ_selvecs="bfd_elf32_sh64lnbsd_vec bfd_elf64_sh64lnbsd_vec bfd_elf64_sh64nbsd_vec bfd_elf32_shnbsd_vec bfd_elf32_shlnbsd_vec"
want64=true
bfd: * Makefile.am (BFD32_BACKENDS): Add elf32-sh64-nbsd.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64-nbsd.c. (BFD64_BACKENDS): Add elf64-sh64-nbsd.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64-nbsd.c. (elf32-sh64-nbsd.lo, elf64-sh64-nbsd.lo): New rules. * Makefile.in: Regenerate. * config.bfd (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * configure.in: Add bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. * configure: Regenerate. * elf32-sh64-nbsd.c: New file. * elf64-sh64-nbsd.c: New file. * targets.c: Add extern decls for bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. gas: * configure.in (sh5*): Set cpu_type to sh64 and endian to big. (sh5le*, sh64le*): Set cpu_type to sh64 and endian to little. (sh5*-*-netbsd*, sh64*-*-netbsd*): New targets. * configure: Regenerate. * config/tc-sh64.c (sh64_target_format): Add support for NetBSD environment. ld: * Makefile.am (ALL_EMULATIONS): Add eshelf32_nbsd.o, eshlelf32_nbsd.o, eshelf64_nbsd.o, and eshlelf64_nbsd.o. (eshelf32_nbsd.c, eshelf64_nbsd.c, eshlelf32_nbsd.c) (eshlelf64_nbsd.c): New rules. * Makefile.in: Regenerate. * configure.tgt (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * emulparams/shelf32_nbsd.sh: New file. * emulparams/shelf64_nbsd.sh: New file. * emulparams/shlelf32_nbsd.sh: New file. * emulparams/shlelf64_nbsd.sh: New file. opcodes: * configure.in: Add "sh5*-*" to list of targets which include sh64 support. * configure: Regenerate.
2002-06-04 02:57:44 +00:00
;;
sh64le-*-netbsd*)
targ_defvec=bfd_elf64_sh64lnbsd_vec
targ_selvecs="bfd_elf64_sh64nbsd_vec bfd_elf32_sh64lnbsd_vec bfd_elf32_sh64nbsd_vec bfd_elf32_shnbsd_vec bfd_elf32_shlnbsd_vec"
want64=true
bfd: * Makefile.am (BFD32_BACKENDS): Add elf32-sh64-nbsd.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64-nbsd.c. (BFD64_BACKENDS): Add elf64-sh64-nbsd.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64-nbsd.c. (elf32-sh64-nbsd.lo, elf64-sh64-nbsd.lo): New rules. * Makefile.in: Regenerate. * config.bfd (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * configure.in: Add bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. * configure: Regenerate. * elf32-sh64-nbsd.c: New file. * elf64-sh64-nbsd.c: New file. * targets.c: Add extern decls for bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. gas: * configure.in (sh5*): Set cpu_type to sh64 and endian to big. (sh5le*, sh64le*): Set cpu_type to sh64 and endian to little. (sh5*-*-netbsd*, sh64*-*-netbsd*): New targets. * configure: Regenerate. * config/tc-sh64.c (sh64_target_format): Add support for NetBSD environment. ld: * Makefile.am (ALL_EMULATIONS): Add eshelf32_nbsd.o, eshlelf32_nbsd.o, eshelf64_nbsd.o, and eshlelf64_nbsd.o. (eshelf32_nbsd.c, eshelf64_nbsd.c, eshlelf32_nbsd.c) (eshlelf64_nbsd.c): New rules. * Makefile.in: Regenerate. * configure.tgt (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * emulparams/shelf32_nbsd.sh: New file. * emulparams/shelf64_nbsd.sh: New file. * emulparams/shlelf32_nbsd.sh: New file. * emulparams/shlelf64_nbsd.sh: New file. opcodes: * configure.in: Add "sh5*-*" to list of targets which include sh64 support. * configure: Regenerate.
2002-06-04 02:57:44 +00:00
;;
sh64-*-netbsd*)
targ_defvec=bfd_elf64_sh64nbsd_vec
targ_selvecs="bfd_elf64_sh64lnbsd_vec bfd_elf32_sh64lnbsd_vec bfd_elf32_sh64nbsd_vec bfd_elf32_shnbsd_vec bfd_elf32_shlnbsd_vec"
want64=true
bfd: * Makefile.am (BFD32_BACKENDS): Add elf32-sh64-nbsd.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64-nbsd.c. (BFD64_BACKENDS): Add elf64-sh64-nbsd.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64-nbsd.c. (elf32-sh64-nbsd.lo, elf64-sh64-nbsd.lo): New rules. * Makefile.in: Regenerate. * config.bfd (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * configure.in: Add bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. * configure: Regenerate. * elf32-sh64-nbsd.c: New file. * elf64-sh64-nbsd.c: New file. * targets.c: Add extern decls for bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec, bfd_elf64_sh64nbsd_vec, and bfd_elf64_sh64lnbsd_vec. gas: * configure.in (sh5*): Set cpu_type to sh64 and endian to big. (sh5le*, sh64le*): Set cpu_type to sh64 and endian to little. (sh5*-*-netbsd*, sh64*-*-netbsd*): New targets. * configure: Regenerate. * config/tc-sh64.c (sh64_target_format): Add support for NetBSD environment. ld: * Makefile.am (ALL_EMULATIONS): Add eshelf32_nbsd.o, eshlelf32_nbsd.o, eshelf64_nbsd.o, and eshlelf64_nbsd.o. (eshelf32_nbsd.c, eshelf64_nbsd.c, eshlelf32_nbsd.c) (eshlelf64_nbsd.c): New rules. * Makefile.in: Regenerate. * configure.tgt (sh5le-*-netbsd*, sh5-*-netbsd*, sh64le-*-netbsd*) (sh64-*-netbsd*): New targets. * emulparams/shelf32_nbsd.sh: New file. * emulparams/shelf64_nbsd.sh: New file. * emulparams/shlelf32_nbsd.sh: New file. * emulparams/shlelf64_nbsd.sh: New file. opcodes: * configure.in: Add "sh5*-*" to list of targets which include sh64 support. * configure: Regenerate.
2002-06-04 02:57:44 +00:00
;;
sh*l*-*-netbsdelf*)
targ_defvec=bfd_elf32_shlnbsd_vec
targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec bfd_elf32_sh64lnbsd_vec bfd_elf32_sh64nbsd_vec bfd_elf64_sh64lnbsd_vec bfd_elf64_sh64nbsd_vec"
want64=true
;;
sh-*-netbsdelf*)
targ_defvec=bfd_elf32_shnbsd_vec
targ_selvecs="bfd_elf32_shlnbsd_vec shcoff_vec shlcoff_vec bfd_elf32_sh64lnbsd_vec bfd_elf32_sh64nbsd_vec bfd_elf64_sh64lnbsd_vec bfd_elf64_sh64nbsd_vec"
want64=true
;;
#endif
sh*-*-netbsdelf*)
targ_defvec=bfd_elf32_shnbsd_vec
targ_selvecs="bfd_elf32_shlnbsd_vec shcoff_vec shlcoff_vec"
;;
sh*-*-symbianelf*)
2004-07-06 16:58:43 +00:00
targ_defvec=bfd_elf32_shl_symbian_vec
targ_selvecs="shlcoff_vec shlcoff_small_vec"
targ_underscore=yes
;;
#ifdef BFD64
shl*-*-elf* | sh[1234]l*-*-elf* | sh3el*-*-elf* | shl*-*-kaos*)
targ_defvec=bfd_elf32_shl_vec
targ_selvecs="bfd_elf32_sh_vec shlcoff_vec shcoff_vec shlcoff_small_vec shcoff_small_vec bfd_elf32_sh64_vec bfd_elf32_sh64l_vec bfd_elf64_sh64_vec bfd_elf64_sh64l_vec"
targ_underscore=yes
want64=true
;;
#endif
sh-*-rtemscoff*)
targ_defvec=shcoff_vec
targ_selvecs="shcoff_vec shlcoff_vec shcoff_small_vec shlcoff_small_vec"
targ_underscore=yes
;;
#ifdef BFD64
sh-*-elf* | sh[1234]*-elf* | sh-*-rtems* | sh-*-kaos*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_sh_vec
targ_selvecs="bfd_elf32_shl_vec shcoff_vec shlcoff_vec shcoff_small_vec shlcoff_small_vec bfd_elf32_sh64_vec bfd_elf32_sh64l_vec bfd_elf64_sh64_vec bfd_elf64_sh64l_vec"
1999-05-03 07:29:11 +00:00
targ_underscore=yes
want64=true
1999-05-03 07:29:11 +00:00
;;
#endif
2002-08-22 17:27:20 +00:00
sh-*-nto*)
targ_defvec=bfd_elf32_sh_vec
targ_selvecs="bfd_elf32_shl_vec shcoff_vec shlcoff_vec shcoff_small_vec shlcoff_small_vec"
2002-08-22 17:27:20 +00:00
targ_underscore=yes
;;
sh*-*-openbsd*)
targ_defvec=bfd_elf32_shlnbsd_vec
targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"
;;
2000-02-28 18:56:11 +00:00
sh-*-pe)
targ_defvec=shlpe_vec
targ_selvecs="shlpe_vec shlpei_vec"
targ_underscore=yes
;;
sh-*-vxworks)
bfd/ 2006-08-02 Richard Sandiford <richard@codesourcery.com> Kazu Hirata <kazu@codesourcery.com> Phil Edwards <phil@codesourcery.com> Nathan Sidwell <nathan@codesourcery.com> * config.bfd (sh-*-vxworks): Use bfd_elf32_shvxworks_vec and bfd_elf32_shlvxworks_vec. * configure.in (bfd_elf32_sh64_vec): Add elf-vxworks.lo. (bfd_elf32_sh64l_vec, bfd_elf32_sh64lin_vec): Likewise. (bfd_elf32_sh64blin_vec, bfd_elf32_sh64lnbsd_vec): Likewise. (bfd_elf32_sh64nbsd_vec, bfd_elf32_sh_vec): Likewise. (bfd_elf32_shblin_vec, bfd_elf32_shl_vec): Likewise. (bfd_elf32_shl_symbian_vec, bfd_elf32_shlin_vec): Likewise. (bfd_elf32_shlnbsd_vec, bfd_elf32_shnbsd_vec): Likewise. (bfd_elf32_shlvxworks_vec, bfd_elf32_shvxworks_vec): New stanzas. * configure: Regenerate. * Makefile.am: Regenerate dependencies. * Makefile.in: Regenerate. * elf-vxworks.c (elf_vxworks_gott_symbol_p): New function. (elf_vxworks_add_symbol_hook): Use it. (elf_vxworks_link_output_symbol_hook): Likewise. Use the hash table entry to check for weak undefined symbols and to obtain the original bfd. (elf_vxworks_emit_relocs): Use target_index instead of this_idx. * elf32-sh-relocs.h: New file, split from elf32-sh.c. (R_SH_DIR32): Use SH_PARTIAL32 for the partial_inplace field, SH_SRC_MASK32 for the src_mask field, and SH_ELF_RELOC for the special_function field. (R_SH_REL32): Use SH_PARTIAL32 and SH_SRC_MASK32 here too. (R_SH_REL32, R_SH_TLS_GD_32, R_SH_TLS_LD_32): Likewise. (R_SH_TLS_LDO_32, R_SH_TLS_IE_32, R_SH_TLS_LE_32): Likewise. (R_SH_TLS_DTPMOD32, R_SH_TLS_DTPOFF32, R_SH_TLS_TPOFF32): Likewise. (R_SH_GOT32, R_SH_PLT32, R_SH_COPY, R_SH_GLOB_DAT): Likewise. (R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): Likewise. (SH_PARTIAL32, SH_SRC_MASK32, SH_ELF_RELOC): Undefine at end of file. * elf32-sh.c: Include elf32-vxworks.h. (MINUS_ONE): Define. (sh_elf_howto_table): Include elf32-sh-relocs.h with SH_PARTIAL32 set to TRUE, SH_SRC_MASK32 set to 0xffffffff, and SH_ELF_RELOC set to sh_elf_reloc. (sh_vxworks_howto_table): New variable. Include elf32-sh-relocs.h with SH_PARTIAL32 set to FALSE, SH_SRC_MASK32 set to 0, and SH_ELF_RELOC set to bfd_elf_generic_reloc. (vxworks_object_p, get_howto_table): New functions. (sh_elf_reloc_type_lookup): Fix typo. Use get_howto_table. (sh_elf_info_to_howto): Use get_howto_table. (sh_elf_relax_section): Honor the partial_inplace field of the R_SH_DIR32 howto. (sh_elf_relax_delete_bytes): Likewise. (elf_sh_plt_info): New structure. (PLT_ENTRY_SIZE): Replace both definitions with... (ELF_PLT_ENTRY_SIZE): ...this new macro, with separate definitions for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA. (elf_sh_plt0_entry_be): Update sizes of both definitions accordingly. (elf_sh_plt0_entry_le): Likewise. (elf_sh_plt_entry_be, elf_sh_plt_entry_le): Likewise. (elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le): Likewise. (elf_sh_plts): New structure, with separate definitions for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA. (elf_sh_plt0_entry): Delete both definitions. (elf_sh_plt_entry, elf_sh_pic_plt_entry): Likewise. (elf_sh_sizeof_plt, elf_sh_plt_plt0_offset): Likewise. (elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset): Likewise. (elf_sh_plt_reloc_offset): Likewise. (movi_shori_putval): Delete in favor of... (install_plt_field): ...this new function, with separate definitions for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA. (get_plt_info): New function, with separate definitions for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA. (elf_sh_plt0_linker_offset, elf_sh_plt0_gotid_offset): Delete. (VXWORKS_PLT_HEADER_SIZE, VXWORKS_PLT_ENTRY_SIZE): New macros. (vxworks_sh_plt0_entry_be, vxworks_sh_plt0_entry_le): New constants. (vxworks_sh_plt_entry_be, vxworks_sh_plt_entry_le): Likewise. (vxworks_sh_pic_plt_entry_be, vxworks_sh_pic_plt_entry_le): Likewise. (get_plt_index, get_plt_offset): New functions. (elf_sh_link_hash_table): Add srelplt2, plt_info and vxworks_p fields. (sh_elf_link_hash_table_create): Initialize them. (sh_elf_create_dynamic_sections): Call elf_vxworks_create_dynamic_sections for VxWorks. (allocate_dynrelocs): Use htab->plt_info to get the size of PLT entries. Allocate relocation entries in .rela.plt.unloaded if generating a VxWorks executable. (sh_elf_always_size_sections): New function. (sh_elf_size_dynamic_sections): Extend .rela.plt handling to .rela.plt.unloaded. (sh_elf_relocate_section): Use get_howto_table. Honor partial_inplace when calculating the addend for dynamic relocations. Use get_plt_index. (sh_elf_finish_dynamic_symbol): Use get_plt_index, install_plt_field and htab->plt_info. Fill in the bra .plt offset for VxWorks executables. Populate .rela.plt.unloaded. Do not make _GLOBAL_OFFSET_TABLE_ absolute on VxWorks. (sh_elf_finish_dynamic_sections): Use install_plt_field and htab->plt_info. Handle cases where there is no special PLT header. Populate the first relocation in .rela.plt.unloaded and fix up the remaining entries. (sh_elf_plt_sym_val): Use get_plt_info. (elf_backend_always_size_sections): Define. (TARGET_BIG_SYM, TARGET_BIG_NAME): Override for VxWorks. (TARGET_LITTLE_SYM, TARGET_BIG_SYM): Likewise. (elf32_bed, elf_backend_want_plt_sym): Likewise. (elf_symbol_leading_char, elf_backend_want_got_underscore): Likewise. (elf_backend_grok_prstatus, elf_backend_grok_psinfo): Likewise. (elf_backend_add_symbol_hook): Likewise. (elf_backend_link_output_symbol_hook): Likewise. (elf_backend_emit_relocs): Likewise. (elf_backend_final_write_processing): Likewise. (ELF_MAXPAGESIZE, ELF_COMMONPAGESIZE): Likewise. * targets.c (bfd_elf32_shlvxworks_vec): Declare. (bfd_elf32_shvxworks_vec): Likewise. (_bfd_target_vector): Include bfd_elf32_shlvxworks_vec and bfd_elf32_shvxworks_vec. gas/ * config/tc-sh.c (apply_full_field_fix): New function. (md_apply_fix): Use it instead of md_number_to_chars. Do not fill in fx_addnumber for BFD_RELOC_32_PLT_PCREL. (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case. * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS. ld/ 2006-08-02 Richard Sandiford <richard@codesourcery.com> Kazu Hirata <kazu@codesourcery.com> Phil Edwards <phil@codesourcery.com> * Makefile.am (ALL_EMULATIONS): Add eshelf_vxworks.o and eshlelf_vxworks.o. (eshelf_vxworks.c, eshlelf_vxworks.c): New rules. * Makefile.in: Regenerate. * configure.tgt (sh-*-vxworks): Use shelf_vxworks and shlelf_vxworks. * emulparams/shelf_vxworks.sh: New file. * emulparams/shlelf_vxworks.sh: Likewise. * emulparams/vxworks.sh (FINI): Prefix _etext with ${SYMPREFIX}. (OTHER_END_SYMBOLS): Likewise _ehdr. (DATA_END_SYMBOLS): Likewise _edata. * emultempl/vxworks.em (vxworks_after_open): Check whether output_bfd is indeed an ELF file before dealing with --force-dynamic. ld/testsuite/ * ld-sh/rd-sh.exp: Treat vxworks1-static.d specially. * ld-sh/sh-vxworks.exp: New file. * ld-sh/sh.exp: Extend sh-linux SIZEOF_HEADERS handling to sh-*-vxworks. * ld-sh/vxworks1-le.dd, ld-sh/vxworks1-lib-le.dd, * ld-sh/vxworks1-lib.dd, ld-sh/vxworks1-lib.nd, * ld-sh/vxworks1-lib.rd, ld-sh/vxworks1-lib.s, * ld-sh/vxworks1-static.d, ld-sh/vxworks1.dd, * ld-sh/vxworks1.ld, ld-sh/vxworks1.rd, ld-sh/vxworks1.s, * ld-sh/vxworks2-static.sd, ld-sh/vxworks2.s, * ld-sh/vxworks2.sd, ld-sh/vxworks3-le.dd, * ld-sh/vxworks3-lib-le.dd, ld-sh/vxworks3-lib.dd, * ld-sh/vxworks3-lib.s, ld-sh/vxworks3.dd, ld-sh/vxworks3.s, * ld-sh/vxworks4.d, ld-sh/vxworks4a.s, ld-sh/vxworks4b.s, * ld-sh/reloc1.s, ld-sh/reloc1.d: New tests.
2006-08-04 13:13:56 +00:00
targ_defvec=bfd_elf32_shvxworks_vec
targ_selvecs="bfd_elf32_shlvxworks_vec"
# FIXME None of the following are actually used on this target, but
# they're necessary for coff-sh.c (which is unconditionally used) to be
# compiled correctly.
targ_selvecs="$targ_selvecs shcoff_vec shlcoff_vec shcoff_small_vec shlcoff_small_vec"
targ_underscore=yes
;;
sh-*-*)
1999-05-03 07:29:11 +00:00
targ_defvec=shcoff_vec
targ_selvecs="shcoff_vec shlcoff_vec shcoff_small_vec shlcoff_small_vec"
targ_underscore=yes
;;
sparclet-*-aout*)
targ_defvec=sunos_big_vec
targ_selvecs=sparcle_aout_vec
targ_underscore=yes
;;
sparc86x-*-aout*)
targ_defvec=sunos_big_vec
targ_underscore=yes
;;
sparclite-*-elf* | sparc86x-*-elf*)
targ_defvec=bfd_elf32_sparc_vec
;;
sparc*-*-chorus*)
targ_defvec=bfd_elf32_sparc_vec
;;
1999-05-03 07:29:11 +00:00
sparc-*-linux*aout*)
targ_defvec=sparclinux_vec
targ_selvecs="bfd_elf32_sparc_vec sunos_big_vec"
targ_underscore=yes
;;
sparc-*-linux-* | sparcv*-*-linux-*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_sparc_vec
targ_selvecs="sparclinux_vec bfd_elf64_sparc_vec sunos_big_vec"
1999-05-03 07:29:11 +00:00
;;
sparc-*-netbsdelf*)
targ_defvec=bfd_elf32_sparc_vec
targ_selvecs=sparcnetbsd_vec
;;
sparc-*-netbsdaout* | sparc-*-netbsd*)
targ_defvec=sparcnetbsd_vec
targ_selvecs=bfd_elf32_sparc_vec
targ_underscore=yes
;;
sparc-*-openbsd[0-2].* | sparc-*-openbsd3.[0-1])
1999-05-03 07:29:11 +00:00
targ_defvec=sparcnetbsd_vec
targ_underscore=yes
;;
sparc-*-openbsd*)
targ_defvec=bfd_elf32_sparc_vec
targ_selvecs=sparcnetbsd_vec
;;
sparc-*-elf*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_sparc_vec
targ_selvecs=sunos_big_vec
;;
sparc-*-solaris2.[0-6] | sparc-*-solaris2.[0-6].*)
targ_defvec=bfd_elf32_sparc_sol2_vec
targ_selvecs=sunos_big_vec
;;
#ifdef BFD64
sparc-*-solaris2* | sparcv9-*-solaris2* | sparc64-*-solaris2*)
targ_defvec=bfd_elf32_sparc_sol2_vec
targ_selvecs="bfd_elf64_sparc_sol2_vec sunos_big_vec"
want64=true
;;
#endif
1999-05-03 07:29:11 +00:00
sparc-*-sysv4*)
targ_defvec=bfd_elf32_sparc_vec
;;
bfd/ * config.bfd (sparc-*-vxworks*): New stanza. * configure.in (bfd_elf32_sparc_vxworks_vec): New stanza. (bfd_elf32_sparc_vec, bfd_elf64_sparc_vec): Add elf-vxworks.lo. * configure: Regenerate. * elf32-sparc.c: Include elf-vxworks.h. (elf32_sparc_vxworks_link_hash_table_create: New. (elf32_sparc_vxworks_final_write_processing): New. (TARGET_BIG_SYM): Override for VxWorks. (TARGET_BIG_NAME, ELF_MINPAGESIZE): Likewise. (bfd_elf32_bfd_link_hash_table_create): Likewise. (elf_backend_want_got_plt, elf_backend_plt_readonly): Likewise. (elf_backend_got_header_size, elf_backend_add_symbol_hook): Likewise. (elf_backend_link_output_symbol_hook): Likewise. (elf_backend_emit_relocs): Likewise. (elf_backend_final_write_processing, elf32_bed): Likewise. * elfxx-sparc.c: Include libiberty.h and elf-vxworks.h. (sparc_vxworks_exec_plt0_entry, sparc_vxworks_exec_plt_entry): New. (sparc_vxworks_shared_plt0_entry, sparc_vxworks_shared_plt_entry): New. (_bfd_sparc_elf_link_hash_table_create): Don't initialize build_plt_entry here. (create_got_section): Initialize sgotplt for VxWorks. (_bfd_sparc_elf_create_dynamic_sections): Initialize build_plt_entry, plt_header_size and plt_entry_size, with new VxWorks-specific settings. Call elf_vxworks_create_dynamic_sections for VxWorks. (allocate_dynrelocs): Use plt_header_size and plt_entry_size. Allocate room for .got.plt and .rela.plt.unloaded entries on VxWorks. (_bfd_sparc_elf_size_dynamic_sections): Don't allocate a nop in .plt for VxWorks. Check for the .got.plt section. (sparc_vxworks_build_plt_entry): New function. (_bfd_sparc_elf_finish_dynamic_symbol): Add handling of VxWorks PLTs. Don't make _GLOBAL_OFFSET_TABLE_ and _PROCEDURE_LINKAGE_TABLE_ absolute on VxWorks. (sparc32_finish_dyn): Add special handling for DT_RELASZ and DT_PLTGOT on VxWorks. (sparc_vxworks_finish_exec_plt): New. (sparc_vxworks_finish_shared_plt): New. (_bfd_sparc_elf_finish_dynamic_sections): Call them. Use plt_header_size and plt_entry_size. * elfxx-sparc.h (_bfd_sparc_elf_link_hash_table): Add is_vxworks, srelplt2, sgotplt, plt_header_size and plt_entry_size fields. * Makefile.am (elfxx-sparc.lo): Depend on elf-vxworks.h. (elf32-sparc.lo): Likewise. * Makefile.in: Regenerate. * targets.c (bfd_elf32_sparc_vxworks_vec): Declare. (_bfd_target_vector): Add a pointer to it. gas/ * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS. (GOTT_BASE, GOTT_INDEX): New. (tc_gen_reloc): Don't alter relocations against GOTT_BASE and GOTT_INDEX when generating VxWorks PIC. * configure.tgt (sparc*-*-vxworks*): Remove this special case; use the generic *-*-vxworks* stanza instead. gas/testsuite/ * gas/sparc/vxworks-pic.s, gas/sparc/vxworks-pic.d: New test. * gas/sparc/sparc.exp: Run it. Remove sparc*-*-vxworks* XFAILs. ld/ * configure.tgt (sparc*-*-vxworks*): New stanza. * emulparams/elf32_sparc_vxworks.sh: New file. * Makefile.am (ALL_EMULATIONS): Add eelf32_sparc_vxworks.o. (eelf32_sparc_vxworks.c): New rule. * Makefile.in: Regenerate. ld/testsuite/ * ld-sparc/vxworks1.dd, ld-sparc/vxworks1.ld, ld-sparc/vxworks1-lib.dd, * ld-sparc/vxworks1-lib.nd, ld-sparc/vxworks1-lib.rd, * ld-sparc/vxworks1-lib.s, ld-sparc/vxworks1.rd, ld-sparc/vxworks1.s, * ld-sparc/vxworks1-static.d, ld-sparc/vxworks2.s, * ld-sparc/vxworks2.sd, ld-sparc/vxworks2-static.sd: New tests. * ld-sparc/sparc.exp: Run them.
2006-04-05 12:41:59 +00:00
sparc-*-vxworks*)
targ_defvec=bfd_elf32_sparc_vxworks_vec
targ_selvecs="bfd_elf32_sparc_vec sunos_big_vec"
;;
1999-05-03 07:29:11 +00:00
sparc-*-netware*)
targ_defvec=bfd_elf32_sparc_vec
targ_selvecs="nlm32_sparc_vec sunos_big_vec"
;;
#ifdef BFD64
sparc64-*-aout*)
targ_defvec=sunos_big_vec
targ_underscore=yes
want64=true
1999-05-03 07:29:11 +00:00
;;
sparc64*-*-linux-*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf64_sparc_vec
targ_selvecs="bfd_elf32_sparc_vec sparclinux_vec sunos_big_vec"
want64=true
1999-05-03 07:29:11 +00:00
;;
2010-11-30 01:14:08 +00:00
sparc64-*-elf* | sparc64-*-rtems* )
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targ_defvec=bfd_elf64_sparc_vec
targ_selvecs=bfd_elf32_sparc_vec
want64=true
;;
1999-05-03 07:29:11 +00:00
#endif /* BFD64 */
sparc*-*-coff*)
targ_defvec=sparccoff_vec
;;
2010-11-30 01:14:08 +00:00
sparc-*-rtems*)
2000-12-01 18:37:16 +00:00
targ_defvec=bfd_elf32_sparc_vec
targ_selvecs="sunos_big_vec sparccoff_vec"
;;
sparc*-*-*)
1999-05-03 07:29:11 +00:00
targ_defvec=sunos_big_vec
targ_underscore=yes
;;
2006-10-25 06:49:21 +00:00
spu-*-elf)
targ_defvec=bfd_elf32_spu_vec
want64=true
2006-10-25 06:49:21 +00:00
;;
1999-05-03 07:29:11 +00:00
#if HAVE_host_aout_vec
tahoe-*-*)
targ_defvec=host_aout_vec
targ_underscore=yes
;;
#endif
tic6x-*-elf)
targ_defvec=bfd_elf32_tic6x_elf_le_vec
targ_selvecs="bfd_elf32_tic6x_elf_be_vec bfd_elf32_tic6x_le_vec bfd_elf32_tic6x_be_vec"
;;
tic6x-*-uclinux)
targ_defvec=bfd_elf32_tic6x_linux_le_vec
targ_selvecs="bfd_elf32_tic6x_linux_be_vec bfd_elf32_tic6x_le_vec bfd_elf32_tic6x_be_vec"
bfd: * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.
2010-03-25 21:12:36 +00:00
;;
1999-05-03 07:29:11 +00:00
tic80*-*-*)
targ_defvec=tic80coff_vec
targ_underscore=yes
;;
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. (ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c. (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo, and elfxx-tilegx.lo. (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and elfxx-tilegx.c. (BFD64_BACKENDS): Add elf64-tilegx.lo. (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c. * Makefile.in: Regenerate. * arctures.c (bfd_architecture): Define bfd_arch_tilepro, bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx. (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch. (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch. bfd-in2.h: Regenerate. * config.bfd: Handle tilegx-*-* and tilepro-*-*. * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * configure: Regenerate. * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and TILEPRO_ELF_DATA. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1, IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI, IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL, IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL, IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL, IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO, IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI, IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0, MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO, IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI, IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE, IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO, IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA, IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST, HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0, IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2, IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST, IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST, IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL, IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL, IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL, IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL, IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL, IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL, IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT, IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT, IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT, IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT, IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT, IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD, IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD, IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD, IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD, IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD, IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD, IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE, IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE, IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE, IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE, IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE, IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE, IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} * targets.c (bfd_elf32_tilegx_vec): Declare. (bfd_elf32_tilepro_vec): Declare. (bfd_elf64_tilegx_vec): Declare. (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * cpu-tilegx.c: New file. * cpu-tilepro.c: New file. * elf32-tilepro.h: New file. * elf32-tilepro.c: New file. * elf32-tilegx.c: New file. * elf32-tilegx.h: New file. * elf64-tilegx.c: New file. * elf64-tilegx.h: New file. * elfxx-tilegx.c: New file. * elfxx-tilegx.h: New file. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and config/tc-tilepro.c. (TARGET_CPU_HFILES): Add config/tc-tilegx.h and config/tc-tilepro.h. * Makefile.in: Regenerate. * configure.tgt (tilepro-*-*): New. (tilegx-*-*): Likewise. * config/tc-tilegx.c: New file. * config/tc-tilegx.h: Likewise. * config/tc-tilepro.h: Likewise. * config/tc-tilepro.c: Likewise. * doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and c-tilepro.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TILEGX): Define. (TILEPRO): Define. * doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include c-tilegx.texi and c-tilepro.texi. * doc/c-tilegx.texi: New. * doc/c-tilepro.texi: New. * gas/tilepro/t_constants.s: New file. * gas/tilepro/t_constants.d: Likewise. * gas/tilepro/t_insns.s: Likewise. * gas/tilepro/tilepro.exp: Likewise. * gas/tilepro/t_insns.d: Likewise. * gas/tilegx/tilegx.exp: Likewise. * gas/tilegx/t_insns.d: Likewise. * gas/tilegx/t_insns.s: Likewise. * dis-asm.h (print_insn_tilegx): Declare. (print_insn_tilepro): Likewise. * tilegx.h: New file. * tilepro.h: New file. * common.h: Add EM_TILEGX. * tilegx.h: New file. * tilepro.h: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and eelf32tilepro.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c. (eelf32tilegx.c): New target. (eelf32tilepro.c): Likewise. (eelf64tilegx.c): Likewise. * Makefile.in: Regenerate. * configure.tgt: Handle tilegx-*-* and tilepro-*-*. * emulparams/elf32tilegx.sh: New file. * emulparams/elf64tilegx.sh: New file. * emulparams/elf32tilepro.sh: New file. * ld-elf/eh5.d: Don't run on tile*. * ld-srec/srec.exp: xfail on tile*. * ld-tilegx/external.s: New file. * ld-tilegx/reloc.d: New file. * ld-tilegx/reloc.s: New file. * ld-tilegx/tilegx.exp: New file. * ld-tilepro/external.s: New file. * ld-tilepro/reloc.d: New file. * ld-tilepro/reloc.s: New file. * ld-tilepro/tilepro.exp: New file. * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. * Makefile.in: Regenerate. * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. * configure: Regenerate. * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. * po/POTFILES.in: Regenerate. * tilegx-dis.c: New file. * tilegx-opc.c: New file. * tilepro-dis.c: New file. * tilepro-opc.c: New file.
2011-06-13 15:18:54 +00:00
#ifdef BFD64
tilegx-*-*)
Add big-endian support for tilegx. bfd/ * config.bfd (tilegx-*-*): rename little endian vector; add big endian vector. (tilegxbe-*-*): New case. * configure.in (bfd_elf32_tilegx_vec): Rename... (bfd_elf32_tilegx_le_vec): ... to this. (bfd_elf32_tilegx_be_vec): New vector. (bfd_elf64_tilegx_vec): Rename... (bfd_elf64_tilegx_le_vec): ... to this. (bfd_elf64_tilegx_be_vec): New vector. * configure: Regenerate. * elf32-tilegx.c (TARGET_LITTLE_SYM): Rename. (TARGET_LITTLE_NAME): Ditto. (TARGET_BIG_SYM): Define. (TARGET_BIG_NAME): Define. * elf64-tilegx.c (TARGET_LITTLE_SYM): Rename. (TARGET_LITTLE_NAME): Ditto. (TARGET_BIG_SYM): Define. (TARGET_BIG_NAME): Define. * targets.c (bfd_elf32_tilegx_vec): Rename... (bfd_elf32_tilegx_le_vec): ... to this. (bfd_elf32_tilegx_be_vec): Declare. (bfd_elf64_tilegx_vec): Rename... (bfd_elf64_tilegx_le_vec): ... to this. (bfd_elf64_tilegx_be_vec): Declare. (_bfd_target_vector): Add / rename above vectors. binutils/testsuite/ * binutils-all/objdump.exp (cpus_expected): Add tilegx. gas/ * tc-tilegx.c (tilegx_target_format): Handle big endian. (OPTION_EB): Define. (OPTION_EL): Define. (md_longopts): Add entries for "EB" and "EL". (md_parse_option): Handle OPTION_EB and OPTION_EL. (md_show_usage): Add -EB and -EL. (md_number_to_chars): New. * tc-tilegx.h (TARGET_BYTES_BIG_ENDIAN): Guard definition with ifndef. (md_number_to_chars): Delete. * configure.tgt (tilegx*be): Handle. * doc/as.texinfo [TILE-Gx]: Document -EB and -EL. * doc/c-tilegx.texi: Ditto. ld/ * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx_be.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx_be.c. (eelf32tilegx_be.c): Add rule to build this file. (eelf64tilegx_be.c): Ditto. * Makefile.in: Regenerate. * configure.tgt (tilegx-*-*): Support big endian. (tilegxbe-*-*): New. * emulparams/elf32tilegx.sh (OUTPUT_FORMAT): Rename. (BIG_OUTPUT_FORMAT): Define. (LITTLE_OUTPUT_FORMAT): Define. * emulparams/elf32tilegx_be.sh: New. * emulparams/elf64tilegx.sh (OUTPUT_FORMAT): Rename. (BIG_OUTPUT_FORMAT): Define. (LITTLE_OUTPUT_FORMAT): Define. * emulparams/elf64tilegx_be.sh: New. ld/testsuite/ * ld-tilegx/reloc-be.d: New. * ld-tilegx/reloc-le.d: New. * ld-tilegx/reloc.d: Delete. * ld-tilegx/tilegx.exp: Test big and little endian.
2012-02-25 19:51:34 +00:00
targ_defvec=bfd_elf64_tilegx_le_vec
targ_selvecs="bfd_elf64_tilegx_be_vec bfd_elf32_tilegx_be_vec bfd_elf32_tilegx_le_vec"
;;
tilegxbe-*-*)
targ_defvec=bfd_elf64_tilegx_be_vec
targ_selvecs="bfd_elf64_tilegx_le_vec bfd_elf32_tilegx_be_vec bfd_elf32_tilegx_le_vec"
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. (ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c. (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo, and elfxx-tilegx.lo. (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and elfxx-tilegx.c. (BFD64_BACKENDS): Add elf64-tilegx.lo. (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c. * Makefile.in: Regenerate. * arctures.c (bfd_architecture): Define bfd_arch_tilepro, bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx. (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch. (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch. bfd-in2.h: Regenerate. * config.bfd: Handle tilegx-*-* and tilepro-*-*. * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * configure: Regenerate. * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and TILEPRO_ELF_DATA. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1, IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI, IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL, IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL, IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL, IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO, IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI, IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0, MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO, IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI, IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE, IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO, IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA, IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST, HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0, IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2, IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST, IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST, IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL, IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL, IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL, IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL, IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL, IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL, IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT, IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT, IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT, IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT, IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT, IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD, IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD, IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD, IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD, IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD, IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD, IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE, IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE, IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE, IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE, IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE, IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE, IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} * targets.c (bfd_elf32_tilegx_vec): Declare. (bfd_elf32_tilepro_vec): Declare. (bfd_elf64_tilegx_vec): Declare. (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * cpu-tilegx.c: New file. * cpu-tilepro.c: New file. * elf32-tilepro.h: New file. * elf32-tilepro.c: New file. * elf32-tilegx.c: New file. * elf32-tilegx.h: New file. * elf64-tilegx.c: New file. * elf64-tilegx.h: New file. * elfxx-tilegx.c: New file. * elfxx-tilegx.h: New file. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and config/tc-tilepro.c. (TARGET_CPU_HFILES): Add config/tc-tilegx.h and config/tc-tilepro.h. * Makefile.in: Regenerate. * configure.tgt (tilepro-*-*): New. (tilegx-*-*): Likewise. * config/tc-tilegx.c: New file. * config/tc-tilegx.h: Likewise. * config/tc-tilepro.h: Likewise. * config/tc-tilepro.c: Likewise. * doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and c-tilepro.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TILEGX): Define. (TILEPRO): Define. * doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include c-tilegx.texi and c-tilepro.texi. * doc/c-tilegx.texi: New. * doc/c-tilepro.texi: New. * gas/tilepro/t_constants.s: New file. * gas/tilepro/t_constants.d: Likewise. * gas/tilepro/t_insns.s: Likewise. * gas/tilepro/tilepro.exp: Likewise. * gas/tilepro/t_insns.d: Likewise. * gas/tilegx/tilegx.exp: Likewise. * gas/tilegx/t_insns.d: Likewise. * gas/tilegx/t_insns.s: Likewise. * dis-asm.h (print_insn_tilegx): Declare. (print_insn_tilepro): Likewise. * tilegx.h: New file. * tilepro.h: New file. * common.h: Add EM_TILEGX. * tilegx.h: New file. * tilepro.h: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and eelf32tilepro.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c. (eelf32tilegx.c): New target. (eelf32tilepro.c): Likewise. (eelf64tilegx.c): Likewise. * Makefile.in: Regenerate. * configure.tgt: Handle tilegx-*-* and tilepro-*-*. * emulparams/elf32tilegx.sh: New file. * emulparams/elf64tilegx.sh: New file. * emulparams/elf32tilepro.sh: New file. * ld-elf/eh5.d: Don't run on tile*. * ld-srec/srec.exp: xfail on tile*. * ld-tilegx/external.s: New file. * ld-tilegx/reloc.d: New file. * ld-tilegx/reloc.s: New file. * ld-tilegx/tilegx.exp: New file. * ld-tilepro/external.s: New file. * ld-tilepro/reloc.d: New file. * ld-tilepro/reloc.s: New file. * ld-tilepro/tilepro.exp: New file. * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. * Makefile.in: Regenerate. * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. * configure: Regenerate. * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. * po/POTFILES.in: Regenerate. * tilegx-dis.c: New file. * tilegx-opc.c: New file. * tilepro-dis.c: New file. * tilepro-opc.c: New file.
2011-06-13 15:18:54 +00:00
;;
#endif
tilepro-*-*)
targ_defvec=bfd_elf32_tilepro_vec
;;
2010-07-23 14:52:54 +00:00
v850*-*-*)
1999-05-03 07:29:11 +00:00
targ_defvec=bfd_elf32_v850_vec
2012-11-09 Nick Clifton <nickc@redhat.com> * Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo. (ALL_MACHINES_CFILES): Add cpu-v850-rh850.c. * archures.c (bfd_arch_info): Add bfd_v850_rh850_arch. * config.bfd: Likewise. * configure.in: Add bfd_elf32_v850_rh850_vec. * cpu-v850.c: Update printed description. * cpu-v850_rh850.c: New file. * elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI relocs. (v850_elf_perform_relocation): Likewise. (v850_elf_final_link_relocate): Likewise. (v850_elf_relocate_section): Likewise. (v850_elf_relax_section): Likewise. (v800_elf_howto_table): New. (v850_elf_object_p): Add support for RH850 ABI values. (v850_elf_final_write_processing): Likewise. (v850_elf_merge_private_bfd_data): Likewise. (v850_elf_print_private_bfd_data): Likewise. (v800_elf_reloc_map): New. (v800_elf_reloc_type_lookup): New. (v800_elf_reloc_name_lookup): New. (v800_elf_info_to_howto): New. (bfd_elf32_v850_rh850_vec): New. (bfd_arch_v850_rh850): New. * targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI. (guess_is_rela): Add EM_V800. (dump_relocations): Likewise. (get_machine_name): Update EM_V800. (get_machine_flags): Add support for RH850 ABI flags. (is_32bit_abs_reloc): Add support for RH850 ABI reloc. * config/tc-v850.c (v850_target_arch): New. (v850_target_format): New. (set_machine): Use v850_target_arch. (md_begin): Likewise. (md_show_usage): Document new switches. (md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and -m4byte-align. * config/tc-v850.c (TARGET_ARCH) Use v850_target_arch. (TARGET_FORMAT): Use v850_target_format. * doc/c-v850.texi: Document new options. * v850.h: Add RH850 ABI values. * Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c. * Makefile.in: Regenerate. * configure.tgt (v850*-*-*): Make v850_rh850 the default emulation. Add vanilla v850 as an extra emulation. * emulparams/v850_rh850.sh: New file. * scripttempl/v850_rh850.sc: New file. * configure.in: Add bfd_v850_rh850_arch. * configure: Regenerate. * disassemble.c (disassembler): Likewise.
2012-11-09 17:36:19 +00:00
targ_selvecs="bfd_elf32_v850_rh850_vec"
1999-05-03 07:29:11 +00:00
;;
vax-*-netbsdelf*)
targ_defvec=bfd_elf32_vax_vec
targ_selvecs="vaxnetbsd_vec vax1knetbsd_vec"
;;
vax-*-netbsdaout* | vax-*-netbsd*)
targ_defvec=vaxnetbsd_vec
targ_selvecs="bfd_elf32_vax_vec vax1knetbsd_vec"
targ_underscore=yes
;;
vax-*-bsd* | vax-*-ultrix*)
targ_defvec=vaxbsd_vec
targ_underscore=yes
;;
vax-*-openbsd*)
targ_defvec=vaxnetbsd_vec
targ_underscore=yes
;;
vax-*-linux-*)
2003-12-03 15:07:17 +00:00
targ_defvec=bfd_elf32_vax_vec
;;
1999-05-03 07:29:11 +00:00
we32k-*-*)
targ_defvec=we32kcoff_vec
;;
w65-*-*)
targ_defvec=w65_vec
;;
xgate-*-*)
targ_defvec=bfd_elf32_xgate_vec
targ_selvecs="bfd_elf32_xgate_vec"
;;
Index: bfd/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> Corinna Vinschen <vinschen@redhat.com> * Makefile.am: Add support for xstormy16. * archures.c: Add support for xstormy16. * config.bfd: Add support for xstormy16. * configure.in: Add support for xstormy16. * reloc.c: Add support for xstormy16. * targets.c: Add support for xstormy16. * cpu-xstormy16.c: New file. * elf32-xstormy16.c: New file. * Makefile.in: Regenerated. * bfd-in2.h: Regenerated. * configure: Regenerated. * libbfd.h: Regenerated. Index: binutils/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * readelf.c (guess_is_rela): Add support for stormy16. (dump_relocations): Likewise. (get_machine_name): Likewise. Index: gas/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * configure.in: Add support for xstormy16. * configure: Regenerated. * Makefile.am: Add support for xstormy16. * Makefile.in: Regenerated. * config/tc-xstormy16.c: New file. * config/tc-xstormy16.h: New file. Index: gas/testsuite/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> matthew green <mrg@redhat.com> * gas/xstormy16/allinsn.d: New file. * gas/xstormy16/allinsn.exp: New file. * gas/xstormy16/allinsn.s: New file. * gas/xstormy16/allinsn.sh: New file. * gas/xstormy16/gcc.d: New file. * gas/xstormy16/gcc.s: New file. * gas/xstormy16/gcc.sh: New file. * gas/xstormy16/reloc-1.d: New file. * gas/xstormy16/reloc-1.s: New file. * gas/xstormy16/reloc-2.d: New file. * gas/xstormy16/reloc-2.s: New file. Index: ld/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * Makefile.am: Add support for xstormy16. * configure.tgt: Add support for xstormy16. * Makefile.in: Regenerate. * emulparams/elf32xstormy16.sh: New file. * scripttempl/xstormy16.sc: New file. Index: opcodes/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * Makefile.am: Add support for xstormy16. * Makefile.in: Regenerate. * configure.in: Add support for xstormy16. * configure: Regenerate. * disassemble.c: Add support for xstormy16. * xstormy16-asm.c: New generated file. * xstormy16-desc.c: New generated file. * xstormy16-desc.h: New generated file. * xstormy16-dis.c: New generated file. * xstormy16-ibld.c: New generated file. * xstormy16-opc.c: New generated file. * xstormy16-opc.h: New generated file. Index: include/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * dis-asm.h (print_insn_xstormy16): Declare. Index: include/elf/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * common.h (EM_XSTORMY16): Define. * xstormy16.h: New file.
2001-12-08 03:46:03 +00:00
xstormy16-*-elf)
targ_defvec=bfd_elf32_xstormy16_vec
;;
xtensa*-*-*)
2003-04-01 15:50:31 +00:00
targ_defvec=bfd_elf32_xtensa_le_vec
targ_selvecs=bfd_elf32_xtensa_be_vec
;;
2006-02-17 14:36:28 +00:00
xc16x-*-elf)
targ_defvec=bfd_elf32_xc16x_vec
;;
z80-*-*)
targ_defvec=z80coff_vec
targ_underscore=no
;;
1999-05-03 07:29:11 +00:00
z8k*-*-*)
targ_defvec=z8kcoff_vec
targ_underscore=yes
;;
*-*-ieee*)
targ_defvec=ieee_vec
;;
*-adobe-*)
targ_defvec=a_out_adobe_vec
targ_underscore=yes
;;
*-sony-*)
targ_defvec=newsos3_vec
targ_underscore=yes
;;
*-tandem-*)
targ_defvec=m68kcoff_vec
targ_selvecs=ieee_vec
;;
# END OF targmatch.h
*)
echo 1>&2 "*** BFD does not support target ${targ}."
echo 1>&2 "*** Look in bfd/config.bfd for supported targets."
exit 1
;;
esac
case "${host64}${want64}" in
*true*)
targ_selvecs="${targ_selvecs} ${targ64_selvecs}"
;;
esac
1999-05-03 07:29:11 +00:00
# If we support any ELF target, then automatically add support for the
# generic ELF targets. This permits an objdump with some ELF support
# to be used on an arbitrary ELF file for anything other than
# relocation information.
case "${targ_defvec} ${targ_selvecs}" in
*bfd_elf64* | *bfd_elf32_n*mips*)
1999-05-03 07:29:11 +00:00
targ_selvecs="${targ_selvecs} bfd_elf64_little_generic_vec bfd_elf64_big_generic_vec bfd_elf32_little_generic_vec bfd_elf32_big_generic_vec"
;;
*bfd_elf32*)
targ_selvecs="${targ_selvecs} bfd_elf32_little_generic_vec bfd_elf32_big_generic_vec"
;;
esac
bfd/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * archures.c (bfd_architecture): Add bfd_arch_l1om. (bfd_l1om_arch): New. (bfd_archures_list): Add &bfd_l1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_l1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_l1om_vec and bfd_elf64_l1om_freebsd_vec. * configure: Regenerated. * cpu-l1om.c: New. * elf64-x86-64.c (elf64_l1om_elf_object_p): New. (bfd_elf64_l1om_vec): Likewise. (bfd_elf64_l1om_freebsd_vec): Likewise. * Makefile.am (ALL_MACHINES): Add cpu-l1om.lo. (ALL_MACHINES_CFILES): Add cpu-l1om.c. * Makefile.in: Regenerated. * targets.c (bfd_elf64_l1om_vec): New. (bfd_elf64_l1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_l1om_vec and bfd_elf64_l1om_freebsd_vec. binutils/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * readelf.c (guess_is_rela): Handle EM_L1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. gas/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add l1om. (check_cpu_arch_compatible): New. (set_cpu_arch): Use it. (i386_arch): New. (i386_mach): Return bfd_mach_l1om for Intel L1OM. (md_show_usage): Display l1om. (i386_target_format): Return ELF_TARGET_L1OM_FORMAT if cpu_arch_isa_flags.bitfield.cpul1om is set. * config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()). (i386_arch): New. (ELF_TARGET_L1OM_FORMAT): Likewise. * doc/c-i386.texi: Document l1om. gas/testsuite/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/l1om.d: New. * gas/i386/l1om-inval.l: Likewise. * gas/i386/l1om-inval.s: Likewise. * gas/i386/i386.exp: Run l1om-inval and l1om. include/elf/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_L1OM): New. ld/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64 is supported. Add elf_l1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and eelf_l1om_fbsd.o (eelf_l1om.c): New. (eelf_l1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * emulparams/elf_l1om.sh: New. * emulparams/elf_l1om_fbsd.sh: Likewise. ld/testsuite/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-l1om.d: New. * ld-x86-64/protected2-l1om.d: Likewise. * ld-x86-64/protected3-l1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and protected3-l1om. opcodes/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_l1om_arch. * disassemble.c (disassembler): Likewise. * configure: Regenerated. * i386-dis.c (print_insn): Handle bfd_mach_l1om and bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM. Add CPU_L1OM_FLAGS. (cpu_flags): Add CpuL1OM. (set_bitfield): Take an argument to set the value field. (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY). (process_i386_opcode_modifier): Updated. (process_i386_operand_type): Likewise. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. * i386-opc.h (CpuL1OM): New. (CpuXsave): Updated. (i386_cpu_flags): Add cpul1om.
2009-07-25 14:58:58 +00:00
# If we support Intel L1OM target, then add support for bfd_l1om_arch.
case "${targ_defvec} ${targ_selvecs}" in
*bfd_elf64_l1om_vec*)
targ_archs="$targ_archs bfd_l1om_arch"
;;
esac
Add initial Intel K1OM support. bfd/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_MACHINES): Add cpu-k1om.lo. (ALL_MACHINES_CFILES): Add cpu-k1om.c. * Makefile.in: Regenerated. * archures.c (bfd_architecture): Add bfd_arch_k1om. (bfd_k1om_arch): New. (bfd_archures_list): Add &bfd_k1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_k1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. * configure: Regenerated. * cpu-k1om.c: New. * elf64-x86-64.c (elf64_k1om_elf_object_p): New. (bfd_elf64_k1om_vec): Likewise. (bfd_elf64_k1om_freebsd_vec): Likewise. * targets.c (bfd_elf64_k1om_vec): New. (bfd_elf64_k1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_k1om_vec and bfd_elf64_k1om_freebsd_vec. binutils/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (init_dwarf_regnames): Handle EM_K1OM. * elfedit.c (elf_machine): Support EM_K1OM. (elf_class): Likewise. * readelf.c (guess_is_rela): Handle EM_K1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. * doc/binutils.texi: Mention K1OM for elfedit. binutils/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * binutils-all/elfedit.exp: Run elfedit-4. * binutils-all/elfedit-4.d: New. gas/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. (i386_align_code): Handle PROCESSOR_K1OM. (check_cpu_arch_compatible): Check EM_K1OM. (i386_arch): Handle Intel K1OM. (i386_mach): Return bfd_mach_k1om for Intel K1OM. (i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel K1OM. * config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New. (processor_type): Add PROCESSOR_K1OM. * doc/c-i386.texi: Document k1om. gas/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/k1om.d: New. * gas/i386/k1om-inval.l: Likewise. * gas/i386/k1om-inval.s: Likewise. * gas/i386/i386.exp: Run k1om-inval and k1om. include/elf/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_K1OM): New. ld/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and eelf_k1om_fbsd.o (eelf_k1om.c): New. (eelf_k1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64 is supported. Add elf_k1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * emulparams/elf_k1om.sh: New. * emulparams/elf_k1om_fbsd.sh: Likewise. ld/testsuite/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-k1om.d: New. * ld-x86-64/protected2-k1om.d: Likewise. * ld-x86-64/protected3-k1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and protected3-k1om. opcodes/ 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_k1om_arch. * configure: Regenerated. * disassemble.c (disassembler): Handle bfd_k1om_arch. * i386-dis.c (print_insn): Handle bfd_mach_k1om and bfd_mach_k1om_intel_syntax. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. (cpu_flags): Add CpuK1OM. * i386-opc.h (CpuK1OM): New. (i386_cpu_flags): Add cpuk1om. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-07-22 20:22:38 +00:00
# If we support Intel K1OM target, then add support for bfd_k1om_arch.
case "${targ_defvec} ${targ_selvecs}" in
*bfd_elf64_k1om_vec*)
targ_archs="$targ_archs bfd_k1om_arch"
;;
esac