old-cross-binutils/bfd/po/bfd.pot

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# SOME DESCRIPTIVE TITLE.
# Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER
# This file is distributed under the same license as the PACKAGE package.
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# FIRST AUTHOR <EMAIL@ADDRESS>, YEAR.
#
#, fuzzy
msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: bug-binutils@gnu.org\n"
"POT-Creation-Date: 2014-02-10 09:42+1030\n"
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"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
"Language-Team: LANGUAGE <LL@li.org>\n"
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"Language: \n"
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"MIME-Version: 1.0\n"
"Content-Type: text/plain; charset=CHARSET\n"
2002-01-17 14:12:08 +00:00
"Content-Transfer-Encoding: 8bit\n"
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ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
#: aout-adobe.c:127
msgid "%B: Unknown section type in a.out.adobe file: %x\n"
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msgstr ""
#: aout-cris.c:200
#, c-format
msgid "%s: Invalid relocation type exported: %d"
msgstr ""
#: aout-cris.c:243
msgid "%B: Invalid relocation type imported: %d"
msgstr ""
#: aout-cris.c:254
msgid "%B: Bad relocation record imported: %d"
msgstr ""
#: aoutx.h:1273 aoutx.h:1611
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#, c-format
msgid "%s: can not represent section `%s' in a.out object file format"
msgstr ""
#: aoutx.h:1577
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#, c-format
msgid ""
"%s: can not represent section for symbol `%s' in a.out object file format"
msgstr ""
#: aoutx.h:1579 vms-alpha.c:7564
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msgid "*unknown*"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: aoutx.h:4018 aoutx.h:4344
msgid "%P: %B: unexpected relocation type\n"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: aoutx.h:5375
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#, c-format
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msgid "%s: relocatable link from %s to %s not supported"
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msgstr ""
#: archive.c:2249
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msgid "Warning: writing archive was slow: rewriting timestamp\n"
msgstr ""
#: archive.c:2549
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msgid "Reading archive file mod timestamp"
msgstr ""
#: archive.c:2573
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msgid "Writing updated armap timestamp"
msgstr ""
#: bfd.c:411
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msgid "No error"
msgstr ""
#: bfd.c:412
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msgid "System call error"
msgstr ""
#: bfd.c:413
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msgid "Invalid bfd target"
msgstr ""
#: bfd.c:414
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msgid "File in wrong format"
msgstr ""
#: bfd.c:415
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msgid "Archive object file in wrong format"
msgstr ""
#: bfd.c:416
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msgid "Invalid operation"
msgstr ""
#: bfd.c:417
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msgid "Memory exhausted"
msgstr ""
#: bfd.c:418
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msgid "No symbols"
msgstr ""
#: bfd.c:419
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msgid "Archive has no index; run ranlib to add one"
msgstr ""
#: bfd.c:420
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msgid "No more archived files"
msgstr ""
#: bfd.c:421
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msgid "Malformed archive"
msgstr ""
#: bfd.c:422
msgid "DSO missing from command line"
msgstr ""
#: bfd.c:423
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msgid "File format not recognized"
msgstr ""
#: bfd.c:424
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msgid "File format is ambiguous"
msgstr ""
#: bfd.c:425
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msgid "Section has no contents"
msgstr ""
#: bfd.c:426
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msgid "Nonrepresentable section on output"
msgstr ""
#: bfd.c:427
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msgid "Symbol needs debug section which does not exist"
msgstr ""
#: bfd.c:428
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msgid "Bad value"
msgstr ""
#: bfd.c:429
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msgid "File truncated"
msgstr ""
#: bfd.c:430
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msgid "File too big"
msgstr ""
#: bfd.c:431
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#, c-format
msgid "Error reading %s: %s"
msgstr ""
#: bfd.c:432
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msgid "#<Invalid error code>"
msgstr ""
#: bfd.c:1046
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#, c-format
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msgid "BFD %s assertion fail %s:%d"
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msgstr ""
#: bfd.c:1058
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#, c-format
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msgid "BFD %s internal error, aborting at %s line %d in %s\n"
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msgstr ""
#: bfd.c:1062
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#, c-format
msgid "BFD %s internal error, aborting at %s line %d\n"
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msgstr ""
#: bfd.c:1064
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msgid "Please report this bug.\n"
msgstr ""
#: bfdwin.c:206
#, c-format
msgid "not mapping: data=%lx mapped=%d\n"
msgstr ""
#: bfdwin.c:209
#, c-format
msgid "not mapping: env var not set\n"
msgstr ""
#: binary.c:271
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#, c-format
msgid "Warning: Writing section `%s' to huge (ie negative) file offset 0x%lx."
msgstr ""
#: bout.c:1146 elf-m10300.c:2665 elf32-avr.c:1706 elf32-frv.c:5641
#: elf64-ia64-vms.c:354 elfxx-sparc.c:2869 reloc.c:7324 reloc16.c:160
#: elf32-ia64.c:351 elf64-ia64.c:351
msgid "%P%F: --relax and -r may not be used together\n"
2007-07-02 07:12:53 +00:00
msgstr ""
#: cache.c:253
msgid "reopening %B: %s\n"
msgstr ""
#: coff-alpha.c:452
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid ""
"%B: Cannot handle compressed Alpha binaries.\n"
" Use compiler flags, or objZ, to generate uncompressed binaries."
msgstr ""
#: coff-alpha.c:603
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid "%B: unknown/unsupported relocation type %d"
msgstr ""
#: coff-alpha.c:852 coff-alpha.c:889 coff-alpha.c:1973 coff-mips.c:946
1999-05-03 07:29:11 +00:00
msgid "GP relative relocation used when GP not defined"
msgstr ""
#: coff-alpha.c:1450
1999-05-03 07:29:11 +00:00
msgid "using multiple gp values"
msgstr ""
#: coff-alpha.c:1509
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid "%B: unsupported relocation: ALPHA_R_GPRELHIGH"
msgstr ""
#: coff-alpha.c:1516
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid "%B: unsupported relocation: ALPHA_R_GPRELLOW"
msgstr ""
#: coff-alpha.c:1523 elf32-m32r.c:2443 elf64-alpha.c:4083 elf64-alpha.c:4233
#: elf64-ia64-vms.c:3429 elf32-ia64.c:3836 elf64-ia64.c:3836
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid "%B: unknown relocation type %d"
msgstr ""
#: coff-arm.c:1034
1999-05-03 07:29:11 +00:00
#, c-format
msgid "%B: unable to find THUMB glue '%s' for `%s'"
1999-05-03 07:29:11 +00:00
msgstr ""
#: coff-arm.c:1063
1999-05-03 07:29:11 +00:00
#, c-format
msgid "%B: unable to find ARM glue '%s' for `%s'"
1999-05-03 07:29:11 +00:00
msgstr ""
#: coff-arm.c:1365 elf32-arm.c:7141
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"%B(%s): warning: interworking not enabled.\n"
" first occurrence: %B: arm call to thumb"
1999-05-03 07:29:11 +00:00
msgstr ""
#: coff-arm.c:1455
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"%B(%s): warning: interworking not enabled.\n"
" first occurrence: %B: thumb call to arm\n"
" consider relinking with --support-old-code enabled"
1999-05-03 07:29:11 +00:00
msgstr ""
#: coff-arm.c:1750 coff-tic80.c:673 cofflink.c:3168
msgid "%B: bad reloc address 0x%lx in section `%A'"
1999-05-03 07:29:11 +00:00
msgstr ""
#: coff-arm.c:2075
msgid "%B: illegal symbol index in reloc: %d"
2000-02-27 16:55:52 +00:00
msgstr ""
#: coff-arm.c:2206
1999-05-03 07:29:11 +00:00
#, c-format
msgid "error: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d"
1999-05-03 07:29:11 +00:00
msgstr ""
#: coff-arm.c:2222 elf32-arm.c:16123
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"error: %B passes floats in float registers, whereas %B passes them in "
Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * reloc.c (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. * libbfd.h, bfd-in2.h: Rebuilt. * elf32-sh.c (sh_elf_howto_table): Define new relocs. (sh_reloc_map): Map them. (PLT_ENTRY_SIZE, elf_sh_plt0_entry_be, elf_sh_plt0_entry_le, elf_sh_plt_entry_be, elf_sh_plt_entry_le, elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le, elf_sh_plt0_entry, elf_sh_plt_entry, elf_sh_pic_plt_entry, elf_sh_sizeof_plt, elf_sh_plt_plt0_offset, elf_sh_plt0_gotplt_offset, elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset, elf_sh_plt_reloc_offset, movi_shori_putval) [INCLUDE_SHMEDIA]: New. (elf_sh_link_hash_entry) [INCLUDE_SHMEDIA]: Add datalabel_got_offset. (sh_elf_link_hash_newfunc): Initialize it. (sh_elf_relocate_section): Augment the scope of seen_stt_datalabel. Introduce GOTPLT support. Extend GOTPC, PLT, GOT and GOTOFF handling to new SHmedia relocation types. Support GOT_BIAS. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol) [TARGET_SHMEDIA]: Set up values in PLT entries using movi_shori_putval. Support GOT_BIAS. (sh_elf_finish_dynamic_sections): Likewise. * elf32-sh64.c (shmedia_prepare_reloc): Do not add addend to relocation, it's now done by the caller. (GOT_BIAS): New. * elf64-sh64.c (GOT_BIAS, PLT_ENTRY_SIZE, elf_sh64_sizeof_plt, elf_sh64_plt_plt0_offset, elf_sh64_plt0_gotplt_offset, elf_sh64_plt_temp_offset, elf_sh64_plt_symbol_offset, elf_sh64_plt_reloc_offset, ELF_DYNAMIC_INTERPRETER, elf_sh64_pcrel_relocs_copied, elf_sh64_link_hash_entry, elf_sh64_link_hash_table, sh64_elf64_link_hash_traverse, sh64_elf64_hash_table): New. (sh_elf64_howto_table): Introduce new relocs. (sh_elf64_info_to_howto): Accept new PIC relocs. (sh_elf64_relocate_section): Augment the scope of seen_stt_datalabel. Support new PIC relocs. (sh_elf64_check_relocs): Support new PIC relocs. (elf_sh64_plt0_entry_be, elf_sh64_plt0_entry_le, elf_sh64_plt_entry_be, elf_sh64_plt_entry_le, elf_sh64_pic_plt_entry_be, elf_sh64_pic_plt_entry_le, elf_sh64_plt0_entry, elf_sh64_plt_entry, elf_sh64_pic_plt_entry, sh64_elf64_link_hash_newfunc, sh64_elf64_link_hash_table_create, movi_shori_putval, movi_3shori_putval, sh64_elf64_create_dynamic_sections, sh64_elf64_adjust_dynamic_symbol, sh64_elf64_discard_copies, sh64_elf64_size_dynamic_sections, sh64_elf64_finish_dynamic_symbol, sh64_elf64_finish_dynamic_sections): New. (elf_backend_create_dynamic-sections, bfd_elf64_bfd_link_hash_table_create, elf_backend_adjust_dynamic_symbol, elf_backend_size_dynamic_sections, elf_backend_finish_dynamic_symbol, elf_backend_finish_dynamic_sections, elf_backend_want_got_plt, elf_backend_plt_readonly, elf_backend_want_plt_sym, elf_backend_got_header_size, elf_backend_plt_header_size): Define. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * elf32-sh.c: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. * elf32-sh64.c, elf64-sh64.c: Likewise. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh.c (sh_elf_relax_section): Don't relax SHmedia sections. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh64.c (shmedia_prepare_reloc): Validate relocs that must be aligned. * elf64-sh64.c (sh_elf64_relocate_section): Ditto. 2001-01-14 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (bfd_elf32_bfd_copy_private_section_data): Define. (sh64_elf_fake_sections): Set type to SHT_SH5_CR_SORTED for a .cranges section with SEC_SORT_ENTRIES set. (sh64_backend_section_from_shdr): Set SEC_SORT_ENTRIES on an incoming sorted .cranges section. (sh64_bfd_elf_copy_private_section_data): New. (sh64_elf_final_write_processing): Only sort .cranges and modify start address if called by linker. 2001-01-08 Ben Elliston <bje@redhat.com> * elf32-sh64.c (sh64_elf_final_write_processing): Activate Hans-Peter Nilsson's set bit 0 patch from 2001-01-06. * elf64-sh64.c (sh64_elf64_final_write_processing): Ditto. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh_elf64_howto_table): No open brace at start of line. Add comments before all entries. <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct and clarify describing comment. (sh_elf64_reloc): Correct head comment. (sh_elf64_relocate_section): Correct spacing. <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. <case R_SH_SHMEDIA_CODE>: New case. (sh_elf64_gc_mark_hook): Correct spacing. (sh_elf64_check_relocs): Ditto. * elf32-sh64.c (shmedia_prepare_reloc) <case R_SH_SHMEDIA_CODE>: New case. * elf32-sh.c: Correct #endif comments for #ifndef-wrapped functions. (sh_elf_howto_table) <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct, clarify describing comment. Add comments before all entries. (sh_elf_relocate_section) <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> Sort .cranges section in final link. Prepare to set bit 0 on entry address. * elf32-sh64.c (struct sh64_find_section_vma_data): New. (sh64_elf_link_output_symbol_hook): Fix typo in prototype. (sh64_elf_set_mach_from_flags): Set SEC_DEBUGGING on incoming .cranges section. (sh64_backend_section_from_shdr): New, to recognize SHT_SH5_CR_SORTED on incoming .cranges section. (elf_backend_section_from_shdr): Define. (sh64_elf_final_write_processing): Sort outgoing .cranges section. (New, temporarily disabled:) Set bit 0 on entry address according to ISA type. (sh64_find_section_for_address): New. (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb, crange_bsearch_cmpl): Move here from opcodes/sh64-dis.c. (sh64_address_in_cranges): Move here from opcodes/sh64-dis.c. Use bfd_malloc, not xmalloc. (sh64_get_contents_type): Move here from opcodes/sh64-dis.c. Make global. * elf32-sh64.c (sh64_elf64_final_write_processing): New, (but temporarily disabled) setting bit 0 on entry address. (elf_backend_final_write_processing): Define. 2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_PT_16>: Adjust fields to be a proper relocation for PTA and PTB rather than a marker. <R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL>: Zero src_mask. * elf64-sh64.c: Ditto. (sh_elf64_relocate_section) <case R_SH_PT_16>: New case. * elf32-sh64.c: Include opcodes/sh64-opc.h (shmedia_prepare_reloc): Take a bfd_link_info pointer as first argument. Drop const qualifiers from "bfd *" and "bfd_byte *" parameters. No unused parameters. Caller changed. <case R_SH_PT_16>: New case. * Makefile.am (elf32-sh64.lo): Add dependency on sh64-opc.h. * Makefile.in: Regenerate. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): Set SHF_SH5_ISA32 for all code sections. (sh_elf64_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh64_elf_merge_private_data): Ditto. * elf32-sh64.c (sh64_elf_fake_sections): Use sh64_elf_section_data to access stored section flags. (sh64_elf_final_write_processing): Return immediately unless called by linker. Use sh64_elf_section_data (cranges) to get size of linker-generated cranges entries. (sh64_elf_copy_private_data): Add missing "return true". (sh64_elf_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh_elf64_merge_private_data): Ditto. 2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): New, copy of elf64-sh64.c:sh64_elf_fake_sections. (elf_backend_fake_sections): Define as sh64_elf64_fake_sections. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_copy_private_data_internal): Delete. (sh64_elf_final_write_processing): New. (elf_backend_final_write_processing): Define. (sh64_elf_fake_sections): Get header flags from tdata field. (sh64_elf_copy_private_data): Do not call sh64_elf_copy_private_data_internal, just copy e_flags field. (sh64_elf_merge_private_data): Do not call sh64_elf_copy_private_data_internal. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> Remove EF_SH64_ABI64, let ELF size make difference. Remove SH64-specific BFD section flag. * elf32-sh64.c (sh64_elf_fake_sections): Recognize section as containing SHmedia through elf_section_data (asect)->tdata non-zero, not using a BFD section flag. (sh64_elf_set_mach_from_flags): Don't recognize EF_SH64_ABI64. (sh64_elf_merge_private_data): Similar. (elf_backend_section_flags): Don't define. (sh64_elf_backend_section_flags): Delete. * elf64-sh64.c (sh_elf64_set_mach_from_flags): Recognize EF_SH64, not EF_SH64_ABI64. (sh_elf64_merge_private_data): Similar. * section.c (Section flags definitions): Don't define SEC_SH_ISA_SHMEDIA. (bfd-in2.h): Regenerate. 2000-12-09 Hans-Peter Nilsson <hpn@cygnus.com> Make DataLabel references work with partial linking. * elf32-sh64.c: Fix formatting. (sh64_elf_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf_link_output_symbol_hook. (sh64_elf_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. * elf64-sh64.c (sh64_elf64_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf64_link_output_symbol_hook. (sh64_elf64_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. 2000-12-07 Hans-Peter Nilsson <hpn@cygnus.com> Implement semantics for inter-file DataLabel references. * elf64-sh64.c (DATALABEL_SUFFIX): Define. (sh64_elf64_add_symbol_hook): New. (sh_elf64_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. (elf_backend_add_symbol_hook): Define to sh64_elf64_add_symbol_hook. * elf64-sh32.c: Tweak comments. (DATALABEL_SUFFIX): Define. (sh64_elf_add_symbol_hook): New. (elf_backend_add_symbol_hook): Define to sh64_elf_add_symbol_hook. * elf32-sh.c (sh_elf_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. 2000-12-05 Hans-Peter Nilsson <hpn@cygnus.com> Pass through STT_DATALABEL. * elf32-sh64.c (sh64_elf_get_symbol_type): New. (elf_backend_get_symbol_type): Define. * elf64-sh64.c (sh64_elf64_get_symbol_type): New. (elf_backend_get_symbol_type): Define. 2000-11-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c: Tweak comments. (sh64_elf_copy_private_data_internal): Add prototype. (bfd_elf32_bfd_set_private_flags): Define. (sh64_elf_copy_private_data_internal): Compare machine name, not textual BFD target name, to check whether to copy section flag SHF_SH5_ISA32. (sh64_elf_merge_private_data): Validize bfd_get_arch_size. Tweak section-contents-type-mismatch message. (shmedia_prepare_reloc): Add ATTRIBUTE_UNUSED markers. Validize reloc-types. * elf64-sh64.c: New file. * targets.c (bfd_elf64_sh64_vec, bfd_elf64_sh64l_vec): Declare. * Makefile.am (BFD64_BACKENDS): Add elf64-sh64.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * config.bfd (sh64-*-elf*): Add bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure.in: Handle bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. 2000-11-29 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_set_mach_from_flags): Do not recognize anything else but EF_SH64 and EF_SH64_ABI64. (sh64_elf_merge_private_data): Emit error for anything else but EF_SH64 and EF_SH64_ABI64. * config.bfd: Remove bfd_elf32_shblin_vec and bfd_elf32_shlin_vec from targ_selvecs. * configure.in: Add cofflink.lo to bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec as a temporary measure. * configure: Regenerate. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * cpu-sh.c (arch_info_struct): Include sh5 item unconditionalized. * config.bfd (sh64-*-elf*): Do not set targ_cflags. Add targ_selvecs bfd_elf32_sh_vec, bfd_elf32_shl_vec, bfd_elf32_shblin_vec and bfd_elf32_shlin_vec. * elf32-sh64.c: Tweak comments. (sh64_elf_set_mach_from_flags): Recognize all machine flags that are proper subsets of SH64 as bfd_mach_sh5. Add EF_SH64_ABI64. (sh64_elf_copy_private_data_internal): Wrap long line. (sh64_elf_merge_private_data): Rewrite to allow objects from SH64 subsets to be linked together. (INCLUDE_SHMEDIA): Define. * elf32-sh.c (sh_elf_relocate_section) <local symbol>: Parenthesize plus-expression inside or-expression. <global symbol>: Ditto. (sh_elf_set_mach_from_flags): Remove code refusing deleted EF_SH64_32BIT_ABI flag. 2000-11-26 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16_PCREL, R_SH_64_PCREL>: Set pcrel_offset to true. (sh_elf_relocate_section) <local symbol>: Or 1 in calculation of relocation if sym->st_other & STO_SH5_ISA32. <global symbol>: Ditto if h->other & STO_SH5_ISA32. * elf32-sh64.c (shmedia_prepare_reloc): Add rel->r_addend to relocation. 2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com> * Makefile.am (BFD32_BACKENDS): Add elf32-sh64.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * archures.c: Add bfd_mach_sh5. * config.bfd: Map targ_cpu sh* to bfd_sh_arch. Handle sh64-*-elf*. Set targ_cflags to -DINCLUDE_SHMEDIA. * configure.in: Handle bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec. * configure: Regenerate. * reloc.c (BFD_RELOC_SH_SHMEDIA_CODE, BFD_RELOC_SH_IMMU5, BFD_RELOC_SH_IMMS6, BFD_RELOC_SH_IMMS6BY32, BFD_RELOC_SH_IMMU6, BFD_RELOC_SH_IMMS10, BFD_RELOC_SH_IMMS10BY2, BFD_RELOC_SH_IMMS10BY4, BFD_RELOC_SH_IMMS10BY8, BFD_RELOC_SH_IMMS16, BFD_RELOC_SH_IMMU16, BFD_RELOC_SH_IMM_LOW16, BFD_RELOC_SH_IMM_LOW16_PCREL, BFD_RELOC_SH_IMM_MEDLOW16, BFD_RELOC_SH_IMM_MEDLOW16_PCREL, BFD_RELOC_SH_IMM_MEDHI16, BFD_RELOC_SH_IMM_MEDHI16_PCREL, BFD_RELOC_SH_IMM_HI16, BFD_RELOC_SH_IMM_HI16_PCREL, BFD_RELOC_SH_PT_16): New relocations. * cpu-sh.c [INCLUDE_SHMEDIA] (arch_info_struct): Define and link in item for SH5. * elf32-sh.c [INCLUDE_SHMEDIA] (sh_elf_howto_table): Add howto items for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_rel): Add mappings for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_elf_relocate_section) [default]: Call shmedia_prepare_reloc, goto final_link_relocate if it returns non-zero, else fail as before. (sh_elf_set_mach_from_flags): Provide function only if not defined as macro. Do not recognize objects with EF_SH64_32BIT_ABI set. (sh_elf_set_private_flags): Provide function only if not defined as a macro. (sh_elf_copy_private_data): Similar. (sh_elf_merge_private_data): Similar. * section.c (SEC_SH_ISA_SHMEDIA): New. * targets.c (bfd_elf32_sh64_vec, bfd_elf32_sh64l_vec): Declare. * elf32-sh64.c: New file. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate.
2002-02-08 05:33:27 +00:00
"integer registers"
1999-05-03 07:29:11 +00:00
msgstr ""
#: coff-arm.c:2225 elf32-arm.c:16127
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"error: %B passes floats in integer registers, whereas %B passes them in "
Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * reloc.c (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. * libbfd.h, bfd-in2.h: Rebuilt. * elf32-sh.c (sh_elf_howto_table): Define new relocs. (sh_reloc_map): Map them. (PLT_ENTRY_SIZE, elf_sh_plt0_entry_be, elf_sh_plt0_entry_le, elf_sh_plt_entry_be, elf_sh_plt_entry_le, elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le, elf_sh_plt0_entry, elf_sh_plt_entry, elf_sh_pic_plt_entry, elf_sh_sizeof_plt, elf_sh_plt_plt0_offset, elf_sh_plt0_gotplt_offset, elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset, elf_sh_plt_reloc_offset, movi_shori_putval) [INCLUDE_SHMEDIA]: New. (elf_sh_link_hash_entry) [INCLUDE_SHMEDIA]: Add datalabel_got_offset. (sh_elf_link_hash_newfunc): Initialize it. (sh_elf_relocate_section): Augment the scope of seen_stt_datalabel. Introduce GOTPLT support. Extend GOTPC, PLT, GOT and GOTOFF handling to new SHmedia relocation types. Support GOT_BIAS. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol) [TARGET_SHMEDIA]: Set up values in PLT entries using movi_shori_putval. Support GOT_BIAS. (sh_elf_finish_dynamic_sections): Likewise. * elf32-sh64.c (shmedia_prepare_reloc): Do not add addend to relocation, it's now done by the caller. (GOT_BIAS): New. * elf64-sh64.c (GOT_BIAS, PLT_ENTRY_SIZE, elf_sh64_sizeof_plt, elf_sh64_plt_plt0_offset, elf_sh64_plt0_gotplt_offset, elf_sh64_plt_temp_offset, elf_sh64_plt_symbol_offset, elf_sh64_plt_reloc_offset, ELF_DYNAMIC_INTERPRETER, elf_sh64_pcrel_relocs_copied, elf_sh64_link_hash_entry, elf_sh64_link_hash_table, sh64_elf64_link_hash_traverse, sh64_elf64_hash_table): New. (sh_elf64_howto_table): Introduce new relocs. (sh_elf64_info_to_howto): Accept new PIC relocs. (sh_elf64_relocate_section): Augment the scope of seen_stt_datalabel. Support new PIC relocs. (sh_elf64_check_relocs): Support new PIC relocs. (elf_sh64_plt0_entry_be, elf_sh64_plt0_entry_le, elf_sh64_plt_entry_be, elf_sh64_plt_entry_le, elf_sh64_pic_plt_entry_be, elf_sh64_pic_plt_entry_le, elf_sh64_plt0_entry, elf_sh64_plt_entry, elf_sh64_pic_plt_entry, sh64_elf64_link_hash_newfunc, sh64_elf64_link_hash_table_create, movi_shori_putval, movi_3shori_putval, sh64_elf64_create_dynamic_sections, sh64_elf64_adjust_dynamic_symbol, sh64_elf64_discard_copies, sh64_elf64_size_dynamic_sections, sh64_elf64_finish_dynamic_symbol, sh64_elf64_finish_dynamic_sections): New. (elf_backend_create_dynamic-sections, bfd_elf64_bfd_link_hash_table_create, elf_backend_adjust_dynamic_symbol, elf_backend_size_dynamic_sections, elf_backend_finish_dynamic_symbol, elf_backend_finish_dynamic_sections, elf_backend_want_got_plt, elf_backend_plt_readonly, elf_backend_want_plt_sym, elf_backend_got_header_size, elf_backend_plt_header_size): Define. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * elf32-sh.c: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. * elf32-sh64.c, elf64-sh64.c: Likewise. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh.c (sh_elf_relax_section): Don't relax SHmedia sections. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh64.c (shmedia_prepare_reloc): Validate relocs that must be aligned. * elf64-sh64.c (sh_elf64_relocate_section): Ditto. 2001-01-14 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (bfd_elf32_bfd_copy_private_section_data): Define. (sh64_elf_fake_sections): Set type to SHT_SH5_CR_SORTED for a .cranges section with SEC_SORT_ENTRIES set. (sh64_backend_section_from_shdr): Set SEC_SORT_ENTRIES on an incoming sorted .cranges section. (sh64_bfd_elf_copy_private_section_data): New. (sh64_elf_final_write_processing): Only sort .cranges and modify start address if called by linker. 2001-01-08 Ben Elliston <bje@redhat.com> * elf32-sh64.c (sh64_elf_final_write_processing): Activate Hans-Peter Nilsson's set bit 0 patch from 2001-01-06. * elf64-sh64.c (sh64_elf64_final_write_processing): Ditto. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh_elf64_howto_table): No open brace at start of line. Add comments before all entries. <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct and clarify describing comment. (sh_elf64_reloc): Correct head comment. (sh_elf64_relocate_section): Correct spacing. <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. <case R_SH_SHMEDIA_CODE>: New case. (sh_elf64_gc_mark_hook): Correct spacing. (sh_elf64_check_relocs): Ditto. * elf32-sh64.c (shmedia_prepare_reloc) <case R_SH_SHMEDIA_CODE>: New case. * elf32-sh.c: Correct #endif comments for #ifndef-wrapped functions. (sh_elf_howto_table) <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct, clarify describing comment. Add comments before all entries. (sh_elf_relocate_section) <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> Sort .cranges section in final link. Prepare to set bit 0 on entry address. * elf32-sh64.c (struct sh64_find_section_vma_data): New. (sh64_elf_link_output_symbol_hook): Fix typo in prototype. (sh64_elf_set_mach_from_flags): Set SEC_DEBUGGING on incoming .cranges section. (sh64_backend_section_from_shdr): New, to recognize SHT_SH5_CR_SORTED on incoming .cranges section. (elf_backend_section_from_shdr): Define. (sh64_elf_final_write_processing): Sort outgoing .cranges section. (New, temporarily disabled:) Set bit 0 on entry address according to ISA type. (sh64_find_section_for_address): New. (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb, crange_bsearch_cmpl): Move here from opcodes/sh64-dis.c. (sh64_address_in_cranges): Move here from opcodes/sh64-dis.c. Use bfd_malloc, not xmalloc. (sh64_get_contents_type): Move here from opcodes/sh64-dis.c. Make global. * elf32-sh64.c (sh64_elf64_final_write_processing): New, (but temporarily disabled) setting bit 0 on entry address. (elf_backend_final_write_processing): Define. 2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_PT_16>: Adjust fields to be a proper relocation for PTA and PTB rather than a marker. <R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL>: Zero src_mask. * elf64-sh64.c: Ditto. (sh_elf64_relocate_section) <case R_SH_PT_16>: New case. * elf32-sh64.c: Include opcodes/sh64-opc.h (shmedia_prepare_reloc): Take a bfd_link_info pointer as first argument. Drop const qualifiers from "bfd *" and "bfd_byte *" parameters. No unused parameters. Caller changed. <case R_SH_PT_16>: New case. * Makefile.am (elf32-sh64.lo): Add dependency on sh64-opc.h. * Makefile.in: Regenerate. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): Set SHF_SH5_ISA32 for all code sections. (sh_elf64_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh64_elf_merge_private_data): Ditto. * elf32-sh64.c (sh64_elf_fake_sections): Use sh64_elf_section_data to access stored section flags. (sh64_elf_final_write_processing): Return immediately unless called by linker. Use sh64_elf_section_data (cranges) to get size of linker-generated cranges entries. (sh64_elf_copy_private_data): Add missing "return true". (sh64_elf_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh_elf64_merge_private_data): Ditto. 2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): New, copy of elf64-sh64.c:sh64_elf_fake_sections. (elf_backend_fake_sections): Define as sh64_elf64_fake_sections. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_copy_private_data_internal): Delete. (sh64_elf_final_write_processing): New. (elf_backend_final_write_processing): Define. (sh64_elf_fake_sections): Get header flags from tdata field. (sh64_elf_copy_private_data): Do not call sh64_elf_copy_private_data_internal, just copy e_flags field. (sh64_elf_merge_private_data): Do not call sh64_elf_copy_private_data_internal. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> Remove EF_SH64_ABI64, let ELF size make difference. Remove SH64-specific BFD section flag. * elf32-sh64.c (sh64_elf_fake_sections): Recognize section as containing SHmedia through elf_section_data (asect)->tdata non-zero, not using a BFD section flag. (sh64_elf_set_mach_from_flags): Don't recognize EF_SH64_ABI64. (sh64_elf_merge_private_data): Similar. (elf_backend_section_flags): Don't define. (sh64_elf_backend_section_flags): Delete. * elf64-sh64.c (sh_elf64_set_mach_from_flags): Recognize EF_SH64, not EF_SH64_ABI64. (sh_elf64_merge_private_data): Similar. * section.c (Section flags definitions): Don't define SEC_SH_ISA_SHMEDIA. (bfd-in2.h): Regenerate. 2000-12-09 Hans-Peter Nilsson <hpn@cygnus.com> Make DataLabel references work with partial linking. * elf32-sh64.c: Fix formatting. (sh64_elf_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf_link_output_symbol_hook. (sh64_elf_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. * elf64-sh64.c (sh64_elf64_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf64_link_output_symbol_hook. (sh64_elf64_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. 2000-12-07 Hans-Peter Nilsson <hpn@cygnus.com> Implement semantics for inter-file DataLabel references. * elf64-sh64.c (DATALABEL_SUFFIX): Define. (sh64_elf64_add_symbol_hook): New. (sh_elf64_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. (elf_backend_add_symbol_hook): Define to sh64_elf64_add_symbol_hook. * elf64-sh32.c: Tweak comments. (DATALABEL_SUFFIX): Define. (sh64_elf_add_symbol_hook): New. (elf_backend_add_symbol_hook): Define to sh64_elf_add_symbol_hook. * elf32-sh.c (sh_elf_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. 2000-12-05 Hans-Peter Nilsson <hpn@cygnus.com> Pass through STT_DATALABEL. * elf32-sh64.c (sh64_elf_get_symbol_type): New. (elf_backend_get_symbol_type): Define. * elf64-sh64.c (sh64_elf64_get_symbol_type): New. (elf_backend_get_symbol_type): Define. 2000-11-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c: Tweak comments. (sh64_elf_copy_private_data_internal): Add prototype. (bfd_elf32_bfd_set_private_flags): Define. (sh64_elf_copy_private_data_internal): Compare machine name, not textual BFD target name, to check whether to copy section flag SHF_SH5_ISA32. (sh64_elf_merge_private_data): Validize bfd_get_arch_size. Tweak section-contents-type-mismatch message. (shmedia_prepare_reloc): Add ATTRIBUTE_UNUSED markers. Validize reloc-types. * elf64-sh64.c: New file. * targets.c (bfd_elf64_sh64_vec, bfd_elf64_sh64l_vec): Declare. * Makefile.am (BFD64_BACKENDS): Add elf64-sh64.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * config.bfd (sh64-*-elf*): Add bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure.in: Handle bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. 2000-11-29 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_set_mach_from_flags): Do not recognize anything else but EF_SH64 and EF_SH64_ABI64. (sh64_elf_merge_private_data): Emit error for anything else but EF_SH64 and EF_SH64_ABI64. * config.bfd: Remove bfd_elf32_shblin_vec and bfd_elf32_shlin_vec from targ_selvecs. * configure.in: Add cofflink.lo to bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec as a temporary measure. * configure: Regenerate. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * cpu-sh.c (arch_info_struct): Include sh5 item unconditionalized. * config.bfd (sh64-*-elf*): Do not set targ_cflags. Add targ_selvecs bfd_elf32_sh_vec, bfd_elf32_shl_vec, bfd_elf32_shblin_vec and bfd_elf32_shlin_vec. * elf32-sh64.c: Tweak comments. (sh64_elf_set_mach_from_flags): Recognize all machine flags that are proper subsets of SH64 as bfd_mach_sh5. Add EF_SH64_ABI64. (sh64_elf_copy_private_data_internal): Wrap long line. (sh64_elf_merge_private_data): Rewrite to allow objects from SH64 subsets to be linked together. (INCLUDE_SHMEDIA): Define. * elf32-sh.c (sh_elf_relocate_section) <local symbol>: Parenthesize plus-expression inside or-expression. <global symbol>: Ditto. (sh_elf_set_mach_from_flags): Remove code refusing deleted EF_SH64_32BIT_ABI flag. 2000-11-26 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16_PCREL, R_SH_64_PCREL>: Set pcrel_offset to true. (sh_elf_relocate_section) <local symbol>: Or 1 in calculation of relocation if sym->st_other & STO_SH5_ISA32. <global symbol>: Ditto if h->other & STO_SH5_ISA32. * elf32-sh64.c (shmedia_prepare_reloc): Add rel->r_addend to relocation. 2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com> * Makefile.am (BFD32_BACKENDS): Add elf32-sh64.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * archures.c: Add bfd_mach_sh5. * config.bfd: Map targ_cpu sh* to bfd_sh_arch. Handle sh64-*-elf*. Set targ_cflags to -DINCLUDE_SHMEDIA. * configure.in: Handle bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec. * configure: Regenerate. * reloc.c (BFD_RELOC_SH_SHMEDIA_CODE, BFD_RELOC_SH_IMMU5, BFD_RELOC_SH_IMMS6, BFD_RELOC_SH_IMMS6BY32, BFD_RELOC_SH_IMMU6, BFD_RELOC_SH_IMMS10, BFD_RELOC_SH_IMMS10BY2, BFD_RELOC_SH_IMMS10BY4, BFD_RELOC_SH_IMMS10BY8, BFD_RELOC_SH_IMMS16, BFD_RELOC_SH_IMMU16, BFD_RELOC_SH_IMM_LOW16, BFD_RELOC_SH_IMM_LOW16_PCREL, BFD_RELOC_SH_IMM_MEDLOW16, BFD_RELOC_SH_IMM_MEDLOW16_PCREL, BFD_RELOC_SH_IMM_MEDHI16, BFD_RELOC_SH_IMM_MEDHI16_PCREL, BFD_RELOC_SH_IMM_HI16, BFD_RELOC_SH_IMM_HI16_PCREL, BFD_RELOC_SH_PT_16): New relocations. * cpu-sh.c [INCLUDE_SHMEDIA] (arch_info_struct): Define and link in item for SH5. * elf32-sh.c [INCLUDE_SHMEDIA] (sh_elf_howto_table): Add howto items for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_rel): Add mappings for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_elf_relocate_section) [default]: Call shmedia_prepare_reloc, goto final_link_relocate if it returns non-zero, else fail as before. (sh_elf_set_mach_from_flags): Provide function only if not defined as macro. Do not recognize objects with EF_SH64_32BIT_ABI set. (sh_elf_set_private_flags): Provide function only if not defined as a macro. (sh_elf_copy_private_data): Similar. (sh_elf_merge_private_data): Similar. * section.c (SEC_SH_ISA_SHMEDIA): New. * targets.c (bfd_elf32_sh64_vec, bfd_elf32_sh64l_vec): Declare. * elf32-sh64.c: New file. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate.
2002-02-08 05:33:27 +00:00
"float registers"
1999-05-03 07:29:11 +00:00
msgstr ""
#: coff-arm.c:2239
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"error: %B is compiled as position independent code, whereas target %B is "
1999-05-03 07:29:11 +00:00
"absolute position"
msgstr ""
#: coff-arm.c:2242
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"error: %B is compiled as absolute position code, whereas target %B is "
Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * reloc.c (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. * libbfd.h, bfd-in2.h: Rebuilt. * elf32-sh.c (sh_elf_howto_table): Define new relocs. (sh_reloc_map): Map them. (PLT_ENTRY_SIZE, elf_sh_plt0_entry_be, elf_sh_plt0_entry_le, elf_sh_plt_entry_be, elf_sh_plt_entry_le, elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le, elf_sh_plt0_entry, elf_sh_plt_entry, elf_sh_pic_plt_entry, elf_sh_sizeof_plt, elf_sh_plt_plt0_offset, elf_sh_plt0_gotplt_offset, elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset, elf_sh_plt_reloc_offset, movi_shori_putval) [INCLUDE_SHMEDIA]: New. (elf_sh_link_hash_entry) [INCLUDE_SHMEDIA]: Add datalabel_got_offset. (sh_elf_link_hash_newfunc): Initialize it. (sh_elf_relocate_section): Augment the scope of seen_stt_datalabel. Introduce GOTPLT support. Extend GOTPC, PLT, GOT and GOTOFF handling to new SHmedia relocation types. Support GOT_BIAS. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol) [TARGET_SHMEDIA]: Set up values in PLT entries using movi_shori_putval. Support GOT_BIAS. (sh_elf_finish_dynamic_sections): Likewise. * elf32-sh64.c (shmedia_prepare_reloc): Do not add addend to relocation, it's now done by the caller. (GOT_BIAS): New. * elf64-sh64.c (GOT_BIAS, PLT_ENTRY_SIZE, elf_sh64_sizeof_plt, elf_sh64_plt_plt0_offset, elf_sh64_plt0_gotplt_offset, elf_sh64_plt_temp_offset, elf_sh64_plt_symbol_offset, elf_sh64_plt_reloc_offset, ELF_DYNAMIC_INTERPRETER, elf_sh64_pcrel_relocs_copied, elf_sh64_link_hash_entry, elf_sh64_link_hash_table, sh64_elf64_link_hash_traverse, sh64_elf64_hash_table): New. (sh_elf64_howto_table): Introduce new relocs. (sh_elf64_info_to_howto): Accept new PIC relocs. (sh_elf64_relocate_section): Augment the scope of seen_stt_datalabel. Support new PIC relocs. (sh_elf64_check_relocs): Support new PIC relocs. (elf_sh64_plt0_entry_be, elf_sh64_plt0_entry_le, elf_sh64_plt_entry_be, elf_sh64_plt_entry_le, elf_sh64_pic_plt_entry_be, elf_sh64_pic_plt_entry_le, elf_sh64_plt0_entry, elf_sh64_plt_entry, elf_sh64_pic_plt_entry, sh64_elf64_link_hash_newfunc, sh64_elf64_link_hash_table_create, movi_shori_putval, movi_3shori_putval, sh64_elf64_create_dynamic_sections, sh64_elf64_adjust_dynamic_symbol, sh64_elf64_discard_copies, sh64_elf64_size_dynamic_sections, sh64_elf64_finish_dynamic_symbol, sh64_elf64_finish_dynamic_sections): New. (elf_backend_create_dynamic-sections, bfd_elf64_bfd_link_hash_table_create, elf_backend_adjust_dynamic_symbol, elf_backend_size_dynamic_sections, elf_backend_finish_dynamic_symbol, elf_backend_finish_dynamic_sections, elf_backend_want_got_plt, elf_backend_plt_readonly, elf_backend_want_plt_sym, elf_backend_got_header_size, elf_backend_plt_header_size): Define. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * elf32-sh.c: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. * elf32-sh64.c, elf64-sh64.c: Likewise. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh.c (sh_elf_relax_section): Don't relax SHmedia sections. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh64.c (shmedia_prepare_reloc): Validate relocs that must be aligned. * elf64-sh64.c (sh_elf64_relocate_section): Ditto. 2001-01-14 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (bfd_elf32_bfd_copy_private_section_data): Define. (sh64_elf_fake_sections): Set type to SHT_SH5_CR_SORTED for a .cranges section with SEC_SORT_ENTRIES set. (sh64_backend_section_from_shdr): Set SEC_SORT_ENTRIES on an incoming sorted .cranges section. (sh64_bfd_elf_copy_private_section_data): New. (sh64_elf_final_write_processing): Only sort .cranges and modify start address if called by linker. 2001-01-08 Ben Elliston <bje@redhat.com> * elf32-sh64.c (sh64_elf_final_write_processing): Activate Hans-Peter Nilsson's set bit 0 patch from 2001-01-06. * elf64-sh64.c (sh64_elf64_final_write_processing): Ditto. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh_elf64_howto_table): No open brace at start of line. Add comments before all entries. <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct and clarify describing comment. (sh_elf64_reloc): Correct head comment. (sh_elf64_relocate_section): Correct spacing. <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. <case R_SH_SHMEDIA_CODE>: New case. (sh_elf64_gc_mark_hook): Correct spacing. (sh_elf64_check_relocs): Ditto. * elf32-sh64.c (shmedia_prepare_reloc) <case R_SH_SHMEDIA_CODE>: New case. * elf32-sh.c: Correct #endif comments for #ifndef-wrapped functions. (sh_elf_howto_table) <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct, clarify describing comment. Add comments before all entries. (sh_elf_relocate_section) <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> Sort .cranges section in final link. Prepare to set bit 0 on entry address. * elf32-sh64.c (struct sh64_find_section_vma_data): New. (sh64_elf_link_output_symbol_hook): Fix typo in prototype. (sh64_elf_set_mach_from_flags): Set SEC_DEBUGGING on incoming .cranges section. (sh64_backend_section_from_shdr): New, to recognize SHT_SH5_CR_SORTED on incoming .cranges section. (elf_backend_section_from_shdr): Define. (sh64_elf_final_write_processing): Sort outgoing .cranges section. (New, temporarily disabled:) Set bit 0 on entry address according to ISA type. (sh64_find_section_for_address): New. (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb, crange_bsearch_cmpl): Move here from opcodes/sh64-dis.c. (sh64_address_in_cranges): Move here from opcodes/sh64-dis.c. Use bfd_malloc, not xmalloc. (sh64_get_contents_type): Move here from opcodes/sh64-dis.c. Make global. * elf32-sh64.c (sh64_elf64_final_write_processing): New, (but temporarily disabled) setting bit 0 on entry address. (elf_backend_final_write_processing): Define. 2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_PT_16>: Adjust fields to be a proper relocation for PTA and PTB rather than a marker. <R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL>: Zero src_mask. * elf64-sh64.c: Ditto. (sh_elf64_relocate_section) <case R_SH_PT_16>: New case. * elf32-sh64.c: Include opcodes/sh64-opc.h (shmedia_prepare_reloc): Take a bfd_link_info pointer as first argument. Drop const qualifiers from "bfd *" and "bfd_byte *" parameters. No unused parameters. Caller changed. <case R_SH_PT_16>: New case. * Makefile.am (elf32-sh64.lo): Add dependency on sh64-opc.h. * Makefile.in: Regenerate. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): Set SHF_SH5_ISA32 for all code sections. (sh_elf64_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh64_elf_merge_private_data): Ditto. * elf32-sh64.c (sh64_elf_fake_sections): Use sh64_elf_section_data to access stored section flags. (sh64_elf_final_write_processing): Return immediately unless called by linker. Use sh64_elf_section_data (cranges) to get size of linker-generated cranges entries. (sh64_elf_copy_private_data): Add missing "return true". (sh64_elf_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh_elf64_merge_private_data): Ditto. 2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): New, copy of elf64-sh64.c:sh64_elf_fake_sections. (elf_backend_fake_sections): Define as sh64_elf64_fake_sections. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_copy_private_data_internal): Delete. (sh64_elf_final_write_processing): New. (elf_backend_final_write_processing): Define. (sh64_elf_fake_sections): Get header flags from tdata field. (sh64_elf_copy_private_data): Do not call sh64_elf_copy_private_data_internal, just copy e_flags field. (sh64_elf_merge_private_data): Do not call sh64_elf_copy_private_data_internal. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> Remove EF_SH64_ABI64, let ELF size make difference. Remove SH64-specific BFD section flag. * elf32-sh64.c (sh64_elf_fake_sections): Recognize section as containing SHmedia through elf_section_data (asect)->tdata non-zero, not using a BFD section flag. (sh64_elf_set_mach_from_flags): Don't recognize EF_SH64_ABI64. (sh64_elf_merge_private_data): Similar. (elf_backend_section_flags): Don't define. (sh64_elf_backend_section_flags): Delete. * elf64-sh64.c (sh_elf64_set_mach_from_flags): Recognize EF_SH64, not EF_SH64_ABI64. (sh_elf64_merge_private_data): Similar. * section.c (Section flags definitions): Don't define SEC_SH_ISA_SHMEDIA. (bfd-in2.h): Regenerate. 2000-12-09 Hans-Peter Nilsson <hpn@cygnus.com> Make DataLabel references work with partial linking. * elf32-sh64.c: Fix formatting. (sh64_elf_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf_link_output_symbol_hook. (sh64_elf_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. * elf64-sh64.c (sh64_elf64_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf64_link_output_symbol_hook. (sh64_elf64_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. 2000-12-07 Hans-Peter Nilsson <hpn@cygnus.com> Implement semantics for inter-file DataLabel references. * elf64-sh64.c (DATALABEL_SUFFIX): Define. (sh64_elf64_add_symbol_hook): New. (sh_elf64_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. (elf_backend_add_symbol_hook): Define to sh64_elf64_add_symbol_hook. * elf64-sh32.c: Tweak comments. (DATALABEL_SUFFIX): Define. (sh64_elf_add_symbol_hook): New. (elf_backend_add_symbol_hook): Define to sh64_elf_add_symbol_hook. * elf32-sh.c (sh_elf_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. 2000-12-05 Hans-Peter Nilsson <hpn@cygnus.com> Pass through STT_DATALABEL. * elf32-sh64.c (sh64_elf_get_symbol_type): New. (elf_backend_get_symbol_type): Define. * elf64-sh64.c (sh64_elf64_get_symbol_type): New. (elf_backend_get_symbol_type): Define. 2000-11-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c: Tweak comments. (sh64_elf_copy_private_data_internal): Add prototype. (bfd_elf32_bfd_set_private_flags): Define. (sh64_elf_copy_private_data_internal): Compare machine name, not textual BFD target name, to check whether to copy section flag SHF_SH5_ISA32. (sh64_elf_merge_private_data): Validize bfd_get_arch_size. Tweak section-contents-type-mismatch message. (shmedia_prepare_reloc): Add ATTRIBUTE_UNUSED markers. Validize reloc-types. * elf64-sh64.c: New file. * targets.c (bfd_elf64_sh64_vec, bfd_elf64_sh64l_vec): Declare. * Makefile.am (BFD64_BACKENDS): Add elf64-sh64.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * config.bfd (sh64-*-elf*): Add bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure.in: Handle bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. 2000-11-29 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_set_mach_from_flags): Do not recognize anything else but EF_SH64 and EF_SH64_ABI64. (sh64_elf_merge_private_data): Emit error for anything else but EF_SH64 and EF_SH64_ABI64. * config.bfd: Remove bfd_elf32_shblin_vec and bfd_elf32_shlin_vec from targ_selvecs. * configure.in: Add cofflink.lo to bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec as a temporary measure. * configure: Regenerate. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * cpu-sh.c (arch_info_struct): Include sh5 item unconditionalized. * config.bfd (sh64-*-elf*): Do not set targ_cflags. Add targ_selvecs bfd_elf32_sh_vec, bfd_elf32_shl_vec, bfd_elf32_shblin_vec and bfd_elf32_shlin_vec. * elf32-sh64.c: Tweak comments. (sh64_elf_set_mach_from_flags): Recognize all machine flags that are proper subsets of SH64 as bfd_mach_sh5. Add EF_SH64_ABI64. (sh64_elf_copy_private_data_internal): Wrap long line. (sh64_elf_merge_private_data): Rewrite to allow objects from SH64 subsets to be linked together. (INCLUDE_SHMEDIA): Define. * elf32-sh.c (sh_elf_relocate_section) <local symbol>: Parenthesize plus-expression inside or-expression. <global symbol>: Ditto. (sh_elf_set_mach_from_flags): Remove code refusing deleted EF_SH64_32BIT_ABI flag. 2000-11-26 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16_PCREL, R_SH_64_PCREL>: Set pcrel_offset to true. (sh_elf_relocate_section) <local symbol>: Or 1 in calculation of relocation if sym->st_other & STO_SH5_ISA32. <global symbol>: Ditto if h->other & STO_SH5_ISA32. * elf32-sh64.c (shmedia_prepare_reloc): Add rel->r_addend to relocation. 2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com> * Makefile.am (BFD32_BACKENDS): Add elf32-sh64.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * archures.c: Add bfd_mach_sh5. * config.bfd: Map targ_cpu sh* to bfd_sh_arch. Handle sh64-*-elf*. Set targ_cflags to -DINCLUDE_SHMEDIA. * configure.in: Handle bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec. * configure: Regenerate. * reloc.c (BFD_RELOC_SH_SHMEDIA_CODE, BFD_RELOC_SH_IMMU5, BFD_RELOC_SH_IMMS6, BFD_RELOC_SH_IMMS6BY32, BFD_RELOC_SH_IMMU6, BFD_RELOC_SH_IMMS10, BFD_RELOC_SH_IMMS10BY2, BFD_RELOC_SH_IMMS10BY4, BFD_RELOC_SH_IMMS10BY8, BFD_RELOC_SH_IMMS16, BFD_RELOC_SH_IMMU16, BFD_RELOC_SH_IMM_LOW16, BFD_RELOC_SH_IMM_LOW16_PCREL, BFD_RELOC_SH_IMM_MEDLOW16, BFD_RELOC_SH_IMM_MEDLOW16_PCREL, BFD_RELOC_SH_IMM_MEDHI16, BFD_RELOC_SH_IMM_MEDHI16_PCREL, BFD_RELOC_SH_IMM_HI16, BFD_RELOC_SH_IMM_HI16_PCREL, BFD_RELOC_SH_PT_16): New relocations. * cpu-sh.c [INCLUDE_SHMEDIA] (arch_info_struct): Define and link in item for SH5. * elf32-sh.c [INCLUDE_SHMEDIA] (sh_elf_howto_table): Add howto items for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_rel): Add mappings for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_elf_relocate_section) [default]: Call shmedia_prepare_reloc, goto final_link_relocate if it returns non-zero, else fail as before. (sh_elf_set_mach_from_flags): Provide function only if not defined as macro. Do not recognize objects with EF_SH64_32BIT_ABI set. (sh_elf_set_private_flags): Provide function only if not defined as a macro. (sh_elf_copy_private_data): Similar. (sh_elf_merge_private_data): Similar. * section.c (SEC_SH_ISA_SHMEDIA): New. * targets.c (bfd_elf32_sh64_vec, bfd_elf32_sh64l_vec): Declare. * elf32-sh64.c: New file. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate.
2002-02-08 05:33:27 +00:00
"position independent"
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msgstr ""
#: coff-arm.c:2270 elf32-arm.c:16192
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#, c-format
msgid "Warning: %B supports interworking, whereas %B does not"
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msgstr ""
#: coff-arm.c:2273 elf32-arm.c:16198
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#, c-format
msgid "Warning: %B does not support interworking, whereas %B does"
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msgstr ""
#: coff-arm.c:2297
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#, c-format
msgid "private flags = %x:"
msgstr ""
#: coff-arm.c:2305 elf32-arm.c:12119
#, c-format
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msgid " [floats passed in float registers]"
msgstr ""
#: coff-arm.c:2307
#, c-format
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msgid " [floats passed in integer registers]"
msgstr ""
#: coff-arm.c:2310 elf32-arm.c:12122
#, c-format
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msgid " [position independent]"
msgstr ""
#: coff-arm.c:2312
#, c-format
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msgid " [absolute position]"
msgstr ""
#: coff-arm.c:2316
#, c-format
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msgid " [interworking flag not initialised]"
msgstr ""
#: coff-arm.c:2318
#, c-format
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msgid " [interworking supported]"
msgstr ""
#: coff-arm.c:2320
#, c-format
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msgid " [interworking not supported]"
msgstr ""
#: coff-arm.c:2366 elf32-arm.c:11104
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#, c-format
msgid ""
"Warning: Not setting interworking flag of %B since it has already been "
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"specified as non-interworking"
msgstr ""
#: coff-arm.c:2370 elf32-arm.c:11108
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#, c-format
msgid "Warning: Clearing the interworking flag of %B due to outside request"
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msgstr ""
#: coff-h8300.c:1096
#, c-format
msgid "cannot handle R_MEM_INDIRECT reloc when using %s output"
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msgstr ""
#: coff-i860.c:147
#, c-format
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msgid "relocation `%s' not yet implemented"
msgstr ""
#: coff-i860.c:605 coff-tic54x.c:365 coffcode.h:5209
msgid "%B: warning: illegal symbol index %ld in relocs"
msgstr ""
#: coff-i960.c:124 coff-i960.c:480
msgid "uncertain calling convention for non-COFF symbol"
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msgstr ""
#: coff-m68k.c:484 elf32-bfin.c:5556 elf32-cr16.c:2853 elf32-m68k.c:4632
msgid "unsupported reloc type"
2007-07-02 07:12:53 +00:00
msgstr ""
#: coff-mips.c:636 elf32-mips.c:1637 elf32-score.c:431 elf32-score7.c:330
#: elf64-mips.c:2925 elfn32-mips.c:2737
msgid "GP relative relocation when _gp not defined"
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msgstr ""
#: coff-or32.c:216
msgid "Unrecognized reloc"
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msgstr ""
#: coff-rs6000.c:2802
#, c-format
msgid "%s: unsupported relocation type 0x%02x"
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msgstr ""
#: coff-rs6000.c:2887
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#, c-format
msgid "%s: TOC reloc at 0x%x to symbol `%s' with no TOC entry"
msgstr ""
#: coff-rs6000.c:3638 coff64-rs6000.c:2117
msgid "%B: symbol `%s' has unrecognized smclas %d"
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msgstr ""
#: coff-sh.c:506
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#, c-format
msgid "SH Error: unknown reloc type %d"
msgstr ""
#: coff-tic4x.c:184 coff-tic54x.c:279 coff-tic80.c:440
#, c-format
msgid "Unrecognized reloc type 0x%x"
msgstr ""
#: coff-tic4x.c:227
#, c-format
msgid "%s: warning: illegal symbol index %ld in relocs"
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msgstr ""
#: coff-w65.c:355
#, c-format
msgid "ignoring reloc %s\n"
msgstr ""
#: coffcode.h:1005
msgid "%B: warning: COMDAT symbol '%s' does not match section name '%s'"
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msgstr ""
#. Generate a warning message rather using the 'unhandled'
#. variable as this will allow some .sys files generate by
#. other toolchains to be processed. See bugzilla issue 196.
#: coffcode.h:1230
msgid ""
"%B: Warning: Ignoring section flag IMAGE_SCN_MEM_NOT_PAGED in section %s"
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msgstr ""
#: coffcode.h:1297
msgid "%B (%s): Section flag %s (0x%x) ignored"
msgstr ""
#: coffcode.h:2439
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#, c-format
msgid "Unrecognized TI COFF target id '0x%x'"
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msgstr ""
#: coffcode.h:2753
msgid "%B: reloc against a non-existant symbol index: %ld"
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msgstr ""
#: coffcode.h:3311
msgid "%B: too many sections (%d)"
msgstr ""
#: coffcode.h:3729
msgid "%B: section %s: string table overflow at offset %ld"
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msgstr ""
#: coffcode.h:4534
msgid "%B: warning: line number table read failed"
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msgstr ""
#: coffcode.h:4564
msgid "%B: warning: illegal symbol index %ld in line numbers"
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msgstr ""
#: coffcode.h:4578
msgid "%B: warning: duplicate line number information for `%s'"
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msgstr ""
#: coffcode.h:4978
msgid "%B: Unrecognized storage class %d for %s symbol `%s'"
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msgstr ""
#: coffcode.h:5104
msgid "warning: %B: local symbol `%s' has no section"
msgstr ""
#: coffcode.h:5248
msgid "%B: illegal relocation type %d at address 0x%lx"
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msgstr ""
#: coffgen.c:179 elf.c:1030
msgid "%B: unable to initialize compress status for section %s"
msgstr ""
#: coffgen.c:199 elf.c:1050
msgid "%B: unable to initialize decompress status for section %s"
msgstr ""
#: coffgen.c:1685
msgid "%B: bad string table size %lu"
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msgstr ""
#: coffgen.c:2608 elflink.c:12906 linker.c:3136
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%F%P: already_linked_table: %E\n"
msgstr ""
#: cofflink.c:533 elf64-ia64-vms.c:5173 elflink.c:4356
msgid "Warning: type of symbol `%s' changed from %d to %d in %B"
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msgstr ""
#: cofflink.c:2416
msgid "%B: relocs in section `%A', but it has no contents"
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msgstr ""
#: cofflink.c:2478 elflink.c:9711
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msgid ""
"%X`%s' referenced in section `%A' of %B: defined in discarded section `%A' "
"of %B\n"
msgstr ""
#: cofflink.c:2777 coffswap.h:826
#, c-format
msgid "%s: %s: reloc overflow: 0x%lx > 0xffff"
msgstr ""
#: cofflink.c:2786 coffswap.h:812
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#, c-format
msgid "%s: warning: %s: line number overflow: 0x%lx > 0xffff"
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msgstr ""
#: cpu-arm.c:190 cpu-arm.c:201
msgid "error: %B is compiled for the EP9312, whereas %B is compiled for XScale"
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msgstr ""
#: cpu-arm.c:334
1999-05-03 07:29:11 +00:00
#, c-format
msgid "warning: unable to update contents of %s section in %s"
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msgstr ""
#: dwarf2.c:514
2000-11-02 23:03:24 +00:00
#, c-format
msgid "Dwarf Error: Can't find %s section."
2000-11-02 23:03:24 +00:00
msgstr ""
#: dwarf2.c:543
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#, c-format
msgid "Dwarf Error: Offset (%lu) greater than or equal to %s size (%lu)."
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msgstr ""
#: dwarf2.c:1071
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#, c-format
msgid "Dwarf Error: Invalid or unhandled FORM value: %#x."
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msgstr ""
#: dwarf2.c:1332
1999-06-03 03:26:53 +00:00
msgid "Dwarf Error: mangled line number section (bad file number)."
msgstr ""
#: dwarf2.c:1590
#, c-format
msgid "Dwarf Error: Unhandled .debug_line version %d."
msgstr ""
#: dwarf2.c:1612
msgid "Dwarf Error: Invalid maximum operations per instruction."
msgstr ""
#: dwarf2.c:1807
1999-05-03 07:29:11 +00:00
msgid "Dwarf Error: mangled line number section."
msgstr ""
#: dwarf2.c:2160
#, c-format
msgid "Dwarf Error: Unable to read alt ref %u."
msgstr ""
#: dwarf2.c:2179 dwarf2.c:2299 dwarf2.c:2595
1999-05-03 07:29:11 +00:00
#, c-format
msgid "Dwarf Error: Could not find abbrev number %u."
1999-05-03 07:29:11 +00:00
msgstr ""
#: dwarf2.c:2551
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"Dwarf Error: found dwarf version '%u', this reader only handles version 2, 3 "
"and 4 information."
1999-05-03 07:29:11 +00:00
msgstr ""
#: dwarf2.c:2560
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"Dwarf Error: found address size '%u', this reader can not handle sizes "
"greater than '%u'."
msgstr ""
#: dwarf2.c:2586
1999-05-03 07:29:11 +00:00
#, c-format
msgid "Dwarf Error: Bad abbrev number: %u."
1999-05-03 07:29:11 +00:00
msgstr ""
#: ecoff.c:1233
1999-05-03 07:29:11 +00:00
#, c-format
msgid "Unknown basic type %d"
msgstr ""
#: ecoff.c:1490
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"\n"
" End+1 symbol: %ld"
msgstr ""
#: ecoff.c:1497 ecoff.c:1500
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"\n"
" First symbol: %ld"
msgstr ""
#: ecoff.c:1512
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"\n"
" End+1 symbol: %-7ld Type: %s"
msgstr ""
#: ecoff.c:1519
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"\n"
" Local symbol: %ld"
msgstr ""
#: ecoff.c:1527
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"\n"
" struct; End+1 symbol: %ld"
msgstr ""
#: ecoff.c:1532
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"\n"
" union; End+1 symbol: %ld"
msgstr ""
#: ecoff.c:1537
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"\n"
" enum; End+1 symbol: %ld"
msgstr ""
#: ecoff.c:1543
1999-05-03 07:29:11 +00:00
#, c-format
msgid ""
"\n"
" Type: %s"
msgstr ""
#: elf-attrs.c:573
msgid ""
"error: %B: Object has vendor-specific contents that must be processed by the "
"'%s' toolchain"
msgstr ""
#: elf-attrs.c:582
msgid "error: %B: Object tag '%d, %s' is incompatible with tag '%d, %s'"
msgstr ""
#: elf-eh-frame.c:921
msgid "%P: error in %B(%A); no .eh_frame_hdr table will be created.\n"
msgstr ""
#: elf-eh-frame.c:1193
msgid ""
"%P: fde encoding in %B(%A) prevents .eh_frame_hdr table being created.\n"
msgstr ""
#: elf-eh-frame.c:1612
2011-06-02 13:43:24 +00:00
msgid "%P: DW_EH_PE_datarel unspecified for this architecture.\n"
msgstr ""
#: elf-ifunc.c:135
msgid ""
"%F%P: dynamic STT_GNU_IFUNC symbol `%s' with pointer equality in `%B' can "
"not be used when making an executable; recompile with -fPIE and relink with -"
"pie\n"
msgstr ""
#: elf-m10200.c:430 elf-m10300.c:2164 elf32-avr.c:1256 elf32-bfin.c:3220
#: elf32-cr16.c:1484 elf32-cr16c.c:780 elf32-cris.c:2016 elf32-crx.c:922
#: elf32-d10v.c:513 elf32-epiphany.c:557 elf32-fr30.c:589 elf32-frv.c:4039
#: elf32-h8300.c:525 elf32-i860.c:1212 elf32-ip2k.c:1468 elf32-iq2000.c:688
#: elf32-lm32.c:1160 elf32-m32c.c:553 elf32-m32r.c:3066 elf32-m68hc1x.c:1283
#: elf32-mep.c:535 elf32-metag.c:1992 elf32-microblaze.c:1560
#: elf32-moxie.c:282 elf32-mt.c:395 elf32-nds32.c:4910 elf32-openrisc.c:404
#: elf32-score.c:2729 elf32-score7.c:2537 elf32-spu.c:5041
#: elf32-tilepro.c:3666 elf32-v850.c:2281 elf32-xstormy16.c:936
#: elf64-mmix.c:1538 elfxx-tilegx.c:4051
msgid "internal error: out of range error"
msgstr ""
#: elf-m10200.c:434 elf-m10300.c:2168 elf32-avr.c:1260 elf32-bfin.c:3224
#: elf32-cr16.c:1488 elf32-cr16c.c:784 elf32-cris.c:2020 elf32-crx.c:926
#: elf32-d10v.c:517 elf32-fr30.c:593 elf32-frv.c:4043 elf32-h8300.c:529
#: elf32-i860.c:1216 elf32-iq2000.c:692 elf32-lm32.c:1164 elf32-m32c.c:557
#: elf32-m32r.c:3070 elf32-m68hc1x.c:1287 elf32-mep.c:539 elf32-metag.c:1996
#: elf32-microblaze.c:1564 elf32-moxie.c:286 elf32-msp430.c:1321
#: elf32-nds32.c:4914 elf32-openrisc.c:408 elf32-score.c:2733
#: elf32-score7.c:2541 elf32-spu.c:5045 elf32-tilepro.c:3670 elf32-v850.c:2285
#: elf32-xstormy16.c:940 elf64-mmix.c:1542 elfxx-mips.c:9995
#: elfxx-tilegx.c:4055
msgid "internal error: unsupported relocation error"
msgstr ""
#: elf-m10200.c:438 elf32-cr16.c:1492 elf32-cr16c.c:788 elf32-crx.c:930
#: elf32-d10v.c:521 elf32-h8300.c:533 elf32-lm32.c:1168 elf32-m32r.c:3074
#: elf32-m68hc1x.c:1291 elf32-microblaze.c:1568 elf32-nds32.c:4918
#: elf32-score.c:2737 elf32-score7.c:2545 elf32-spu.c:5049
msgid "internal error: dangerous error"
msgstr ""
#: elf-m10200.c:442 elf-m10300.c:2184 elf32-avr.c:1268 elf32-bfin.c:3232
#: elf32-cr16.c:1496 elf32-cr16c.c:792 elf32-cris.c:2028 elf32-crx.c:934
#: elf32-d10v.c:525 elf32-epiphany.c:572 elf32-fr30.c:601 elf32-frv.c:4051
#: elf32-h8300.c:537 elf32-i860.c:1224 elf32-ip2k.c:1483 elf32-iq2000.c:700
#: elf32-lm32.c:1172 elf32-m32c.c:565 elf32-m32r.c:3078 elf32-m68hc1x.c:1295
#: elf32-mep.c:547 elf32-metag.c:2004 elf32-microblaze.c:1572
#: elf32-moxie.c:294 elf32-msp430.c:1329 elf32-mt.c:403 elf32-nds32.c:4922
#: elf32-openrisc.c:416 elf32-score.c:2746 elf32-score7.c:2549
#: elf32-spu.c:5053 elf32-tilepro.c:3678 elf32-v850.c:2305
#: elf32-xstormy16.c:948 elf64-mmix.c:1550 elfxx-tilegx.c:4063
msgid "internal error: unknown error"
msgstr ""
#: elf-m10300.c:1021
#, c-format
msgid "%s: Unsupported transition from %s to %s"
msgstr ""
#: elf-m10300.c:1213
msgid "%B: %s' accessed both as normal and thread local symbol"
msgstr ""
#: elf-m10300.c:2108 elf32-arm.c:10632 elf32-i386.c:4363 elf32-m32r.c:2558
#: elf32-m68k.c:4120 elf32-s390.c:3303 elf32-sh.c:4109 elf32-tilepro.c:3569
#: elf32-xtensa.c:3063 elf64-s390.c:3229 elf64-sh64.c:1640 elf64-x86-64.c:4463
#: elfxx-sparc.c:3904 elfxx-tilegx.c:3974
#: /src/binutils-gdb/bfd/elfnn-aarch64.c:4450
msgid "%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"
msgstr ""
#: elf-m10300.c:2173
msgid ""
"error: inappropriate relocation type for shared library (did you forget -"
"fpic?)"
msgstr ""
#: elf-m10300.c:2176
msgid ""
"%B: taking the address of protected function '%s' cannot be done when making "
"a shared library"
msgstr ""
#: elf-m10300.c:2179
msgid "internal error: suspicious relocation type used in shared library"
msgstr ""
#: elf.c:343
msgid "%B: invalid string offset %u >= %lu for section `%s'"
msgstr ""
#: elf.c:455
msgid "%B symbol number %lu references nonexistent SHT_SYMTAB_SHNDX section"
msgstr ""
#: elf.c:611
msgid "%B: Corrupt size field in group section header: 0x%lx"
msgstr ""
#: elf.c:647
msgid "%B: invalid SHT_GROUP entry"
msgstr ""
#: elf.c:717
msgid "%B: no group info for section %A"
msgstr ""
#: elf.c:746 elf.c:3144 elflink.c:10290
msgid "%B: warning: sh_link not set for section `%A'"
msgstr ""
#: elf.c:765
msgid "%B: sh_link [%d] in section `%A' is incorrect"
msgstr ""
#: elf.c:800
msgid "%B: unknown [%d] section `%s' in group [%s]"
msgstr ""
#: elf.c:1174
#, c-format
msgid ""
"\n"
"Program Header:\n"
msgstr ""
#: elf.c:1216
#, c-format
msgid ""
"\n"
"Dynamic Section:\n"
msgstr ""
#: elf.c:1352
#, c-format
msgid ""
"\n"
"Version definitions:\n"
msgstr ""
#: elf.c:1377
#, c-format
msgid ""
"\n"
"Version References:\n"
msgstr ""
#: elf.c:1382
#, c-format
msgid " required from %s:\n"
msgstr ""
#: elf.c:1807
msgid "%B: invalid link %lu for reloc section %s (index %u)"
msgstr ""
#: elf.c:1977
msgid ""
"%B: don't know how to handle allocated, application specific section `%s' [0x"
"%8x]"
msgstr ""
#: elf.c:1989
msgid "%B: don't know how to handle processor specific section `%s' [0x%8x]"
msgstr ""
#: elf.c:2000
msgid "%B: don't know how to handle OS specific section `%s' [0x%8x]"
msgstr ""
#: elf.c:2010
msgid "%B: don't know how to handle section `%s' [0x%8x]"
msgstr ""
#: elf.c:2648
#, c-format
msgid "warning: section `%A' type changed to PROGBITS"
msgstr ""
#: elf.c:3015
msgid "%B: too many sections: %u"
msgstr ""
2011-06-02 13:43:24 +00:00
#: elf.c:3101
msgid "%B: sh_link of section `%A' points to discarded section `%A' of `%B'"
msgstr ""
#: elf.c:3124
msgid "%B: sh_link of section `%A' points to removed section `%A' of `%B'"
msgstr ""
#: elf.c:4126
msgid "%B: TLS sections are not adjacent:"
msgstr ""
#: elf.c:4133
#, c-format
msgid "\t TLS: %A"
msgstr ""
#: elf.c:4137
#, c-format
msgid "\tnon-TLS: %A"
msgstr ""
#: elf.c:4596
msgid ""
"%B: The first section in the PT_DYNAMIC segment is not the .dynamic section"
msgstr ""
#: elf.c:4621
msgid "%B: Not enough room for program headers, try linking with -N"
msgstr ""
#: elf.c:4707
msgid "%B: section %A lma %#lx adjusted to %#lx"
msgstr ""
#: elf.c:4843
msgid "%B: section `%A' can't be allocated in segment %d"
msgstr ""
#: elf.c:4892
msgid "%B: warning: allocated section `%s' not in segment"
msgstr ""
#: elf.c:5473
msgid "%B: symbol `%s' required but not present"
msgstr ""
#: elf.c:5811
msgid "%B: warning: Empty loadable segment detected, is this intentional ?\n"
msgstr ""
#: elf.c:6867
#, c-format
msgid ""
"Unable to find equivalent output section for symbol '%s' from section '%s'"
msgstr ""
#: elf.c:7915
msgid "%B: unsupported relocation type %s"
msgstr ""
#: elf32-arm.c:3722 elf32-arm.c:7051
msgid ""
"%B(%s): warning: interworking not enabled.\n"
" first occurrence: %B: Thumb call to ARM"
msgstr ""
#: elf32-arm.c:3769
msgid ""
"%B(%s): warning: interworking not enabled.\n"
" first occurrence: %B: ARM call to Thumb"
msgstr ""
#: elf32-arm.c:3988 elf32-arm.c:5433
#: /src/binutils-gdb/bfd/elfnn-aarch64.c:2324
#, c-format
msgid "%s: cannot create stub entry %s"
msgstr ""
#: elf32-arm.c:5549
2007-07-02 07:12:53 +00:00
#, c-format
msgid "unable to find THUMB glue '%s' for '%s'"
msgstr ""
#: elf32-arm.c:5585
2007-07-02 07:12:53 +00:00
#, c-format
msgid "unable to find ARM glue '%s' for '%s'"
msgstr ""
#: elf32-arm.c:6123
msgid "%B: BE8 images only valid in big-endian mode."
msgstr ""
2007-07-02 07:12:53 +00:00
#. Give a warning, but do as the user requests anyway.
#: elf32-arm.c:6353
2007-07-02 07:12:53 +00:00
msgid ""
"%B: warning: selected VFP11 erratum workaround is not necessary for target "
"architecture"
msgstr ""
#: elf32-arm.c:6897 elf32-arm.c:6917
2007-07-02 07:12:53 +00:00
msgid "%B: unable to find VFP11 veneer `%s'"
msgstr ""
#: elf32-arm.c:6966
2005-03-05 12:14:34 +00:00
#, c-format
msgid "Invalid TARGET2 relocation type '%s'."
msgstr ""
#. PR ld/16017: Do not generate ARM instructions for
#. the PLT if compiling for a thumb-only target.
#.
#. FIXME: We ought to be able to generate thumb PLT instructions...
#: elf32-arm.c:7696
msgid "%B: Warning: thumb mode PLT generation not currently supported"
msgstr ""
#: elf32-arm.c:7909
2011-06-02 13:43:24 +00:00
msgid "%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"
msgstr ""
#: elf32-arm.c:7948
2011-06-02 13:43:24 +00:00
msgid "%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"
msgstr ""
#: elf32-arm.c:8412
msgid "\\%B: Warning: Arm BLX instruction targets Arm function '%s'."
msgstr ""
#: elf32-arm.c:8831
msgid "%B: Warning: Thumb BLX instruction targets thumb function '%s'."
msgstr ""
#: elf32-arm.c:9672
2011-06-02 13:43:24 +00:00
msgid ""
"%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"
msgstr ""
#: elf32-arm.c:9695
2011-06-02 13:43:24 +00:00
msgid ""
"%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"
msgstr ""
#: elf32-arm.c:9724
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid "%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"
msgstr ""
#: elf32-arm.c:9937
2007-07-02 07:12:53 +00:00
msgid ""
"%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group "
"relocations"
msgstr ""
#: elf32-arm.c:9977 elf32-arm.c:10065 elf32-arm.c:10149 elf32-arm.c:10235
2007-07-02 07:12:53 +00:00
msgid "%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"
msgstr ""
#: elf32-arm.c:10474 elf32-sh.c:3994 elf64-sh64.c:1544
msgid "%B(%A+0x%lx): %s relocation against SEC_MERGE section"
msgstr ""
#: elf32-arm.c:10585 elf32-m68k.c:4155 elf32-xtensa.c:2799
#: /src/binutils-gdb/bfd/elfnn-aarch64.c:4192
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid "%B(%A+0x%lx): %s used with TLS symbol %s"
msgstr ""
#: elf32-arm.c:10586 elf32-m68k.c:4156 elf32-xtensa.c:2800
#: /src/binutils-gdb/bfd/elfnn-aarch64.c:4193
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid "%B(%A+0x%lx): %s used with non-TLS symbol %s"
msgstr ""
#: elf32-arm.c:10666 elf32-tic6x.c:2736
#: /src/binutils-gdb/bfd/elfnn-aarch64.c:4481
2007-07-02 07:12:53 +00:00
msgid "out of range"
2002-01-17 14:12:08 +00:00
msgstr ""
#: elf32-arm.c:10670 elf32-nios2.c:3525 elf32-tic6x.c:2740
#: /src/binutils-gdb/bfd/elfnn-aarch64.c:4485
2007-07-02 07:12:53 +00:00
msgid "unsupported relocation"
2002-01-17 14:12:08 +00:00
msgstr ""
#: elf32-arm.c:10678 elf32-nios2.c:3535 elf32-tic6x.c:2748
#: /src/binutils-gdb/bfd/elfnn-aarch64.c:4493
2007-07-02 07:12:53 +00:00
msgid "unknown error"
2002-01-17 14:12:08 +00:00
msgstr ""
#: elf32-arm.c:11153
2002-01-17 14:12:08 +00:00
msgid ""
"Warning: Clearing the interworking flag of %B because non-interworking code "
"in %B has been linked with it"
2000-02-27 16:55:52 +00:00
msgstr ""
#: elf32-arm.c:11240
msgid "%B: Unknown mandatory EABI object attribute %d"
msgstr ""
#: elf32-arm.c:11248
msgid "Warning: %B: Unknown EABI object attribute %d"
msgstr ""
#: elf32-arm.c:11449
msgid "error: %B: Unknown CPU architecture"
msgstr ""
#: elf32-arm.c:11487
msgid "error: %B: Conflicting CPU architectures %d/%d"
msgstr ""
#: elf32-arm.c:11576
msgid ""
"Error: %B has both the current and legacy Tag_MPextension_use attributes"
msgstr ""
#: elf32-arm.c:11601
msgid "error: %B uses VFP register arguments, %B does not"
2005-10-25 02:20:17 +00:00
msgstr ""
#: elf32-arm.c:11747
msgid "error: %B: unable to merge virtualization attributes with %B"
msgstr ""
#: elf32-arm.c:11773
msgid "error: %B: Conflicting architecture profiles %c/%c"
2005-10-25 02:20:17 +00:00
msgstr ""
#: elf32-arm.c:11877
2005-10-25 02:20:17 +00:00
msgid "Warning: %B: Conflicting platform configuration"
msgstr ""
#: elf32-arm.c:11886
msgid "error: %B: Conflicting use of R9"
2005-10-25 02:20:17 +00:00
msgstr ""
#: elf32-arm.c:11898
msgid "error: %B: SB relative addressing conflicts with use of R9"
2005-10-25 02:20:17 +00:00
msgstr ""
#: elf32-arm.c:11911
msgid ""
"warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; "
"use of wchar_t values across objects may fail"
2005-10-25 02:20:17 +00:00
msgstr ""
#: elf32-arm.c:11942
2007-07-02 07:12:53 +00:00
msgid ""
"warning: %B uses %s enums yet the output is to use %s enums; use of enum "
"values across objects may fail"
2005-10-25 02:20:17 +00:00
msgstr ""
#: elf32-arm.c:11954
msgid "error: %B uses iWMMXt register arguments, %B does not"
msgstr ""
#: elf32-arm.c:11971
msgid "error: fp16 format mismatch between %B and %B"
2005-10-25 02:20:17 +00:00
msgstr ""
#: elf32-arm.c:12007
msgid "%B has has both the current and legacy Tag_MPextension_use attributes"
2001-10-30 15:20:14 +00:00
msgstr ""
#. Ignore init flag - it may not be set, despite the flags field
#. containing valid data.
#. Ignore init flag - it may not be set, despite the flags field containing valid data.
#. Ignore init flag - it may not be set, despite the flags field
#. containing valid data.
#: elf32-arm.c:12095 elf32-bfin.c:4949 elf32-cris.c:4139 elf32-m68hc1x.c:1427
#: elf32-m68k.c:1195 elf32-score.c:4004 elf32-score7.c:3808 elf32-vax.c:529
#: elf32-xgate.c:674 elfxx-mips.c:14955
#: /src/binutils-gdb/bfd/elfnn-aarch64.c:4645
2000-02-27 16:55:52 +00:00
#, c-format
msgid "private flags = %lx:"
msgstr ""
#: elf32-arm.c:12104
#, c-format
2000-02-27 16:55:52 +00:00
msgid " [interworking enabled]"
msgstr ""
#: elf32-arm.c:12112
#, c-format
2002-01-17 14:12:08 +00:00
msgid " [VFP float format]"
msgstr ""
#: elf32-arm.c:12114
#, c-format
msgid " [Maverick float format]"
msgstr ""
#: elf32-arm.c:12116
#, c-format
2002-01-17 14:12:08 +00:00
msgid " [FPA float format]"
msgstr ""
#: elf32-arm.c:12125
#, c-format
msgid " [new ABI]"
msgstr ""
#: elf32-arm.c:12128
#, c-format
msgid " [old ABI]"
msgstr ""
#: elf32-arm.c:12131
#, c-format
msgid " [software FP]"
msgstr ""
#: elf32-arm.c:12140
#, c-format
msgid " [Version1 EABI]"
msgstr ""
#: elf32-arm.c:12143 elf32-arm.c:12154
#, c-format
msgid " [sorted symbol table]"
msgstr ""
#: elf32-arm.c:12145 elf32-arm.c:12156
#, c-format
msgid " [unsorted symbol table]"
msgstr ""
#: elf32-arm.c:12151
#, c-format
2001-03-06 20:15:27 +00:00
msgid " [Version2 EABI]"
msgstr ""
#: elf32-arm.c:12159
#, c-format
2001-03-06 20:15:27 +00:00
msgid " [dynamic symbols use segment index]"
msgstr ""
#: elf32-arm.c:12162
#, c-format
2001-03-06 20:15:27 +00:00
msgid " [mapping symbols precede others]"
msgstr ""
#: elf32-arm.c:12169
* Makefile.am: Remove all mention of elflink.h. * Makefile.in: Regenerate. * bfd-in.h (bfd_elf_discard_info): Declare. (bfd_elf32_discard_info, bfd_elf64_discard_info): Delete. * bfd-in2.h: Regenerate. * elf-bfd.h (bfd_elf32_print_symbol, bfd_elf64_print_symbol, bfd_elf32_link_record_dynamic_symbol, bfd_elf64_link_record_dynamic_symbol, _bfd_elf_link_record_dynamic_symbol, bfd_elf32_bfd_final_link, bfd_elf64_bfd_final_link, elf_link_record_local_dynamic_symbol, _bfd_elf32_link_record_local_dynamic_symbol, _bfd_elf64_link_record_local_dynamic_symbol, _bfd_elf32_gc_sections, _bfd_elf32_gc_common_finalize_got_offsets, _bfd_elf32_gc_common_final_link, _bfd_elf64_gc_common_final_link, _bfd_elf32_gc_record_vtinherit, _bfd_elf32_gc_record_vtentry, _bfd_elf64_gc_sections, _bfd_elf64_gc_common_finalize_got_offsets, _bfd_elf64_gc_record_vtinherit, _bfd_elf64_gc_record_vtentry, _bfd_elf32_reloc_symbol_deleted_p, _bfd_elf64_reloc_symbol_deleted_p): Delete. (bfd_elf_link_record_dynamic_symbol, bfd_elf_link_record_local_dynamic_symbol, bfd_elf_final_link, bfd_elf_gc_sections, bfd_elf_gc_record_vtinherit, bfd_elf_gc_record_vtentry, bfd_elf_gc_common_finalize_got_offsets, bfd_elf_gc_common_final_link, bfd_elf_reloc_symbol_deleted_p): Declare. (WILL_CALL_FINISH_DYNAMIC_SYMBOL): Define. * elf32-arm.h: Update for changed function names. Remove local WILL_CALL_FINISH_DYNAMIC_SECTION define. * elf-hppa.h, elf-m10300.c, elf32-cris.c, elf32-d10v.c, elf32-dlx.c, * elf32-fr30.c, elf32-frv.c, elf32-h8300.c, elf32-hppa.c, elf32-i386.c, * elf32-iq2000.c, elf32-m32r.c, elf32-m68hc1x.c, elf32-m68k.c, * elf32-mcore.c, elf32-openrisc.c, elf32-ppc.c, elf32-s390.c, * elf32-sh.c, elf32-sparc.c, elf32-v850.c, elf32-vax.c, * elf32-xstormy16.c, elf32-xtensa.c, elf64-alpha.c, elf64-hppa.c, * elf64-mmix.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c, elf64-sparc.c, * elf64-x86-64.c, elfxx-ia64.c, elfxx-mips.c, elfxx-target.h: Likewise. * elfxx-target.h (bfd_elfNN_bfd_final_link): Define. (bfd_elfNN_print_symbol): Define. * elfcode.h: Don't include elflink.h. (elf_bfd_discard_info, elf_reloc_symbol_deleted_p, elf_link_record_dynamic_symbol, elf_bfd_final_link, elf_gc_sections, elf_gc_common_finalize_got_offsets, elf_gc_common_final_link, elf_gc_record_vtinherit, elf_gc_record_vtentry, elf_link_record_local_dynamic_symbol): Don't define. * elflink.c: Update for changed function names. Move elflink.h code here. * elflink.h: Delete file. * po/SRC-POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. doc/ * bfdint.texi: Remove all mention of elflink.h.
2004-03-27 10:58:09 +00:00
#, c-format
msgid " [Version3 EABI]"
msgstr ""
#: elf32-arm.c:12173
2005-03-05 12:14:34 +00:00
#, c-format
msgid " [Version4 EABI]"
msgstr ""
#: elf32-arm.c:12177
2007-07-02 07:12:53 +00:00
#, c-format
msgid " [Version5 EABI]"
msgstr ""
#: elf32-arm.c:12180
#, c-format
msgid " [soft-float ABI]"
msgstr ""
#: elf32-arm.c:12183
#, c-format
msgid " [hard-float ABI]"
msgstr ""
#: elf32-arm.c:12189
* Makefile.am: Remove all mention of elflink.h. * Makefile.in: Regenerate. * bfd-in.h (bfd_elf_discard_info): Declare. (bfd_elf32_discard_info, bfd_elf64_discard_info): Delete. * bfd-in2.h: Regenerate. * elf-bfd.h (bfd_elf32_print_symbol, bfd_elf64_print_symbol, bfd_elf32_link_record_dynamic_symbol, bfd_elf64_link_record_dynamic_symbol, _bfd_elf_link_record_dynamic_symbol, bfd_elf32_bfd_final_link, bfd_elf64_bfd_final_link, elf_link_record_local_dynamic_symbol, _bfd_elf32_link_record_local_dynamic_symbol, _bfd_elf64_link_record_local_dynamic_symbol, _bfd_elf32_gc_sections, _bfd_elf32_gc_common_finalize_got_offsets, _bfd_elf32_gc_common_final_link, _bfd_elf64_gc_common_final_link, _bfd_elf32_gc_record_vtinherit, _bfd_elf32_gc_record_vtentry, _bfd_elf64_gc_sections, _bfd_elf64_gc_common_finalize_got_offsets, _bfd_elf64_gc_record_vtinherit, _bfd_elf64_gc_record_vtentry, _bfd_elf32_reloc_symbol_deleted_p, _bfd_elf64_reloc_symbol_deleted_p): Delete. (bfd_elf_link_record_dynamic_symbol, bfd_elf_link_record_local_dynamic_symbol, bfd_elf_final_link, bfd_elf_gc_sections, bfd_elf_gc_record_vtinherit, bfd_elf_gc_record_vtentry, bfd_elf_gc_common_finalize_got_offsets, bfd_elf_gc_common_final_link, bfd_elf_reloc_symbol_deleted_p): Declare. (WILL_CALL_FINISH_DYNAMIC_SYMBOL): Define. * elf32-arm.h: Update for changed function names. Remove local WILL_CALL_FINISH_DYNAMIC_SECTION define. * elf-hppa.h, elf-m10300.c, elf32-cris.c, elf32-d10v.c, elf32-dlx.c, * elf32-fr30.c, elf32-frv.c, elf32-h8300.c, elf32-hppa.c, elf32-i386.c, * elf32-iq2000.c, elf32-m32r.c, elf32-m68hc1x.c, elf32-m68k.c, * elf32-mcore.c, elf32-openrisc.c, elf32-ppc.c, elf32-s390.c, * elf32-sh.c, elf32-sparc.c, elf32-v850.c, elf32-vax.c, * elf32-xstormy16.c, elf32-xtensa.c, elf64-alpha.c, elf64-hppa.c, * elf64-mmix.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c, elf64-sparc.c, * elf64-x86-64.c, elfxx-ia64.c, elfxx-mips.c, elfxx-target.h: Likewise. * elfxx-target.h (bfd_elfNN_bfd_final_link): Define. (bfd_elfNN_print_symbol): Define. * elfcode.h: Don't include elflink.h. (elf_bfd_discard_info, elf_reloc_symbol_deleted_p, elf_link_record_dynamic_symbol, elf_bfd_final_link, elf_gc_sections, elf_gc_common_finalize_got_offsets, elf_gc_common_final_link, elf_gc_record_vtinherit, elf_gc_record_vtentry, elf_link_record_local_dynamic_symbol): Don't define. * elflink.c: Update for changed function names. Move elflink.h code here. * elflink.h: Delete file. * po/SRC-POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. doc/ * bfdint.texi: Remove all mention of elflink.h.
2004-03-27 10:58:09 +00:00
#, c-format
msgid " [BE8]"
msgstr ""
#: elf32-arm.c:12192
* Makefile.am: Remove all mention of elflink.h. * Makefile.in: Regenerate. * bfd-in.h (bfd_elf_discard_info): Declare. (bfd_elf32_discard_info, bfd_elf64_discard_info): Delete. * bfd-in2.h: Regenerate. * elf-bfd.h (bfd_elf32_print_symbol, bfd_elf64_print_symbol, bfd_elf32_link_record_dynamic_symbol, bfd_elf64_link_record_dynamic_symbol, _bfd_elf_link_record_dynamic_symbol, bfd_elf32_bfd_final_link, bfd_elf64_bfd_final_link, elf_link_record_local_dynamic_symbol, _bfd_elf32_link_record_local_dynamic_symbol, _bfd_elf64_link_record_local_dynamic_symbol, _bfd_elf32_gc_sections, _bfd_elf32_gc_common_finalize_got_offsets, _bfd_elf32_gc_common_final_link, _bfd_elf64_gc_common_final_link, _bfd_elf32_gc_record_vtinherit, _bfd_elf32_gc_record_vtentry, _bfd_elf64_gc_sections, _bfd_elf64_gc_common_finalize_got_offsets, _bfd_elf64_gc_record_vtinherit, _bfd_elf64_gc_record_vtentry, _bfd_elf32_reloc_symbol_deleted_p, _bfd_elf64_reloc_symbol_deleted_p): Delete. (bfd_elf_link_record_dynamic_symbol, bfd_elf_link_record_local_dynamic_symbol, bfd_elf_final_link, bfd_elf_gc_sections, bfd_elf_gc_record_vtinherit, bfd_elf_gc_record_vtentry, bfd_elf_gc_common_finalize_got_offsets, bfd_elf_gc_common_final_link, bfd_elf_reloc_symbol_deleted_p): Declare. (WILL_CALL_FINISH_DYNAMIC_SYMBOL): Define. * elf32-arm.h: Update for changed function names. Remove local WILL_CALL_FINISH_DYNAMIC_SECTION define. * elf-hppa.h, elf-m10300.c, elf32-cris.c, elf32-d10v.c, elf32-dlx.c, * elf32-fr30.c, elf32-frv.c, elf32-h8300.c, elf32-hppa.c, elf32-i386.c, * elf32-iq2000.c, elf32-m32r.c, elf32-m68hc1x.c, elf32-m68k.c, * elf32-mcore.c, elf32-openrisc.c, elf32-ppc.c, elf32-s390.c, * elf32-sh.c, elf32-sparc.c, elf32-v850.c, elf32-vax.c, * elf32-xstormy16.c, elf32-xtensa.c, elf64-alpha.c, elf64-hppa.c, * elf64-mmix.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c, elf64-sparc.c, * elf64-x86-64.c, elfxx-ia64.c, elfxx-mips.c, elfxx-target.h: Likewise. * elfxx-target.h (bfd_elfNN_bfd_final_link): Define. (bfd_elfNN_print_symbol): Define. * elfcode.h: Don't include elflink.h. (elf_bfd_discard_info, elf_reloc_symbol_deleted_p, elf_link_record_dynamic_symbol, elf_bfd_final_link, elf_gc_sections, elf_gc_common_finalize_got_offsets, elf_gc_common_final_link, elf_gc_record_vtinherit, elf_gc_record_vtentry, elf_link_record_local_dynamic_symbol): Don't define. * elflink.c: Update for changed function names. Move elflink.h code here. * elflink.h: Delete file. * po/SRC-POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. doc/ * bfdint.texi: Remove all mention of elflink.h.
2004-03-27 10:58:09 +00:00
#, c-format
msgid " [LE8]"
msgstr ""
#: elf32-arm.c:12198
#, c-format
msgid " <EABI version unrecognised>"
msgstr ""
#: elf32-arm.c:12205
#, c-format
msgid " [relocatable executable]"
msgstr ""
#: elf32-arm.c:12208
#, c-format
msgid " [has entry point]"
msgstr ""
#: elf32-arm.c:12213 /src/binutils-gdb/bfd/elfnn-aarch64.c:4648
#, c-format
msgid "<Unrecognised flag bits set>"
msgstr ""
#: elf32-arm.c:12522 elf32-i386.c:1452 elf32-s390.c:1005 elf32-tic6x.c:2812
#: elf32-tilepro.c:1511 elf32-xtensa.c:999 elf64-s390.c:927
#: elf64-x86-64.c:1467 elfxx-sparc.c:1415 elfxx-tilegx.c:1728
#: /src/binutils-gdb/bfd/elfnn-aarch64.c:5038
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid "%B: bad symbol index: %d"
msgstr ""
#: elf32-arm.c:12674 elf32-metag.c:2283 elf64-x86-64.c:1593
#: elf64-x86-64.c:1771 elfxx-mips.c:8482
msgid ""
"%B: relocation %s against `%s' can not be used when making a shared object; "
"recompile with -fPIC"
2005-10-25 02:20:17 +00:00
msgstr ""
#: elf32-arm.c:13796
2007-07-02 07:12:53 +00:00
#, c-format
msgid "Errors encountered processing file %s"
msgstr ""
#: elf32-arm.c:14230
#, c-format
msgid "error: required section '%s' not found in the linker script"
msgstr ""
#: elf32-arm.c:15252
msgid "%B: error: Cortex-A8 erratum stub is allocated in unsafe location"
2007-07-02 07:12:53 +00:00
msgstr ""
#. There's not much we can do apart from complain if this
#. happens.
#: elf32-arm.c:15279
msgid "%B: error: Cortex-A8 erratum stub out of range (input file too large)"
2007-07-02 07:12:53 +00:00
msgstr ""
#: elf32-arm.c:15373 elf32-arm.c:15395
msgid "%B: error: VFP11 veneer out of range"
2007-07-02 07:12:53 +00:00
msgstr ""
#: elf32-arm.c:16020
msgid "error: %B is already in final BE8 format"
msgstr ""
#: elf32-arm.c:16096
msgid ""
2011-06-02 13:43:24 +00:00
"error: Source object %B has EABI version %d, but target %B has EABI version "
"%d"
msgstr ""
#: elf32-arm.c:16112
msgid "error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"
msgstr ""
#: elf32-arm.c:16137
msgid "error: %B uses VFP instructions, whereas %B does not"
msgstr ""
#: elf32-arm.c:16141
msgid "error: %B uses FPA instructions, whereas %B does not"
msgstr ""
#: elf32-arm.c:16151
msgid "error: %B uses Maverick instructions, whereas %B does not"
msgstr ""
#: elf32-arm.c:16155
msgid "error: %B does not use Maverick instructions, whereas %B does"
msgstr ""
#: elf32-arm.c:16174
msgid "error: %B uses software FP, whereas %B uses hardware FP"
msgstr ""
#: elf32-arm.c:16178
msgid "error: %B uses hardware FP, whereas %B uses software FP"
msgstr ""
#: elf32-avr.c:1264 elf32-bfin.c:3228 elf32-cris.c:2024 elf32-epiphany.c:568
#: elf32-fr30.c:597 elf32-frv.c:4047 elf32-i860.c:1220 elf32-ip2k.c:1479
#: elf32-iq2000.c:696 elf32-m32c.c:561 elf32-mep.c:543 elf32-metag.c:2000
#: elf32-moxie.c:290 elf32-msp430.c:1325 elf32-mt.c:399 elf32-openrisc.c:412
#: elf32-tilepro.c:3674 elf32-v850.c:2289 elf32-xstormy16.c:944
#: elf64-mmix.c:1546 elfxx-tilegx.c:4059
2000-02-27 16:55:52 +00:00
msgid "internal error: dangerous relocation"
msgstr ""
#: elf32-avr.c:2476 elf32-hppa.c:578 elf32-m68hc1x.c:160 elf32-metag.c:1197
#: elf32-nios2.c:1357
msgid "%B: cannot create stub entry %s"
2007-07-02 07:12:53 +00:00
msgstr ""
2011-06-02 13:43:24 +00:00
#: elf32-bfin.c:107 elf32-bfin.c:363
msgid "relocation should be even number"
msgstr ""
#: elf32-bfin.c:1601
msgid "%B(%A+0x%lx): unresolvable relocation against symbol `%s'"
2007-07-02 07:12:53 +00:00
msgstr ""
#: elf32-bfin.c:1634 elf32-i386.c:4406 elf32-m68k.c:4197 elf32-s390.c:3364
#: elf64-s390.c:3290 elf64-x86-64.c:4506
msgid "%B(%A+0x%lx): reloc against `%s': error %d"
msgstr ""
#: elf32-bfin.c:2732
2007-07-02 07:12:53 +00:00
msgid "%B: relocation at `%A+0x%x' references symbol `%s' with nonzero addend"
msgstr ""
#: elf32-bfin.c:2748
2007-07-02 07:12:53 +00:00
msgid "relocation references symbol not defined in the module"
msgstr ""
#: elf32-bfin.c:2845
2007-07-02 07:12:53 +00:00
msgid "R_BFIN_FUNCDESC references dynamic symbol with nonzero addend"
msgstr ""
#: elf32-bfin.c:2886 elf32-bfin.c:3009
2007-07-02 07:12:53 +00:00
msgid "cannot emit fixups in read-only section"
msgstr ""
#: elf32-bfin.c:2917 elf32-bfin.c:3047 elf32-lm32.c:1095 elf32-sh.c:4913
2007-07-02 07:12:53 +00:00
msgid "cannot emit dynamic relocations in read-only section"
msgstr ""
#: elf32-bfin.c:2967
2007-07-02 07:12:53 +00:00
msgid "R_BFIN_FUNCDESC_VALUE references dynamic symbol with nonzero addend"
2005-10-25 02:20:17 +00:00
msgstr ""
#: elf32-bfin.c:3132
2007-07-02 07:12:53 +00:00
msgid "relocations between different segments are not supported"
msgstr ""
#: elf32-bfin.c:3133
2007-07-02 07:12:53 +00:00
msgid "warning: relocation references a different segment"
msgstr ""
#: elf32-bfin.c:4907
2007-07-02 07:12:53 +00:00
msgid "%B: unsupported relocation type %i"
msgstr ""
#: elf32-bfin.c:4995 elf32-frv.c:6600
2007-07-02 07:12:53 +00:00
#, c-format
msgid "%s: cannot link non-fdpic object file into fdpic executable"
msgstr ""
#: elf32-bfin.c:4999 elf32-frv.c:6604
2007-07-02 07:12:53 +00:00
#, c-format
msgid "%s: cannot link fdpic object file into non-fdpic executable"
msgstr ""
#: elf32-bfin.c:5153
2011-06-02 13:43:24 +00:00
#, c-format
msgid "*** check this relocation %s"
msgstr ""
#: elf32-cris.c:1110
2005-03-05 12:14:34 +00:00
msgid "%B, section %A: unresolvable relocation %s against symbol `%s'"
msgstr ""
#: elf32-cris.c:1172
2005-03-05 12:14:34 +00:00
msgid "%B, section %A: No PLT nor GOT for relocation %s against symbol `%s'"
msgstr ""
#: elf32-cris.c:1174
2005-03-05 12:14:34 +00:00
msgid "%B, section %A: No PLT for relocation %s against symbol `%s'"
* Makefile.am: Remove all mention of elflink.h. * Makefile.in: Regenerate. * bfd-in.h (bfd_elf_discard_info): Declare. (bfd_elf32_discard_info, bfd_elf64_discard_info): Delete. * bfd-in2.h: Regenerate. * elf-bfd.h (bfd_elf32_print_symbol, bfd_elf64_print_symbol, bfd_elf32_link_record_dynamic_symbol, bfd_elf64_link_record_dynamic_symbol, _bfd_elf_link_record_dynamic_symbol, bfd_elf32_bfd_final_link, bfd_elf64_bfd_final_link, elf_link_record_local_dynamic_symbol, _bfd_elf32_link_record_local_dynamic_symbol, _bfd_elf64_link_record_local_dynamic_symbol, _bfd_elf32_gc_sections, _bfd_elf32_gc_common_finalize_got_offsets, _bfd_elf32_gc_common_final_link, _bfd_elf64_gc_common_final_link, _bfd_elf32_gc_record_vtinherit, _bfd_elf32_gc_record_vtentry, _bfd_elf64_gc_sections, _bfd_elf64_gc_common_finalize_got_offsets, _bfd_elf64_gc_record_vtinherit, _bfd_elf64_gc_record_vtentry, _bfd_elf32_reloc_symbol_deleted_p, _bfd_elf64_reloc_symbol_deleted_p): Delete. (bfd_elf_link_record_dynamic_symbol, bfd_elf_link_record_local_dynamic_symbol, bfd_elf_final_link, bfd_elf_gc_sections, bfd_elf_gc_record_vtinherit, bfd_elf_gc_record_vtentry, bfd_elf_gc_common_finalize_got_offsets, bfd_elf_gc_common_final_link, bfd_elf_reloc_symbol_deleted_p): Declare. (WILL_CALL_FINISH_DYNAMIC_SYMBOL): Define. * elf32-arm.h: Update for changed function names. Remove local WILL_CALL_FINISH_DYNAMIC_SECTION define. * elf-hppa.h, elf-m10300.c, elf32-cris.c, elf32-d10v.c, elf32-dlx.c, * elf32-fr30.c, elf32-frv.c, elf32-h8300.c, elf32-hppa.c, elf32-i386.c, * elf32-iq2000.c, elf32-m32r.c, elf32-m68hc1x.c, elf32-m68k.c, * elf32-mcore.c, elf32-openrisc.c, elf32-ppc.c, elf32-s390.c, * elf32-sh.c, elf32-sparc.c, elf32-v850.c, elf32-vax.c, * elf32-xstormy16.c, elf32-xtensa.c, elf64-alpha.c, elf64-hppa.c, * elf64-mmix.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c, elf64-sparc.c, * elf64-x86-64.c, elfxx-ia64.c, elfxx-mips.c, elfxx-target.h: Likewise. * elfxx-target.h (bfd_elfNN_bfd_final_link): Define. (bfd_elfNN_print_symbol): Define. * elfcode.h: Don't include elflink.h. (elf_bfd_discard_info, elf_reloc_symbol_deleted_p, elf_link_record_dynamic_symbol, elf_bfd_final_link, elf_gc_sections, elf_gc_common_finalize_got_offsets, elf_gc_common_final_link, elf_gc_record_vtinherit, elf_gc_record_vtentry, elf_link_record_local_dynamic_symbol): Don't define. * elflink.c: Update for changed function names. Move elflink.h code here. * elflink.h: Delete file. * po/SRC-POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. doc/ * bfdint.texi: Remove all mention of elflink.h.
2004-03-27 10:58:09 +00:00
msgstr ""
#: elf32-cris.c:1180 elf32-cris.c:1313 elf32-cris.c:1573 elf32-cris.c:1656
#: elf32-cris.c:1809 elf32-tic6x.c:2645
msgid "[whose name is lost]"
msgstr ""
#: elf32-cris.c:1299 elf32-tic6x.c:2630
2005-03-05 12:14:34 +00:00
msgid ""
"%B, section %A: relocation %s with non-zero addend %d against local symbol"
msgstr ""
#: elf32-cris.c:1307 elf32-cris.c:1650 elf32-cris.c:1803 elf32-tic6x.c:2638
2005-03-05 12:14:34 +00:00
msgid ""
"%B, section %A: relocation %s with non-zero addend %d against symbol `%s'"
msgstr ""
#: elf32-cris.c:1333
2005-03-05 12:14:34 +00:00
msgid "%B, section %A: relocation %s is not allowed for global symbol: `%s'"
msgstr ""
#: elf32-cris.c:1349
2005-03-05 12:14:34 +00:00
msgid "%B, section %A: relocation %s with no GOT created"
msgstr ""
#. We shouldn't get here for GCC-emitted code.
#: elf32-cris.c:1564
msgid ""
"%B, section %A: relocation %s has an undefined reference to `%s', perhaps a "
"declaration mixup?"
msgstr ""
#: elf32-cris.c:1937
msgid ""
"%B, section %A: relocation %s is not allowed for symbol: `%s' which is "
"defined outside the program, perhaps a declaration mixup?"
msgstr ""
#: elf32-cris.c:1990
msgid "(too many global variables for -fpic: recompile with -fPIC)"
msgstr ""
#: elf32-cris.c:1997
msgid ""
"(thread-local data too big for -fpic or -msmall-tls: recompile with -fPIC or "
"-mno-small-tls)"
msgstr ""
#: elf32-cris.c:3234
2005-03-05 12:14:34 +00:00
msgid ""
"%B, section %A:\n"
" v10/v32 compatible object %s must not contain a PIC relocation"
msgstr ""
#: elf32-cris.c:3342
msgid ""
"%B, section %A:\n"
" relocation %s not valid in a shared object; typically an option mixup, "
"recompile with -fPIC"
msgstr ""
#: elf32-cris.c:3556
msgid ""
"%B, section %A:\n"
" relocation %s should not be used in a shared object; recompile with -fPIC"
msgstr ""
#: elf32-cris.c:3978
msgid ""
"%B, section `%A', to symbol `%s':\n"
" relocation %s should not be used in a shared object; recompile with -fPIC"
msgstr ""
#: elf32-cris.c:4091
2005-03-05 12:14:34 +00:00
msgid "Unexpected machine number"
msgstr ""
#: elf32-cris.c:4142
#, c-format
msgid " [symbols have a _ prefix]"
msgstr ""
#: elf32-cris.c:4145
2005-03-05 12:14:34 +00:00
#, c-format
msgid " [v10 and v32]"
msgstr ""
#: elf32-cris.c:4148
2005-03-05 12:14:34 +00:00
#, c-format
msgid " [v32]"
msgstr ""
#: elf32-cris.c:4191
msgid "%B: uses _-prefixed symbols, but writing file with non-prefixed symbols"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elf32-cris.c:4192
msgid "%B: uses non-prefixed symbols, but writing file with _-prefixed symbols"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elf32-cris.c:4211
2005-03-05 12:14:34 +00:00
msgid "%B contains CRIS v32 code, incompatible with previous objects"
msgstr ""
#: elf32-cris.c:4213
2005-03-05 12:14:34 +00:00
msgid "%B contains non-CRIS-v32 code, incompatible with previous objects"
msgstr ""
2011-06-02 13:43:24 +00:00
#: elf32-dlx.c:142
#, c-format
msgid "BFD Link Error: branch (PC rel16) to section (%s) not supported"
msgstr ""
#: elf32-dlx.c:204
#, c-format
msgid "BFD Link Error: jump (PC rel26) to section (%s) not supported"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#. Only if it's not an unresolved symbol.
#: elf32-epiphany.c:564 elf32-ip2k.c:1475
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "unsupported relocation between data/insn address spaces"
msgstr ""
#: elf32-frv.c:1460 elf32-frv.c:1609
2005-03-05 12:14:34 +00:00
msgid "relocation requires zero addend"
msgstr ""
#: elf32-frv.c:2822
2011-06-02 13:43:24 +00:00
msgid "%H: relocation to `%s+%v' may have caused the error above\n"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf32-frv.c:2839
2011-06-02 13:43:24 +00:00
msgid "%H: relocation references symbol not defined in the module\n"
msgstr ""
#: elf32-frv.c:2915
2011-06-02 13:43:24 +00:00
msgid "%H: R_FRV_GETTLSOFF not applied to a call instruction\n"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf32-frv.c:2956
2011-06-02 13:43:24 +00:00
msgid "%H: R_FRV_GOTTLSDESC12 not applied to an lddi instruction\n"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf32-frv.c:3027
2011-06-02 13:43:24 +00:00
msgid "%H: R_FRV_GOTTLSDESCHI not applied to a sethi instruction\n"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf32-frv.c:3064
2011-06-02 13:43:24 +00:00
msgid "%H: R_FRV_GOTTLSDESCLO not applied to a setlo or setlos instruction\n"
msgstr ""
#: elf32-frv.c:3111
2011-06-02 13:43:24 +00:00
msgid "%H: R_FRV_TLSDESC_RELAX not applied to an ldd instruction\n"
msgstr ""
#: elf32-frv.c:3195
2011-06-02 13:43:24 +00:00
msgid "%H: R_FRV_GETTLSOFF_RELAX not applied to a calll instruction\n"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf32-frv.c:3249
2011-06-02 13:43:24 +00:00
msgid "%H: R_FRV_GOTTLSOFF12 not applied to an ldi instruction\n"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf32-frv.c:3279
2011-06-02 13:43:24 +00:00
msgid "%H: R_FRV_GOTTLSOFFHI not applied to a sethi instruction\n"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf32-frv.c:3308
2011-06-02 13:43:24 +00:00
msgid "%H: R_FRV_GOTTLSOFFLO not applied to a setlo or setlos instruction\n"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf32-frv.c:3338
2011-06-02 13:43:24 +00:00
msgid "%H: R_FRV_TLSOFF_RELAX not applied to an ld instruction\n"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf32-frv.c:3383
2011-06-02 13:43:24 +00:00
msgid "%H: R_FRV_TLSMOFFHI not applied to a sethi instruction\n"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf32-frv.c:3410
2011-06-02 13:43:24 +00:00
msgid "R_FRV_TLSMOFFLO not applied to a setlo or setlos instruction\n"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf32-frv.c:3531
2011-06-02 13:43:24 +00:00
msgid "%H: R_FRV_FUNCDESC references dynamic symbol with nonzero addend\n"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf32-frv.c:3572 elf32-frv.c:3694
2011-06-02 13:43:24 +00:00
msgid "%H: cannot emit fixups in read-only section\n"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf32-frv.c:3603 elf32-frv.c:3737
2011-06-02 13:43:24 +00:00
msgid "%H: cannot emit dynamic relocations in read-only section\n"
msgstr ""
#: elf32-frv.c:3652
2011-06-02 13:43:24 +00:00
msgid ""
"%H: R_FRV_FUNCDESC_VALUE references dynamic symbol with nonzero addend\n"
msgstr ""
#: elf32-frv.c:3908
2011-06-02 13:43:24 +00:00
msgid "%H: reloc against `%s' references a different segment\n"
msgstr ""
#: elf32-frv.c:4058
2011-06-02 13:43:24 +00:00
msgid "%H: reloc against `%s': %s\n"
msgstr ""
#: elf32-frv.c:6265
2011-06-02 13:43:24 +00:00
msgid "%B: unsupported relocation type %i\n"
msgstr ""
#: elf32-frv.c:6514
#, c-format
msgid ""
"%s: compiled with %s and linked with modules that use non-pic relocations"
msgstr ""
#: elf32-frv.c:6567 elf32-iq2000.c:828 elf32-m32c.c:812
#, c-format
msgid "%s: compiled with %s and linked with modules compiled with %s"
msgstr ""
#: elf32-frv.c:6579
#, c-format
msgid ""
2011-06-02 13:43:24 +00:00
"%s: uses different unknown e_flags (0x%lx) fields than previous modules (0x"
"%lx)"
msgstr ""
#: elf32-frv.c:6627 elf32-iq2000.c:865 elf32-m32c.c:848 elf32-mt.c:561
#: elf32-rl78.c:1069 elf32-rx.c:3040 elf64-ppc.c:5839
#, c-format
msgid "private flags = 0x%lx:"
msgstr ""
#: elf32-gen.c:69 elf64-gen.c:69
msgid "%B: Relocations in generic ELF (EM: %d)"
msgstr ""
#: elf32-hppa.c:830 elf32-hppa.c:3592
msgid "%B(%A+0x%lx): cannot reach %s, recompile with -ffunction-sections"
msgstr ""
#: elf32-hppa.c:1268
msgid ""
"%B: relocation %s can not be used when making a shared object; recompile "
"with -fPIC"
msgstr ""
#: elf32-hppa.c:2781
msgid "%B: duplicate export stub %s"
msgstr ""
#: elf32-hppa.c:3427
msgid ""
"%B(%A+0x%lx): %s fixup for insn 0x%x is not supported in a non-shared link"
msgstr ""
#: elf32-hppa.c:4279
msgid "%B(%A+0x%lx): cannot handle %s for %s"
msgstr ""
#: elf32-hppa.c:4598
2000-11-02 23:03:24 +00:00
msgid ".got section not immediately after .plt section"
msgstr ""
#. Unknown relocation.
#: elf32-i386.c:380 elf32-m68k.c:353 elf32-ppc.c:2035 elf32-s390.c:345
#: elf32-tic6x.c:2667 elf64-ppc.c:2427 elf64-s390.c:371 elf64-x86-64.c:281
msgid "%B: invalid relocation type %d"
1999-05-03 07:29:11 +00:00
msgstr ""
#: elf32-i386.c:1394 elf64-x86-64.c:1410
msgid ""
"%B: TLS transition from %s to %s against `%s' at 0x%lx in section `%A' failed"
msgstr ""
#: elf32-i386.c:1642 elf32-s390.c:1233 elf32-sh.c:6263 elf32-tilepro.c:1627
#: elf32-xtensa.c:1176 elf64-s390.c:1166 elfxx-sparc.c:1596
#: elfxx-tilegx.c:1836
msgid "%B: `%s' accessed both as normal and thread local symbol"
msgstr ""
#: elf32-i386.c:2500 elf64-x86-64.c:2582
2011-06-02 13:43:24 +00:00
msgid "%P: %B: warning: relocation against `%s' in readonly section `%A'.\n"
msgstr ""
#: elf32-i386.c:2740 elf64-x86-64.c:2820
2011-06-02 13:43:24 +00:00
msgid "%P: %B: warning: relocation in readonly section `%A'.\n"
msgstr ""
#: elf32-i386.c:3207 elf32-tilepro.c:2873 elf64-x86-64.c:3275
#: elfxx-tilegx.c:3172 /src/binutils-gdb/bfd/elfnn-aarch64.c:4099
msgid "%B: unrecognized relocation (0x%x) in section `%A'"
msgstr ""
#: elf32-i386.c:3368 elf64-x86-64.c:3380 elfxx-sparc.c:3150
#: /src/binutils-gdb/bfd/elfnn-aarch64.c:3496
msgid "%B: relocation %s against STT_GNU_IFUNC symbol `%s' isn't handled by %s"
msgstr ""
#: elf32-i386.c:3610 elf64-x86-64.c:3777
msgid "hidden symbol"
msgstr ""
#: elf32-i386.c:3613 elf64-x86-64.c:3780
msgid "internal symbol"
msgstr ""
#: elf32-i386.c:3616 elf64-x86-64.c:3783
msgid "protected symbol"
msgstr ""
#: elf32-i386.c:3619 elf64-x86-64.c:3786
msgid "symbol"
msgstr ""
#: elf32-i386.c:3624
msgid ""
"%B: relocation R_386_GOTOFF against undefined %s `%s' can not be used when "
"making a shared object"
msgstr ""
#: elf32-i386.c:3635
2005-03-05 12:14:34 +00:00
msgid ""
"%B: relocation R_386_GOTOFF against protected function `%s' can not be used "
"when making a shared object"
msgstr ""
#: elf32-i386.c:4923 elf32-tilepro.c:3923 elf64-x86-64.c:4964
#: elfxx-tilegx.c:4326 /src/binutils-gdb/bfd/elfnn-aarch64.c:7105
#, c-format
msgid "discarded output section: `%A'"
msgstr ""
#: elf32-ip2k.c:857 elf32-ip2k.c:863 elf32-ip2k.c:930 elf32-ip2k.c:936
msgid ""
"ip2k relaxer: switch table without complete matching relocation information."
1999-05-03 07:29:11 +00:00
msgstr ""
#: elf32-ip2k.c:880 elf32-ip2k.c:963
msgid "ip2k relaxer: switch table header corrupt."
1999-05-03 07:29:11 +00:00
msgstr ""
#: elf32-ip2k.c:1292
1999-05-03 07:29:11 +00:00
#, c-format
msgid "ip2k linker: missing page instruction at 0x%08lx (dest = 0x%08lx)."
1999-05-03 07:29:11 +00:00
msgstr ""
#: elf32-ip2k.c:1308
1999-05-03 07:29:11 +00:00
#, c-format
msgid "ip2k linker: redundant page instruction at 0x%08lx (dest = 0x%08lx)."
1999-05-03 07:29:11 +00:00
msgstr ""
#: elf32-iq2000.c:841 elf32-m32c.c:824
1999-05-03 07:29:11 +00:00
#, c-format
msgid "%s: uses different e_flags (0x%lx) fields than previous modules (0x%lx)"
1999-05-03 07:29:11 +00:00
msgstr ""
#: elf32-lm32.c:698 elf32-nios2.c:2191
msgid "global pointer relative relocation when _gp not defined"
msgstr ""
#: elf32-lm32.c:753 elf32-nios2.c:2623
msgid "global pointer relative address out of range"
msgstr ""
#: elf32-lm32.c:1049
msgid "internal error: addend should be zero for R_LM32_16_GOT"
msgstr ""
#: elf32-m32r.c:1453
msgid "SDA relocation when _SDA_BASE_ not defined"
1999-05-03 07:29:11 +00:00
msgstr ""
#: elf32-m32r.c:3003
msgid "%B: The target (%s) of an %s relocation is in the wrong section (%A)"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m32r.c:3529
msgid "%B: Instruction set mismatch with previous modules"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m32r.c:3550 elf32-nds32.c:5636
1999-06-03 03:26:53 +00:00
#, c-format
msgid "private flags = %lx"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m32r.c:3555
#, c-format
msgid ": m32r instructions"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m32r.c:3556
#, c-format
msgid ": m32rx instructions"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m32r.c:3557
#, c-format
msgid ": m32r2 instructions"
msgstr ""
#: elf32-m68hc1x.c:1114
1999-06-03 03:26:53 +00:00
#, c-format
msgid ""
"Reference to the far symbol `%s' using a wrong relocation may result in "
"incorrect execution"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m68hc1x.c:1150
#, c-format
msgid ""
"XGATE address (%lx) is not within shared RAM(0xE000-0xFFFF), therefore you "
"must manually offset the address, and possibly manage the page, in your code."
msgstr ""
#: elf32-m68hc1x.c:1170
1999-06-03 03:26:53 +00:00
#, c-format
msgid ""
"banked address [%lx:%04lx] (%lx) is not in the same bank as current banked "
"address [%lx:%04lx] (%lx)"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m68hc1x.c:1190
1999-06-03 03:26:53 +00:00
#, c-format
msgid ""
2011-06-02 13:43:24 +00:00
"reference to a banked address [%lx:%04lx] in the normal address space at "
"%04lx"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m68hc1x.c:1237
#, c-format
msgid ""
"S12 address (%lx) is not within shared RAM(0x2000-0x4000), therefore you "
"must manually offset the address in your code"
msgstr ""
#: elf32-m68hc1x.c:1370
msgid ""
"%B: linking files compiled for 16-bit integers (-mshort) and others for 32-"
"bit integers"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m68hc1x.c:1377
msgid ""
"%B: linking files compiled for 32-bit double (-fshort-double) and others for "
"64-bit double"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m68hc1x.c:1386
msgid "%B: linking files compiled for HCS12 with others compiled for HC12"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m68hc1x.c:1402 elf32-ppc.c:4776 elf64-sparc.c:706 elfxx-mips.c:14817
msgid "%B: uses different e_flags (0x%lx) fields than previous modules (0x%lx)"
msgstr ""
#: elf32-m68hc1x.c:1430 elf32-xgate.c:677
#, c-format
msgid "[abi=32-bit int, "
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m68hc1x.c:1432 elf32-xgate.c:679
#, c-format
msgid "[abi=16-bit int, "
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m68hc1x.c:1435 elf32-xgate.c:682
#, c-format
msgid "64-bit double, "
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m68hc1x.c:1437 elf32-xgate.c:684
#, c-format
msgid "32-bit double, "
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m68hc1x.c:1440
#, c-format
msgid "cpu=HC11]"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m68hc1x.c:1442
#, c-format
msgid "cpu=HCS12]"
2000-02-27 16:55:52 +00:00
msgstr ""
#: elf32-m68hc1x.c:1444
#, c-format
msgid "cpu=HC12]"
2000-02-27 16:55:52 +00:00
msgstr ""
#: elf32-m68hc1x.c:1447
#, c-format
msgid " [memory=bank-model]"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m68hc1x.c:1449
#, c-format
msgid " [memory=flat]"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m68hc1x.c:1452
#, c-format
msgid " [XGATE RAM offsetting]"
msgstr ""
#: elf32-m68k.c:1210 elf32-m68k.c:1211 vms-alpha.c:7207 vms-alpha.c:7222
2007-07-02 07:12:53 +00:00
msgid "unknown"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-m68k.c:1674
msgid "%B: GOT overflow: Number of relocations with 8-bit offset > %d"
msgstr ""
#: elf32-m68k.c:1680
msgid "%B: GOT overflow: Number of relocations with 8- or 16-bit offset > %d"
msgstr ""
#: elf32-m68k.c:3921
msgid "%B(%A+0x%lx): R_68K_TLS_LE32 relocation not permitted in shared object"
msgstr ""
#: elf32-mcore.c:99 elf32-mcore.c:442
msgid "%B: Relocation %s (%d) is not currently supported.\n"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-mcore.c:428
msgid "%B: Unknown relocation type %d\n"
2000-12-02 00:55:22 +00:00
msgstr ""
2011-06-02 13:43:24 +00:00
#. Pacify gcc -Wall.
#: elf32-mep.c:157
#, c-format
msgid "mep: no reloc for code %d"
msgstr ""
#: elf32-mep.c:163
#, c-format
msgid "MeP: howto %d has type %d"
msgstr ""
#: elf32-mep.c:632
2007-07-02 07:12:53 +00:00
msgid "%B and %B are for different cores"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf32-mep.c:649
2007-07-02 07:12:53 +00:00
msgid "%B and %B are for different configurations"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf32-mep.c:686
#, c-format
2007-07-02 07:12:53 +00:00
msgid "private flags = 0x%lx"
msgstr ""
#: elf32-metag.c:1921
msgid ""
"%B(%A+0x%lx): R_METAG_TLS_LE/IENONPIC relocation not permitted in shared "
"object"
msgstr ""
#: elf32-microblaze.c:950
#, c-format
msgid "%s: unknown relocation type %d"
msgstr ""
#: elf32-microblaze.c:1076 elf32-microblaze.c:1121
#, c-format
msgid "%s: The target (%s) of an %s relocation is in the wrong section (%s)"
msgstr ""
#: elf32-microblaze.c:1484 elf32-tilepro.c:3320 elfxx-sparc.c:3526
#: elfxx-tilegx.c:3729
msgid "%B: probably compiled without -fPIC?"
msgstr ""
#: elf32-mips.c:1670 elf64-mips.c:2990 elfn32-mips.c:2793
2007-07-02 07:12:53 +00:00
msgid "literal relocation occurs for an external symbol"
msgstr ""
#: elf32-mips.c:1717 elf32-score.c:570 elf32-score7.c:469 elf64-mips.c:3033
#: elfn32-mips.c:2834
2007-07-02 07:12:53 +00:00
msgid "32bits gp relative relocation occurs for an external symbol"
2000-12-02 00:55:22 +00:00
msgstr ""
#: elf32-msp430.c:801 elf32-msp430.c:1109
msgid "Try enabling relaxation to avoid relocation truncations"
msgstr ""
#: elf32-msp430.c:1317
msgid "internal error: branch/jump to an odd address detected"
msgstr ""
#: elf32-msp430.c:2221
msgid "Warning: %B: Unknown MSPABI object attribute %d"
msgstr ""
#: elf32-msp430.c:2312
msgid "error: %B uses %s instructions but %B uses %s"
msgstr ""
#: elf32-msp430.c:2324
msgid "error: %B uses the %s code model whereas %B uses the %s code model"
msgstr ""
#: elf32-msp430.c:2336
msgid "error: %B uses the large code model but %B uses MSP430 instructions"
msgstr ""
#: elf32-msp430.c:2346
msgid "error: %B uses the %s data model whereas %B uses the %s data model"
msgstr ""
#: elf32-msp430.c:2358
msgid "error: %B uses the small code model but %B uses the %s data model"
msgstr ""
#: elf32-msp430.c:2369
msgid "error: %B uses the %s data model but %B only uses MSP430 instructions"
msgstr ""
#: elf32-nds32.c:2921
msgid "error: Can't find symbol: _SDA_BASE_."
msgstr ""
#: elf32-nds32.c:4142
msgid "%B: error: unknown relocation type %d."
msgstr ""
#: elf32-nds32.c:4584
#, c-format
msgid "%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared mode."
msgstr ""
#: elf32-nds32.c:4716
msgid "%B: warning: unaligned access to GOT entry."
msgstr ""
#: elf32-nds32.c:4758
msgid "%B: warning: relocate SDA_BASE failed."
msgstr ""
#: elf32-nds32.c:4779
msgid "%B(%A): warning: unaligned small data access of type %d."
msgstr ""
#: elf32-nds32.c:5446
msgid ""
"%B: ISR vector size mismatch with previous modules, previous %u-byte, "
"current %u-byte"
msgstr ""
#: elf32-nds32.c:5489
msgid "%B: warning: Endian mismatch with previous modules."
msgstr ""
#: elf32-nds32.c:5499
msgid ""
"%B: warning: Older version of object file encountered, Please recompile with "
"current tool chain."
msgstr ""
#: elf32-nds32.c:5577
msgid "%B: error: ABI mismatch with previous modules."
msgstr ""
#: elf32-nds32.c:5588
msgid "%B: error: Instruction set mismatch with previous modules."
msgstr ""
#: elf32-nds32.c:5612
msgid "%B: warning: Incompatible elf-versions %s and %s."
msgstr ""
#: elf32-nds32.c:5642
#, c-format
msgid ": n1 instructions"
msgstr ""
#: elf32-nds32.c:5645
#, c-format
msgid ": n1h instructions"
msgstr ""
#: elf32-nds32.c:8147
msgid "%B: %s\n"
msgstr ""
#: elf32-nds32.c:8449
msgid ""
"%B(%A): warning: relax is suppressed for sections of alignment %d-bytes > 4-"
"byte."
msgstr ""
#: elf32-nds32.c:8502
msgid "%B: error: Cannot set _ITB_BASE_"
msgstr ""
#: elf32-nds32.c:11384
msgid "%B: Nested OMIT_FP in %A."
msgstr ""
#: elf32-nds32.c:11401
msgid "%B: Unmatched OMIT_FP in %A."
msgstr ""
#: elf32-nds32.c:13357
msgid "Linker: cannot init ex9 hash table error \n"
msgstr ""
#: elf32-nds32.c:13790 elf32-nds32.c:13804
msgid "Linker: error cannot fixed ex9 relocation \n"
msgstr ""
#: elf32-nds32.c:14015
#, c-format
msgid ""
"%s: warning: unaligned small data access. For entry: {%d, %d, %d}, addr = 0x"
"%x, align = 0x%x."
msgstr ""
#: elf32-nds32.c:14047
msgid "%P%F: failed creating ex9.it %s hash table: %E\n"
msgstr ""
#: elf32-nios2.c:2861
#, c-format
msgid ""
"global pointer relative relocation at address 0x%08x when _gp not defined\n"
msgstr ""
#: elf32-nios2.c:2878
#, c-format
msgid ""
"Unable to reach %s (at 0x%08x) from the global pointer (at 0x%08x) because "
"the offset (%d) is out of the allowed range, -32678 to 32767.\n"
msgstr ""
#: elf32-nios2.c:3392
msgid ""
"%B(%A+0x%lx): R_NIOS2_TLS_LE16 relocation not permitted in shared object"
msgstr ""
#: elf32-nios2.c:3520
msgid "relocation out of range"
msgstr ""
#: elf32-nios2.c:3530 elf32-tic6x.c:2744
msgid "dangerous relocation"
msgstr ""
#: elf32-nios2.c:4529
#, c-format
msgid "dynamic variable `%s' is zero size"
msgstr ""
#: elf32-ppc.c:2100
2003-07-11 05:10:21 +00:00
#, c-format
msgid "generic linker can't handle %s"
msgstr ""
#: elf32-ppc.c:2642
msgid "corrupt %s section in %B"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-ppc.c:2661
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid "unable to read in %s section from %B"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-ppc.c:2702
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid "warning: unable to set size of %s section in %B"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-ppc.c:2752
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid "failed to allocate space for new APUinfo section."
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-ppc.c:2771
msgid "failed to compute new APUinfo section."
msgstr ""
#: elf32-ppc.c:2774
msgid "failed to install new APUinfo section."
msgstr ""
#: elf32-ppc.c:3844
msgid "%B: relocation %s cannot be used when making a shared object"
msgstr ""
#. It does not make sense to have a procedure linkage
#. table entry for a local symbol.
#: elf32-ppc.c:4218
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P: %H: %s reloc against local symbol\n"
msgstr ""
#: elf32-ppc.c:4299
msgid "%P: %H: @local call to ifunc %s\n"
msgstr ""
#: elf32-ppc.c:4588 elf32-ppc.c:4603
msgid "Warning: %B uses hard float, %B uses soft float"
msgstr ""
#: elf32-ppc.c:4591 elf32-ppc.c:4595
msgid ""
"Warning: %B uses double-precision hard float, %B uses single-precision hard "
"float"
msgstr ""
#: elf32-ppc.c:4599
msgid "Warning: %B uses soft float, %B uses single-precision hard float"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-ppc.c:4606 elf32-ppc.c:4610
msgid "Warning: %B uses unknown floating point ABI %d"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf32-ppc.c:4652 elf32-ppc.c:4656
msgid "Warning: %B uses unknown vector ABI %d"
2000-07-24 17:22:17 +00:00
msgstr ""
#: elf32-ppc.c:4660
msgid "Warning: %B uses vector ABI \"%s\", %B uses \"%s\""
msgstr ""
#: elf32-ppc.c:4677 elf32-ppc.c:4680
msgid "Warning: %B uses r3/r4 for small structure returns, %B uses memory"
2007-07-02 07:12:53 +00:00
msgstr ""
#: elf32-ppc.c:4683 elf32-ppc.c:4687
msgid "Warning: %B uses unknown small structure return convention %d"
2007-07-02 07:12:53 +00:00
msgstr ""
#: elf32-ppc.c:4741
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid ""
"%B: compiled with -mrelocatable and linked with modules compiled normally"
msgstr ""
#: elf32-ppc.c:4749
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid ""
"%B: compiled normally and linked with modules compiled with -mrelocatable"
msgstr ""
#: elf32-ppc.c:4872
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P: bss-plt forced due to %B\n"
msgstr ""
#: elf32-ppc.c:4875
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P: bss-plt forced by profiling\n"
2007-07-02 07:12:53 +00:00
msgstr ""
2011-06-02 13:43:24 +00:00
#. Uh oh, we didn't find the expected call. We
#. could just mark this symbol to exclude it
#. from tls optimization but it's safer to skip
#. the entire optimization.
#: elf32-ppc.c:5369 elf64-ppc.c:8371
2011-06-02 13:43:24 +00:00
msgid "%H arg lost __tls_get_addr, TLS optimization disabled\n"
msgstr ""
#: elf32-ppc.c:7927
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P: %B: unknown relocation type %d for symbol %s\n"
2011-06-02 13:43:24 +00:00
msgstr ""
#: elf32-ppc.c:8191
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P: %H: non-zero addend on %s reloc against `%s'\n"
msgstr ""
#: elf32-ppc.c:8389
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P: %H: relocation %s for indirect function %s unsupported\n"
msgstr ""
#: elf32-ppc.c:8646 elf32-ppc.c:8676 elf32-ppc.c:8767
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
"%P: %B: the target (%s) of a %s relocation is in the wrong output section "
"(%s)\n"
msgstr ""
#: elf32-ppc.c:8854
msgid ""
"%B: the target (%s) of a %s relocation is in the wrong output section (%s)"
msgstr ""
#: elf32-ppc.c:8958
msgid "%P: %B: relocation %s is not yet supported for symbol %s\n"
msgstr ""
#: elf32-ppc.c:9038
msgid "%P: %H: error: %s against `%s' not a multiple of %u\n"
2011-06-02 13:43:24 +00:00
msgstr ""
#: elf32-ppc.c:9067
msgid "%P: %H: unresolvable %s relocation against symbol `%s'\n"
msgstr ""
#: elf32-ppc.c:9114
msgid "%P: %H: %s reloc against `%s': error %d\n"
msgstr ""
#: elf32-ppc.c:9750
msgid "%P: %s not defined in linker created %s\n"
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgstr ""
#: elf32-rl78.c:784
msgid "Warning: RL78_SYM reloc with an unknown symbol"
msgstr ""
#: elf32-rl78.c:952 elf32-rx.c:1324
msgid "%B(%A): error: call to undefined function '%s'"
msgstr ""
#: elf32-rl78.c:966 elf32-rx.c:1338
msgid "%B(%A): warning: unaligned access to symbol '%s' in the small data area"
msgstr ""
#: elf32-rl78.c:970 elf32-rx.c:1342
msgid "%B(%A): internal error: out of range error"
msgstr ""
#: elf32-rl78.c:974 elf32-rx.c:1346
msgid "%B(%A): internal error: unsupported relocation error"
msgstr ""
#: elf32-rl78.c:978 elf32-rx.c:1350
msgid "%B(%A): internal error: dangerous relocation"
msgstr ""
#: elf32-rl78.c:982 elf32-rx.c:1354
msgid "%B(%A): internal error: unknown error"
msgstr ""
#: elf32-rl78.c:1043
msgid "RL78/G10 ABI conflict: cannot link G10 and non-G10 objects together"
msgstr ""
#: elf32-rl78.c:1046 elf32-rl78.c:1049
#, c-format
msgid "- %s is G10, %s is not"
msgstr ""
#: elf32-rl78.c:1072
#, c-format
msgid " [G10]"
msgstr ""
#: elf32-rx.c:563
msgid "%B:%A: Warning: deprecated Red Hat reloc "
msgstr ""
#. Check for unsafe relocs in PID mode. These are any relocs where
#. an absolute address is being computed. There are special cases
#. for relocs against symbols that are known to be referenced in
#. crt0.o before the PID base address register has been initialised.
#: elf32-rx.c:581
msgid "%B(%A): unsafe PID relocation %s at 0x%08lx (against %s in %s)"
msgstr ""
#: elf32-rx.c:1157
msgid "Warning: RX_SYM reloc with an unknown symbol"
msgstr ""
#: elf32-s390.c:2292 elf64-s390.c:2244
msgid "%B(%A+0x%lx): invalid instruction for TLS relocation %s"
msgstr ""
#: elf32-score.c:1520 elf32-score7.c:1379 elfxx-mips.c:3642
2007-07-02 07:12:53 +00:00
msgid "not enough GOT space for local GOT entries"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: elf32-score.c:2742
msgid "address not word align"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: elf32-score.c:2827 elf32-score7.c:2631
2007-07-02 07:12:53 +00:00
#, c-format
msgid "%s: Malformed reloc detected for section %s"
msgstr ""
#: elf32-score.c:2882 elf32-score7.c:2686
2007-07-02 07:12:53 +00:00
msgid "%B: CALL15 reloc at 0x%lx not against global symbol"
msgstr ""
#: elf32-score.c:4007 elf32-score7.c:3811
2007-07-02 07:12:53 +00:00
#, c-format
msgid " [pic]"
msgstr ""
#: elf32-score.c:4011 elf32-score7.c:3815
2007-07-02 07:12:53 +00:00
#, c-format
msgid " [fix dep]"
msgstr ""
#: elf32-score.c:4053 elf32-score7.c:3857
2007-07-02 07:12:53 +00:00
msgid "%B: warning: linking PIC files with non-PIC files"
msgstr ""
#: elf32-sh-symbian.c:130
msgid "%B: IMPORT AS directive for %s conceals previous IMPORT AS"
msgstr ""
#: elf32-sh-symbian.c:383
msgid "%B: Unrecognised .directive command: %s"
msgstr ""
#: elf32-sh-symbian.c:500
msgid "%B: Failed to add renamed symbol %s"
msgstr ""
#: elf32-sh.c:569
msgid "%B: 0x%lx: warning: bad R_SH_USES offset"
msgstr ""
#: elf32-sh.c:581
msgid "%B: 0x%lx: warning: R_SH_USES points to unrecognized insn 0x%x"
msgstr ""
#: elf32-sh.c:598
msgid "%B: 0x%lx: warning: bad R_SH_USES load offset"
msgstr ""
#: elf32-sh.c:613
msgid "%B: 0x%lx: warning: could not find expected reloc"
msgstr ""
#: elf32-sh.c:641
msgid "%B: 0x%lx: warning: symbol in unexpected section"
msgstr ""
#: elf32-sh.c:767
msgid "%B: 0x%lx: warning: could not find expected COUNT reloc"
msgstr ""
#: elf32-sh.c:776
msgid "%B: 0x%lx: warning: bad count"
msgstr ""
#: elf32-sh.c:1180 elf32-sh.c:1550
msgid "%B: 0x%lx: fatal: reloc overflow while relaxing"
msgstr ""
#: elf32-sh.c:3939 elf64-sh64.c:1514
msgid "Unexpected STO_SH5_ISA32 on local symbol is not handled"
msgstr ""
#: elf32-sh.c:4190
msgid "%B: 0x%lx: fatal: unaligned branch target for relax-support relocation"
msgstr ""
#: elf32-sh.c:4223 elf32-sh.c:4238
msgid "%B: 0x%lx: fatal: unaligned %s relocation 0x%lx"
msgstr ""
#: elf32-sh.c:4252
msgid "%B: 0x%lx: fatal: R_SH_PSHA relocation %d not in range -32..32"
msgstr ""
#: elf32-sh.c:4266
msgid "%B: 0x%lx: fatal: R_SH_PSHL relocation %d not in range -32..32"
msgstr ""
#: elf32-sh.c:4410 elf32-sh.c:4886
msgid "%B(%A+0x%lx): cannot emit fixup to `%s' in read-only section"
msgstr ""
#: elf32-sh.c:4993
msgid "%B(%A+0x%lx): %s relocation against external symbol \"%s\""
msgstr ""
#: elf32-sh.c:5466
#, c-format
msgid "%X%C: relocation to \"%s\" references a different segment\n"
msgstr ""
#: elf32-sh.c:5472
#, c-format
msgid "%C: warning: relocation to \"%s\" references a different segment\n"
msgstr ""
#: elf32-sh.c:6254 elf32-sh.c:6337
msgid "%B: `%s' accessed both as normal and FDPIC symbol"
msgstr ""
#: elf32-sh.c:6259 elf32-sh.c:6341
msgid "%B: `%s' accessed both as FDPIC and thread local symbol"
msgstr ""
#: elf32-sh.c:6289
msgid "%B: Function descriptor relocation with non-zero addend"
msgstr ""
#: elf32-sh.c:6525 elf64-alpha.c:4661
msgid "%B: TLS local exec code cannot be linked into shared objects"
msgstr ""
#: elf32-sh64.c:224 elf64-sh64.c:2318
#, c-format
msgid "%s: compiled as 32-bit object and %s is 64-bit"
msgstr ""
#: elf32-sh64.c:227 elf64-sh64.c:2321
#, c-format
msgid "%s: compiled as 64-bit object and %s is 32-bit"
msgstr ""
#: elf32-sh64.c:229 elf64-sh64.c:2323
#, c-format
msgid "%s: object size does not match that of target %s"
msgstr ""
#: elf32-sh64.c:452 elf64-sh64.c:2839
#, c-format
msgid "%s: encountered datalabel symbol in input"
msgstr ""
#: elf32-sh64.c:529
msgid "PTB mismatch: a SHmedia address (bit 0 == 1)"
msgstr ""
#: elf32-sh64.c:532
msgid "PTA mismatch: a SHcompact address (bit 0 == 0)"
msgstr ""
#: elf32-sh64.c:550
#, c-format
msgid "%s: GAS error: unexpected PTB insn with R_SH_PT_16"
msgstr ""
#: elf32-sh64.c:599
msgid "%B: error: unaligned relocation type %d at %08x reloc %p\n"
msgstr ""
#: elf32-sh64.c:675
#, c-format
msgid "%s: could not write out added .cranges entries"
msgstr ""
#: elf32-sh64.c:735
#, c-format
msgid "%s: could not write out sorted .cranges entries"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: elf32-sparc.c:90
msgid "%B: compiled for a 64 bit system and target is 32 bit"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: elf32-sparc.c:103
msgid "%B: linking little endian files with big endian files"
msgstr ""
#: elf32-spu.c:716
msgid "%X%P: overlay section %A does not start on a cache line.\n"
msgstr ""
#: elf32-spu.c:724
msgid "%X%P: overlay section %A is larger than a cache line.\n"
msgstr ""
#: elf32-spu.c:744
msgid "%X%P: overlay section %A is not in cache area.\n"
msgstr ""
#: elf32-spu.c:784
msgid "%X%P: overlay sections %A and %A do not start at the same address.\n"
msgstr ""
#: elf32-spu.c:1008
2007-07-02 07:12:53 +00:00
msgid "warning: call to non-function symbol %s defined in %B"
msgstr ""
#: elf32-spu.c:1358
msgid "%A:0x%v lrlive .brinfo (%u) differs from analysis (%u)\n"
msgstr ""
#: elf32-spu.c:1877
2007-07-02 07:12:53 +00:00
msgid "%B is not allowed to define %s"
msgstr ""
#: elf32-spu.c:1885
#, c-format
msgid "you are not allowed to define %s in a script"
msgstr ""
#: elf32-spu.c:1919
2007-07-02 07:12:53 +00:00
#, c-format
msgid "%s in overlay section"
msgstr ""
#: elf32-spu.c:1948
2007-07-02 07:12:53 +00:00
msgid "overlay stub relocation overflow"
msgstr ""
#: elf32-spu.c:1957
msgid "stubs don't match calculated size"
msgstr ""
#: elf32-spu.c:2539
2007-07-02 07:12:53 +00:00
#, c-format
msgid "warning: %s overlaps %s\n"
msgstr ""
#: elf32-spu.c:2555
2007-07-02 07:12:53 +00:00
#, c-format
msgid "warning: %s exceeds section size\n"
msgstr ""
#: elf32-spu.c:2586
2007-07-02 07:12:53 +00:00
msgid "%A:0x%v not found in function table\n"
msgstr ""
#: elf32-spu.c:2726
msgid "%B(%A+0x%v): call to non-code section %B(%A), analysis incomplete\n"
2007-07-02 07:12:53 +00:00
msgstr ""
#: elf32-spu.c:3294
2007-07-02 07:12:53 +00:00
#, c-format
msgid "Stack analysis will ignore the call from %s to %s\n"
2007-07-02 07:12:53 +00:00
msgstr ""
#: elf32-spu.c:3985
msgid " %s: 0x%v\n"
2007-07-02 07:12:53 +00:00
msgstr ""
#: elf32-spu.c:3986
2007-07-02 07:12:53 +00:00
msgid "%s: 0x%v 0x%v\n"
msgstr ""
#: elf32-spu.c:3991
2007-07-02 07:12:53 +00:00
msgid " calls:\n"
msgstr ""
#: elf32-spu.c:3999
2007-07-02 07:12:53 +00:00
#, c-format
msgid " %s%s %s\n"
msgstr ""
#: elf32-spu.c:4304
#, c-format
msgid "%s duplicated in %s\n"
msgstr ""
#: elf32-spu.c:4308
#, c-format
msgid "%s duplicated\n"
msgstr ""
#: elf32-spu.c:4315
msgid "sorry, no support for duplicate object files in auto-overlay script\n"
msgstr ""
#: elf32-spu.c:4356
msgid ""
"non-overlay size of 0x%v plus maximum overlay size of 0x%v exceeds local "
"store\n"
msgstr ""
#: elf32-spu.c:4511
msgid "%B:%A%s exceeds overlay size\n"
msgstr ""
#: elf32-spu.c:4673
2007-07-02 07:12:53 +00:00
msgid "Stack size for call graph root nodes.\n"
msgstr ""
#: elf32-spu.c:4674
2007-07-02 07:12:53 +00:00
msgid ""
"\n"
"Stack size for functions. Annotations: '*' max stack, 't' tail call\n"
msgstr ""
#: elf32-spu.c:4684
msgid "Maximum stack required is 0x%v\n"
2007-07-02 07:12:53 +00:00
msgstr ""
#: elf32-spu.c:4775
msgid "fatal error while creating .fixup"
2007-07-02 07:12:53 +00:00
msgstr ""
#: elf32-spu.c:5005
2007-07-02 07:12:53 +00:00
msgid "%B(%s+0x%lx): unresolvable %s relocation against symbol `%s'"
msgstr ""
#: elf32-tic6x.c:1600
2011-06-02 13:43:24 +00:00
msgid "warning: generating a shared library containing non-PIC code"
msgstr ""
#: elf32-tic6x.c:1605
2011-06-02 13:43:24 +00:00
msgid "warning: generating a shared library containing non-PID code"
msgstr ""
#: elf32-tic6x.c:2524
2011-06-02 13:43:24 +00:00
msgid "%B: SB-relative relocation but __c6xabi_DSBT_BASE not defined"
msgstr ""
#: elf32-tic6x.c:3648
2011-06-02 13:43:24 +00:00
msgid "%B: error: unknown mandatory EABI object attribute %d"
msgstr ""
#: elf32-tic6x.c:3656
2011-06-02 13:43:24 +00:00
msgid "%B: warning: unknown EABI object attribute %d"
msgstr ""
#: elf32-tic6x.c:3768 elf32-tic6x.c:3776
msgid "error: %B requires more stack alignment than %B preserves"
msgstr ""
#: elf32-tic6x.c:3786 elf32-tic6x.c:3795
msgid "error: unknown Tag_ABI_array_object_alignment value in %B"
msgstr ""
#: elf32-tic6x.c:3804 elf32-tic6x.c:3813
msgid "error: unknown Tag_ABI_array_object_align_expected value in %B"
msgstr ""
#: elf32-tic6x.c:3821 elf32-tic6x.c:3828
msgid "error: %B requires more array alignment than %B preserves"
msgstr ""
#: elf32-tic6x.c:3850
msgid "warning: %B and %B differ in wchar_t size"
msgstr ""
#: elf32-tic6x.c:3868
msgid "warning: %B and %B differ in whether code is compiled for DSBT"
msgstr ""
#: elf32-v850.c:157
#, c-format
msgid "Variable `%s' cannot occupy in multiple small data regions"
msgstr ""
#: elf32-v850.c:160
#, c-format
msgid ""
"Variable `%s' can only be in one of the small, zero, and tiny data regions"
msgstr ""
#: elf32-v850.c:163
#, c-format
msgid ""
"Variable `%s' cannot be in both small and zero data regions simultaneously"
msgstr ""
#: elf32-v850.c:166
#, c-format
msgid ""
"Variable `%s' cannot be in both small and tiny data regions simultaneously"
msgstr ""
#: elf32-v850.c:169
#, c-format
msgid ""
"Variable `%s' cannot be in both zero and tiny data regions simultaneously"
msgstr ""
#: elf32-v850.c:467
2011-06-02 13:43:24 +00:00
msgid "FAILED to find previous HI16 reloc"
msgstr ""
#: elf32-v850.c:2293
msgid "could not locate special linker symbol __gp"
msgstr ""
#: elf32-v850.c:2297
msgid "could not locate special linker symbol __ep"
msgstr ""
#: elf32-v850.c:2301
msgid "could not locate special linker symbol __ctbp"
msgstr ""
#: elf32-v850.c:2471 elf32-v850.c:2534
msgid "%B: Architecture mismatch with previous modules"
msgstr ""
#: elf32-v850.c:2478
msgid "%B: Alignment mismatch with previous modules"
msgstr ""
#. xgettext:c-format.
#: elf32-v850.c:2553
#, c-format
msgid "private flags = %lx: "
msgstr ""
#: elf32-v850.c:2558
#, c-format
msgid "unknown v850 architecture"
msgstr ""
#: elf32-v850.c:2560
#, c-format
msgid "v850 E3 architecture"
msgstr ""
#: elf32-v850.c:2562 elf32-v850.c:2572
#, c-format
msgid "v850 architecture"
msgstr ""
#: elf32-v850.c:2565
#, c-format
msgid ", 8-byte data alignment"
msgstr ""
#: elf32-v850.c:2573
#, c-format
msgid "v850e architecture"
msgstr ""
#: elf32-v850.c:2574
#, c-format
msgid "v850e1 architecture"
msgstr ""
#: elf32-v850.c:2575
#, c-format
msgid "v850e2 architecture"
msgstr ""
#: elf32-v850.c:2576
#, c-format
msgid "v850e2v3 architecture"
msgstr ""
#: elf32-v850.c:2577
#, c-format
msgid "v850e3v5 architecture"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: elf32-vax.c:532
#, c-format
msgid " [nonpic]"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: elf32-vax.c:535
#, c-format
msgid " [d-float]"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: elf32-vax.c:538
#, c-format
msgid " [g-float]"
msgstr ""
#: elf32-vax.c:656
#, c-format
msgid ""
"%s: warning: GOT addend of %ld to `%s' does not match previous GOT addend of "
"%ld"
msgstr ""
#: elf32-vax.c:1543
#, c-format
msgid "%s: warning: PLT addend of %d to `%s' from %s section ignored"
msgstr ""
#: elf32-vax.c:1668
#, c-format
msgid "%s: warning: %s relocation against symbol `%s' from %s section"
msgstr ""
#: elf32-vax.c:1674
#, c-format
msgid "%s: warning: %s relocation to 0x%x from %s section"
msgstr ""
#: elf32-xgate.c:686
#, c-format
msgid "cpu=XGATE]"
msgstr ""
#: elf32-xgate.c:688
#, c-format
msgid "error reading cpu type from elf private data"
msgstr ""
#: elf32-xstormy16.c:455 elf64-ia64-vms.c:2072 elf32-ia64.c:2330
#: elf64-ia64.c:2330
msgid "non-zero addend in @fptr reloc"
msgstr ""
#: elf32-xtensa.c:908
2005-03-05 12:14:34 +00:00
msgid "%B(%A): invalid property table"
msgstr ""
#: elf32-xtensa.c:2774
2005-03-05 12:14:34 +00:00
msgid "%B(%A+0x%lx): relocation offset out of range (size=0x%x)"
msgstr ""
#: elf32-xtensa.c:2853 elf32-xtensa.c:2974
* Makefile.am: Remove all mention of elflink.h. * Makefile.in: Regenerate. * bfd-in.h (bfd_elf_discard_info): Declare. (bfd_elf32_discard_info, bfd_elf64_discard_info): Delete. * bfd-in2.h: Regenerate. * elf-bfd.h (bfd_elf32_print_symbol, bfd_elf64_print_symbol, bfd_elf32_link_record_dynamic_symbol, bfd_elf64_link_record_dynamic_symbol, _bfd_elf_link_record_dynamic_symbol, bfd_elf32_bfd_final_link, bfd_elf64_bfd_final_link, elf_link_record_local_dynamic_symbol, _bfd_elf32_link_record_local_dynamic_symbol, _bfd_elf64_link_record_local_dynamic_symbol, _bfd_elf32_gc_sections, _bfd_elf32_gc_common_finalize_got_offsets, _bfd_elf32_gc_common_final_link, _bfd_elf64_gc_common_final_link, _bfd_elf32_gc_record_vtinherit, _bfd_elf32_gc_record_vtentry, _bfd_elf64_gc_sections, _bfd_elf64_gc_common_finalize_got_offsets, _bfd_elf64_gc_record_vtinherit, _bfd_elf64_gc_record_vtentry, _bfd_elf32_reloc_symbol_deleted_p, _bfd_elf64_reloc_symbol_deleted_p): Delete. (bfd_elf_link_record_dynamic_symbol, bfd_elf_link_record_local_dynamic_symbol, bfd_elf_final_link, bfd_elf_gc_sections, bfd_elf_gc_record_vtinherit, bfd_elf_gc_record_vtentry, bfd_elf_gc_common_finalize_got_offsets, bfd_elf_gc_common_final_link, bfd_elf_reloc_symbol_deleted_p): Declare. (WILL_CALL_FINISH_DYNAMIC_SYMBOL): Define. * elf32-arm.h: Update for changed function names. Remove local WILL_CALL_FINISH_DYNAMIC_SECTION define. * elf-hppa.h, elf-m10300.c, elf32-cris.c, elf32-d10v.c, elf32-dlx.c, * elf32-fr30.c, elf32-frv.c, elf32-h8300.c, elf32-hppa.c, elf32-i386.c, * elf32-iq2000.c, elf32-m32r.c, elf32-m68hc1x.c, elf32-m68k.c, * elf32-mcore.c, elf32-openrisc.c, elf32-ppc.c, elf32-s390.c, * elf32-sh.c, elf32-sparc.c, elf32-v850.c, elf32-vax.c, * elf32-xstormy16.c, elf32-xtensa.c, elf64-alpha.c, elf64-hppa.c, * elf64-mmix.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c, elf64-sparc.c, * elf64-x86-64.c, elfxx-ia64.c, elfxx-mips.c, elfxx-target.h: Likewise. * elfxx-target.h (bfd_elfNN_bfd_final_link): Define. (bfd_elfNN_print_symbol): Define. * elfcode.h: Don't include elflink.h. (elf_bfd_discard_info, elf_reloc_symbol_deleted_p, elf_link_record_dynamic_symbol, elf_bfd_final_link, elf_gc_sections, elf_gc_common_finalize_got_offsets, elf_gc_common_final_link, elf_gc_record_vtinherit, elf_gc_record_vtentry, elf_link_record_local_dynamic_symbol): Don't define. * elflink.c: Update for changed function names. Move elflink.h code here. * elflink.h: Delete file. * po/SRC-POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. doc/ * bfdint.texi: Remove all mention of elflink.h.
2004-03-27 10:58:09 +00:00
msgid "dynamic relocation in read-only section"
msgstr ""
#: elf32-xtensa.c:2950
msgid "TLS relocation invalid without dynamic sections"
msgstr ""
#: elf32-xtensa.c:3169
2005-03-05 12:14:34 +00:00
msgid "internal inconsistency in size of .got.loc section"
msgstr ""
#: elf32-xtensa.c:3482
2005-03-05 12:14:34 +00:00
msgid "%B: incompatible machine type. Output is 0x%x. Input is 0x%x"
msgstr ""
#: elf32-xtensa.c:4713 elf32-xtensa.c:4721
2005-03-05 12:14:34 +00:00
msgid "Attempt to convert L32R/CALLX to CALL failed"
msgstr ""
#: elf32-xtensa.c:6330 elf32-xtensa.c:6406 elf32-xtensa.c:7522
2005-03-05 12:14:34 +00:00
msgid ""
"%B(%A+0x%lx): could not decode instruction; possible configuration mismatch"
msgstr ""
#: elf32-xtensa.c:7262
2005-03-05 12:14:34 +00:00
msgid ""
"%B(%A+0x%lx): could not decode instruction for XTENSA_ASM_SIMPLIFY "
"relocation; possible configuration mismatch"
msgstr ""
#: elf32-xtensa.c:9022
2005-03-05 12:14:34 +00:00
msgid "invalid relocation address"
msgstr ""
#: elf32-xtensa.c:9071
2005-03-05 12:14:34 +00:00
msgid "overflow after relaxation"
msgstr ""
#: elf32-xtensa.c:10203
2005-03-05 12:14:34 +00:00
msgid "%B(%A+0x%lx): unexpected fix for %s relocation"
msgstr ""
#: elf64-alpha.c:474
msgid "GPDISP relocation did not find ldah and lda instructions"
msgstr ""
#: elf64-alpha.c:2503
msgid "%B: .got subsegment exceeds 64K (size %d)"
msgstr ""
#: elf64-alpha.c:4396 elf64-alpha.c:4408
msgid "%B: gp-relative relocation against dynamic symbol %s"
msgstr ""
#: elf64-alpha.c:4434 elf64-alpha.c:4574
msgid "%B: pc-relative relocation against dynamic symbol %s"
msgstr ""
#: elf64-alpha.c:4462
msgid "%B: change in gp: BRSGP %s"
msgstr ""
#: elf64-alpha.c:4487
msgid "<unknown>"
msgstr ""
#: elf64-alpha.c:4492
msgid "%B: !samegp reloc against symbol without .prologue: %s"
msgstr ""
#: elf64-alpha.c:4549
msgid "%B: unhandled dynamic relocation against %s"
msgstr ""
#: elf64-alpha.c:4581
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid "%B: pc-relative relocation against undefined weak symbol %s"
msgstr ""
#: elf64-alpha.c:4645
msgid "%B: dtp-relative relocation against dynamic symbol %s"
msgstr ""
#: elf64-alpha.c:4668
msgid "%B: tp-relative relocation against dynamic symbol %s"
msgstr ""
#: elf64-hppa.c:2084
#, c-format
msgid "stub entry for %s cannot load .plt, dp offset = %ld"
msgstr ""
#: elf64-hppa.c:3280
msgid "%B(%A+0x%"
msgstr ""
#: elf64-ia64-vms.c:587 elf32-ia64.c:619 elf64-ia64.c:619
msgid ""
"%B: Can't relax br at 0x%lx in section `%A'. Please use brl or indirect "
"branch."
msgstr ""
#: elf64-ia64-vms.c:2027 elf32-ia64.c:2278 elf64-ia64.c:2278
msgid "@pltoff reloc against local symbol"
msgstr ""
#: elf64-ia64-vms.c:3279 elf32-ia64.c:3684 elf64-ia64.c:3684
#, c-format
msgid "%s: short data segment overflowed (0x%lx >= 0x400000)"
msgstr ""
#: elf64-ia64-vms.c:3290 elf32-ia64.c:3695 elf64-ia64.c:3695
#, c-format
msgid "%s: __gp does not cover short data segment"
msgstr ""
#: elf64-ia64-vms.c:3555 elf32-ia64.c:3962 elf64-ia64.c:3962
msgid "%B: non-pic code with imm relocation against dynamic symbol `%s'"
msgstr ""
#: elf64-ia64-vms.c:3617 elf32-ia64.c:4029 elf64-ia64.c:4029
msgid "%B: @gprel relocation against dynamic symbol %s"
msgstr ""
#: elf64-ia64-vms.c:3676 elf32-ia64.c:4092 elf64-ia64.c:4092
msgid "%B: linking non-pic code in a position independent executable"
msgstr ""
#: elf64-ia64-vms.c:3777 elf32-ia64.c:4229 elf64-ia64.c:4229
msgid "%B: @internal branch to dynamic symbol %s"
msgstr ""
#: elf64-ia64-vms.c:3779 elf32-ia64.c:4231 elf64-ia64.c:4231
msgid "%B: speculation fixup to dynamic symbol %s"
msgstr ""
#: elf64-ia64-vms.c:3781 elf32-ia64.c:4233 elf64-ia64.c:4233
msgid "%B: @pcrel relocation against dynamic symbol %s"
msgstr ""
#: elf64-ia64-vms.c:3905 elf32-ia64.c:4430 elf64-ia64.c:4430
msgid "unsupported reloc"
msgstr ""
#: elf64-ia64-vms.c:3942 elf32-ia64.c:4468 elf64-ia64.c:4468
msgid ""
"%B: missing TLS section for relocation %s against `%s' at 0x%lx in section `"
"%A'."
msgstr ""
#: elf64-ia64-vms.c:3957 elf32-ia64.c:4483 elf64-ia64.c:4483
msgid ""
"%B: Can't relax br (%s) to `%s' at 0x%lx in section `%A' with size 0x%lx (> "
"0x1000000)."
msgstr ""
#: elf64-ia64-vms.c:4246 elf32-ia64.c:4745 elf64-ia64.c:4745
msgid "%B: linking trap-on-NULL-dereference with non-trapping files"
msgstr ""
#: elf64-ia64-vms.c:4255 elf32-ia64.c:4754 elf64-ia64.c:4754
msgid "%B: linking big-endian files with little-endian files"
msgstr ""
#: elf64-ia64-vms.c:4264 elf32-ia64.c:4763 elf64-ia64.c:4763
msgid "%B: linking 64-bit files with 32-bit files"
msgstr ""
#: elf64-ia64-vms.c:4273 elf32-ia64.c:4772 elf64-ia64.c:4772
msgid "%B: linking constant-gp files with non-constant-gp files"
msgstr ""
#: elf64-ia64-vms.c:4283 elf32-ia64.c:4782 elf64-ia64.c:4782
msgid "%B: linking auto-pic files with non-auto-pic files"
msgstr ""
#: elf64-ia64-vms.c:5125 elflink.c:4299
msgid ""
"Warning: alignment %u of common symbol `%s' in %B is greater than the "
"alignment (%u) of its section %A"
msgstr ""
#: elf64-ia64-vms.c:5131 elflink.c:4305
msgid "Warning: alignment %u of symbol `%s' in %B is smaller than %u in %B"
msgstr ""
#: elf64-ia64-vms.c:5146 elflink.c:4321
msgid "Warning: size of symbol `%s' changed from %lu in %B to %lu in %B"
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgstr ""
#: elf64-mmix.c:986
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid ""
"invalid input relocation when producing non-ELF, non-mmo format output.\n"
" Please use the objcopy program to convert from ELF or mmo,\n"
" or assemble using \"-no-expand\" (for gcc, \"-Wa,-no-expand\""
msgstr ""
#: elf64-mmix.c:1170
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid ""
"invalid input relocation when producing non-ELF, non-mmo format output.\n"
" Please use the objcopy program to convert from ELF or mmo,\n"
" or compile using the gcc-option \"-mno-base-addresses\"."
msgstr ""
#: elf64-mmix.c:1196
#, c-format
msgid ""
"%s: Internal inconsistency error for value for\n"
2011-06-02 13:43:24 +00:00
" linker-allocated global register: linked: 0x%lx%08lx != relaxed: 0x%lx"
"%08lx\n"
msgstr ""
#: elf64-mmix.c:1618
#, c-format
msgid ""
"%s: base-plus-offset relocation against register symbol: (unknown) in %s"
msgstr ""
#: elf64-mmix.c:1623
#, c-format
msgid "%s: base-plus-offset relocation against register symbol: %s in %s"
msgstr ""
#: elf64-mmix.c:1667
#, c-format
msgid "%s: register relocation against non-register symbol: (unknown) in %s"
msgstr ""
#: elf64-mmix.c:1672
#, c-format
msgid "%s: register relocation against non-register symbol: %s in %s"
msgstr ""
#: elf64-mmix.c:1709
#, c-format
msgid "%s: directive LOCAL valid only with a register or absolute value"
msgstr ""
#: elf64-mmix.c:1739
#, c-format
msgid ""
"%s: LOCAL directive: Register $%ld is not a local register. First global "
"register is $%ld."
msgstr ""
#: elf64-mmix.c:2198
#, c-format
msgid ""
"%s: Error: multiple definition of `%s'; start of %s is set in a earlier "
"linked file\n"
msgstr ""
#: elf64-mmix.c:2252
msgid "Register section has contents\n"
msgstr ""
#: elf64-mmix.c:2441
#, c-format
msgid ""
"Internal inconsistency: remaining %u != max %u.\n"
" Please report this bug."
msgstr ""
#: elf64-ppc.c:4463
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P: %B: cannot create stub entry %s\n"
msgstr ""
#: elf64-ppc.c:4810
msgid "%P: symbol '%s' has invalid st_other for ABI version 1\n"
msgstr ""
#: elf64-ppc.c:5170
msgid "%P: .opd not allowed in ABI version %d\n"
msgstr ""
#: elf64-ppc.c:5809
msgid "%B uses unknown e_flags 0x%lx"
msgstr ""
#: elf64-ppc.c:5816
msgid "%B: ABI version %ld is not compatible with ABI version %ld output"
msgstr ""
#: elf64-ppc.c:5843
#, c-format
msgid " [abiv%ld]"
msgstr ""
#: elf64-ppc.c:7007
msgid ""
"%P: copy reloc against `%T' requires lazy plt linking; avoid setting "
2011-06-02 13:43:24 +00:00
"LD_BIND_NOW=1 or upgrade gcc\n"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf64-ppc.c:7270
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%B: undefined symbol on R_PPC64_TOCSAVE relocation"
msgstr ""
#: elf64-ppc.c:7499
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P: dynreloc miscount for %B, section %A\n"
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgstr ""
#: elf64-ppc.c:7583
msgid "%B: .opd is not a regular array of opd entries"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf64-ppc.c:7592
msgid "%B: unexpected reloc type %u in .opd section"
msgstr ""
#: elf64-ppc.c:7613
msgid "%B: undefined sym `%s' in .opd section"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf64-ppc.c:8177
2011-06-02 13:43:24 +00:00
msgid "%H __tls_get_addr lost arg, TLS optimization disabled\n"
msgstr ""
#: elf64-ppc.c:8516 elf64-ppc.c:9139
2005-03-05 12:14:34 +00:00
#, c-format
msgid "%s defined on removed toc entry"
2005-03-05 12:14:34 +00:00
msgstr ""
#: elf64-ppc.c:8868
msgid "%P: %H: toc optimization is not supported for %s instruction.\n"
msgstr ""
#: elf64-ppc.c:9096
msgid "%P: %H: %s references optimized away TOC entry\n"
2011-06-02 13:43:24 +00:00
msgstr ""
#: elf64-ppc.c:10394
msgid "%P: cannot find opd entry toc for `%T'\n"
2005-10-25 02:20:17 +00:00
msgstr ""
#: elf64-ppc.c:10479
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P: long branch stub `%s' offset overflow\n"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf64-ppc.c:10538
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P: can't find branch stub `%s'\n"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf64-ppc.c:10602 elf64-ppc.c:10749 elf64-ppc.c:12416
msgid "%P: linkage table error against `%T'\n"
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgstr ""
#: elf64-ppc.c:10940
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P: can't build branch stub `%s'\n"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf64-ppc.c:11748
2005-10-25 02:20:17 +00:00
msgid "%B section %A exceeds stub group size"
msgstr ""
#: elf64-ppc.c:12662 elf64-ppc.c:12697
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P: %s offset too large for .eh_frame sdata4 encoding"
2011-06-02 13:43:24 +00:00
msgstr ""
#: elf64-ppc.c:12758
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P: stubs don't match calculated size\n"
msgstr ""
#: elf64-ppc.c:12770
1999-06-03 03:26:53 +00:00
#, c-format
2003-07-11 05:10:21 +00:00
msgid ""
"linker stubs in %u group%s\n"
2003-07-11 05:10:21 +00:00
" branch %lu\n"
" toc adjust %lu\n"
" long branch %lu\n"
" long toc adj %lu\n"
" plt call %lu\n"
" plt call toc %lu"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf64-ppc.c:13096
msgid "%P: %H: %s used with TLS symbol `%T'\n"
2011-06-02 13:43:24 +00:00
msgstr ""
#: elf64-ppc.c:13097
msgid "%P: %H: %s used with non-TLS symbol `%T'\n"
2011-06-02 13:43:24 +00:00
msgstr ""
#: elf64-ppc.c:13675
2003-07-11 05:10:21 +00:00
msgid ""
"%P: %H: call to `%T' lacks nop, can't restore toc; recompile with -fPIC\n"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf64-ppc.c:13793
msgid "%P: %B: unknown relocation type %d for `%T'\n"
msgstr ""
#: elf64-ppc.c:14310
msgid "%P: %H: %s for indirect function `%T' unsupported\n"
2003-07-11 05:10:21 +00:00
msgstr ""
#: elf64-ppc.c:14417
msgid "%P: %B: %s is not supported for `%T'\n"
2003-07-11 05:10:21 +00:00
msgstr ""
#: elf64-ppc.c:14565
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P: %H: error: %s not a multiple of %u\n"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elf64-ppc.c:14586
msgid "%P: %H: unresolvable %s against `%T'\n"
msgstr ""
#: elf64-ppc.c:14644
msgid "%P: %H: %s against `%T': error %d\n"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: elf64-sh64.c:1686
2005-03-05 12:14:34 +00:00
#, c-format
msgid "%s: error: unaligned relocation type %d at %08x reloc %08x\n"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: elf64-sparc.c:446
msgid "%B: Only registers %%g[2367] can be declared using STT_REGISTER"
1999-06-03 03:26:53 +00:00
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: elf64-sparc.c:466
msgid "Register %%g%d used incompatibly: %s in %B, previously %s in %B"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: elf64-sparc.c:489
msgid "Symbol `%s' has differing types: REGISTER in %B, previously %s in %B"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: elf64-sparc.c:534
msgid "Symbol `%s' has differing types: %s in %B, previously REGISTER in %B"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: elf64-sparc.c:687
msgid "%B: linking UltraSPARC specific with HAL specific code"
msgstr ""
#: elf64-x86-64.c:1530
2011-06-02 13:43:24 +00:00
msgid "%B: relocation %s against symbol `%s' isn't supported in x32 mode"
msgstr ""
#: elf64-x86-64.c:1688
msgid "%B: '%s' accessed both as normal and thread local symbol"
2007-07-02 07:12:53 +00:00
msgstr ""
#: elf64-x86-64.c:3405 /src/binutils-gdb/bfd/elfnn-aarch64.c:3511
msgid ""
"%B: relocation %s against STT_GNU_IFUNC symbol `%s' has non-zero addend: %d"
msgstr ""
#: elf64-x86-64.c:3667
msgid ""
"%B: relocation R_X86_64_GOTOFF64 against protected function `%s' can not be "
"used when making a shared object"
msgstr ""
#: elf64-x86-64.c:3787
msgid "; recompile with -fPIC"
msgstr ""
#: elf64-x86-64.c:3792
msgid ""
"%B: relocation %s against %s `%s' can not be used when making a shared object"
"%s"
msgstr ""
#: elf64-x86-64.c:3794
msgid ""
"%B: relocation %s against undefined %s `%s' can not be used when making a "
"shared object%s"
msgstr ""
#: elf64-x86-64.c:3900
msgid ""
"%B: addend -0x%x in relocation %s against symbol `%s' at 0x%lx in section `"
"%A' is out of range"
msgstr ""
#: elf64-x86-64.c:3908
msgid ""
"%B: addend 0x%x in relocation %s against symbol `%s' at 0x%lx in section `"
"%A' is out of range"
msgstr ""
#: elfcode.h:760
2007-07-02 07:12:53 +00:00
#, c-format
msgid "warning: %s has a corrupt string table index - ignoring"
msgstr ""
#: elfcode.h:1186
1999-06-03 03:26:53 +00:00
#, c-format
msgid "%s: version count (%ld) does not match symbol count (%ld)"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elfcode.h:1440
1999-06-03 03:26:53 +00:00
#, c-format
msgid "%s(%s): relocation %d has invalid symbol index %ld"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elfcore.h:305
msgid "Warning: %B is truncated: expected core file size >= %lu, found: %lu."
1999-06-03 03:26:53 +00:00
msgstr ""
#: elflink.c:1143
2005-03-05 12:14:34 +00:00
msgid ""
"%s: TLS definition in %B section %A mismatches non-TLS definition in %B "
"section %A"
msgstr ""
#: elflink.c:1148
2005-03-05 12:14:34 +00:00
msgid "%s: TLS reference in %B mismatches non-TLS reference in %B"
msgstr ""
#: elflink.c:1153
2005-03-05 12:14:34 +00:00
msgid "%s: TLS definition in %B section %A mismatches non-TLS reference in %B"
msgstr ""
#: elflink.c:1158
2005-03-05 12:14:34 +00:00
msgid "%s: TLS reference in %B mismatches non-TLS definition in %B section %A"
msgstr ""
#: elflink.c:1763
msgid "%B: unexpected redefinition of indirect versioned symbol `%s'"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elflink.c:2066
2007-07-02 07:12:53 +00:00
msgid "%B: version node not found for symbol %s"
msgstr ""
#: elflink.c:2157
msgid ""
"%B: bad reloc symbol index (0x%lx >= 0x%lx) for offset 0x%lx in section `%A'"
msgstr ""
#: elflink.c:2168
msgid ""
"%B: non-zero symbol index (0x%lx) for offset 0x%lx in section `%A' when the "
"object file has no symbol table"
msgstr ""
#: elflink.c:2358
msgid "%B: relocation size mismatch in %B section %A"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elflink.c:2640
1999-06-03 03:26:53 +00:00
#, c-format
msgid "warning: type and size of dynamic symbol `%s' are not defined"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elflink.c:3403
msgid "%P: alternate ELF machine code found (%d) in %B, expecting %d\n"
msgstr ""
#: elflink.c:4032
msgid "%B: %s: invalid version %u (max %d)"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elflink.c:4068
msgid "%B: %s: invalid needed version %d"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elflink.c:4452
msgid "%B: undefined reference to symbol '%s'"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elflink.c:5523
msgid "%B: stack size specified and %s set"
msgstr ""
#: elflink.c:5526
msgid "%B: %s not absolute"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elflink.c:5824
#, c-format
msgid "%s: undefined version: %s"
msgstr ""
#: elflink.c:5892
msgid "%B: .preinit_array section is not allowed in DSO"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elflink.c:7657
2007-07-02 07:12:53 +00:00
#, c-format
msgid "undefined %s reference in complex symbol: %s"
msgstr ""
#: elflink.c:7811
2007-07-02 07:12:53 +00:00
#, c-format
msgid "unknown operator '%c' in complex symbol"
msgstr ""
#: elflink.c:8165 elflink.c:8182 elflink.c:8219 elflink.c:8236
2007-07-02 07:12:53 +00:00
msgid "%B: Unable to sort relocs - they are in more than one size"
msgstr ""
#: elflink.c:8196 elflink.c:8250
2007-07-02 07:12:53 +00:00
msgid "%B: Unable to sort relocs - they are of an unknown size"
msgstr ""
#: elflink.c:8301
msgid "Not enough memory to sort relocations"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elflink.c:8494
2007-07-02 07:12:53 +00:00
msgid "%B: Too many sections: %d (>= %d)"
msgstr ""
#: elflink.c:8775
2011-06-02 13:43:24 +00:00
msgid "%B: internal symbol `%s' in %B is referenced by DSO"
msgstr ""
#: elflink.c:8777
2011-06-02 13:43:24 +00:00
msgid "%B: hidden symbol `%s' in %B is referenced by DSO"
2001-10-30 15:20:14 +00:00
msgstr ""
#: elflink.c:8779
2011-06-02 13:43:24 +00:00
msgid "%B: local symbol `%s' in %B is referenced by DSO"
msgstr ""
#: elflink.c:8890
msgid "%B: could not find output section %A for input section %A"
msgstr ""
#: elflink.c:9013
2011-06-02 13:43:24 +00:00
msgid "%B: protected symbol `%s' isn't defined"
msgstr ""
#: elflink.c:9015
2011-06-02 13:43:24 +00:00
msgid "%B: internal symbol `%s' isn't defined"
Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * reloc.c (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. * libbfd.h, bfd-in2.h: Rebuilt. * elf32-sh.c (sh_elf_howto_table): Define new relocs. (sh_reloc_map): Map them. (PLT_ENTRY_SIZE, elf_sh_plt0_entry_be, elf_sh_plt0_entry_le, elf_sh_plt_entry_be, elf_sh_plt_entry_le, elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le, elf_sh_plt0_entry, elf_sh_plt_entry, elf_sh_pic_plt_entry, elf_sh_sizeof_plt, elf_sh_plt_plt0_offset, elf_sh_plt0_gotplt_offset, elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset, elf_sh_plt_reloc_offset, movi_shori_putval) [INCLUDE_SHMEDIA]: New. (elf_sh_link_hash_entry) [INCLUDE_SHMEDIA]: Add datalabel_got_offset. (sh_elf_link_hash_newfunc): Initialize it. (sh_elf_relocate_section): Augment the scope of seen_stt_datalabel. Introduce GOTPLT support. Extend GOTPC, PLT, GOT and GOTOFF handling to new SHmedia relocation types. Support GOT_BIAS. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol) [TARGET_SHMEDIA]: Set up values in PLT entries using movi_shori_putval. Support GOT_BIAS. (sh_elf_finish_dynamic_sections): Likewise. * elf32-sh64.c (shmedia_prepare_reloc): Do not add addend to relocation, it's now done by the caller. (GOT_BIAS): New. * elf64-sh64.c (GOT_BIAS, PLT_ENTRY_SIZE, elf_sh64_sizeof_plt, elf_sh64_plt_plt0_offset, elf_sh64_plt0_gotplt_offset, elf_sh64_plt_temp_offset, elf_sh64_plt_symbol_offset, elf_sh64_plt_reloc_offset, ELF_DYNAMIC_INTERPRETER, elf_sh64_pcrel_relocs_copied, elf_sh64_link_hash_entry, elf_sh64_link_hash_table, sh64_elf64_link_hash_traverse, sh64_elf64_hash_table): New. (sh_elf64_howto_table): Introduce new relocs. (sh_elf64_info_to_howto): Accept new PIC relocs. (sh_elf64_relocate_section): Augment the scope of seen_stt_datalabel. Support new PIC relocs. (sh_elf64_check_relocs): Support new PIC relocs. (elf_sh64_plt0_entry_be, elf_sh64_plt0_entry_le, elf_sh64_plt_entry_be, elf_sh64_plt_entry_le, elf_sh64_pic_plt_entry_be, elf_sh64_pic_plt_entry_le, elf_sh64_plt0_entry, elf_sh64_plt_entry, elf_sh64_pic_plt_entry, sh64_elf64_link_hash_newfunc, sh64_elf64_link_hash_table_create, movi_shori_putval, movi_3shori_putval, sh64_elf64_create_dynamic_sections, sh64_elf64_adjust_dynamic_symbol, sh64_elf64_discard_copies, sh64_elf64_size_dynamic_sections, sh64_elf64_finish_dynamic_symbol, sh64_elf64_finish_dynamic_sections): New. (elf_backend_create_dynamic-sections, bfd_elf64_bfd_link_hash_table_create, elf_backend_adjust_dynamic_symbol, elf_backend_size_dynamic_sections, elf_backend_finish_dynamic_symbol, elf_backend_finish_dynamic_sections, elf_backend_want_got_plt, elf_backend_plt_readonly, elf_backend_want_plt_sym, elf_backend_got_header_size, elf_backend_plt_header_size): Define. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * elf32-sh.c: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. * elf32-sh64.c, elf64-sh64.c: Likewise. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh.c (sh_elf_relax_section): Don't relax SHmedia sections. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh64.c (shmedia_prepare_reloc): Validate relocs that must be aligned. * elf64-sh64.c (sh_elf64_relocate_section): Ditto. 2001-01-14 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (bfd_elf32_bfd_copy_private_section_data): Define. (sh64_elf_fake_sections): Set type to SHT_SH5_CR_SORTED for a .cranges section with SEC_SORT_ENTRIES set. (sh64_backend_section_from_shdr): Set SEC_SORT_ENTRIES on an incoming sorted .cranges section. (sh64_bfd_elf_copy_private_section_data): New. (sh64_elf_final_write_processing): Only sort .cranges and modify start address if called by linker. 2001-01-08 Ben Elliston <bje@redhat.com> * elf32-sh64.c (sh64_elf_final_write_processing): Activate Hans-Peter Nilsson's set bit 0 patch from 2001-01-06. * elf64-sh64.c (sh64_elf64_final_write_processing): Ditto. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh_elf64_howto_table): No open brace at start of line. Add comments before all entries. <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct and clarify describing comment. (sh_elf64_reloc): Correct head comment. (sh_elf64_relocate_section): Correct spacing. <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. <case R_SH_SHMEDIA_CODE>: New case. (sh_elf64_gc_mark_hook): Correct spacing. (sh_elf64_check_relocs): Ditto. * elf32-sh64.c (shmedia_prepare_reloc) <case R_SH_SHMEDIA_CODE>: New case. * elf32-sh.c: Correct #endif comments for #ifndef-wrapped functions. (sh_elf_howto_table) <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct, clarify describing comment. Add comments before all entries. (sh_elf_relocate_section) <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> Sort .cranges section in final link. Prepare to set bit 0 on entry address. * elf32-sh64.c (struct sh64_find_section_vma_data): New. (sh64_elf_link_output_symbol_hook): Fix typo in prototype. (sh64_elf_set_mach_from_flags): Set SEC_DEBUGGING on incoming .cranges section. (sh64_backend_section_from_shdr): New, to recognize SHT_SH5_CR_SORTED on incoming .cranges section. (elf_backend_section_from_shdr): Define. (sh64_elf_final_write_processing): Sort outgoing .cranges section. (New, temporarily disabled:) Set bit 0 on entry address according to ISA type. (sh64_find_section_for_address): New. (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb, crange_bsearch_cmpl): Move here from opcodes/sh64-dis.c. (sh64_address_in_cranges): Move here from opcodes/sh64-dis.c. Use bfd_malloc, not xmalloc. (sh64_get_contents_type): Move here from opcodes/sh64-dis.c. Make global. * elf32-sh64.c (sh64_elf64_final_write_processing): New, (but temporarily disabled) setting bit 0 on entry address. (elf_backend_final_write_processing): Define. 2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_PT_16>: Adjust fields to be a proper relocation for PTA and PTB rather than a marker. <R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL>: Zero src_mask. * elf64-sh64.c: Ditto. (sh_elf64_relocate_section) <case R_SH_PT_16>: New case. * elf32-sh64.c: Include opcodes/sh64-opc.h (shmedia_prepare_reloc): Take a bfd_link_info pointer as first argument. Drop const qualifiers from "bfd *" and "bfd_byte *" parameters. No unused parameters. Caller changed. <case R_SH_PT_16>: New case. * Makefile.am (elf32-sh64.lo): Add dependency on sh64-opc.h. * Makefile.in: Regenerate. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): Set SHF_SH5_ISA32 for all code sections. (sh_elf64_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh64_elf_merge_private_data): Ditto. * elf32-sh64.c (sh64_elf_fake_sections): Use sh64_elf_section_data to access stored section flags. (sh64_elf_final_write_processing): Return immediately unless called by linker. Use sh64_elf_section_data (cranges) to get size of linker-generated cranges entries. (sh64_elf_copy_private_data): Add missing "return true". (sh64_elf_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh_elf64_merge_private_data): Ditto. 2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): New, copy of elf64-sh64.c:sh64_elf_fake_sections. (elf_backend_fake_sections): Define as sh64_elf64_fake_sections. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_copy_private_data_internal): Delete. (sh64_elf_final_write_processing): New. (elf_backend_final_write_processing): Define. (sh64_elf_fake_sections): Get header flags from tdata field. (sh64_elf_copy_private_data): Do not call sh64_elf_copy_private_data_internal, just copy e_flags field. (sh64_elf_merge_private_data): Do not call sh64_elf_copy_private_data_internal. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> Remove EF_SH64_ABI64, let ELF size make difference. Remove SH64-specific BFD section flag. * elf32-sh64.c (sh64_elf_fake_sections): Recognize section as containing SHmedia through elf_section_data (asect)->tdata non-zero, not using a BFD section flag. (sh64_elf_set_mach_from_flags): Don't recognize EF_SH64_ABI64. (sh64_elf_merge_private_data): Similar. (elf_backend_section_flags): Don't define. (sh64_elf_backend_section_flags): Delete. * elf64-sh64.c (sh_elf64_set_mach_from_flags): Recognize EF_SH64, not EF_SH64_ABI64. (sh_elf64_merge_private_data): Similar. * section.c (Section flags definitions): Don't define SEC_SH_ISA_SHMEDIA. (bfd-in2.h): Regenerate. 2000-12-09 Hans-Peter Nilsson <hpn@cygnus.com> Make DataLabel references work with partial linking. * elf32-sh64.c: Fix formatting. (sh64_elf_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf_link_output_symbol_hook. (sh64_elf_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. * elf64-sh64.c (sh64_elf64_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf64_link_output_symbol_hook. (sh64_elf64_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. 2000-12-07 Hans-Peter Nilsson <hpn@cygnus.com> Implement semantics for inter-file DataLabel references. * elf64-sh64.c (DATALABEL_SUFFIX): Define. (sh64_elf64_add_symbol_hook): New. (sh_elf64_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. (elf_backend_add_symbol_hook): Define to sh64_elf64_add_symbol_hook. * elf64-sh32.c: Tweak comments. (DATALABEL_SUFFIX): Define. (sh64_elf_add_symbol_hook): New. (elf_backend_add_symbol_hook): Define to sh64_elf_add_symbol_hook. * elf32-sh.c (sh_elf_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. 2000-12-05 Hans-Peter Nilsson <hpn@cygnus.com> Pass through STT_DATALABEL. * elf32-sh64.c (sh64_elf_get_symbol_type): New. (elf_backend_get_symbol_type): Define. * elf64-sh64.c (sh64_elf64_get_symbol_type): New. (elf_backend_get_symbol_type): Define. 2000-11-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c: Tweak comments. (sh64_elf_copy_private_data_internal): Add prototype. (bfd_elf32_bfd_set_private_flags): Define. (sh64_elf_copy_private_data_internal): Compare machine name, not textual BFD target name, to check whether to copy section flag SHF_SH5_ISA32. (sh64_elf_merge_private_data): Validize bfd_get_arch_size. Tweak section-contents-type-mismatch message. (shmedia_prepare_reloc): Add ATTRIBUTE_UNUSED markers. Validize reloc-types. * elf64-sh64.c: New file. * targets.c (bfd_elf64_sh64_vec, bfd_elf64_sh64l_vec): Declare. * Makefile.am (BFD64_BACKENDS): Add elf64-sh64.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * config.bfd (sh64-*-elf*): Add bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure.in: Handle bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. 2000-11-29 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_set_mach_from_flags): Do not recognize anything else but EF_SH64 and EF_SH64_ABI64. (sh64_elf_merge_private_data): Emit error for anything else but EF_SH64 and EF_SH64_ABI64. * config.bfd: Remove bfd_elf32_shblin_vec and bfd_elf32_shlin_vec from targ_selvecs. * configure.in: Add cofflink.lo to bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec as a temporary measure. * configure: Regenerate. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * cpu-sh.c (arch_info_struct): Include sh5 item unconditionalized. * config.bfd (sh64-*-elf*): Do not set targ_cflags. Add targ_selvecs bfd_elf32_sh_vec, bfd_elf32_shl_vec, bfd_elf32_shblin_vec and bfd_elf32_shlin_vec. * elf32-sh64.c: Tweak comments. (sh64_elf_set_mach_from_flags): Recognize all machine flags that are proper subsets of SH64 as bfd_mach_sh5. Add EF_SH64_ABI64. (sh64_elf_copy_private_data_internal): Wrap long line. (sh64_elf_merge_private_data): Rewrite to allow objects from SH64 subsets to be linked together. (INCLUDE_SHMEDIA): Define. * elf32-sh.c (sh_elf_relocate_section) <local symbol>: Parenthesize plus-expression inside or-expression. <global symbol>: Ditto. (sh_elf_set_mach_from_flags): Remove code refusing deleted EF_SH64_32BIT_ABI flag. 2000-11-26 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16_PCREL, R_SH_64_PCREL>: Set pcrel_offset to true. (sh_elf_relocate_section) <local symbol>: Or 1 in calculation of relocation if sym->st_other & STO_SH5_ISA32. <global symbol>: Ditto if h->other & STO_SH5_ISA32. * elf32-sh64.c (shmedia_prepare_reloc): Add rel->r_addend to relocation. 2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com> * Makefile.am (BFD32_BACKENDS): Add elf32-sh64.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * archures.c: Add bfd_mach_sh5. * config.bfd: Map targ_cpu sh* to bfd_sh_arch. Handle sh64-*-elf*. Set targ_cflags to -DINCLUDE_SHMEDIA. * configure.in: Handle bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec. * configure: Regenerate. * reloc.c (BFD_RELOC_SH_SHMEDIA_CODE, BFD_RELOC_SH_IMMU5, BFD_RELOC_SH_IMMS6, BFD_RELOC_SH_IMMS6BY32, BFD_RELOC_SH_IMMU6, BFD_RELOC_SH_IMMS10, BFD_RELOC_SH_IMMS10BY2, BFD_RELOC_SH_IMMS10BY4, BFD_RELOC_SH_IMMS10BY8, BFD_RELOC_SH_IMMS16, BFD_RELOC_SH_IMMU16, BFD_RELOC_SH_IMM_LOW16, BFD_RELOC_SH_IMM_LOW16_PCREL, BFD_RELOC_SH_IMM_MEDLOW16, BFD_RELOC_SH_IMM_MEDLOW16_PCREL, BFD_RELOC_SH_IMM_MEDHI16, BFD_RELOC_SH_IMM_MEDHI16_PCREL, BFD_RELOC_SH_IMM_HI16, BFD_RELOC_SH_IMM_HI16_PCREL, BFD_RELOC_SH_PT_16): New relocations. * cpu-sh.c [INCLUDE_SHMEDIA] (arch_info_struct): Define and link in item for SH5. * elf32-sh.c [INCLUDE_SHMEDIA] (sh_elf_howto_table): Add howto items for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_rel): Add mappings for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_elf_relocate_section) [default]: Call shmedia_prepare_reloc, goto final_link_relocate if it returns non-zero, else fail as before. (sh_elf_set_mach_from_flags): Provide function only if not defined as macro. Do not recognize objects with EF_SH64_32BIT_ABI set. (sh_elf_set_private_flags): Provide function only if not defined as a macro. (sh_elf_copy_private_data): Similar. (sh_elf_merge_private_data): Similar. * section.c (SEC_SH_ISA_SHMEDIA): New. * targets.c (bfd_elf32_sh64_vec, bfd_elf32_sh64l_vec): Declare. * elf32-sh64.c: New file. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate.
2002-02-08 05:33:27 +00:00
msgstr ""
#: elflink.c:9017
2011-06-02 13:43:24 +00:00
msgid "%B: hidden symbol `%s' isn't defined"
msgstr ""
#: elflink.c:9043
msgid "%B: No symbol version section for versioned symbol `%s'"
msgstr ""
#: elflink.c:9598
2011-06-02 13:43:24 +00:00
msgid "error: %B: size of section %A is not multiple of address size"
msgstr ""
#: elflink.c:9645
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid ""
2011-06-02 13:43:24 +00:00
"error: %B contains a reloc (0x%s) for section %A that references a non-"
"existent global symbol"
Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * reloc.c (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. * libbfd.h, bfd-in2.h: Rebuilt. * elf32-sh.c (sh_elf_howto_table): Define new relocs. (sh_reloc_map): Map them. (PLT_ENTRY_SIZE, elf_sh_plt0_entry_be, elf_sh_plt0_entry_le, elf_sh_plt_entry_be, elf_sh_plt_entry_le, elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le, elf_sh_plt0_entry, elf_sh_plt_entry, elf_sh_pic_plt_entry, elf_sh_sizeof_plt, elf_sh_plt_plt0_offset, elf_sh_plt0_gotplt_offset, elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset, elf_sh_plt_reloc_offset, movi_shori_putval) [INCLUDE_SHMEDIA]: New. (elf_sh_link_hash_entry) [INCLUDE_SHMEDIA]: Add datalabel_got_offset. (sh_elf_link_hash_newfunc): Initialize it. (sh_elf_relocate_section): Augment the scope of seen_stt_datalabel. Introduce GOTPLT support. Extend GOTPC, PLT, GOT and GOTOFF handling to new SHmedia relocation types. Support GOT_BIAS. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol) [TARGET_SHMEDIA]: Set up values in PLT entries using movi_shori_putval. Support GOT_BIAS. (sh_elf_finish_dynamic_sections): Likewise. * elf32-sh64.c (shmedia_prepare_reloc): Do not add addend to relocation, it's now done by the caller. (GOT_BIAS): New. * elf64-sh64.c (GOT_BIAS, PLT_ENTRY_SIZE, elf_sh64_sizeof_plt, elf_sh64_plt_plt0_offset, elf_sh64_plt0_gotplt_offset, elf_sh64_plt_temp_offset, elf_sh64_plt_symbol_offset, elf_sh64_plt_reloc_offset, ELF_DYNAMIC_INTERPRETER, elf_sh64_pcrel_relocs_copied, elf_sh64_link_hash_entry, elf_sh64_link_hash_table, sh64_elf64_link_hash_traverse, sh64_elf64_hash_table): New. (sh_elf64_howto_table): Introduce new relocs. (sh_elf64_info_to_howto): Accept new PIC relocs. (sh_elf64_relocate_section): Augment the scope of seen_stt_datalabel. Support new PIC relocs. (sh_elf64_check_relocs): Support new PIC relocs. (elf_sh64_plt0_entry_be, elf_sh64_plt0_entry_le, elf_sh64_plt_entry_be, elf_sh64_plt_entry_le, elf_sh64_pic_plt_entry_be, elf_sh64_pic_plt_entry_le, elf_sh64_plt0_entry, elf_sh64_plt_entry, elf_sh64_pic_plt_entry, sh64_elf64_link_hash_newfunc, sh64_elf64_link_hash_table_create, movi_shori_putval, movi_3shori_putval, sh64_elf64_create_dynamic_sections, sh64_elf64_adjust_dynamic_symbol, sh64_elf64_discard_copies, sh64_elf64_size_dynamic_sections, sh64_elf64_finish_dynamic_symbol, sh64_elf64_finish_dynamic_sections): New. (elf_backend_create_dynamic-sections, bfd_elf64_bfd_link_hash_table_create, elf_backend_adjust_dynamic_symbol, elf_backend_size_dynamic_sections, elf_backend_finish_dynamic_symbol, elf_backend_finish_dynamic_sections, elf_backend_want_got_plt, elf_backend_plt_readonly, elf_backend_want_plt_sym, elf_backend_got_header_size, elf_backend_plt_header_size): Define. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * elf32-sh.c: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. * elf32-sh64.c, elf64-sh64.c: Likewise. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh.c (sh_elf_relax_section): Don't relax SHmedia sections. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh64.c (shmedia_prepare_reloc): Validate relocs that must be aligned. * elf64-sh64.c (sh_elf64_relocate_section): Ditto. 2001-01-14 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (bfd_elf32_bfd_copy_private_section_data): Define. (sh64_elf_fake_sections): Set type to SHT_SH5_CR_SORTED for a .cranges section with SEC_SORT_ENTRIES set. (sh64_backend_section_from_shdr): Set SEC_SORT_ENTRIES on an incoming sorted .cranges section. (sh64_bfd_elf_copy_private_section_data): New. (sh64_elf_final_write_processing): Only sort .cranges and modify start address if called by linker. 2001-01-08 Ben Elliston <bje@redhat.com> * elf32-sh64.c (sh64_elf_final_write_processing): Activate Hans-Peter Nilsson's set bit 0 patch from 2001-01-06. * elf64-sh64.c (sh64_elf64_final_write_processing): Ditto. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh_elf64_howto_table): No open brace at start of line. Add comments before all entries. <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct and clarify describing comment. (sh_elf64_reloc): Correct head comment. (sh_elf64_relocate_section): Correct spacing. <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. <case R_SH_SHMEDIA_CODE>: New case. (sh_elf64_gc_mark_hook): Correct spacing. (sh_elf64_check_relocs): Ditto. * elf32-sh64.c (shmedia_prepare_reloc) <case R_SH_SHMEDIA_CODE>: New case. * elf32-sh.c: Correct #endif comments for #ifndef-wrapped functions. (sh_elf_howto_table) <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct, clarify describing comment. Add comments before all entries. (sh_elf_relocate_section) <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> Sort .cranges section in final link. Prepare to set bit 0 on entry address. * elf32-sh64.c (struct sh64_find_section_vma_data): New. (sh64_elf_link_output_symbol_hook): Fix typo in prototype. (sh64_elf_set_mach_from_flags): Set SEC_DEBUGGING on incoming .cranges section. (sh64_backend_section_from_shdr): New, to recognize SHT_SH5_CR_SORTED on incoming .cranges section. (elf_backend_section_from_shdr): Define. (sh64_elf_final_write_processing): Sort outgoing .cranges section. (New, temporarily disabled:) Set bit 0 on entry address according to ISA type. (sh64_find_section_for_address): New. (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb, crange_bsearch_cmpl): Move here from opcodes/sh64-dis.c. (sh64_address_in_cranges): Move here from opcodes/sh64-dis.c. Use bfd_malloc, not xmalloc. (sh64_get_contents_type): Move here from opcodes/sh64-dis.c. Make global. * elf32-sh64.c (sh64_elf64_final_write_processing): New, (but temporarily disabled) setting bit 0 on entry address. (elf_backend_final_write_processing): Define. 2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_PT_16>: Adjust fields to be a proper relocation for PTA and PTB rather than a marker. <R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL>: Zero src_mask. * elf64-sh64.c: Ditto. (sh_elf64_relocate_section) <case R_SH_PT_16>: New case. * elf32-sh64.c: Include opcodes/sh64-opc.h (shmedia_prepare_reloc): Take a bfd_link_info pointer as first argument. Drop const qualifiers from "bfd *" and "bfd_byte *" parameters. No unused parameters. Caller changed. <case R_SH_PT_16>: New case. * Makefile.am (elf32-sh64.lo): Add dependency on sh64-opc.h. * Makefile.in: Regenerate. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): Set SHF_SH5_ISA32 for all code sections. (sh_elf64_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh64_elf_merge_private_data): Ditto. * elf32-sh64.c (sh64_elf_fake_sections): Use sh64_elf_section_data to access stored section flags. (sh64_elf_final_write_processing): Return immediately unless called by linker. Use sh64_elf_section_data (cranges) to get size of linker-generated cranges entries. (sh64_elf_copy_private_data): Add missing "return true". (sh64_elf_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh_elf64_merge_private_data): Ditto. 2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): New, copy of elf64-sh64.c:sh64_elf_fake_sections. (elf_backend_fake_sections): Define as sh64_elf64_fake_sections. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_copy_private_data_internal): Delete. (sh64_elf_final_write_processing): New. (elf_backend_final_write_processing): Define. (sh64_elf_fake_sections): Get header flags from tdata field. (sh64_elf_copy_private_data): Do not call sh64_elf_copy_private_data_internal, just copy e_flags field. (sh64_elf_merge_private_data): Do not call sh64_elf_copy_private_data_internal. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> Remove EF_SH64_ABI64, let ELF size make difference. Remove SH64-specific BFD section flag. * elf32-sh64.c (sh64_elf_fake_sections): Recognize section as containing SHmedia through elf_section_data (asect)->tdata non-zero, not using a BFD section flag. (sh64_elf_set_mach_from_flags): Don't recognize EF_SH64_ABI64. (sh64_elf_merge_private_data): Similar. (elf_backend_section_flags): Don't define. (sh64_elf_backend_section_flags): Delete. * elf64-sh64.c (sh_elf64_set_mach_from_flags): Recognize EF_SH64, not EF_SH64_ABI64. (sh_elf64_merge_private_data): Similar. * section.c (Section flags definitions): Don't define SEC_SH_ISA_SHMEDIA. (bfd-in2.h): Regenerate. 2000-12-09 Hans-Peter Nilsson <hpn@cygnus.com> Make DataLabel references work with partial linking. * elf32-sh64.c: Fix formatting. (sh64_elf_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf_link_output_symbol_hook. (sh64_elf_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. * elf64-sh64.c (sh64_elf64_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf64_link_output_symbol_hook. (sh64_elf64_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. 2000-12-07 Hans-Peter Nilsson <hpn@cygnus.com> Implement semantics for inter-file DataLabel references. * elf64-sh64.c (DATALABEL_SUFFIX): Define. (sh64_elf64_add_symbol_hook): New. (sh_elf64_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. (elf_backend_add_symbol_hook): Define to sh64_elf64_add_symbol_hook. * elf64-sh32.c: Tweak comments. (DATALABEL_SUFFIX): Define. (sh64_elf_add_symbol_hook): New. (elf_backend_add_symbol_hook): Define to sh64_elf_add_symbol_hook. * elf32-sh.c (sh_elf_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. 2000-12-05 Hans-Peter Nilsson <hpn@cygnus.com> Pass through STT_DATALABEL. * elf32-sh64.c (sh64_elf_get_symbol_type): New. (elf_backend_get_symbol_type): Define. * elf64-sh64.c (sh64_elf64_get_symbol_type): New. (elf_backend_get_symbol_type): Define. 2000-11-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c: Tweak comments. (sh64_elf_copy_private_data_internal): Add prototype. (bfd_elf32_bfd_set_private_flags): Define. (sh64_elf_copy_private_data_internal): Compare machine name, not textual BFD target name, to check whether to copy section flag SHF_SH5_ISA32. (sh64_elf_merge_private_data): Validize bfd_get_arch_size. Tweak section-contents-type-mismatch message. (shmedia_prepare_reloc): Add ATTRIBUTE_UNUSED markers. Validize reloc-types. * elf64-sh64.c: New file. * targets.c (bfd_elf64_sh64_vec, bfd_elf64_sh64l_vec): Declare. * Makefile.am (BFD64_BACKENDS): Add elf64-sh64.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * config.bfd (sh64-*-elf*): Add bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure.in: Handle bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. 2000-11-29 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_set_mach_from_flags): Do not recognize anything else but EF_SH64 and EF_SH64_ABI64. (sh64_elf_merge_private_data): Emit error for anything else but EF_SH64 and EF_SH64_ABI64. * config.bfd: Remove bfd_elf32_shblin_vec and bfd_elf32_shlin_vec from targ_selvecs. * configure.in: Add cofflink.lo to bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec as a temporary measure. * configure: Regenerate. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * cpu-sh.c (arch_info_struct): Include sh5 item unconditionalized. * config.bfd (sh64-*-elf*): Do not set targ_cflags. Add targ_selvecs bfd_elf32_sh_vec, bfd_elf32_shl_vec, bfd_elf32_shblin_vec and bfd_elf32_shlin_vec. * elf32-sh64.c: Tweak comments. (sh64_elf_set_mach_from_flags): Recognize all machine flags that are proper subsets of SH64 as bfd_mach_sh5. Add EF_SH64_ABI64. (sh64_elf_copy_private_data_internal): Wrap long line. (sh64_elf_merge_private_data): Rewrite to allow objects from SH64 subsets to be linked together. (INCLUDE_SHMEDIA): Define. * elf32-sh.c (sh_elf_relocate_section) <local symbol>: Parenthesize plus-expression inside or-expression. <global symbol>: Ditto. (sh_elf_set_mach_from_flags): Remove code refusing deleted EF_SH64_32BIT_ABI flag. 2000-11-26 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16_PCREL, R_SH_64_PCREL>: Set pcrel_offset to true. (sh_elf_relocate_section) <local symbol>: Or 1 in calculation of relocation if sym->st_other & STO_SH5_ISA32. <global symbol>: Ditto if h->other & STO_SH5_ISA32. * elf32-sh64.c (shmedia_prepare_reloc): Add rel->r_addend to relocation. 2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com> * Makefile.am (BFD32_BACKENDS): Add elf32-sh64.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * archures.c: Add bfd_mach_sh5. * config.bfd: Map targ_cpu sh* to bfd_sh_arch. Handle sh64-*-elf*. Set targ_cflags to -DINCLUDE_SHMEDIA. * configure.in: Handle bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec. * configure: Regenerate. * reloc.c (BFD_RELOC_SH_SHMEDIA_CODE, BFD_RELOC_SH_IMMU5, BFD_RELOC_SH_IMMS6, BFD_RELOC_SH_IMMS6BY32, BFD_RELOC_SH_IMMU6, BFD_RELOC_SH_IMMS10, BFD_RELOC_SH_IMMS10BY2, BFD_RELOC_SH_IMMS10BY4, BFD_RELOC_SH_IMMS10BY8, BFD_RELOC_SH_IMMS16, BFD_RELOC_SH_IMMU16, BFD_RELOC_SH_IMM_LOW16, BFD_RELOC_SH_IMM_LOW16_PCREL, BFD_RELOC_SH_IMM_MEDLOW16, BFD_RELOC_SH_IMM_MEDLOW16_PCREL, BFD_RELOC_SH_IMM_MEDHI16, BFD_RELOC_SH_IMM_MEDHI16_PCREL, BFD_RELOC_SH_IMM_HI16, BFD_RELOC_SH_IMM_HI16_PCREL, BFD_RELOC_SH_PT_16): New relocations. * cpu-sh.c [INCLUDE_SHMEDIA] (arch_info_struct): Define and link in item for SH5. * elf32-sh.c [INCLUDE_SHMEDIA] (sh_elf_howto_table): Add howto items for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_rel): Add mappings for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_elf_relocate_section) [default]: Call shmedia_prepare_reloc, goto final_link_relocate if it returns non-zero, else fail as before. (sh_elf_set_mach_from_flags): Provide function only if not defined as macro. Do not recognize objects with EF_SH64_32BIT_ABI set. (sh_elf_set_private_flags): Provide function only if not defined as a macro. (sh_elf_copy_private_data): Similar. (sh_elf_merge_private_data): Similar. * section.c (SEC_SH_ISA_SHMEDIA): New. * targets.c (bfd_elf32_sh64_vec, bfd_elf32_sh64l_vec): Declare. * elf32-sh64.c: New file. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate.
2002-02-08 05:33:27 +00:00
msgstr ""
#: elflink.c:10369
2005-10-25 02:20:17 +00:00
msgid "%A has both ordered [`%A' in %B] and unordered [`%A' in %B] sections"
msgstr ""
#: elflink.c:10374
Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * reloc.c (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. * libbfd.h, bfd-in2.h: Rebuilt. * elf32-sh.c (sh_elf_howto_table): Define new relocs. (sh_reloc_map): Map them. (PLT_ENTRY_SIZE, elf_sh_plt0_entry_be, elf_sh_plt0_entry_le, elf_sh_plt_entry_be, elf_sh_plt_entry_le, elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le, elf_sh_plt0_entry, elf_sh_plt_entry, elf_sh_pic_plt_entry, elf_sh_sizeof_plt, elf_sh_plt_plt0_offset, elf_sh_plt0_gotplt_offset, elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset, elf_sh_plt_reloc_offset, movi_shori_putval) [INCLUDE_SHMEDIA]: New. (elf_sh_link_hash_entry) [INCLUDE_SHMEDIA]: Add datalabel_got_offset. (sh_elf_link_hash_newfunc): Initialize it. (sh_elf_relocate_section): Augment the scope of seen_stt_datalabel. Introduce GOTPLT support. Extend GOTPC, PLT, GOT and GOTOFF handling to new SHmedia relocation types. Support GOT_BIAS. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol) [TARGET_SHMEDIA]: Set up values in PLT entries using movi_shori_putval. Support GOT_BIAS. (sh_elf_finish_dynamic_sections): Likewise. * elf32-sh64.c (shmedia_prepare_reloc): Do not add addend to relocation, it's now done by the caller. (GOT_BIAS): New. * elf64-sh64.c (GOT_BIAS, PLT_ENTRY_SIZE, elf_sh64_sizeof_plt, elf_sh64_plt_plt0_offset, elf_sh64_plt0_gotplt_offset, elf_sh64_plt_temp_offset, elf_sh64_plt_symbol_offset, elf_sh64_plt_reloc_offset, ELF_DYNAMIC_INTERPRETER, elf_sh64_pcrel_relocs_copied, elf_sh64_link_hash_entry, elf_sh64_link_hash_table, sh64_elf64_link_hash_traverse, sh64_elf64_hash_table): New. (sh_elf64_howto_table): Introduce new relocs. (sh_elf64_info_to_howto): Accept new PIC relocs. (sh_elf64_relocate_section): Augment the scope of seen_stt_datalabel. Support new PIC relocs. (sh_elf64_check_relocs): Support new PIC relocs. (elf_sh64_plt0_entry_be, elf_sh64_plt0_entry_le, elf_sh64_plt_entry_be, elf_sh64_plt_entry_le, elf_sh64_pic_plt_entry_be, elf_sh64_pic_plt_entry_le, elf_sh64_plt0_entry, elf_sh64_plt_entry, elf_sh64_pic_plt_entry, sh64_elf64_link_hash_newfunc, sh64_elf64_link_hash_table_create, movi_shori_putval, movi_3shori_putval, sh64_elf64_create_dynamic_sections, sh64_elf64_adjust_dynamic_symbol, sh64_elf64_discard_copies, sh64_elf64_size_dynamic_sections, sh64_elf64_finish_dynamic_symbol, sh64_elf64_finish_dynamic_sections): New. (elf_backend_create_dynamic-sections, bfd_elf64_bfd_link_hash_table_create, elf_backend_adjust_dynamic_symbol, elf_backend_size_dynamic_sections, elf_backend_finish_dynamic_symbol, elf_backend_finish_dynamic_sections, elf_backend_want_got_plt, elf_backend_plt_readonly, elf_backend_want_plt_sym, elf_backend_got_header_size, elf_backend_plt_header_size): Define. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * elf32-sh.c: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. * elf32-sh64.c, elf64-sh64.c: Likewise. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh.c (sh_elf_relax_section): Don't relax SHmedia sections. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh64.c (shmedia_prepare_reloc): Validate relocs that must be aligned. * elf64-sh64.c (sh_elf64_relocate_section): Ditto. 2001-01-14 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (bfd_elf32_bfd_copy_private_section_data): Define. (sh64_elf_fake_sections): Set type to SHT_SH5_CR_SORTED for a .cranges section with SEC_SORT_ENTRIES set. (sh64_backend_section_from_shdr): Set SEC_SORT_ENTRIES on an incoming sorted .cranges section. (sh64_bfd_elf_copy_private_section_data): New. (sh64_elf_final_write_processing): Only sort .cranges and modify start address if called by linker. 2001-01-08 Ben Elliston <bje@redhat.com> * elf32-sh64.c (sh64_elf_final_write_processing): Activate Hans-Peter Nilsson's set bit 0 patch from 2001-01-06. * elf64-sh64.c (sh64_elf64_final_write_processing): Ditto. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh_elf64_howto_table): No open brace at start of line. Add comments before all entries. <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct and clarify describing comment. (sh_elf64_reloc): Correct head comment. (sh_elf64_relocate_section): Correct spacing. <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. <case R_SH_SHMEDIA_CODE>: New case. (sh_elf64_gc_mark_hook): Correct spacing. (sh_elf64_check_relocs): Ditto. * elf32-sh64.c (shmedia_prepare_reloc) <case R_SH_SHMEDIA_CODE>: New case. * elf32-sh.c: Correct #endif comments for #ifndef-wrapped functions. (sh_elf_howto_table) <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct, clarify describing comment. Add comments before all entries. (sh_elf_relocate_section) <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> Sort .cranges section in final link. Prepare to set bit 0 on entry address. * elf32-sh64.c (struct sh64_find_section_vma_data): New. (sh64_elf_link_output_symbol_hook): Fix typo in prototype. (sh64_elf_set_mach_from_flags): Set SEC_DEBUGGING on incoming .cranges section. (sh64_backend_section_from_shdr): New, to recognize SHT_SH5_CR_SORTED on incoming .cranges section. (elf_backend_section_from_shdr): Define. (sh64_elf_final_write_processing): Sort outgoing .cranges section. (New, temporarily disabled:) Set bit 0 on entry address according to ISA type. (sh64_find_section_for_address): New. (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb, crange_bsearch_cmpl): Move here from opcodes/sh64-dis.c. (sh64_address_in_cranges): Move here from opcodes/sh64-dis.c. Use bfd_malloc, not xmalloc. (sh64_get_contents_type): Move here from opcodes/sh64-dis.c. Make global. * elf32-sh64.c (sh64_elf64_final_write_processing): New, (but temporarily disabled) setting bit 0 on entry address. (elf_backend_final_write_processing): Define. 2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_PT_16>: Adjust fields to be a proper relocation for PTA and PTB rather than a marker. <R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL>: Zero src_mask. * elf64-sh64.c: Ditto. (sh_elf64_relocate_section) <case R_SH_PT_16>: New case. * elf32-sh64.c: Include opcodes/sh64-opc.h (shmedia_prepare_reloc): Take a bfd_link_info pointer as first argument. Drop const qualifiers from "bfd *" and "bfd_byte *" parameters. No unused parameters. Caller changed. <case R_SH_PT_16>: New case. * Makefile.am (elf32-sh64.lo): Add dependency on sh64-opc.h. * Makefile.in: Regenerate. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): Set SHF_SH5_ISA32 for all code sections. (sh_elf64_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh64_elf_merge_private_data): Ditto. * elf32-sh64.c (sh64_elf_fake_sections): Use sh64_elf_section_data to access stored section flags. (sh64_elf_final_write_processing): Return immediately unless called by linker. Use sh64_elf_section_data (cranges) to get size of linker-generated cranges entries. (sh64_elf_copy_private_data): Add missing "return true". (sh64_elf_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh_elf64_merge_private_data): Ditto. 2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): New, copy of elf64-sh64.c:sh64_elf_fake_sections. (elf_backend_fake_sections): Define as sh64_elf64_fake_sections. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_copy_private_data_internal): Delete. (sh64_elf_final_write_processing): New. (elf_backend_final_write_processing): Define. (sh64_elf_fake_sections): Get header flags from tdata field. (sh64_elf_copy_private_data): Do not call sh64_elf_copy_private_data_internal, just copy e_flags field. (sh64_elf_merge_private_data): Do not call sh64_elf_copy_private_data_internal. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> Remove EF_SH64_ABI64, let ELF size make difference. Remove SH64-specific BFD section flag. * elf32-sh64.c (sh64_elf_fake_sections): Recognize section as containing SHmedia through elf_section_data (asect)->tdata non-zero, not using a BFD section flag. (sh64_elf_set_mach_from_flags): Don't recognize EF_SH64_ABI64. (sh64_elf_merge_private_data): Similar. (elf_backend_section_flags): Don't define. (sh64_elf_backend_section_flags): Delete. * elf64-sh64.c (sh_elf64_set_mach_from_flags): Recognize EF_SH64, not EF_SH64_ABI64. (sh_elf64_merge_private_data): Similar. * section.c (Section flags definitions): Don't define SEC_SH_ISA_SHMEDIA. (bfd-in2.h): Regenerate. 2000-12-09 Hans-Peter Nilsson <hpn@cygnus.com> Make DataLabel references work with partial linking. * elf32-sh64.c: Fix formatting. (sh64_elf_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf_link_output_symbol_hook. (sh64_elf_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. * elf64-sh64.c (sh64_elf64_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf64_link_output_symbol_hook. (sh64_elf64_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. 2000-12-07 Hans-Peter Nilsson <hpn@cygnus.com> Implement semantics for inter-file DataLabel references. * elf64-sh64.c (DATALABEL_SUFFIX): Define. (sh64_elf64_add_symbol_hook): New. (sh_elf64_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. (elf_backend_add_symbol_hook): Define to sh64_elf64_add_symbol_hook. * elf64-sh32.c: Tweak comments. (DATALABEL_SUFFIX): Define. (sh64_elf_add_symbol_hook): New. (elf_backend_add_symbol_hook): Define to sh64_elf_add_symbol_hook. * elf32-sh.c (sh_elf_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. 2000-12-05 Hans-Peter Nilsson <hpn@cygnus.com> Pass through STT_DATALABEL. * elf32-sh64.c (sh64_elf_get_symbol_type): New. (elf_backend_get_symbol_type): Define. * elf64-sh64.c (sh64_elf64_get_symbol_type): New. (elf_backend_get_symbol_type): Define. 2000-11-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c: Tweak comments. (sh64_elf_copy_private_data_internal): Add prototype. (bfd_elf32_bfd_set_private_flags): Define. (sh64_elf_copy_private_data_internal): Compare machine name, not textual BFD target name, to check whether to copy section flag SHF_SH5_ISA32. (sh64_elf_merge_private_data): Validize bfd_get_arch_size. Tweak section-contents-type-mismatch message. (shmedia_prepare_reloc): Add ATTRIBUTE_UNUSED markers. Validize reloc-types. * elf64-sh64.c: New file. * targets.c (bfd_elf64_sh64_vec, bfd_elf64_sh64l_vec): Declare. * Makefile.am (BFD64_BACKENDS): Add elf64-sh64.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * config.bfd (sh64-*-elf*): Add bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure.in: Handle bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. 2000-11-29 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_set_mach_from_flags): Do not recognize anything else but EF_SH64 and EF_SH64_ABI64. (sh64_elf_merge_private_data): Emit error for anything else but EF_SH64 and EF_SH64_ABI64. * config.bfd: Remove bfd_elf32_shblin_vec and bfd_elf32_shlin_vec from targ_selvecs. * configure.in: Add cofflink.lo to bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec as a temporary measure. * configure: Regenerate. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * cpu-sh.c (arch_info_struct): Include sh5 item unconditionalized. * config.bfd (sh64-*-elf*): Do not set targ_cflags. Add targ_selvecs bfd_elf32_sh_vec, bfd_elf32_shl_vec, bfd_elf32_shblin_vec and bfd_elf32_shlin_vec. * elf32-sh64.c: Tweak comments. (sh64_elf_set_mach_from_flags): Recognize all machine flags that are proper subsets of SH64 as bfd_mach_sh5. Add EF_SH64_ABI64. (sh64_elf_copy_private_data_internal): Wrap long line. (sh64_elf_merge_private_data): Rewrite to allow objects from SH64 subsets to be linked together. (INCLUDE_SHMEDIA): Define. * elf32-sh.c (sh_elf_relocate_section) <local symbol>: Parenthesize plus-expression inside or-expression. <global symbol>: Ditto. (sh_elf_set_mach_from_flags): Remove code refusing deleted EF_SH64_32BIT_ABI flag. 2000-11-26 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16_PCREL, R_SH_64_PCREL>: Set pcrel_offset to true. (sh_elf_relocate_section) <local symbol>: Or 1 in calculation of relocation if sym->st_other & STO_SH5_ISA32. <global symbol>: Ditto if h->other & STO_SH5_ISA32. * elf32-sh64.c (shmedia_prepare_reloc): Add rel->r_addend to relocation. 2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com> * Makefile.am (BFD32_BACKENDS): Add elf32-sh64.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * archures.c: Add bfd_mach_sh5. * config.bfd: Map targ_cpu sh* to bfd_sh_arch. Handle sh64-*-elf*. Set targ_cflags to -DINCLUDE_SHMEDIA. * configure.in: Handle bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec. * configure: Regenerate. * reloc.c (BFD_RELOC_SH_SHMEDIA_CODE, BFD_RELOC_SH_IMMU5, BFD_RELOC_SH_IMMS6, BFD_RELOC_SH_IMMS6BY32, BFD_RELOC_SH_IMMU6, BFD_RELOC_SH_IMMS10, BFD_RELOC_SH_IMMS10BY2, BFD_RELOC_SH_IMMS10BY4, BFD_RELOC_SH_IMMS10BY8, BFD_RELOC_SH_IMMS16, BFD_RELOC_SH_IMMU16, BFD_RELOC_SH_IMM_LOW16, BFD_RELOC_SH_IMM_LOW16_PCREL, BFD_RELOC_SH_IMM_MEDLOW16, BFD_RELOC_SH_IMM_MEDLOW16_PCREL, BFD_RELOC_SH_IMM_MEDHI16, BFD_RELOC_SH_IMM_MEDHI16_PCREL, BFD_RELOC_SH_IMM_HI16, BFD_RELOC_SH_IMM_HI16_PCREL, BFD_RELOC_SH_PT_16): New relocations. * cpu-sh.c [INCLUDE_SHMEDIA] (arch_info_struct): Define and link in item for SH5. * elf32-sh.c [INCLUDE_SHMEDIA] (sh_elf_howto_table): Add howto items for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_rel): Add mappings for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_elf_relocate_section) [default]: Call shmedia_prepare_reloc, goto final_link_relocate if it returns non-zero, else fail as before. (sh_elf_set_mach_from_flags): Provide function only if not defined as macro. Do not recognize objects with EF_SH64_32BIT_ABI set. (sh_elf_set_private_flags): Provide function only if not defined as a macro. (sh_elf_copy_private_data): Similar. (sh_elf_merge_private_data): Similar. * section.c (SEC_SH_ISA_SHMEDIA): New. * targets.c (bfd_elf32_sh64_vec, bfd_elf32_sh64l_vec): Declare. * elf32-sh64.c: New file. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate.
2002-02-08 05:33:27 +00:00
#, c-format
msgid "%A has both ordered and unordered sections"
Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * reloc.c (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. * libbfd.h, bfd-in2.h: Rebuilt. * elf32-sh.c (sh_elf_howto_table): Define new relocs. (sh_reloc_map): Map them. (PLT_ENTRY_SIZE, elf_sh_plt0_entry_be, elf_sh_plt0_entry_le, elf_sh_plt_entry_be, elf_sh_plt_entry_le, elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le, elf_sh_plt0_entry, elf_sh_plt_entry, elf_sh_pic_plt_entry, elf_sh_sizeof_plt, elf_sh_plt_plt0_offset, elf_sh_plt0_gotplt_offset, elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset, elf_sh_plt_reloc_offset, movi_shori_putval) [INCLUDE_SHMEDIA]: New. (elf_sh_link_hash_entry) [INCLUDE_SHMEDIA]: Add datalabel_got_offset. (sh_elf_link_hash_newfunc): Initialize it. (sh_elf_relocate_section): Augment the scope of seen_stt_datalabel. Introduce GOTPLT support. Extend GOTPC, PLT, GOT and GOTOFF handling to new SHmedia relocation types. Support GOT_BIAS. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol) [TARGET_SHMEDIA]: Set up values in PLT entries using movi_shori_putval. Support GOT_BIAS. (sh_elf_finish_dynamic_sections): Likewise. * elf32-sh64.c (shmedia_prepare_reloc): Do not add addend to relocation, it's now done by the caller. (GOT_BIAS): New. * elf64-sh64.c (GOT_BIAS, PLT_ENTRY_SIZE, elf_sh64_sizeof_plt, elf_sh64_plt_plt0_offset, elf_sh64_plt0_gotplt_offset, elf_sh64_plt_temp_offset, elf_sh64_plt_symbol_offset, elf_sh64_plt_reloc_offset, ELF_DYNAMIC_INTERPRETER, elf_sh64_pcrel_relocs_copied, elf_sh64_link_hash_entry, elf_sh64_link_hash_table, sh64_elf64_link_hash_traverse, sh64_elf64_hash_table): New. (sh_elf64_howto_table): Introduce new relocs. (sh_elf64_info_to_howto): Accept new PIC relocs. (sh_elf64_relocate_section): Augment the scope of seen_stt_datalabel. Support new PIC relocs. (sh_elf64_check_relocs): Support new PIC relocs. (elf_sh64_plt0_entry_be, elf_sh64_plt0_entry_le, elf_sh64_plt_entry_be, elf_sh64_plt_entry_le, elf_sh64_pic_plt_entry_be, elf_sh64_pic_plt_entry_le, elf_sh64_plt0_entry, elf_sh64_plt_entry, elf_sh64_pic_plt_entry, sh64_elf64_link_hash_newfunc, sh64_elf64_link_hash_table_create, movi_shori_putval, movi_3shori_putval, sh64_elf64_create_dynamic_sections, sh64_elf64_adjust_dynamic_symbol, sh64_elf64_discard_copies, sh64_elf64_size_dynamic_sections, sh64_elf64_finish_dynamic_symbol, sh64_elf64_finish_dynamic_sections): New. (elf_backend_create_dynamic-sections, bfd_elf64_bfd_link_hash_table_create, elf_backend_adjust_dynamic_symbol, elf_backend_size_dynamic_sections, elf_backend_finish_dynamic_symbol, elf_backend_finish_dynamic_sections, elf_backend_want_got_plt, elf_backend_plt_readonly, elf_backend_want_plt_sym, elf_backend_got_header_size, elf_backend_plt_header_size): Define. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * elf32-sh.c: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. * elf32-sh64.c, elf64-sh64.c: Likewise. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh.c (sh_elf_relax_section): Don't relax SHmedia sections. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh64.c (shmedia_prepare_reloc): Validate relocs that must be aligned. * elf64-sh64.c (sh_elf64_relocate_section): Ditto. 2001-01-14 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (bfd_elf32_bfd_copy_private_section_data): Define. (sh64_elf_fake_sections): Set type to SHT_SH5_CR_SORTED for a .cranges section with SEC_SORT_ENTRIES set. (sh64_backend_section_from_shdr): Set SEC_SORT_ENTRIES on an incoming sorted .cranges section. (sh64_bfd_elf_copy_private_section_data): New. (sh64_elf_final_write_processing): Only sort .cranges and modify start address if called by linker. 2001-01-08 Ben Elliston <bje@redhat.com> * elf32-sh64.c (sh64_elf_final_write_processing): Activate Hans-Peter Nilsson's set bit 0 patch from 2001-01-06. * elf64-sh64.c (sh64_elf64_final_write_processing): Ditto. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh_elf64_howto_table): No open brace at start of line. Add comments before all entries. <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct and clarify describing comment. (sh_elf64_reloc): Correct head comment. (sh_elf64_relocate_section): Correct spacing. <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. <case R_SH_SHMEDIA_CODE>: New case. (sh_elf64_gc_mark_hook): Correct spacing. (sh_elf64_check_relocs): Ditto. * elf32-sh64.c (shmedia_prepare_reloc) <case R_SH_SHMEDIA_CODE>: New case. * elf32-sh.c: Correct #endif comments for #ifndef-wrapped functions. (sh_elf_howto_table) <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct, clarify describing comment. Add comments before all entries. (sh_elf_relocate_section) <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> Sort .cranges section in final link. Prepare to set bit 0 on entry address. * elf32-sh64.c (struct sh64_find_section_vma_data): New. (sh64_elf_link_output_symbol_hook): Fix typo in prototype. (sh64_elf_set_mach_from_flags): Set SEC_DEBUGGING on incoming .cranges section. (sh64_backend_section_from_shdr): New, to recognize SHT_SH5_CR_SORTED on incoming .cranges section. (elf_backend_section_from_shdr): Define. (sh64_elf_final_write_processing): Sort outgoing .cranges section. (New, temporarily disabled:) Set bit 0 on entry address according to ISA type. (sh64_find_section_for_address): New. (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb, crange_bsearch_cmpl): Move here from opcodes/sh64-dis.c. (sh64_address_in_cranges): Move here from opcodes/sh64-dis.c. Use bfd_malloc, not xmalloc. (sh64_get_contents_type): Move here from opcodes/sh64-dis.c. Make global. * elf32-sh64.c (sh64_elf64_final_write_processing): New, (but temporarily disabled) setting bit 0 on entry address. (elf_backend_final_write_processing): Define. 2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_PT_16>: Adjust fields to be a proper relocation for PTA and PTB rather than a marker. <R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL>: Zero src_mask. * elf64-sh64.c: Ditto. (sh_elf64_relocate_section) <case R_SH_PT_16>: New case. * elf32-sh64.c: Include opcodes/sh64-opc.h (shmedia_prepare_reloc): Take a bfd_link_info pointer as first argument. Drop const qualifiers from "bfd *" and "bfd_byte *" parameters. No unused parameters. Caller changed. <case R_SH_PT_16>: New case. * Makefile.am (elf32-sh64.lo): Add dependency on sh64-opc.h. * Makefile.in: Regenerate. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): Set SHF_SH5_ISA32 for all code sections. (sh_elf64_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh64_elf_merge_private_data): Ditto. * elf32-sh64.c (sh64_elf_fake_sections): Use sh64_elf_section_data to access stored section flags. (sh64_elf_final_write_processing): Return immediately unless called by linker. Use sh64_elf_section_data (cranges) to get size of linker-generated cranges entries. (sh64_elf_copy_private_data): Add missing "return true". (sh64_elf_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh_elf64_merge_private_data): Ditto. 2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): New, copy of elf64-sh64.c:sh64_elf_fake_sections. (elf_backend_fake_sections): Define as sh64_elf64_fake_sections. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_copy_private_data_internal): Delete. (sh64_elf_final_write_processing): New. (elf_backend_final_write_processing): Define. (sh64_elf_fake_sections): Get header flags from tdata field. (sh64_elf_copy_private_data): Do not call sh64_elf_copy_private_data_internal, just copy e_flags field. (sh64_elf_merge_private_data): Do not call sh64_elf_copy_private_data_internal. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> Remove EF_SH64_ABI64, let ELF size make difference. Remove SH64-specific BFD section flag. * elf32-sh64.c (sh64_elf_fake_sections): Recognize section as containing SHmedia through elf_section_data (asect)->tdata non-zero, not using a BFD section flag. (sh64_elf_set_mach_from_flags): Don't recognize EF_SH64_ABI64. (sh64_elf_merge_private_data): Similar. (elf_backend_section_flags): Don't define. (sh64_elf_backend_section_flags): Delete. * elf64-sh64.c (sh_elf64_set_mach_from_flags): Recognize EF_SH64, not EF_SH64_ABI64. (sh_elf64_merge_private_data): Similar. * section.c (Section flags definitions): Don't define SEC_SH_ISA_SHMEDIA. (bfd-in2.h): Regenerate. 2000-12-09 Hans-Peter Nilsson <hpn@cygnus.com> Make DataLabel references work with partial linking. * elf32-sh64.c: Fix formatting. (sh64_elf_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf_link_output_symbol_hook. (sh64_elf_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. * elf64-sh64.c (sh64_elf64_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf64_link_output_symbol_hook. (sh64_elf64_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. 2000-12-07 Hans-Peter Nilsson <hpn@cygnus.com> Implement semantics for inter-file DataLabel references. * elf64-sh64.c (DATALABEL_SUFFIX): Define. (sh64_elf64_add_symbol_hook): New. (sh_elf64_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. (elf_backend_add_symbol_hook): Define to sh64_elf64_add_symbol_hook. * elf64-sh32.c: Tweak comments. (DATALABEL_SUFFIX): Define. (sh64_elf_add_symbol_hook): New. (elf_backend_add_symbol_hook): Define to sh64_elf_add_symbol_hook. * elf32-sh.c (sh_elf_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. 2000-12-05 Hans-Peter Nilsson <hpn@cygnus.com> Pass through STT_DATALABEL. * elf32-sh64.c (sh64_elf_get_symbol_type): New. (elf_backend_get_symbol_type): Define. * elf64-sh64.c (sh64_elf64_get_symbol_type): New. (elf_backend_get_symbol_type): Define. 2000-11-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c: Tweak comments. (sh64_elf_copy_private_data_internal): Add prototype. (bfd_elf32_bfd_set_private_flags): Define. (sh64_elf_copy_private_data_internal): Compare machine name, not textual BFD target name, to check whether to copy section flag SHF_SH5_ISA32. (sh64_elf_merge_private_data): Validize bfd_get_arch_size. Tweak section-contents-type-mismatch message. (shmedia_prepare_reloc): Add ATTRIBUTE_UNUSED markers. Validize reloc-types. * elf64-sh64.c: New file. * targets.c (bfd_elf64_sh64_vec, bfd_elf64_sh64l_vec): Declare. * Makefile.am (BFD64_BACKENDS): Add elf64-sh64.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * config.bfd (sh64-*-elf*): Add bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure.in: Handle bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. 2000-11-29 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_set_mach_from_flags): Do not recognize anything else but EF_SH64 and EF_SH64_ABI64. (sh64_elf_merge_private_data): Emit error for anything else but EF_SH64 and EF_SH64_ABI64. * config.bfd: Remove bfd_elf32_shblin_vec and bfd_elf32_shlin_vec from targ_selvecs. * configure.in: Add cofflink.lo to bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec as a temporary measure. * configure: Regenerate. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * cpu-sh.c (arch_info_struct): Include sh5 item unconditionalized. * config.bfd (sh64-*-elf*): Do not set targ_cflags. Add targ_selvecs bfd_elf32_sh_vec, bfd_elf32_shl_vec, bfd_elf32_shblin_vec and bfd_elf32_shlin_vec. * elf32-sh64.c: Tweak comments. (sh64_elf_set_mach_from_flags): Recognize all machine flags that are proper subsets of SH64 as bfd_mach_sh5. Add EF_SH64_ABI64. (sh64_elf_copy_private_data_internal): Wrap long line. (sh64_elf_merge_private_data): Rewrite to allow objects from SH64 subsets to be linked together. (INCLUDE_SHMEDIA): Define. * elf32-sh.c (sh_elf_relocate_section) <local symbol>: Parenthesize plus-expression inside or-expression. <global symbol>: Ditto. (sh_elf_set_mach_from_flags): Remove code refusing deleted EF_SH64_32BIT_ABI flag. 2000-11-26 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16_PCREL, R_SH_64_PCREL>: Set pcrel_offset to true. (sh_elf_relocate_section) <local symbol>: Or 1 in calculation of relocation if sym->st_other & STO_SH5_ISA32. <global symbol>: Ditto if h->other & STO_SH5_ISA32. * elf32-sh64.c (shmedia_prepare_reloc): Add rel->r_addend to relocation. 2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com> * Makefile.am (BFD32_BACKENDS): Add elf32-sh64.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * archures.c: Add bfd_mach_sh5. * config.bfd: Map targ_cpu sh* to bfd_sh_arch. Handle sh64-*-elf*. Set targ_cflags to -DINCLUDE_SHMEDIA. * configure.in: Handle bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec. * configure: Regenerate. * reloc.c (BFD_RELOC_SH_SHMEDIA_CODE, BFD_RELOC_SH_IMMU5, BFD_RELOC_SH_IMMS6, BFD_RELOC_SH_IMMS6BY32, BFD_RELOC_SH_IMMU6, BFD_RELOC_SH_IMMS10, BFD_RELOC_SH_IMMS10BY2, BFD_RELOC_SH_IMMS10BY4, BFD_RELOC_SH_IMMS10BY8, BFD_RELOC_SH_IMMS16, BFD_RELOC_SH_IMMU16, BFD_RELOC_SH_IMM_LOW16, BFD_RELOC_SH_IMM_LOW16_PCREL, BFD_RELOC_SH_IMM_MEDLOW16, BFD_RELOC_SH_IMM_MEDLOW16_PCREL, BFD_RELOC_SH_IMM_MEDHI16, BFD_RELOC_SH_IMM_MEDHI16_PCREL, BFD_RELOC_SH_IMM_HI16, BFD_RELOC_SH_IMM_HI16_PCREL, BFD_RELOC_SH_PT_16): New relocations. * cpu-sh.c [INCLUDE_SHMEDIA] (arch_info_struct): Define and link in item for SH5. * elf32-sh.c [INCLUDE_SHMEDIA] (sh_elf_howto_table): Add howto items for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_rel): Add mappings for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_elf_relocate_section) [default]: Call shmedia_prepare_reloc, goto final_link_relocate if it returns non-zero, else fail as before. (sh_elf_set_mach_from_flags): Provide function only if not defined as macro. Do not recognize objects with EF_SH64_32BIT_ABI set. (sh_elf_set_private_flags): Provide function only if not defined as a macro. (sh_elf_copy_private_data): Similar. (sh_elf_merge_private_data): Similar. * section.c (SEC_SH_ISA_SHMEDIA): New. * targets.c (bfd_elf32_sh64_vec, bfd_elf32_sh64l_vec): Declare. * elf32-sh64.c: New file. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate.
2002-02-08 05:33:27 +00:00
msgstr ""
#: elflink.c:10982
2011-06-02 13:43:24 +00:00
msgid "%B: file class %s incompatible with %s"
msgstr ""
#: elflink.c:11303 elflink.c:11347
msgid "%B: could not find output section %s"
msgstr ""
#: elflink.c:11308
* Makefile.am: Remove all mention of elflink.h. * Makefile.in: Regenerate. * bfd-in.h (bfd_elf_discard_info): Declare. (bfd_elf32_discard_info, bfd_elf64_discard_info): Delete. * bfd-in2.h: Regenerate. * elf-bfd.h (bfd_elf32_print_symbol, bfd_elf64_print_symbol, bfd_elf32_link_record_dynamic_symbol, bfd_elf64_link_record_dynamic_symbol, _bfd_elf_link_record_dynamic_symbol, bfd_elf32_bfd_final_link, bfd_elf64_bfd_final_link, elf_link_record_local_dynamic_symbol, _bfd_elf32_link_record_local_dynamic_symbol, _bfd_elf64_link_record_local_dynamic_symbol, _bfd_elf32_gc_sections, _bfd_elf32_gc_common_finalize_got_offsets, _bfd_elf32_gc_common_final_link, _bfd_elf64_gc_common_final_link, _bfd_elf32_gc_record_vtinherit, _bfd_elf32_gc_record_vtentry, _bfd_elf64_gc_sections, _bfd_elf64_gc_common_finalize_got_offsets, _bfd_elf64_gc_record_vtinherit, _bfd_elf64_gc_record_vtentry, _bfd_elf32_reloc_symbol_deleted_p, _bfd_elf64_reloc_symbol_deleted_p): Delete. (bfd_elf_link_record_dynamic_symbol, bfd_elf_link_record_local_dynamic_symbol, bfd_elf_final_link, bfd_elf_gc_sections, bfd_elf_gc_record_vtinherit, bfd_elf_gc_record_vtentry, bfd_elf_gc_common_finalize_got_offsets, bfd_elf_gc_common_final_link, bfd_elf_reloc_symbol_deleted_p): Declare. (WILL_CALL_FINISH_DYNAMIC_SYMBOL): Define. * elf32-arm.h: Update for changed function names. Remove local WILL_CALL_FINISH_DYNAMIC_SECTION define. * elf-hppa.h, elf-m10300.c, elf32-cris.c, elf32-d10v.c, elf32-dlx.c, * elf32-fr30.c, elf32-frv.c, elf32-h8300.c, elf32-hppa.c, elf32-i386.c, * elf32-iq2000.c, elf32-m32r.c, elf32-m68hc1x.c, elf32-m68k.c, * elf32-mcore.c, elf32-openrisc.c, elf32-ppc.c, elf32-s390.c, * elf32-sh.c, elf32-sparc.c, elf32-v850.c, elf32-vax.c, * elf32-xstormy16.c, elf32-xtensa.c, elf64-alpha.c, elf64-hppa.c, * elf64-mmix.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c, elf64-sparc.c, * elf64-x86-64.c, elfxx-ia64.c, elfxx-mips.c, elfxx-target.h: Likewise. * elfxx-target.h (bfd_elfNN_bfd_final_link): Define. (bfd_elfNN_print_symbol): Define. * elfcode.h: Don't include elflink.h. (elf_bfd_discard_info, elf_reloc_symbol_deleted_p, elf_link_record_dynamic_symbol, elf_bfd_final_link, elf_gc_sections, elf_gc_common_finalize_got_offsets, elf_gc_common_final_link, elf_gc_record_vtinherit, elf_gc_record_vtentry, elf_link_record_local_dynamic_symbol): Don't define. * elflink.c: Update for changed function names. Move elflink.h code here. * elflink.h: Delete file. * po/SRC-POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. doc/ * bfdint.texi: Remove all mention of elflink.h.
2004-03-27 10:58:09 +00:00
#, c-format
msgid "warning: %s section has zero size"
2001-10-30 15:20:14 +00:00
msgstr ""
#: elflink.c:11353
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#, c-format
msgid "warning: section '%s' is being made into a note"
2007-07-02 07:12:53 +00:00
msgstr ""
#: elflink.c:11419
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P%X: read-only segment has dynamic relocations.\n"
msgstr ""
#: elflink.c:11422
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P: warning: creating a DT_TEXTREL in a shared object.\n"
2007-07-02 07:12:53 +00:00
msgstr ""
#: elflink.c:11545
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%P%X: can not read symbols: %E\n"
msgstr ""
#: elflink.c:11989
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "Removing unused section '%s' in file '%B'"
msgstr ""
#: elflink.c:12200
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "Warning: gc-sections option ignored"
msgstr ""
#: elflink.c:12489
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#, c-format
msgid "Unrecognized INPUT_SECTION_FLAG %s\n"
msgstr ""
#: elfxx-mips.c:1419
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "static procedure (no name)"
2007-07-02 07:12:53 +00:00
msgstr ""
#: elfxx-mips.c:5476
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "MIPS16 and microMIPS functions cannot call each other"
2001-10-30 15:20:14 +00:00
msgstr ""
#: elfxx-mips.c:6087
msgid ""
"%B: %A+0x%lx: Unsupported jump between ISA modes; consider recompiling with "
"interlinking enabled."
2000-11-02 23:03:24 +00:00
msgstr ""
#: elfxx-mips.c:6756 elfxx-mips.c:6979
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid "%B: Warning: bad `%s' option size %u smaller than its header"
msgstr ""
#: elfxx-mips.c:7734 elfxx-mips.c:7859
msgid "%B: Warning: cannot determine the target function for stub section `%s'"
msgstr ""
#: elfxx-mips.c:7990
msgid "%B: Malformed reloc detected for section %s"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elfxx-mips.c:8065
2007-07-02 07:12:53 +00:00
msgid "%B: GOT reloc at 0x%lx not expected in executables"
msgstr ""
#: elfxx-mips.c:8199
msgid "%B: CALL16 reloc at 0x%lx not against global symbol"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elfxx-mips.c:8977
#, c-format
msgid "non-dynamic relocations refer to dynamic symbol %s"
msgstr ""
#: elfxx-mips.c:9877
2007-07-02 07:12:53 +00:00
msgid ""
2011-06-02 13:43:24 +00:00
"%B: Can't find matching LO16 reloc against `%s' for %s at 0x%lx in section `"
"%A'"
2007-07-02 07:12:53 +00:00
msgstr ""
#: elfxx-mips.c:10016
msgid ""
"small-data section exceeds 64KB; lower small-data size limit (see option -G)"
msgstr ""
#: elfxx-mips.c:10035
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "JALX to a non-word-aligned address"
msgstr ""
#: elfxx-mips.c:10402 elfxx-mips.c:10966
msgid "%B: `%A' offset of %ld from `%A' beyond the range of ADDIUPC"
msgstr ""
#: elfxx-mips.c:13990
2002-01-17 14:12:08 +00:00
#, c-format
msgid "%s: illegal section name `%s'"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elfxx-mips.c:14375 elfxx-mips.c:14381 elfxx-mips.c:14387 elfxx-mips.c:14407
#: elfxx-mips.c:14413 elfxx-mips.c:14419 elfxx-mips.c:14441 elfxx-mips.c:14460
#: elfxx-mips.c:14467 elfxx-mips.c:14474
msgid "Warning: %B uses %s (set by %B), %B uses %s"
msgstr ""
#: elfxx-mips.c:14394 elfxx-mips.c:14426 elfxx-mips.c:14447 elfxx-mips.c:14480
msgid "Warning: %B uses %s (set by %B), %B uses unknown floating point ABI %d"
msgstr ""
#: elfxx-mips.c:14493 elfxx-mips.c:14501 elfxx-mips.c:14509 elfxx-mips.c:14517
msgid "Warning: %B uses unknown floating point ABI %d (set by %B), %B uses %s"
msgstr ""
#: elfxx-mips.c:14525
msgid ""
"Warning: %B uses unknown floating point ABI %d (set by %B), %B uses unknown "
"floating point ABI %d"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elfxx-mips.c:14548
msgid "Warning: %B uses %s (set by %B), %B uses unknown MSA ABI %d"
msgstr ""
#: elfxx-mips.c:14559
msgid "Warning: %B uses unknown MSA ABI %d (set by %B), %B uses %s"
msgstr ""
#: elfxx-mips.c:14567
msgid ""
"Warning: %B uses unknown MSA ABI %d (set by %B), %B uses unknown MSA ABI %d"
msgstr ""
#: elfxx-mips.c:14599
2007-07-02 07:12:53 +00:00
msgid "%B: endianness incompatible with that of the selected emulation"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elfxx-mips.c:14610
2007-07-02 07:12:53 +00:00
msgid "%B: ABI is incompatible with that of the selected emulation"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elfxx-mips.c:14694
msgid "%B: warning: linking abicalls files with non-abicalls files"
msgstr ""
#: elfxx-mips.c:14711
msgid "%B: linking 32-bit code with 64-bit code"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elfxx-mips.c:14739 elfxx-mips.c:14802
msgid "%B: linking %s module with previous %s modules"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elfxx-mips.c:14762
msgid "%B: ABI mismatch: linking %s module with previous %s modules"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elfxx-mips.c:14786
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%B: ASE mismatch: linking %s module with previous %s modules"
msgstr ""
#: elfxx-mips.c:14958
#, c-format
msgid " [abi=O32]"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elfxx-mips.c:14960
#, c-format
msgid " [abi=O64]"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elfxx-mips.c:14962
#, c-format
msgid " [abi=EABI32]"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elfxx-mips.c:14964
#, c-format
msgid " [abi=EABI64]"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elfxx-mips.c:14966
#, c-format
msgid " [abi unknown]"
2000-11-02 23:03:24 +00:00
msgstr ""
#: elfxx-mips.c:14968
#, c-format
msgid " [abi=N32]"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elfxx-mips.c:14970
#, c-format
msgid " [abi=64]"
1999-06-03 03:26:53 +00:00
msgstr ""
#: elfxx-mips.c:14972
#, c-format
msgid " [no abi set]"
2000-02-27 16:55:52 +00:00
msgstr ""
#: elfxx-mips.c:14993
#, c-format
msgid " [unknown ISA]"
2001-02-18 23:33:11 +00:00
msgstr ""
#: elfxx-mips.c:15013
#, c-format
msgid " [not 32bitmode]"
2002-01-17 14:12:08 +00:00
msgstr ""
#: elfxx-sparc.c:640
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
#, c-format
msgid "invalid relocation type %d"
msgstr ""
#: elfxx-tilegx.c:4433
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%B: Cannot link together %s and %s objects."
msgstr ""
#: i386linux.c:418 m68klinux.c:421 sparclinux.c:414
1999-06-03 03:26:53 +00:00
#, c-format
msgid "Output file requires shared library `%s'\n"
msgstr ""
#: i386linux.c:426 m68klinux.c:429 sparclinux.c:422
1999-06-03 03:26:53 +00:00
#, c-format
msgid "Output file requires shared library `%s.so.%s'\n"
msgstr ""
#: i386linux.c:613 i386linux.c:663 m68klinux.c:618 m68klinux.c:666
#: sparclinux.c:609 sparclinux.c:659
1999-06-03 03:26:53 +00:00
#, c-format
msgid "Symbol %s not defined for fixups\n"
msgstr ""
#: i386linux.c:687 m68klinux.c:690 sparclinux.c:683
1999-06-03 03:26:53 +00:00
msgid "Warning: fixup count mismatch\n"
msgstr ""
#: ieee.c:158
1999-06-03 03:26:53 +00:00
#, c-format
msgid "%s: string too long (%d chars, max 65535)"
msgstr ""
#: ieee.c:285
1999-06-03 03:26:53 +00:00
#, c-format
msgid "%s: unrecognized symbol `%s' flags 0x%x"
msgstr ""
#: ieee.c:791
msgid "%B: unimplemented ATI record %u for symbol %u"
1999-06-03 03:26:53 +00:00
msgstr ""
#: ieee.c:815
msgid "%B: unexpected ATN type %d in external part"
1999-06-03 03:26:53 +00:00
msgstr ""
#: ieee.c:837
msgid "%B: unexpected type after ATN"
1999-06-03 03:26:53 +00:00
msgstr ""
#: ihex.c:230
msgid "%B:%d: unexpected character `%s' in Intel Hex file"
1999-06-03 03:26:53 +00:00
msgstr ""
#: ihex.c:337
msgid "%B:%u: bad checksum in Intel Hex file (expected %u, found %u)"
1999-06-03 03:26:53 +00:00
msgstr ""
#: ihex.c:392
msgid "%B:%u: bad extended address record length in Intel Hex file"
1999-06-03 03:26:53 +00:00
msgstr ""
#: ihex.c:409
msgid "%B:%u: bad extended start address length in Intel Hex file"
1999-06-03 03:26:53 +00:00
msgstr ""
#: ihex.c:426
msgid "%B:%u: bad extended linear address record length in Intel Hex file"
1999-06-03 03:26:53 +00:00
msgstr ""
#: ihex.c:443
msgid "%B:%u: bad extended linear start address length in Intel Hex file"
1999-06-03 03:26:53 +00:00
msgstr ""
#: ihex.c:460
msgid "%B:%u: unrecognized ihex type %u in Intel Hex file"
1999-06-03 03:26:53 +00:00
msgstr ""
#: ihex.c:579
msgid "%B: internal error in ihex_read_section"
1999-06-03 03:26:53 +00:00
msgstr ""
#: ihex.c:613
msgid "%B: bad section length in ihex_read_section"
1999-06-03 03:26:53 +00:00
msgstr ""
#: ihex.c:826
1999-06-03 03:26:53 +00:00
#, c-format
msgid "%s: address 0x%s out of range for Intel Hex file"
1999-06-03 03:26:53 +00:00
msgstr ""
#: libbfd.c:863
msgid "%B: unable to get decompressed section %A"
msgstr ""
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
#: libbfd.c:1012
msgid "%B: compiled for a big endian system and target is little endian"
msgstr ""
#: libbfd.c:1014
msgid "%B: compiled for a little endian system and target is big endian"
msgstr ""
2011-06-02 13:43:24 +00:00
#: libbfd.c:1043
#, c-format
msgid "Deprecated %s called at %s line %d in %s\n"
msgstr ""
2011-06-02 13:43:24 +00:00
#: libbfd.c:1046
#, c-format
msgid "Deprecated %s called\n"
msgstr ""
#: linker.c:1873
msgid "%B: indirect symbol `%s' to `%s' is a loop"
2001-05-23 17:26:40 +00:00
msgstr ""
#: linker.c:2750
1999-06-03 03:26:53 +00:00
#, c-format
2003-07-11 05:10:21 +00:00
msgid "Attempt to do relocatable link with %s input and %s output"
1999-06-03 03:26:53 +00:00
msgstr ""
#: linker.c:3035
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%B: ignoring duplicate section `%A'\n"
msgstr ""
#: linker.c:3044 linker.c:3053
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "%B: duplicate section `%A' has different size\n"
msgstr ""
#: linker.c:3061 linker.c:3066
msgid "%B: could not read contents of section `%A'\n"
2011-06-02 13:43:24 +00:00
msgstr ""
#: linker.c:3070
msgid "%B: duplicate section `%A' has different contents\n"
2011-06-02 13:43:24 +00:00
msgstr ""
#: mach-o.c:648
msgid "bfd_mach_o_canonicalize_symtab: unable to load symbols"
msgstr ""
#: mach-o.c:1918
#, c-format
msgid "mach-o: there are too many sections (%d) maximum is 255,\n"
msgstr ""
#: mach-o.c:2017
#, c-format
msgid "unable to write unknown load command 0x%lx"
msgstr ""
#: mach-o.c:2272
msgid ""
"sorry: modtab, toc and extrefsyms are not yet implemented for dysymtab "
"commands."
msgstr ""
#: mach-o.c:2898
#, c-format
msgid "bfd_mach_o_read_symtab_symbol: unable to read %d bytes at %lu"
msgstr ""
#: mach-o.c:2916
#, c-format
msgid "bfd_mach_o_read_symtab_symbol: name out of range (%lu >= %lu)"
msgstr ""
#: mach-o.c:2997
#, c-format
msgid ""
"bfd_mach_o_read_symtab_symbol: symbol \"%s\" specified invalid section %d "
"(max %lu): setting to undefined"
msgstr ""
#: mach-o.c:3013
#, c-format
msgid ""
"bfd_mach_o_read_symtab_symbol: symbol \"%s\" specified invalid type field 0x"
"%x: setting to undefined"
msgstr ""
#: mach-o.c:3085
msgid "bfd_mach_o_read_symtab_symbols: unable to allocate memory for symbols"
msgstr ""
#: mach-o.c:3915
msgid "%B: unknown load command 0x%lx"
msgstr ""
#: mach-o.c:4107
#, c-format
msgid "bfd_mach_o_scan: unknown architecture 0x%lx/0x%lx"
msgstr ""
#: mach-o.c:4204
#, c-format
msgid "unknown header byte-order value 0x%lx"
msgstr ""
#: merge.c:832
2001-04-24 15:08:16 +00:00
#, c-format
msgid "%s: access beyond end of merged section (%ld)"
2001-04-24 15:08:16 +00:00
msgstr ""
#: mmo.c:455
2002-01-17 14:12:08 +00:00
#, c-format
msgid "%s: No core to allocate section name %s\n"
msgstr ""
#: mmo.c:530
2002-01-17 14:12:08 +00:00
#, c-format
msgid "%s: No core to allocate a symbol %d bytes long\n"
msgstr ""
#: mmo.c:1189
2002-01-17 14:12:08 +00:00
#, c-format
msgid "%s: invalid mmo file: initialization value for $255 is not `Main'\n"
msgstr ""
#: mmo.c:1334
2002-01-17 14:12:08 +00:00
#, c-format
msgid ""
"%s: unsupported wide character sequence 0x%02X 0x%02X after symbol name "
"starting with `%s'\n"
msgstr ""
#: mmo.c:1568
2002-01-17 14:12:08 +00:00
#, c-format
msgid "%s: invalid mmo file: unsupported lopcode `%d'\n"
msgstr ""
#: mmo.c:1578
2002-01-17 14:12:08 +00:00
#, c-format
msgid "%s: invalid mmo file: expected YZ = 1 got YZ = %d for lop_quote\n"
msgstr ""
#: mmo.c:1614
2002-01-17 14:12:08 +00:00
#, c-format
msgid "%s: invalid mmo file: expected z = 1 or z = 2, got z = %d for lop_loc\n"
msgstr ""
#: mmo.c:1660
2002-01-17 14:12:08 +00:00
#, c-format
msgid ""
"%s: invalid mmo file: expected z = 1 or z = 2, got z = %d for lop_fixo\n"
msgstr ""
#: mmo.c:1699
2002-01-17 14:12:08 +00:00
#, c-format
msgid "%s: invalid mmo file: expected y = 0, got y = %d for lop_fixrx\n"
msgstr ""
#: mmo.c:1708
2002-01-17 14:12:08 +00:00
#, c-format
msgid ""
"%s: invalid mmo file: expected z = 16 or z = 24, got z = %d for lop_fixrx\n"
msgstr ""
#: mmo.c:1731
2002-01-17 14:12:08 +00:00
#, c-format
msgid ""
"%s: invalid mmo file: leading byte of operand word must be 0 or 1, got %d "
"for lop_fixrx\n"
msgstr ""
#: mmo.c:1754
2002-01-17 14:12:08 +00:00
#, c-format
msgid "%s: cannot allocate file name for file number %d, %d bytes\n"
msgstr ""
#: mmo.c:1774
2002-01-17 14:12:08 +00:00
#, c-format
msgid ""
"%s: invalid mmo file: file number %d `%s', was already entered as `%s'\n"
msgstr ""
#: mmo.c:1787
2002-01-17 14:12:08 +00:00
#, c-format
msgid ""
"%s: invalid mmo file: file name for number %d was not specified before use\n"
msgstr ""
#: mmo.c:1893
2002-01-17 14:12:08 +00:00
#, c-format
msgid ""
"%s: invalid mmo file: fields y and z of lop_stab non-zero, y: %d, z: %d\n"
msgstr ""
#: mmo.c:1929
2002-01-17 14:12:08 +00:00
#, c-format
msgid "%s: invalid mmo file: lop_end not last item in file\n"
msgstr ""
#: mmo.c:1942
2002-01-17 14:12:08 +00:00
#, c-format
msgid ""
"%s: invalid mmo file: YZ of lop_end (%ld) not equal to the number of tetras "
"to the preceding lop_stab (%ld)\n"
msgstr ""
#: mmo.c:2652
2002-01-17 14:12:08 +00:00
#, c-format
msgid "%s: invalid symbol table: duplicate symbol `%s'\n"
msgstr ""
#: mmo.c:2892
2002-01-17 14:12:08 +00:00
#, c-format
msgid ""
2011-06-02 13:43:24 +00:00
"%s: Bad symbol definition: `Main' set to %s rather than the start address "
"%s\n"
2002-01-17 14:12:08 +00:00
msgstr ""
#: mmo.c:2984
2002-01-17 14:12:08 +00:00
#, c-format
msgid ""
"%s: warning: symbol table too large for mmo, larger than 65535 32-bit words: "
"%d. Only `Main' will be emitted.\n"
msgstr ""
#: mmo.c:3029
2002-01-17 14:12:08 +00:00
#, c-format
msgid "%s: internal error, symbol table changed size from %d to %d words\n"
msgstr ""
#: mmo.c:3081
2002-01-17 14:12:08 +00:00
#, c-format
msgid "%s: internal error, internal register section %s had contents\n"
msgstr ""
#: mmo.c:3132
2002-01-17 14:12:08 +00:00
#, c-format
msgid "%s: no initialized registers; section length 0\n"
msgstr ""
#: mmo.c:3138
2002-01-17 14:12:08 +00:00
#, c-format
msgid "%s: too many initialized registers; section length %ld\n"
msgstr ""
#: mmo.c:3143
2002-01-17 14:12:08 +00:00
#, c-format
msgid ""
2011-06-02 13:43:24 +00:00
"%s: invalid start address for initialized registers of length %ld: 0x%lx"
"%08lx\n"
2002-01-17 14:12:08 +00:00
msgstr ""
#: oasys.c:881
1999-06-03 03:26:53 +00:00
#, c-format
msgid "%s: can not represent section `%s' in oasys"
msgstr ""
#: osf-core.c:128
1999-06-03 03:26:53 +00:00
#, c-format
msgid "Unhandled OSF/1 core file section type %d\n"
msgstr ""
#: pe-mips.c:607
msgid "%B: `ld -r' not supported with PE MIPS objects\n"
msgstr ""
#. OK, at this point the following variables are set up:
#. src = VMA of the memory we're fixing up
#. mem = pointer to memory we're fixing up
#. val = VMA of what we need to refer to.
#: pe-mips.c:719
msgid "%B: unimplemented %s\n"
msgstr ""
#: pe-mips.c:745
msgid "%B: jump too far away\n"
msgstr ""
#: pe-mips.c:771
msgid "%B: bad pair/reflo after refhi\n"
msgstr ""
#: pef.c:522
2011-06-02 13:43:24 +00:00
#, c-format
msgid "bfd_pef_scan: unknown architecture 0x%lx"
msgstr ""
#: pei-x86_64.c:469
#, c-format
msgid "warning: .pdata section size (%ld) is not a multiple of %d\n"
msgstr ""
#: pei-x86_64.c:474 peigen.c:1626 peigen.c:1809 pepigen.c:1626 pepigen.c:1809
#: pex64igen.c:1626 pex64igen.c:1809
#, c-format
msgid ""
"\n"
"The Function Table (interpreted .pdata section contents)\n"
msgstr ""
#: pei-x86_64.c:476
#, c-format
msgid "vma:\t\t\tBeginAddress\t EndAddress\t UnwindData\n"
msgstr ""
#. XXX code yet to be written.
#: peicode.h:758
msgid "%B: Unhandled import type; %x"
2002-01-17 14:12:08 +00:00
msgstr ""
#: peicode.h:763
msgid "%B: Unrecognised import type; %x"
2002-01-17 14:12:08 +00:00
msgstr ""
#: peicode.h:777
msgid "%B: Unrecognised import name type; %x"
2002-01-17 14:12:08 +00:00
msgstr ""
#: peicode.h:1173
msgid "%B: Unrecognised machine type (0x%x) in Import Library Format archive"
2002-01-17 14:12:08 +00:00
msgstr ""
#: peicode.h:1185
msgid ""
"%B: Recognised but unhandled machine type (0x%x) in Import Library Format "
"archive"
msgstr ""
#: peicode.h:1203
msgid "%B: size field is zero in Import Library Format header"
msgstr ""
#: peicode.h:1234
msgid "%B: string not null terminated in ILF object file."
msgstr ""
#: ppcboot.c:391
#, c-format
1999-06-03 03:26:53 +00:00
msgid ""
"\n"
"ppcboot header:\n"
msgstr ""
#: ppcboot.c:392
1999-06-03 03:26:53 +00:00
#, c-format
msgid "Entry offset = 0x%.8lx (%ld)\n"
msgstr ""
#: ppcboot.c:394
1999-06-03 03:26:53 +00:00
#, c-format
msgid "Length = 0x%.8lx (%ld)\n"
msgstr ""
#: ppcboot.c:398
1999-06-03 03:26:53 +00:00
#, c-format
msgid "Flag field = 0x%.2x\n"
msgstr ""
#: ppcboot.c:404
1999-06-03 03:26:53 +00:00
#, c-format
msgid "Partition name = \"%s\"\n"
msgstr ""
#: ppcboot.c:423
1999-06-03 03:26:53 +00:00
#, c-format
msgid ""
"\n"
"Partition[%d] start = { 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x }\n"
msgstr ""
#: ppcboot.c:429
1999-06-03 03:26:53 +00:00
#, c-format
msgid "Partition[%d] end = { 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x }\n"
msgstr ""
#: ppcboot.c:435
1999-06-03 03:26:53 +00:00
#, c-format
msgid "Partition[%d] sector = 0x%.8lx (%ld)\n"
msgstr ""
#: ppcboot.c:437
1999-06-03 03:26:53 +00:00
#, c-format
msgid "Partition[%d] length = 0x%.8lx (%ld)\n"
msgstr ""
#: reloc.c:7371
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "INPUT_SECTION_FLAGS are not supported.\n"
msgstr ""
#: reloc.c:7526
msgid "%X%P: %B(%A): relocation \"%R\" goes out of range\n"
msgstr ""
2011-06-02 13:43:24 +00:00
#: rs6000-core.c:448
#, c-format
msgid "%s: warning core file truncated"
msgstr ""
#: som.c:5471
2005-03-05 12:14:34 +00:00
#, c-format
msgid ""
"\n"
"Exec Auxiliary Header\n"
msgstr ""
#: som.c:5776
1999-06-03 03:26:53 +00:00
msgid "som_sizeof_headers unimplemented"
msgstr ""
#: srec.c:261
msgid "%B:%d: Unexpected character `%s' in S-record file\n"
1999-06-03 03:26:53 +00:00
msgstr ""
#: srec.c:567 srec.c:600
msgid "%B:%d: Bad checksum in S-record file\n"
msgstr ""
#: stabs.c:279
msgid "%B(%A+0x%lx): Stabs entry has invalid string index."
msgstr ""
#: syms.c:1079
1999-06-03 03:26:53 +00:00
msgid "Unsupported .stab relocation"
msgstr ""
#: vms-alpha.c:1294
2000-02-27 16:55:52 +00:00
#, c-format
msgid "Unknown EGSD subtype %d"
2000-02-27 16:55:52 +00:00
msgstr ""
#: vms-alpha.c:1325
2000-02-27 16:55:52 +00:00
#, c-format
msgid "Stack overflow (%d) in _bfd_vms_push"
2000-02-27 16:55:52 +00:00
msgstr ""
#: vms-alpha.c:1338
msgid "Stack underflow in _bfd_vms_pop"
2000-02-27 16:55:52 +00:00
msgstr ""
#. These names have not yet been added to this switch statement.
#: vms-alpha.c:1575
1999-06-03 03:26:53 +00:00
#, c-format
msgid "unknown ETIR command %d"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:1762
#, c-format
msgid "bad section index in %s"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:1775
#, c-format
msgid "unsupported STA cmd %s"
msgstr ""
#. Insert field.
#. Unsigned shift.
#. Rotate.
#. Redefine symbol to current location.
#. Define a literal.
#: vms-alpha.c:1951 vms-alpha.c:1982 vms-alpha.c:2229
#, c-format
msgid "%s: not supported"
msgstr ""
#: vms-alpha.c:1957
#, c-format
msgid "%s: not implemented"
msgstr ""
#: vms-alpha.c:2213
#, c-format
msgid "invalid use of %s with contexts"
msgstr ""
#: vms-alpha.c:2247
#, c-format
msgid "reserved cmd %d"
msgstr ""
#: vms-alpha.c:2332
msgid "Object module NOT error-free !\n"
msgstr ""
#: vms-alpha.c:3657
#, c-format
msgid "SEC_RELOC with no relocs in section %s"
msgstr ""
#: vms-alpha.c:3709 vms-alpha.c:3922
#, c-format
msgid "Size error in section %s"
msgstr ""
#: vms-alpha.c:3868
msgid "Spurious ALPHA_R_BSR reloc"
msgstr ""
#: vms-alpha.c:3909
#, c-format
msgid "Unhandled relocation %s"
msgstr ""
#: vms-alpha.c:4199
1999-06-03 03:26:53 +00:00
#, c-format
msgid "unknown source command %d"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:4260
msgid "DST__K_SET_LINUM_INCR not implemented"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:4266
msgid "DST__K_SET_LINUM_INCR_W not implemented"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:4272
msgid "DST__K_RESET_LINUM_INCR not implemented"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:4278
msgid "DST__K_BEG_STMT_MODE not implemented"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:4284
msgid "DST__K_END_STMT_MODE not implemented"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:4311
msgid "DST__K_SET_PC not implemented"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:4317
msgid "DST__K_SET_PC_W not implemented"
msgstr ""
#: vms-alpha.c:4323
msgid "DST__K_SET_PC_L not implemented"
msgstr ""
#: vms-alpha.c:4329
msgid "DST__K_SET_STMTNUM not implemented"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:4372
1999-06-03 03:26:53 +00:00
#, c-format
msgid "unknown line command %d"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:4846 vms-alpha.c:4863 vms-alpha.c:4877 vms-alpha.c:4892
#: vms-alpha.c:4904 vms-alpha.c:4915 vms-alpha.c:4927
1999-06-03 03:26:53 +00:00
#, c-format
msgid "Unknown reloc %s + %s"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:4982
1999-06-03 03:26:53 +00:00
#, c-format
msgid "Unknown reloc %s"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:4995
msgid "Invalid section index in ETIR"
msgstr ""
#: vms-alpha.c:5002
bfd: * Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
msgid "Relocation for non-REL psect"
msgstr ""
#: vms-alpha.c:5049
#, c-format
msgid "Unknown symbol in command %s"
msgstr ""
#: vms-alpha.c:5564
#, c-format
msgid " EMH %u (len=%u): "
msgstr ""
#: vms-alpha.c:5573
#, c-format
msgid "Module header\n"
msgstr ""
#: vms-alpha.c:5574
#, c-format
msgid " structure level: %u\n"
msgstr ""
#: vms-alpha.c:5575
#, c-format
msgid " max record size: %u\n"
msgstr ""
#: vms-alpha.c:5578
#, c-format
msgid " module name : %.*s\n"
msgstr ""
#: vms-alpha.c:5580
#, c-format
msgid " module version : %.*s\n"
msgstr ""
#: vms-alpha.c:5582
#, c-format
msgid " compile date : %.17s\n"
msgstr ""
#: vms-alpha.c:5587
#, c-format
msgid "Language Processor Name\n"
msgstr ""
#: vms-alpha.c:5588
#, c-format
msgid " language name: %.*s\n"
msgstr ""
#: vms-alpha.c:5595
#, c-format
msgid "Source Files Header\n"
msgstr ""
#: vms-alpha.c:5596
#, c-format
msgid " file: %.*s\n"
msgstr ""
#: vms-alpha.c:5603
#, c-format
msgid "Title Text Header\n"
msgstr ""
#: vms-alpha.c:5604
#, c-format
msgid " title: %.*s\n"
msgstr ""
#: vms-alpha.c:5611
#, c-format
msgid "Copyright Header\n"
msgstr ""
#: vms-alpha.c:5612
#, c-format
msgid " copyright: %.*s\n"
msgstr ""
#: vms-alpha.c:5618
#, c-format
msgid "unhandled emh subtype %u\n"
msgstr ""
#: vms-alpha.c:5628
#, c-format
msgid " EEOM (len=%u):\n"
msgstr ""
#: vms-alpha.c:5629
#, c-format
msgid " number of cond linkage pairs: %u\n"
msgstr ""
#: vms-alpha.c:5631
#, c-format
msgid " completion code: %u\n"
msgstr ""
#: vms-alpha.c:5635
#, c-format
msgid " transfer addr flags: 0x%02x\n"
msgstr ""
#: vms-alpha.c:5636
#, c-format
msgid " transfer addr psect: %u\n"
msgstr ""
#: vms-alpha.c:5638
#, c-format
msgid " transfer address : 0x%08x\n"
msgstr ""
#: vms-alpha.c:5647
msgid " WEAK"
msgstr ""
#: vms-alpha.c:5649
msgid " DEF"
msgstr ""
#: vms-alpha.c:5651
msgid " UNI"
msgstr ""
#: vms-alpha.c:5653 vms-alpha.c:5674
msgid " REL"
msgstr ""
#: vms-alpha.c:5655
msgid " COMM"
msgstr ""
#: vms-alpha.c:5657
msgid " VECEP"
msgstr ""
#: vms-alpha.c:5659
msgid " NORM"
msgstr ""
#: vms-alpha.c:5661
msgid " QVAL"
msgstr ""
#: vms-alpha.c:5668
msgid " PIC"
msgstr ""
#: vms-alpha.c:5670
msgid " LIB"
msgstr ""
#: vms-alpha.c:5672
msgid " OVR"
msgstr ""
#: vms-alpha.c:5676
msgid " GBL"
msgstr ""
#: vms-alpha.c:5678
msgid " SHR"
msgstr ""
#: vms-alpha.c:5680
msgid " EXE"
msgstr ""
#: vms-alpha.c:5682
msgid " RD"
msgstr ""
#: vms-alpha.c:5684
msgid " WRT"
msgstr ""
#: vms-alpha.c:5686
msgid " VEC"
msgstr ""
#: vms-alpha.c:5688
msgid " NOMOD"
msgstr ""
#: vms-alpha.c:5690
msgid " COM"
msgstr ""
#: vms-alpha.c:5692
msgid " 64B"
msgstr ""
#: vms-alpha.c:5701
#, c-format
msgid " EGSD (len=%u):\n"
msgstr ""
#: vms-alpha.c:5713
#, c-format
msgid " EGSD entry %2u (type: %u, len: %u): "
msgstr ""
#: vms-alpha.c:5725
#, c-format
msgid "PSC - Program section definition\n"
msgstr ""
#: vms-alpha.c:5726 vms-alpha.c:5743
#, c-format
msgid " alignment : 2**%u\n"
msgstr ""
#: vms-alpha.c:5727 vms-alpha.c:5744
#, c-format
msgid " flags : 0x%04x"
msgstr ""
#: vms-alpha.c:5731
#, c-format
msgid " alloc (len): %u (0x%08x)\n"
msgstr ""
#: vms-alpha.c:5732 vms-alpha.c:5789 vms-alpha.c:5838
#, c-format
msgid " name : %.*s\n"
msgstr ""
#: vms-alpha.c:5742
#, c-format
msgid "SPSC - Shared Image Program section def\n"
msgstr ""
#: vms-alpha.c:5748
#, c-format
msgid " alloc (len) : %u (0x%08x)\n"
msgstr ""
#: vms-alpha.c:5749
#, c-format
msgid " image offset : 0x%08x\n"
msgstr ""
#: vms-alpha.c:5751
#, c-format
msgid " symvec offset : 0x%08x\n"
msgstr ""
#: vms-alpha.c:5753
#, c-format
msgid " name : %.*s\n"
msgstr ""
#: vms-alpha.c:5766
#, c-format
msgid "SYM - Global symbol definition\n"
msgstr ""
#: vms-alpha.c:5767 vms-alpha.c:5827 vms-alpha.c:5848 vms-alpha.c:5867
#, c-format
msgid " flags: 0x%04x"
msgstr ""
#: vms-alpha.c:5770
#, c-format
msgid " psect offset: 0x%08x\n"
msgstr ""
#: vms-alpha.c:5774
#, c-format
msgid " code address: 0x%08x\n"
msgstr ""
#: vms-alpha.c:5776
#, c-format
msgid " psect index for entry point : %u\n"
msgstr ""
#: vms-alpha.c:5779 vms-alpha.c:5855 vms-alpha.c:5874
#, c-format
msgid " psect index : %u\n"
msgstr ""
#: vms-alpha.c:5781 vms-alpha.c:5857 vms-alpha.c:5876
#, c-format
msgid " name : %.*s\n"
msgstr ""
#: vms-alpha.c:5788
#, c-format
msgid "SYM - Global symbol reference\n"
msgstr ""
#: vms-alpha.c:5800
#, c-format
msgid "IDC - Ident Consistency check\n"
msgstr ""
#: vms-alpha.c:5801
#, c-format
msgid " flags : 0x%08x"
msgstr ""
#: vms-alpha.c:5805
#, c-format
msgid " id match : %x\n"
msgstr ""
#: vms-alpha.c:5807
#, c-format
msgid " error severity: %x\n"
msgstr ""
#: vms-alpha.c:5810
#, c-format
msgid " entity name : %.*s\n"
msgstr ""
#: vms-alpha.c:5812
#, c-format
msgid " object name : %.*s\n"
msgstr ""
#: vms-alpha.c:5815
#, c-format
msgid " binary ident : 0x%08x\n"
msgstr ""
#: vms-alpha.c:5818
#, c-format
msgid " ascii ident : %.*s\n"
msgstr ""
#: vms-alpha.c:5826
#, c-format
msgid "SYMG - Universal symbol definition\n"
msgstr ""
#: vms-alpha.c:5830
#, c-format
msgid " symbol vector offset: 0x%08x\n"
msgstr ""
#: vms-alpha.c:5832
#, c-format
msgid " entry point: 0x%08x\n"
msgstr ""
#: vms-alpha.c:5834
#, c-format
msgid " proc descr : 0x%08x\n"
msgstr ""
#: vms-alpha.c:5836
#, c-format
msgid " psect index: %u\n"
msgstr ""
#: vms-alpha.c:5847
#, c-format
msgid "SYMV - Vectored symbol definition\n"
msgstr ""
#: vms-alpha.c:5851
#, c-format
msgid " vector : 0x%08x\n"
msgstr ""
#: vms-alpha.c:5853 vms-alpha.c:5872
#, c-format
msgid " psect offset: %u\n"
msgstr ""
#: vms-alpha.c:5866
#, c-format
msgid "SYMM - Global symbol definition with version\n"
msgstr ""
#: vms-alpha.c:5870
#, c-format
msgid " version mask: 0x%08x\n"
msgstr ""
#: vms-alpha.c:5881
#, c-format
msgid "unhandled egsd entry type %u\n"
msgstr ""
#: vms-alpha.c:5915
#, c-format
msgid " linkage index: %u, replacement insn: 0x%08x\n"
msgstr ""
#: vms-alpha.c:5918
#, c-format
msgid " psect idx 1: %u, offset 1: 0x%08x %08x\n"
msgstr ""
#: vms-alpha.c:5922
#, c-format
msgid " psect idx 2: %u, offset 2: 0x%08x %08x\n"
msgstr ""
#: vms-alpha.c:5927
#, c-format
msgid " psect idx 3: %u, offset 3: 0x%08x %08x\n"
msgstr ""
#: vms-alpha.c:5932
#, c-format
msgid " global name: %.*s\n"
msgstr ""
#: vms-alpha.c:5942
#, c-format
msgid " %s (len=%u+%u):\n"
msgstr ""
#: vms-alpha.c:5957
#, c-format
msgid " (type: %3u, size: 4+%3u): "
msgstr ""
#: vms-alpha.c:5961
#, c-format
msgid "STA_GBL (stack global) %.*s\n"
msgstr ""
#: vms-alpha.c:5965
#, c-format
msgid "STA_LW (stack longword) 0x%08x\n"
msgstr ""
#: vms-alpha.c:5969
#, c-format
msgid "STA_QW (stack quadword) 0x%08x %08x\n"
msgstr ""
#: vms-alpha.c:5974
#, c-format
msgid "STA_PQ (stack psect base + offset)\n"
msgstr ""
#: vms-alpha.c:5975
#, c-format
msgid " psect: %u, offset: 0x%08x %08x\n"
msgstr ""
#: vms-alpha.c:5981
#, c-format
msgid "STA_LI (stack literal)\n"
msgstr ""
#: vms-alpha.c:5984
#, c-format
msgid "STA_MOD (stack module)\n"
msgstr ""
#: vms-alpha.c:5987
#, c-format
msgid "STA_CKARG (compare procedure argument)\n"
msgstr ""
#: vms-alpha.c:5991
#, c-format
msgid "STO_B (store byte)\n"
msgstr ""
#: vms-alpha.c:5994
#, c-format
msgid "STO_W (store word)\n"
msgstr ""
#: vms-alpha.c:5997
#, c-format
msgid "STO_LW (store longword)\n"
msgstr ""
#: vms-alpha.c:6000
#, c-format
msgid "STO_QW (store quadword)\n"
msgstr ""
#: vms-alpha.c:6006
#, c-format
msgid "STO_IMMR (store immediate repeat) %u bytes\n"
msgstr ""
#: vms-alpha.c:6013
#, c-format
msgid "STO_GBL (store global) %.*s\n"
msgstr ""
#: vms-alpha.c:6017
#, c-format
msgid "STO_CA (store code address) %.*s\n"
msgstr ""
#: vms-alpha.c:6021
#, c-format
msgid "STO_RB (store relative branch)\n"
msgstr ""
#: vms-alpha.c:6024
#, c-format
msgid "STO_AB (store absolute branch)\n"
msgstr ""
#: vms-alpha.c:6027
#, c-format
msgid "STO_OFF (store offset to psect)\n"
msgstr ""
#: vms-alpha.c:6033
#, c-format
msgid "STO_IMM (store immediate) %u bytes\n"
msgstr ""
#: vms-alpha.c:6040
#, c-format
msgid "STO_GBL_LW (store global longword) %.*s\n"
msgstr ""
#: vms-alpha.c:6044
#, c-format
msgid "STO_OFF (store LP with procedure signature)\n"
msgstr ""
#: vms-alpha.c:6047
#, c-format
msgid "STO_BR_GBL (store branch global) *todo*\n"
msgstr ""
#: vms-alpha.c:6050
#, c-format
msgid "STO_BR_PS (store branch psect + offset) *todo*\n"
msgstr ""
#: vms-alpha.c:6054
#, c-format
msgid "OPR_NOP (no-operation)\n"
msgstr ""
#: vms-alpha.c:6057
#, c-format
msgid "OPR_ADD (add)\n"
msgstr ""
#: vms-alpha.c:6060
#, c-format
msgid "OPR_SUB (substract)\n"
msgstr ""
#: vms-alpha.c:6063
#, c-format
msgid "OPR_MUL (multiply)\n"
msgstr ""
#: vms-alpha.c:6066
#, c-format
msgid "OPR_DIV (divide)\n"
msgstr ""
#: vms-alpha.c:6069
#, c-format
msgid "OPR_AND (logical and)\n"
msgstr ""
#: vms-alpha.c:6072
#, c-format
msgid "OPR_IOR (logical inclusive or)\n"
msgstr ""
#: vms-alpha.c:6075
#, c-format
msgid "OPR_EOR (logical exclusive or)\n"
msgstr ""
#: vms-alpha.c:6078
#, c-format
msgid "OPR_NEG (negate)\n"
msgstr ""
#: vms-alpha.c:6081
#, c-format
msgid "OPR_COM (complement)\n"
msgstr ""
#: vms-alpha.c:6084
#, c-format
msgid "OPR_INSV (insert field)\n"
msgstr ""
#: vms-alpha.c:6087
#, c-format
msgid "OPR_ASH (arithmetic shift)\n"
msgstr ""
#: vms-alpha.c:6090
#, c-format
msgid "OPR_USH (unsigned shift)\n"
msgstr ""
#: vms-alpha.c:6093
#, c-format
msgid "OPR_ROT (rotate)\n"
msgstr ""
#: vms-alpha.c:6096
#, c-format
msgid "OPR_SEL (select)\n"
msgstr ""
#: vms-alpha.c:6099
#, c-format
msgid "OPR_REDEF (redefine symbol to curr location)\n"
msgstr ""
#: vms-alpha.c:6102
#, c-format
msgid "OPR_REDEF (define a literal)\n"
msgstr ""
#: vms-alpha.c:6106
#, c-format
msgid "STC_LP (store cond linkage pair)\n"
msgstr ""
#: vms-alpha.c:6110
#, c-format
msgid "STC_LP_PSB (store cond linkage pair + signature)\n"
msgstr ""
#: vms-alpha.c:6111
#, c-format
msgid " linkage index: %u, procedure: %.*s\n"
msgstr ""
#: vms-alpha.c:6114
#, c-format
msgid " signature: %.*s\n"
msgstr ""
#: vms-alpha.c:6117
#, c-format
msgid "STC_GBL (store cond global)\n"
msgstr ""
#: vms-alpha.c:6118
#, c-format
msgid " linkage index: %u, global: %.*s\n"
msgstr ""
#: vms-alpha.c:6122
#, c-format
msgid "STC_GCA (store cond code address)\n"
msgstr ""
#: vms-alpha.c:6123
#, c-format
msgid " linkage index: %u, procedure name: %.*s\n"
msgstr ""
#: vms-alpha.c:6127
#, c-format
msgid "STC_PS (store cond psect + offset)\n"
msgstr ""
#: vms-alpha.c:6129
#, c-format
msgid " linkage index: %u, psect: %u, offset: 0x%08x %08x\n"
msgstr ""
#: vms-alpha.c:6136
#, c-format
msgid "STC_NOP_GBL (store cond NOP at global addr)\n"
msgstr ""
#: vms-alpha.c:6140
#, c-format
msgid "STC_NOP_PS (store cond NOP at psect + offset)\n"
msgstr ""
#: vms-alpha.c:6144
#, c-format
msgid "STC_BSR_GBL (store cond BSR at global addr)\n"
msgstr ""
#: vms-alpha.c:6148
#, c-format
msgid "STC_BSR_PS (store cond BSR at psect + offset)\n"
msgstr ""
#: vms-alpha.c:6152
#, c-format
msgid "STC_LDA_GBL (store cond LDA at global addr)\n"
msgstr ""
#: vms-alpha.c:6156
#, c-format
msgid "STC_LDA_PS (store cond LDA at psect + offset)\n"
msgstr ""
#: vms-alpha.c:6160
#, c-format
msgid "STC_BOH_GBL (store cond BOH at global addr)\n"
msgstr ""
#: vms-alpha.c:6164
#, c-format
msgid "STC_BOH_PS (store cond BOH at psect + offset)\n"
msgstr ""
#: vms-alpha.c:6169
#, c-format
msgid "STC_NBH_GBL (store cond or hint at global addr)\n"
msgstr ""
#: vms-alpha.c:6173
#, c-format
msgid "STC_NBH_PS (store cond or hint at psect + offset)\n"
msgstr ""
#: vms-alpha.c:6177
#, c-format
msgid "CTL_SETRB (set relocation base)\n"
msgstr ""
#: vms-alpha.c:6183
#, c-format
msgid "CTL_AUGRB (augment relocation base) %u\n"
msgstr ""
#: vms-alpha.c:6187
#, c-format
msgid "CTL_DFLOC (define location)\n"
msgstr ""
#: vms-alpha.c:6190
#, c-format
msgid "CTL_STLOC (set location)\n"
msgstr ""
#: vms-alpha.c:6193
#, c-format
msgid "CTL_STKDL (stack defined location)\n"
msgstr ""
#: vms-alpha.c:6196 vms-alpha.c:6610
#, c-format
msgid "*unhandled*\n"
msgstr ""
#: vms-alpha.c:6226 vms-alpha.c:6265
#, c-format
msgid "cannot read GST record length\n"
msgstr ""
#. Ill-formed.
#: vms-alpha.c:6247
#, c-format
msgid "cannot find EMH in first GST record\n"
msgstr ""
#: vms-alpha.c:6273
#, c-format
msgid "cannot read GST record header\n"
msgstr ""
#: vms-alpha.c:6286
#, c-format
msgid " corrupted GST\n"
msgstr ""
#: vms-alpha.c:6294
#, c-format
msgid "cannot read GST record\n"
msgstr ""
#: vms-alpha.c:6323
#, c-format
msgid " unhandled EOBJ record type %u\n"
msgstr ""
#: vms-alpha.c:6346
#, c-format
msgid " bitcount: %u, base addr: 0x%08x\n"
msgstr ""
#: vms-alpha.c:6359
#, c-format
msgid " bitmap: 0x%08x (count: %u):\n"
msgstr ""
#: vms-alpha.c:6366
#, c-format
msgid " %08x"
msgstr ""
#: vms-alpha.c:6391
#, c-format
msgid " image %u (%u entries)\n"
msgstr ""
#: vms-alpha.c:6396
#, c-format
msgid " offset: 0x%08x, val: 0x%08x\n"
msgstr ""
#: vms-alpha.c:6417
#, c-format
msgid " image %u (%u entries), offsets:\n"
msgstr ""
#: vms-alpha.c:6424
#, c-format
msgid " 0x%08x"
msgstr ""
#. 64 bits.
#: vms-alpha.c:6546
#, c-format
msgid "64 bits *unhandled*\n"
msgstr ""
#: vms-alpha.c:6550
#, c-format
msgid "class: %u, dtype: %u, length: %u, pointer: 0x%08x\n"
msgstr ""
#: vms-alpha.c:6561
#, c-format
msgid "non-contiguous array of %s\n"
msgstr ""
#: vms-alpha.c:6565
#, c-format
msgid "dimct: %u, aflags: 0x%02x, digits: %u, scale: %u\n"
msgstr ""
#: vms-alpha.c:6569
#, c-format
msgid "arsize: %u, a0: 0x%08x\n"
msgstr ""
#: vms-alpha.c:6573
#, c-format
msgid "Strides:\n"
msgstr ""
#: vms-alpha.c:6578
#, c-format
msgid "[%u]: %u\n"
msgstr ""
#: vms-alpha.c:6583
#, c-format
msgid "Bounds:\n"
msgstr ""
#: vms-alpha.c:6588
#, c-format
msgid "[%u]: Lower: %u, upper: %u\n"
msgstr ""
#: vms-alpha.c:6600
#, c-format
msgid "unaligned bit-string of %s\n"
msgstr ""
#: vms-alpha.c:6604
#, c-format
msgid "base: %u, pos: %u\n"
msgstr ""
#: vms-alpha.c:6624
#, c-format
msgid "vflags: 0x%02x, value: 0x%08x "
msgstr ""
#: vms-alpha.c:6630
#, c-format
msgid "(no value)\n"
msgstr ""
#: vms-alpha.c:6633
#, c-format
msgid "(not active)\n"
msgstr ""
#: vms-alpha.c:6636
#, c-format
msgid "(not allocated)\n"
msgstr ""
#: vms-alpha.c:6639
#, c-format
msgid "(descriptor)\n"
msgstr ""
#: vms-alpha.c:6643
#, c-format
msgid "(trailing value)\n"
msgstr ""
#: vms-alpha.c:6646
#, c-format
msgid "(value spec follows)\n"
msgstr ""
#: vms-alpha.c:6649
#, c-format
msgid "(at bit offset %u)\n"
msgstr ""
#: vms-alpha.c:6652
#, c-format
msgid "(reg: %u, disp: %u, indir: %u, kind: "
msgstr ""
#: vms-alpha.c:6659
msgid "literal"
msgstr ""
#: vms-alpha.c:6662
msgid "address"
msgstr ""
#: vms-alpha.c:6665
msgid "desc"
msgstr ""
#: vms-alpha.c:6668
msgid "reg"
msgstr ""
#: vms-alpha.c:6743
#, c-format
msgid "Debug symbol table:\n"
msgstr ""
#: vms-alpha.c:6754
#, c-format
msgid "cannot read DST header\n"
msgstr ""
#: vms-alpha.c:6759
#, c-format
msgid " type: %3u, len: %3u (at 0x%08x): "
msgstr ""
#: vms-alpha.c:6773
#, c-format
msgid "cannot read DST symbol\n"
msgstr ""
#: vms-alpha.c:6816
#, c-format
msgid "standard data: %s\n"
msgstr ""
#: vms-alpha.c:6819 vms-alpha.c:6903
#, c-format
msgid " name: %.*s\n"
msgstr ""
#: vms-alpha.c:6826
#, c-format
msgid "modbeg\n"
msgstr ""
#: vms-alpha.c:6827
#, c-format
msgid " flags: %d, language: %u, major: %u, minor: %u\n"
msgstr ""
#: vms-alpha.c:6833 vms-alpha.c:7099
#, c-format
msgid " module name: %.*s\n"
msgstr ""
#: vms-alpha.c:6836
#, c-format
msgid " compiler : %.*s\n"
msgstr ""
#: vms-alpha.c:6841
#, c-format
msgid "modend\n"
msgstr ""
#: vms-alpha.c:6848
msgid "rtnbeg\n"
msgstr ""
#: vms-alpha.c:6849
#, c-format
msgid " flags: %u, address: 0x%08x, pd-address: 0x%08x\n"
msgstr ""
#: vms-alpha.c:6854
#, c-format
msgid " routine name: %.*s\n"
msgstr ""
#: vms-alpha.c:6862
#, c-format
msgid "rtnend: size 0x%08x\n"
msgstr ""
#: vms-alpha.c:6870
#, c-format
msgid "prolog: bkpt address 0x%08x\n"
msgstr ""
#: vms-alpha.c:6878
#, c-format
msgid "epilog: flags: %u, count: %u\n"
msgstr ""
#: vms-alpha.c:6887
#, c-format
msgid "blkbeg: address: 0x%08x, name: %.*s\n"
msgstr ""
#: vms-alpha.c:6896
#, c-format
msgid "blkend: size: 0x%08x\n"
msgstr ""
#: vms-alpha.c:6902
#, c-format
msgid "typspec (len: %u)\n"
msgstr ""
#: vms-alpha.c:6909
#, c-format
msgid "septyp, name: %.*s\n"
msgstr ""
#: vms-alpha.c:6918
#, c-format
msgid "recbeg: name: %.*s\n"
msgstr ""
#: vms-alpha.c:6925
#, c-format
msgid "recend\n"
msgstr ""
#: vms-alpha.c:6928
#, c-format
msgid "enumbeg, len: %u, name: %.*s\n"
msgstr ""
#: vms-alpha.c:6932
#, c-format
msgid "enumelt, name: %.*s\n"
msgstr ""
#: vms-alpha.c:6936
#, c-format
msgid "enumend\n"
msgstr ""
#: vms-alpha.c:6953
#, c-format
msgid "discontiguous range (nbr: %u)\n"
msgstr ""
#: vms-alpha.c:6955
#, c-format
msgid " address: 0x%08x, size: %u\n"
msgstr ""
#: vms-alpha.c:6965
#, c-format
msgid "line num (len: %u)\n"
msgstr ""
#: vms-alpha.c:6982
#, c-format
msgid "delta_pc_w %u\n"
msgstr ""
#: vms-alpha.c:6989
#, c-format
msgid "incr_linum(b): +%u\n"
msgstr ""
#: vms-alpha.c:6995
#, c-format
msgid "incr_linum_w: +%u\n"
msgstr ""
#: vms-alpha.c:7001
#, c-format
msgid "incr_linum_l: +%u\n"
msgstr ""
#: vms-alpha.c:7007
#, c-format
msgid "set_line_num(w) %u\n"
msgstr ""
#: vms-alpha.c:7012
#, c-format
msgid "set_line_num_b %u\n"
msgstr ""
#: vms-alpha.c:7017
#, c-format
msgid "set_line_num_l %u\n"
msgstr ""
#: vms-alpha.c:7022
#, c-format
msgid "set_abs_pc: 0x%08x\n"
msgstr ""
#: vms-alpha.c:7026
#, c-format
msgid "delta_pc_l: +0x%08x\n"
msgstr ""
#: vms-alpha.c:7031
#, c-format
msgid "term(b): 0x%02x"
msgstr ""
#: vms-alpha.c:7033
#, c-format
msgid " pc: 0x%08x\n"
msgstr ""
#: vms-alpha.c:7038
#, c-format
msgid "term_w: 0x%04x"
msgstr ""
#: vms-alpha.c:7040
#, c-format
msgid " pc: 0x%08x\n"
msgstr ""
#: vms-alpha.c:7046
#, c-format
msgid "delta pc +%-4d"
msgstr ""
#: vms-alpha.c:7049
#, c-format
msgid " pc: 0x%08x line: %5u\n"
msgstr ""
#: vms-alpha.c:7054
#, c-format
msgid " *unhandled* cmd %u\n"
msgstr ""
#: vms-alpha.c:7069
#, c-format
msgid "source (len: %u)\n"
msgstr ""
#: vms-alpha.c:7083
#, c-format
msgid " declfile: len: %u, flags: %u, fileid: %u\n"
msgstr ""
#: vms-alpha.c:7087
#, c-format
msgid " rms: cdt: 0x%08x %08x, ebk: 0x%08x, ffb: 0x%04x, rfo: %u\n"
msgstr ""
#: vms-alpha.c:7096
#, c-format
msgid " filename : %.*s\n"
msgstr ""
#: vms-alpha.c:7105
#, c-format
msgid " setfile %u\n"
msgstr ""
#: vms-alpha.c:7110 vms-alpha.c:7115
#, c-format
msgid " setrec %u\n"
msgstr ""
#: vms-alpha.c:7120 vms-alpha.c:7125
#, c-format
msgid " setlnum %u\n"
msgstr ""
#: vms-alpha.c:7130 vms-alpha.c:7135
#, c-format
msgid " deflines %u\n"
msgstr ""
#: vms-alpha.c:7139
#, c-format
msgid " formfeed\n"
msgstr ""
#: vms-alpha.c:7143
#, c-format
msgid " *unhandled* cmd %u\n"
msgstr ""
#: vms-alpha.c:7155
#, c-format
msgid "*unhandled* dst type %u\n"
msgstr ""
#: vms-alpha.c:7187
#, c-format
msgid "cannot read EIHD\n"
msgstr ""
#: vms-alpha.c:7190
#, c-format
msgid "EIHD: (size: %u, nbr blocks: %u)\n"
msgstr ""
#: vms-alpha.c:7193
#, c-format
msgid " majorid: %u, minorid: %u\n"
msgstr ""
#: vms-alpha.c:7201
msgid "executable"
msgstr ""
#: vms-alpha.c:7204
msgid "linkable image"
msgstr ""
#: vms-alpha.c:7210
#, c-format
msgid " image type: %u (%s)"
msgstr ""
#: vms-alpha.c:7216
msgid "native"
msgstr ""
#: vms-alpha.c:7219
msgid "CLI"
msgstr ""
#: vms-alpha.c:7225
#, c-format
msgid ", subtype: %u (%s)\n"
msgstr ""
#: vms-alpha.c:7231
#, c-format
msgid " offsets: isd: %u, activ: %u, symdbg: %u, imgid: %u, patch: %u\n"
msgstr ""
#: vms-alpha.c:7235
#, c-format
msgid " fixup info rva: "
msgstr ""
#: vms-alpha.c:7237
#, c-format
msgid ", symbol vector rva: "
msgstr ""
#: vms-alpha.c:7240
#, c-format
msgid ""
"\n"
" version array off: %u\n"
msgstr ""
#: vms-alpha.c:7244
#, c-format
msgid " img I/O count: %u, nbr channels: %u, req pri: %08x%08x\n"
msgstr ""
#: vms-alpha.c:7250
1999-06-03 03:26:53 +00:00
#, c-format
msgid " linker flags: %08x:"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:7280
1999-06-03 03:26:53 +00:00
#, c-format
msgid " ident: 0x%08x, sysver: 0x%08x, match ctrl: %u, symvect_size: %u\n"
msgstr ""
#: vms-alpha.c:7286
#, c-format
msgid " BPAGE: %u"
msgstr ""
#: vms-alpha.c:7292
#, c-format
msgid ", ext fixup offset: %u, no_opt psect off: %u"
msgstr ""
#: vms-alpha.c:7295
#, c-format
msgid ", alias: %u\n"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:7303
1999-06-03 03:26:53 +00:00
#, c-format
msgid "system version array information:\n"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:7307
#, c-format
msgid "cannot read EIHVN header\n"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:7317
#, c-format
msgid "cannot read EIHVN version\n"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:7320
#, c-format
msgid " %02u "
msgstr ""
#: vms-alpha.c:7324
msgid "BASE_IMAGE "
msgstr ""
#: vms-alpha.c:7327
msgid "MEMORY_MANAGEMENT"
msgstr ""
#: vms-alpha.c:7330
msgid "IO "
msgstr ""
#: vms-alpha.c:7333
msgid "FILES_VOLUMES "
msgstr ""
#: vms-alpha.c:7336
msgid "PROCESS_SCHED "
msgstr ""
#: vms-alpha.c:7339
msgid "SYSGEN "
msgstr ""
#: vms-alpha.c:7342
msgid "CLUSTERS_LOCKMGR "
msgstr ""
#: vms-alpha.c:7345
msgid "LOGICAL_NAMES "
msgstr ""
#: vms-alpha.c:7348
msgid "SECURITY "
msgstr ""
#: vms-alpha.c:7351
msgid "IMAGE_ACTIVATOR "
msgstr ""
#: vms-alpha.c:7354
msgid "NETWORKS "
msgstr ""
#: vms-alpha.c:7357
msgid "COUNTERS "
msgstr ""
#: vms-alpha.c:7360
msgid "STABLE "
msgstr ""
#: vms-alpha.c:7363
msgid "MISC "
msgstr ""
#: vms-alpha.c:7366
msgid "CPU "
msgstr ""
#: vms-alpha.c:7369
msgid "VOLATILE "
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:7372
msgid "SHELL "
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:7375
msgid "POSIX "
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:7378
msgid "MULTI_PROCESSING "
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:7381
msgid "GALAXY "
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:7384
msgid "*unknown* "
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:7387
1999-06-03 03:26:53 +00:00
#, c-format
msgid ": %u.%u\n"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:7400 vms-alpha.c:7659
1999-06-03 03:26:53 +00:00
#, c-format
msgid "cannot read EIHA\n"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:7403
#, c-format
msgid "Image activation: (size=%u)\n"
msgstr ""
#: vms-alpha.c:7405
#, c-format
msgid " First address : 0x%08x 0x%08x\n"
msgstr ""
#: vms-alpha.c:7408
#, c-format
msgid " Second address: 0x%08x 0x%08x\n"
msgstr ""
#: vms-alpha.c:7411
1999-06-03 03:26:53 +00:00
#, c-format
msgid " Third address : 0x%08x 0x%08x\n"
1999-06-03 03:26:53 +00:00
msgstr ""
#: vms-alpha.c:7414
#, c-format
msgid " Fourth address: 0x%08x 0x%08x\n"
msgstr ""
#: vms-alpha.c:7417
#, c-format
msgid " Shared image : 0x%08x 0x%08x\n"
msgstr ""
#: vms-alpha.c:7428
1999-06-03 03:26:53 +00:00
#, c-format
msgid "cannot read EIHI\n"
msgstr ""
#: vms-alpha.c:7431
#, c-format
msgid "Image identification: (major: %u, minor: %u)\n"
msgstr ""
#: vms-alpha.c:7434
#, c-format
msgid " image name : %.*s\n"
msgstr ""
#: vms-alpha.c:7436
#, c-format
msgid " link time : %s\n"
msgstr ""
#: vms-alpha.c:7438
#, c-format
msgid " image ident : %.*s\n"
msgstr ""
#: vms-alpha.c:7440
#, c-format
msgid " linker ident : %.*s\n"
msgstr ""
#: vms-alpha.c:7442
#, c-format
msgid " image build ident: %.*s\n"
msgstr ""
#: vms-alpha.c:7452
#, c-format
msgid "cannot read EIHS\n"
msgstr ""
#: vms-alpha.c:7455
#, c-format
msgid "Image symbol & debug table: (major: %u, minor: %u)\n"
msgstr ""
#: vms-alpha.c:7460
#, c-format
msgid " debug symbol table : vbn: %u, size: %u (0x%x)\n"
msgstr ""
#: vms-alpha.c:7464
#, c-format
msgid " global symbol table: vbn: %u, records: %u\n"
msgstr ""
#: vms-alpha.c:7468
#, c-format
msgid " debug module table : vbn: %u, size: %u\n"
msgstr ""
#: vms-alpha.c:7481
#, c-format
msgid "cannot read EISD\n"
msgstr ""
#: vms-alpha.c:7491
#, c-format
msgid ""
"Image section descriptor: (major: %u, minor: %u, size: %u, offset: %u)\n"
msgstr ""
#: vms-alpha.c:7498
#, c-format
msgid " section: base: 0x%08x%08x size: 0x%08x\n"
msgstr ""
#: vms-alpha.c:7503
#, c-format
msgid " flags: 0x%04x"
msgstr ""
#: vms-alpha.c:7540
#, c-format
msgid " vbn: %u, pfc: %u, matchctl: %u type: %u ("
msgstr ""
#: vms-alpha.c:7546
msgid "NORMAL"
msgstr ""
#: vms-alpha.c:7549
msgid "SHRFXD"
msgstr ""
#: vms-alpha.c:7552
msgid "PRVFXD"
msgstr ""
#: vms-alpha.c:7555
msgid "SHRPIC"
msgstr ""
#: vms-alpha.c:7558
msgid "PRVPIC"
msgstr ""
#: vms-alpha.c:7561
msgid "USRSTACK"
msgstr ""
#: vms-alpha.c:7567
msgid ")\n"
msgstr ""
#: vms-alpha.c:7569
#, c-format
msgid " ident: 0x%08x, name: %.*s\n"
msgstr ""
#: vms-alpha.c:7579
#, c-format
msgid "cannot read DMT\n"
msgstr ""
#: vms-alpha.c:7583
#, c-format
msgid "Debug module table:\n"
msgstr ""
#: vms-alpha.c:7592
#, c-format
msgid "cannot read DMT header\n"
msgstr ""
#: vms-alpha.c:7597
#, c-format
msgid " module offset: 0x%08x, size: 0x%08x, (%u psects)\n"
msgstr ""
#: vms-alpha.c:7607
#, c-format
msgid "cannot read DMT psect\n"
msgstr ""
#: vms-alpha.c:7610
#, c-format
msgid " psect start: 0x%08x, length: %u\n"
msgstr ""
#: vms-alpha.c:7623
#, c-format
msgid "cannot read DST\n"
msgstr ""
#: vms-alpha.c:7633
#, c-format
msgid "cannot read GST\n"
msgstr ""
#: vms-alpha.c:7637
#, c-format
msgid "Global symbol table:\n"
msgstr ""
#: vms-alpha.c:7665
#, c-format
msgid "Image activator fixup: (major: %u, minor: %u)\n"
msgstr ""
#: vms-alpha.c:7668
#, c-format
msgid " iaflink : 0x%08x %08x\n"
msgstr ""
#: vms-alpha.c:7671
#, c-format
msgid " fixuplnk: 0x%08x %08x\n"
msgstr ""
#: vms-alpha.c:7674
#, c-format
msgid " size : %u\n"
msgstr ""
#: vms-alpha.c:7676
#, c-format
msgid " flags: 0x%08x\n"
msgstr ""
#: vms-alpha.c:7680
#, c-format
msgid " qrelfixoff: %5u, lrelfixoff: %5u\n"
msgstr ""
#: vms-alpha.c:7684
#, c-format
msgid " qdotadroff: %5u, ldotadroff: %5u\n"
msgstr ""
#: vms-alpha.c:7688
#, c-format
msgid " codeadroff: %5u, lpfixoff : %5u\n"
msgstr ""
#: vms-alpha.c:7691
#, c-format
msgid " chgprtoff : %5u\n"
msgstr ""
#: vms-alpha.c:7694
#, c-format
msgid " shlstoff : %5u, shrimgcnt : %5u\n"
msgstr ""
#: vms-alpha.c:7696
#, c-format
msgid " shlextra : %5u, permctx : %5u\n"
msgstr ""
#: vms-alpha.c:7699
#, c-format
msgid " base_va : 0x%08x\n"
msgstr ""
#: vms-alpha.c:7701
#, c-format
msgid " lppsbfixoff: %5u\n"
msgstr ""
#: vms-alpha.c:7709
#, c-format
msgid " Shareable images:\n"
msgstr ""
#: vms-alpha.c:7713
#, c-format
msgid " %u: size: %u, flags: 0x%02x, name: %.*s\n"
msgstr ""
#: vms-alpha.c:7720
#, c-format
msgid " quad-word relocation fixups:\n"
msgstr ""
#: vms-alpha.c:7725
#, c-format
msgid " long-word relocation fixups:\n"
msgstr ""
#: vms-alpha.c:7730
#, c-format
msgid " quad-word .address reference fixups:\n"
msgstr ""
#: vms-alpha.c:7735
#, c-format
msgid " long-word .address reference fixups:\n"
msgstr ""
#: vms-alpha.c:7740
#, c-format
msgid " Code Address Reference Fixups:\n"
msgstr ""
#: vms-alpha.c:7745
#, c-format
msgid " Linkage Pairs Reference Fixups:\n"
msgstr ""
#: vms-alpha.c:7754
#, c-format
msgid " Change Protection (%u entries):\n"
msgstr ""
#: vms-alpha.c:7759
#, c-format
msgid " base: 0x%08x %08x, size: 0x%08x, prot: 0x%08x "
msgstr ""
#. FIXME: we do not yet support relocatable link. It is not obvious
#. how to do it for debug infos.
#: vms-alpha.c:8599
msgid "%P: relocatable link is not supported\n"
msgstr ""
#: vms-alpha.c:8669
msgid "%P: multiple entry points: in modules %B and %B\n"
msgstr ""
#: vms-lib.c:1444
#, c-format
msgid "could not open shared image '%s' from '%s'"
msgstr ""
#: vms-misc.c:360
msgid "_bfd_vms_output_counted called with zero bytes"
msgstr ""
#: vms-misc.c:365
msgid "_bfd_vms_output_counted called with too many bytes"
1999-06-03 03:26:53 +00:00
msgstr ""
#: xcofflink.c:824
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
#, c-format
msgid "%s: XCOFF shared object when not producing XCOFF output"
msgstr ""
#: xcofflink.c:845
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
#, c-format
msgid "%s: dynamic object with no .loader section"
msgstr ""
#: xcofflink.c:1404
msgid "%B: `%s' has line numbers but no enclosing section"
1999-06-03 03:26:53 +00:00
msgstr ""
#: xcofflink.c:1456
msgid "%B: class %d symbol `%s' has no aux entries"
1999-06-03 03:26:53 +00:00
msgstr ""
#: xcofflink.c:1478
msgid "%B: symbol `%s' has unrecognized csect type %d"
1999-06-03 03:26:53 +00:00
msgstr ""
#: xcofflink.c:1490
msgid "%B: bad XTY_ER symbol `%s': class %d scnum %d scnlen %d"
1999-06-03 03:26:53 +00:00
msgstr ""
#: xcofflink.c:1519
msgid "%B: XMC_TC0 symbol `%s' is class %d scnlen %d"
1999-06-03 03:26:53 +00:00
msgstr ""
#: xcofflink.c:1665
msgid "%B: csect `%s' not in enclosing section"
1999-06-03 03:26:53 +00:00
msgstr ""
#: xcofflink.c:1772
msgid "%B: misplaced XTY_LD `%s'"
1999-06-03 03:26:53 +00:00
msgstr ""
#: xcofflink.c:2091
msgid "%B: reloc %s:%d not in csect"
1999-06-03 03:26:53 +00:00
msgstr ""
#: xcofflink.c:3182
1999-06-03 03:26:53 +00:00
#, c-format
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid "%s: no such symbol"
1999-06-03 03:26:53 +00:00
msgstr ""
#: xcofflink.c:3287
1999-06-03 03:26:53 +00:00
#, c-format
ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
msgid "warning: attempt to export undefined symbol `%s'"
1999-06-03 03:26:53 +00:00
msgstr ""
#: xcofflink.c:3666
msgid "error: undefined symbol __rtinit"
msgstr ""
#: xcofflink.c:4045
msgid "%B: loader reloc in unrecognized section `%s'"
msgstr ""
#: xcofflink.c:4056
msgid "%B: `%s' in loader reloc but not loader sym"
msgstr ""
#: xcofflink.c:4072
msgid "%B: loader reloc in read-only section %A"
msgstr ""
#: xcofflink.c:5094
1999-06-03 03:26:53 +00:00
#, c-format
msgid "TOC overflow: 0x%lx > 0x10000; try -mminimal-toc when compiling"
1999-06-03 03:26:53 +00:00
msgstr ""
#: peigen.c:1009 pepigen.c:1009 pex64igen.c:1009
#, c-format
msgid "%s: line number overflow: 0x%lx > 0xffff"
msgstr ""
#: peigen.c:1036 pepigen.c:1036 pex64igen.c:1036
msgid "Export Directory [.edata (or where ever we found it)]"
msgstr ""
#: peigen.c:1037 pepigen.c:1037 pex64igen.c:1037
msgid "Import Directory [parts of .idata]"
msgstr ""
#: peigen.c:1038 pepigen.c:1038 pex64igen.c:1038
msgid "Resource Directory [.rsrc]"
msgstr ""
#: peigen.c:1039 pepigen.c:1039 pex64igen.c:1039
msgid "Exception Directory [.pdata]"
msgstr ""
#: peigen.c:1040 pepigen.c:1040 pex64igen.c:1040
msgid "Security Directory"
msgstr ""
#: peigen.c:1041 pepigen.c:1041 pex64igen.c:1041
msgid "Base Relocation Directory [.reloc]"
msgstr ""
#: peigen.c:1042 pepigen.c:1042 pex64igen.c:1042
msgid "Debug Directory"
msgstr ""
#: peigen.c:1043 pepigen.c:1043 pex64igen.c:1043
msgid "Description Directory"
msgstr ""
#: peigen.c:1044 pepigen.c:1044 pex64igen.c:1044
msgid "Special Directory"
msgstr ""
#: peigen.c:1045 pepigen.c:1045 pex64igen.c:1045
msgid "Thread Storage Directory [.tls]"
msgstr ""
#: peigen.c:1046 pepigen.c:1046 pex64igen.c:1046
msgid "Load Configuration Directory"
msgstr ""
#: peigen.c:1047 pepigen.c:1047 pex64igen.c:1047
msgid "Bound Import Directory"
msgstr ""
#: peigen.c:1048 pepigen.c:1048 pex64igen.c:1048
msgid "Import Address Table Directory"
msgstr ""
#: peigen.c:1049 pepigen.c:1049 pex64igen.c:1049
msgid "Delay Import Directory"
msgstr ""
#: peigen.c:1050 pepigen.c:1050 pex64igen.c:1050
2007-07-02 07:12:53 +00:00
msgid "CLR Runtime Header"
msgstr ""
#: peigen.c:1051 pepigen.c:1051 pex64igen.c:1051
msgid "Reserved"
msgstr ""
#: peigen.c:1111 pepigen.c:1111 pex64igen.c:1111
#, c-format
msgid ""
"\n"
"There is an import table, but the section containing it could not be found\n"
msgstr ""
#: peigen.c:1116 pepigen.c:1116 pex64igen.c:1116
#, c-format
msgid ""
"\n"
"There is an import table in %s at 0x%lx\n"
msgstr ""
#: peigen.c:1158 pepigen.c:1158 pex64igen.c:1158
#, c-format
msgid ""
"\n"
"Function descriptor located at the start address: %04lx\n"
msgstr ""
#: peigen.c:1161 pepigen.c:1161 pex64igen.c:1161
#, c-format
msgid "\tcode-base %08lx toc (loadable/actual) %08lx/%08lx\n"
msgstr ""
#: peigen.c:1169 pepigen.c:1169 pex64igen.c:1169
#, c-format
msgid ""
"\n"
"No reldata section! Function descriptor not decoded.\n"
msgstr ""
#: peigen.c:1174 pepigen.c:1174 pex64igen.c:1174
#, c-format
msgid ""
"\n"
"The Import Tables (interpreted %s section contents)\n"
msgstr ""
#: peigen.c:1177 pepigen.c:1177 pex64igen.c:1177
#, c-format
msgid ""
" vma: Hint Time Forward DLL First\n"
" Table Stamp Chain Name Thunk\n"
msgstr ""
#: peigen.c:1225 pepigen.c:1225 pex64igen.c:1225
#, c-format
msgid ""
"\n"
"\tDLL Name: %s\n"
msgstr ""
#: peigen.c:1236 pepigen.c:1236 pex64igen.c:1236
#, c-format
msgid "\tvma: Hint/Ord Member-Name Bound-To\n"
msgstr ""
#: peigen.c:1261 pepigen.c:1261 pex64igen.c:1261
#, c-format
msgid ""
"\n"
"There is a first thunk, but the section containing it could not be found\n"
msgstr ""
#: peigen.c:1423 pepigen.c:1423 pex64igen.c:1423
#, c-format
msgid ""
"\n"
"There is an export table, but the section containing it could not be found\n"
msgstr ""
#: peigen.c:1432 pepigen.c:1432 pex64igen.c:1432
2005-10-25 02:20:17 +00:00
#, c-format
msgid ""
"\n"
"There is an export table in %s, but it does not fit into that section\n"
msgstr ""
#: peigen.c:1438 pepigen.c:1438 pex64igen.c:1438
#, c-format
msgid ""
"\n"
"There is an export table in %s at 0x%lx\n"
msgstr ""
#: peigen.c:1466 pepigen.c:1466 pex64igen.c:1466
#, c-format
msgid ""
"\n"
"The Export Tables (interpreted %s section contents)\n"
"\n"
msgstr ""
#: peigen.c:1470 pepigen.c:1470 pex64igen.c:1470
#, c-format
msgid "Export Flags \t\t\t%lx\n"
msgstr ""
#: peigen.c:1473 pepigen.c:1473 pex64igen.c:1473
#, c-format
msgid "Time/Date stamp \t\t%lx\n"
msgstr ""
#: peigen.c:1476 pepigen.c:1476 pex64igen.c:1476
#, c-format
msgid "Major/Minor \t\t\t%d/%d\n"
msgstr ""
#: peigen.c:1479 pepigen.c:1479 pex64igen.c:1479
#, c-format
msgid "Name \t\t\t\t"
msgstr ""
#: peigen.c:1485 pepigen.c:1485 pex64igen.c:1485
#, c-format
msgid "Ordinal Base \t\t\t%ld\n"
msgstr ""
#: peigen.c:1488 pepigen.c:1488 pex64igen.c:1488
#, c-format
msgid "Number in:\n"
msgstr ""
#: peigen.c:1491 pepigen.c:1491 pex64igen.c:1491
#, c-format
msgid "\tExport Address Table \t\t%08lx\n"
msgstr ""
#: peigen.c:1495 pepigen.c:1495 pex64igen.c:1495
#, c-format
msgid "\t[Name Pointer/Ordinal] Table\t%08lx\n"
msgstr ""
#: peigen.c:1498 pepigen.c:1498 pex64igen.c:1498
#, c-format
msgid "Table Addresses\n"
msgstr ""
#: peigen.c:1501 pepigen.c:1501 pex64igen.c:1501
#, c-format
msgid "\tExport Address Table \t\t"
msgstr ""
#: peigen.c:1506 pepigen.c:1506 pex64igen.c:1506
#, c-format
msgid "\tName Pointer Table \t\t"
msgstr ""
#: peigen.c:1511 pepigen.c:1511 pex64igen.c:1511
#, c-format
msgid "\tOrdinal Table \t\t\t"
msgstr ""
#: peigen.c:1525 pepigen.c:1525 pex64igen.c:1525
#, c-format
msgid ""
"\n"
"Export Address Table -- Ordinal Base %ld\n"
msgstr ""
#: peigen.c:1544 pepigen.c:1544 pex64igen.c:1544
msgid "Forwarder RVA"
msgstr ""
#: peigen.c:1555 pepigen.c:1555 pex64igen.c:1555
msgid "Export RVA"
msgstr ""
#: peigen.c:1562 pepigen.c:1562 pex64igen.c:1562
#, c-format
msgid ""
"\n"
"[Ordinal/Name Pointer] Table\n"
msgstr ""
#: peigen.c:1622 peigen.c:1805 pepigen.c:1622 pepigen.c:1805 pex64igen.c:1622
#: pex64igen.c:1805
#, c-format
msgid "Warning, .pdata section size (%ld) is not a multiple of %d\n"
msgstr ""
#: peigen.c:1629 pepigen.c:1629 pex64igen.c:1629
#, c-format
msgid " vma:\t\t\tBegin Address End Address Unwind Info\n"
msgstr ""
#: peigen.c:1631 pepigen.c:1631 pex64igen.c:1631
#, c-format
msgid ""
" vma:\t\tBegin End EH EH PrologEnd Exception\n"
" \t\tAddress Address Handler Data Address Mask\n"
msgstr ""
#: peigen.c:1705 pepigen.c:1705 pex64igen.c:1705
#, c-format
msgid " Register save millicode"
msgstr ""
#: peigen.c:1708 pepigen.c:1708 pex64igen.c:1708
#, c-format
msgid " Register restore millicode"
msgstr ""
#: peigen.c:1711 pepigen.c:1711 pex64igen.c:1711
#, c-format
msgid " Glue code sequence"
msgstr ""
#: peigen.c:1811 pepigen.c:1811 pex64igen.c:1811
#, c-format
msgid ""
" vma:\t\tBegin Prolog Function Flags Exception EH\n"
" \t\tAddress Length Length 32b exc Handler Data\n"
msgstr ""
#: peigen.c:1937 pepigen.c:1937 pex64igen.c:1937
#, c-format
msgid ""
"\n"
"\n"
"PE File Base Relocations (interpreted .reloc section contents)\n"
msgstr ""
#: peigen.c:1966 pepigen.c:1966 pex64igen.c:1966
#, c-format
msgid ""
"\n"
"Virtual Address: %08lx Chunk size %ld (0x%lx) Number of fixups %ld\n"
msgstr ""
#: peigen.c:1979 pepigen.c:1979 pex64igen.c:1979
#, c-format
msgid "\treloc %4d offset %4x [%4lx] %s"
msgstr ""
#: peigen.c:2023 pepigen.c:2023 pex64igen.c:2023
#, c-format
msgid "%*.s Entry: "
msgstr ""
#: peigen.c:2043 pepigen.c:2043 pex64igen.c:2043
#, c-format
msgid "name: [val: %08lx len %d]: "
msgstr ""
#: peigen.c:2054 pepigen.c:2054 pex64igen.c:2054
#, c-format
msgid "<corrupt string length: %#x>"
msgstr ""
#: peigen.c:2057 pepigen.c:2057 pex64igen.c:2057
#, c-format
msgid "<corrupt string offset: %#lx>"
msgstr ""
#: peigen.c:2060 pepigen.c:2060 pex64igen.c:2060
#, c-format
msgid "ID: %#08lx"
msgstr ""
#: peigen.c:2063 pepigen.c:2063 pex64igen.c:2063
#, c-format
msgid ", Value: %#08lx\n"
msgstr ""
#: peigen.c:2074 pepigen.c:2074 pex64igen.c:2074
#, c-format
msgid "%*.s Leaf: Addr: %#08lx, Size: %#08lx, Codepage: %d\n"
msgstr ""
#: peigen.c:2116 pepigen.c:2116 pex64igen.c:2116
#, c-format
msgid " Table: Char: %d, Time: %08lx, Ver: %d/%d, Num Names: %d, IDs: %d\n"
msgstr ""
#: peigen.c:2204 pepigen.c:2204 pex64igen.c:2204
#, c-format
msgid "Corrupt .rsrc section detected!\n"
msgstr ""
#: peigen.c:2220 pepigen.c:2220 pex64igen.c:2220
#, c-format
msgid ""
"\n"
"WARNING: Extra data in .rsrc section - it will be ignored by Windows:\n"
msgstr ""
#. The MS dumpbin program reportedly ands with 0xff0f before
#. printing the characteristics field. Not sure why. No reason to
#. emulate it here.
#: peigen.c:2243 pepigen.c:2243 pex64igen.c:2243
#, c-format
msgid ""
"\n"
"Characteristics 0x%x\n"
msgstr ""
2007-07-02 07:12:53 +00:00
#: peigen.c:3194 pepigen.c:3194 pex64igen.c:3194
#, c-format
msgid ".rsrc merge failure: duplicate string resource: %d"
msgstr ""
#: peigen.c:3329 pepigen.c:3329 pex64igen.c:3329
msgid ".rsrc merge failure: multiple non-default manifests"
msgstr ""
#: peigen.c:3347 pepigen.c:3347 pex64igen.c:3347
msgid ".rsrc merge failure: a directory matches a leaf"
msgstr ""
#: peigen.c:3389 pepigen.c:3389 pex64igen.c:3389
msgid ".rsrc merge failure: duplicate leaf"
msgstr ""
#: peigen.c:3391 pepigen.c:3391 pex64igen.c:3391
#, c-format
msgid ".rsrc merge failure: duplicate leaf: %s"
msgstr ""
#: peigen.c:3457 pepigen.c:3457 pex64igen.c:3457
msgid ".rsrc merge failure: dirs with differing characteristics\n"
msgstr ""
#: peigen.c:3464 pepigen.c:3464 pex64igen.c:3464
msgid ".rsrc merge failure: differing directory versions\n"
msgstr ""
#. Corrupted .rsrc section - cannot merge.
#: peigen.c:3537 pepigen.c:3537 pex64igen.c:3537
#, c-format
msgid "%s: .rsrc merge failure: corrupt .rsrc section"
msgstr ""
#: peigen.c:3673 pepigen.c:3673 pex64igen.c:3673
2007-07-02 07:12:53 +00:00
msgid "%B: unable to fill in DataDictionary[1] because .idata$2 is missing"
msgstr ""
#: peigen.c:3693 pepigen.c:3693 pex64igen.c:3693
2007-07-02 07:12:53 +00:00
msgid "%B: unable to fill in DataDictionary[1] because .idata$4 is missing"
msgstr ""
#: peigen.c:3714 pepigen.c:3714 pex64igen.c:3714
2007-07-02 07:12:53 +00:00
msgid "%B: unable to fill in DataDictionary[12] because .idata$5 is missing"
msgstr ""
#: peigen.c:3734 pepigen.c:3734 pex64igen.c:3734
2007-07-02 07:12:53 +00:00
msgid ""
"%B: unable to fill in DataDictionary[PE_IMPORT_ADDRESS_TABLE (12)] because ."
"idata$6 is missing"
msgstr ""
#: peigen.c:3776 pepigen.c:3776 pex64igen.c:3776
msgid ""
"%B: unable to fill in DataDictionary[PE_IMPORT_ADDRESS_TABLE(12)] because ."
"idata$6 is missing"
msgstr ""
#: peigen.c:3801 pepigen.c:3801 pex64igen.c:3801
2007-07-02 07:12:53 +00:00
msgid "%B: unable to fill in DataDictionary[9] because __tls_used is missing"
msgstr ""