2012-10-14 23:27:38 +00:00
|
|
|
|
2012-10-14 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
|
|
|
|
|
|
|
2012-10-14 23:59:39 +00:00
|
|
|
|
* config/tc-hppa.c (pa_get_number): New.
|
|
|
|
|
|
(pa_get_absolute_expression): Simplify.
|
|
|
|
|
|
(pa_ip): Use pa_get_number instead of pa_get_absolute_expression
|
|
|
|
|
|
to get SOP, SFU and COPR identifiers.
|
|
|
|
|
|
|
2012-10-14 23:27:38 +00:00
|
|
|
|
* config/tc-hppa.c (pa_ip): Reject double floating point stores and
|
|
|
|
|
|
loads that reference the right half of a floating point register.
|
|
|
|
|
|
|
2012-10-13 22:15:19 +00:00
|
|
|
|
2012-10-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-hppa.c (pa_ip): Limit unit conditions for uxor to those
|
|
|
|
|
|
not involving a carry.
|
|
|
|
|
|
|
2012-10-12 18:03:09 +00:00
|
|
|
|
2012-10-12 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo (-mpwr4, -mpwr7): Fix option name typos.
|
|
|
|
|
|
|
2012-10-11 15:26:18 +00:00
|
|
|
|
2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c: Change condition code insertion for
|
|
|
|
|
|
lds[hb] instructions from after the 2nd character to after the 3rd.
|
|
|
|
|
|
(tCM): Remove macro.
|
|
|
|
|
|
(TxCM): Likewise.
|
|
|
|
|
|
(TxCM_): Likewise.
|
|
|
|
|
|
(TCM): Likewise.
|
|
|
|
|
|
|
2012-10-09 08:43:06 +00:00
|
|
|
|
2012-10-09 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add CPU_BDVER3_FLAGS.
|
|
|
|
|
|
* doc/c-i386.texi: Add -march=bdver3 option.
|
|
|
|
|
|
|
2012-10-04 10:30:06 +00:00
|
|
|
|
2012-10-04 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-v850.c (v850_insert_operand): Use a static buffer for
|
|
|
|
|
|
the error message.
|
|
|
|
|
|
|
2012-10-04 08:47:36 +00:00
|
|
|
|
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-s390.c (s390_parse_cpu): Add new option zEC12.
|
|
|
|
|
|
* doc/as.texinfo: Document new option zEC12.
|
|
|
|
|
|
* doc/c-s390.texi: Likewise.
|
|
|
|
|
|
|
2012-10-03 20:48:13 +00:00
|
|
|
|
2012-10-03 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-rl78.c: Change line_separator to '@' so that '|' can
|
|
|
|
|
|
be used in expressions.
|
|
|
|
|
|
|
2012-10-01 06:46:16 +00:00
|
|
|
|
2012-10-01 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* write.c (chain_frchains_together_1): Reorder assertion to avoid
|
|
|
|
|
|
uninit warning.
|
|
|
|
|
|
|
2012-09-23 11:14:27 +00:00
|
|
|
|
2012-09-23 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.h (TC_FORCE_RELOCATION): Remove comment.
|
|
|
|
|
|
* config/tc-mips.c (calculate_reloc): New function.
|
|
|
|
|
|
(append_insn): Use it. Do not resolve compound relocations here.
|
|
|
|
|
|
(mips16_macro_build, mips16_ip): Use calculate_reloc.
|
|
|
|
|
|
(mips16_immed_extend): New function, split out from...
|
|
|
|
|
|
(mips16_immed): ...here.
|
|
|
|
|
|
(mips_frob_file): Handle null symbols.
|
|
|
|
|
|
(mips_force_relocation): Remove NEWABI handling.
|
|
|
|
|
|
(read_reloc_insn, write_reloc_insn): New functions.
|
|
|
|
|
|
(md_apply_fix): Report TLS relocations against constants.
|
|
|
|
|
|
Use read_reloc_insn, calculate_reloc and write_reloc_insn.
|
|
|
|
|
|
Report relocations against constants that can't be resolved
|
|
|
|
|
|
at assembly time.
|
|
|
|
|
|
|
2012-09-23 10:46:38 +00:00
|
|
|
|
2012-09-23 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (append_insn) <BFD_RELOC_MIPS_JMP>: Don't
|
|
|
|
|
|
mark as incomplete for constant expressions.
|
|
|
|
|
|
<BFD_RELOC_MIPS16_JMP>: Likewise.
|
|
|
|
|
|
|
2012-09-23 10:41:24 +00:00
|
|
|
|
2012-09-23 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.h (mips_record_label): Delete.
|
|
|
|
|
|
(mips_add_dot_label): Declare.
|
|
|
|
|
|
(tc_new_dot_label): Use it.
|
|
|
|
|
|
* config/tc-mips.c (mips_assembling_insn): New variable.
|
|
|
|
|
|
(md_assemble): Call mips_mark_labels. Set mips_assembling_insn
|
|
|
|
|
|
while the main part of the function is executing.
|
|
|
|
|
|
(mips_compressed_mark_label): New function, split out from...
|
|
|
|
|
|
(mips_compressed_mark_labels): ...here.
|
|
|
|
|
|
(append_insn): Don't call mips_mark_labels here.
|
|
|
|
|
|
(mips_record_label): Make local.
|
|
|
|
|
|
(mips_add_dot_label): New function.
|
|
|
|
|
|
|
2012-09-23 09:56:47 +00:00
|
|
|
|
2012-09-23 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (SEXT_16BIT): New macro.
|
|
|
|
|
|
(mips16_immed): Take the reloc type as a parameter. Do not impose
|
|
|
|
|
|
a signed vs. unsigned distinction on the value when a relocation
|
|
|
|
|
|
operator was used.
|
|
|
|
|
|
(mips16_macro_build, mips16_ip, md_convert_frag): Pass the reloc
|
|
|
|
|
|
type to mips16_immed.
|
|
|
|
|
|
(macro): Use SEXT_16BIT.
|
|
|
|
|
|
|
2012-09-23 09:31:14 +00:00
|
|
|
|
2012-09-23 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (read_insn, write_insn, read_compressed_insn):
|
|
|
|
|
|
New functions.
|
|
|
|
|
|
(install_insn, md_apply_fix, md_convert_frag, mips_handle_align):
|
|
|
|
|
|
Use them, and write_compressed_insn.
|
|
|
|
|
|
|
2012-09-23 09:23:24 +00:00
|
|
|
|
2012-09-23 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_cl_insn): Remove use_extend and extend.
|
|
|
|
|
|
(MIPS16_EXTEND): New macro.
|
|
|
|
|
|
(mips16_opcode_length): New function.
|
|
|
|
|
|
(insn_length): Use it.
|
|
|
|
|
|
(create_insn): Update after mips_cl_insn change.
|
|
|
|
|
|
(write_compressed_insn): New function.
|
|
|
|
|
|
(install_insn): Use it.
|
|
|
|
|
|
(append_insn): Use insn_length to check for unextended MIPS16
|
|
|
|
|
|
instructions.
|
|
|
|
|
|
(mips16_macro_build): Update call to mips16_immed.
|
|
|
|
|
|
(mips16_ip): Likewise. Use MIPS16_EXTEND to force an extended
|
|
|
|
|
|
instruction.
|
|
|
|
|
|
(mips16_immed): Remove use_extend and extend; install EXTEND
|
|
|
|
|
|
opcodes in the upper 16 bits of *INSN instead. Keep the
|
|
|
|
|
|
instruction extended if it already is. Replace warn, small
|
|
|
|
|
|
and ext with a forced_insn_length-like parameter.
|
|
|
|
|
|
(md_convert_frag): Update call mips16_immed.
|
|
|
|
|
|
Use write_compressed_insn.
|
|
|
|
|
|
|
2012-09-20 11:53:33 +00:00
|
|
|
|
2012-09-20 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add .cx16.
|
|
|
|
|
|
* doc/c-i386.texi: Document .cx16.
|
|
|
|
|
|
|
2012-09-19 20:14:26 +00:00
|
|
|
|
2012-09-19 Steve Ellcey <sellcey@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.tgt: Add mips*-mti-elf* target.
|
|
|
|
|
|
|
2012-09-18 14:52:43 +00:00
|
|
|
|
2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c: Changed ldra and strl-form mnemonics
|
|
|
|
|
|
to lda and stl-form for armv8.
|
|
|
|
|
|
|
2012-09-17 17:48:51 +00:00
|
|
|
|
2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-aarch64.c (aarch64_archs): Rename 'armv8' to 'armv8-a'.
|
|
|
|
|
|
|
2012-09-15 00:03:06 +00:00
|
|
|
|
2012-09-14 David Edelsohn <dje.gcc@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2012-09-13 22:24:51 +00:00
|
|
|
|
2012-09-13 Anthony Green <green@moxielogic.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-moxie.h (DEFAULT_TARGET_FORMAT): Define.
|
|
|
|
|
|
(TARGET_FORMAT): Don't hard-code endian-ness.
|
|
|
|
|
|
* config/tc-moxie.c (target_big_endian, moxie_target_format):
|
|
|
|
|
|
Define.
|
|
|
|
|
|
(md_assemble): Handle bi-endian encodings.
|
|
|
|
|
|
(md_shortopts, md_parse_option, md_show_usage, md_apply_fix)
|
|
|
|
|
|
(md_number_to_chars, md_chars_to_number): Update for bi-endian
|
|
|
|
|
|
support.
|
|
|
|
|
|
|
2012-09-12 16:25:51 +00:00
|
|
|
|
2012-09-12 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-aarch64.c
|
|
|
|
|
|
(reloc_table): Add reloc to table entry.
|
|
|
|
|
|
(parse_address_main): Add support for #:<reloc_op>:<symbol>.
|
|
|
|
|
|
(parse_operands): Check for unused reloc.
|
|
|
|
|
|
(md_apply_fix): New case for reloc.
|
|
|
|
|
|
(aarch64_force_relocation): Likewise.
|
2012-09-11 17:01:00 +00:00
|
|
|
|
|
|
|
|
|
|
2012-09-11 Georg-Johann Lay <avr@gjlay.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/13503
|
|
|
|
|
|
* config/tc-avr.h (TC_VALIDATE_FIX): Skip: BFD_RELOC_AVR_8_LO,
|
|
|
|
|
|
BFD_RELOC_AVR_8_HI, BFD_RELOC_AVR_8_HLO.
|
|
|
|
|
|
|
2012-09-11 00:39:02 +00:00
|
|
|
|
2012-09-11 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am (bootstrap): Add $EXEEXT to dependency.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2012-09-10 22:30:57 +00:00
|
|
|
|
2012-09-10 Matthias Klose <doko@ubuntu.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config.in: Disable sanity check for kfreebsd.
|
|
|
|
|
|
|
2012-09-10 17:00:44 +00:00
|
|
|
|
2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure: Regenerated.
|
|
|
|
|
|
|
2012-09-08 01:20:28 +00:00
|
|
|
|
2012-09-07 Anthony Green <green@moxielogic.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-moxie.c (md_pcrel_from): Branches are now relative
|
2012-09-10 17:00:44 +00:00
|
|
|
|
to the address following the branch instruction.
|
2012-09-08 01:20:28 +00:00
|
|
|
|
|
2012-09-06 08:23:25 +00:00
|
|
|
|
2012-09-06 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-s390.c (set_highgprs_p): New variable.
|
|
|
|
|
|
(s390_machinemode): New function.
|
|
|
|
|
|
(md_pseudo_table): Add new pseudo command machinemode.
|
|
|
|
|
|
(md_parse_option): Set set_highgprs_p to TRUE if -mzarch was
|
|
|
|
|
|
specified on command line.
|
|
|
|
|
|
(s390_elf_final_processing): Set the highgprs flag in the ELF
|
|
|
|
|
|
header depending on set_highgprs_p.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-s390.texi: Document new pseudo machinemode.
|
|
|
|
|
|
|
2012-09-05 18:01:00 +00:00
|
|
|
|
2012-09-05 James Lemke <jwlemke@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-ppc.texi: Document -mvle.
|
2012-09-05 18:19:55 +00:00
|
|
|
|
* doc/as.texinfo: Likewise.
|
2012-09-05 18:01:00 +00:00
|
|
|
|
|
2012-09-04 13:52:06 +00:00
|
|
|
|
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ia64.c (reg_symbol): Add a new register.
|
|
|
|
|
|
(indirect_reg): Ditto.
|
|
|
|
|
|
(pseudo_func): Add new symbolic constants.
|
|
|
|
|
|
(operand_match): Add new operand types recognition.
|
|
|
|
|
|
(operand_insn): Add new register recognition.
|
|
|
|
|
|
(md_begin): Add new register definition.
|
|
|
|
|
|
(specify_resource): Add new register recognition.
|
|
|
|
|
|
|
2012-09-01 18:10:50 +00:00
|
|
|
|
2012-09-01 Hans-Peter Nilsson <hp@bitrange.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/14521
|
|
|
|
|
|
* config/tc-mmix.h (tc_frob_file_before_fix): Renumber sections
|
|
|
|
|
|
after call to mmix_frob_file.
|
|
|
|
|
|
|
2012-08-31 19:15:59 +00:00
|
|
|
|
2012-08-31 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-mips.texi (MIPS Opts): Correct a typo in the -mips5
|
|
|
|
|
|
option.
|
|
|
|
|
|
|
Add support for constructing pc-relative addresses to the plt, by
adding the necessary assembly operators and relocations.
bfd:
* reloc.c (Add BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): new relocations.
* elfxx-tilegx.c (tilegx_elf_howto_table): Handle new relocations.
(tilegx_reloc_map): Ditto.
(reloc_to_create_func): Ditto.
(tilegx_elf_check_relocs): Ditto.
(tilegx_elf_gc_sweep_hook): Ditto.
(tilegx_elf_relocate_section): Ditto.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas:
* tc-tilegx.c (O_hw0_plt): Define operator.
(O_hw1_plt): Ditto.
(O_hw1_last_plt): Ditto.
(O_hw2_last_plt): Ditto.
(md_begin): Handle new operators.
(emit_tilegx_instruction): Ditto.
(md_apply_fix): Ditto.
* doc/c-tilegx.texi: Document new operators.
include/elf:
* tilegx.h (R_TILEGX_IMM16_X0_HW0_PLT_PCREL): New relocation.
(R_TILEGX_IMM16_X1_HW0_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW1_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW1_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW2_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW2_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW3_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW3_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL ): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): Ditto.
2012-08-28 02:43:22 +00:00
|
|
|
|
2012-08-27 Walter Lee <walt@tilera.com>
|
|
|
|
|
|
|
|
|
|
|
|
* tc-tilegx.c (O_hw0_plt): Define operator.
|
|
|
|
|
|
(O_hw1_plt): Ditto.
|
|
|
|
|
|
(O_hw1_last_plt): Ditto.
|
|
|
|
|
|
(O_hw2_last_plt): Ditto.
|
|
|
|
|
|
(md_begin): Handle new operators.
|
|
|
|
|
|
(emit_tilegx_instruction): Ditto.
|
|
|
|
|
|
(md_apply_fix): Ditto.
|
|
|
|
|
|
* doc/c-tilegx.texi: Document new operators.
|
|
|
|
|
|
|
2012-08-24 08:14:40 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (ARM_ENC_TAB): Add sha1h and sha2op entries.
|
|
|
|
|
|
(do_sha1h): New function.
|
|
|
|
|
|
(do_sha1su1): Likewise.
|
|
|
|
|
|
(do_sha256su0): Likewise.
|
|
|
|
|
|
(insns): Add 2 operand SHA instructions.
|
|
|
|
|
|
|
2012-08-24 08:14:04 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (NEON_ENC_TAB): Add sha3op entry.
|
|
|
|
|
|
(do_crypto_3op_1): New function.
|
|
|
|
|
|
(do_sha1c): Likewise.
|
|
|
|
|
|
(do_sha1p): Likewise.
|
|
|
|
|
|
(do_sha1m): Likewise.
|
|
|
|
|
|
(do_sha1su0): Likewise.
|
|
|
|
|
|
(do_sha256h): Likewise.
|
|
|
|
|
|
(do_sha256h2): Likewise.
|
|
|
|
|
|
(do_sha256su1): Likewise.
|
|
|
|
|
|
(insns): Add SHA 3 operand instructions.
|
|
|
|
|
|
|
2012-08-24 08:13:24 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (neon_type_mask): Add P64 type.
|
|
|
|
|
|
(type_chk_of_el_type): Handle P64 type.
|
|
|
|
|
|
(el_type_of_type_chk): Likewise.
|
|
|
|
|
|
(do_neon_vmull): Handle VMULL.P64.
|
|
|
|
|
|
|
2012-08-24 08:12:45 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (NEON_ENC_TAB): Add aes entry.
|
|
|
|
|
|
(neon_type_mask): Add N_UNT.
|
|
|
|
|
|
(neon_check_type): Don't always decay typed to untyped sizes.
|
|
|
|
|
|
(do_crypto_2op_1): New function.
|
|
|
|
|
|
(do_aese): Likewise.
|
|
|
|
|
|
(do_aesd): Likewise.
|
|
|
|
|
|
(do_aesmc.8): Likewise.
|
|
|
|
|
|
(do_aesimc.8): Likewise.
|
|
|
|
|
|
(insns): Add AES instructions.
|
|
|
|
|
|
|
2012-08-24 08:11:44 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (el_type_type_check): Add handling for 16-bit
|
|
|
|
|
|
floating point types.
|
|
|
|
|
|
(do_neon_cvttb_2): New function.
|
|
|
|
|
|
(do_neon_cvttb_1): Likewise.
|
|
|
|
|
|
(do_neon_cvtb): Refactor to use do_neon_cvttb_1.
|
|
|
|
|
|
(do_neon_cvtt): Likewise.
|
|
|
|
|
|
|
2012-08-24 08:11:13 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (NEON_ENC_TAB): Add vrint entries.
|
|
|
|
|
|
(neon_cvt_mode): Add neon_cvt_mode_r.
|
|
|
|
|
|
(do_vrint_1): New function.
|
|
|
|
|
|
(do_vrint_x): Likewise.
|
|
|
|
|
|
(do_vrint_z): Likewise.
|
|
|
|
|
|
(do_vrint_r): Likewise.
|
|
|
|
|
|
(do_vrint_a): Likewise.
|
|
|
|
|
|
(do_vrint_n): Likewise.
|
|
|
|
|
|
(do_vrint_p): Likewise.
|
|
|
|
|
|
(do_vrint_m): Likewise.
|
|
|
|
|
|
(insns): Add VRINT instructions.
|
|
|
|
|
|
|
2012-08-24 08:09:50 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (NEON_ENC_TAB): Add vcvta entry.
|
|
|
|
|
|
(neon_cvt_mode): New enumeration.
|
|
|
|
|
|
(do_vfp_nsyn_cvt_fpv8): New function.
|
|
|
|
|
|
(do_neon_cvt_1): Add support for new conversions.
|
|
|
|
|
|
(do_neon_cvtr): Use neon_cvt_mode enumerator.
|
|
|
|
|
|
(do_neon_cvt): Likewise.
|
|
|
|
|
|
(do_neon_cvta): New function.
|
|
|
|
|
|
(do_neon_cvtn): Likewise.
|
|
|
|
|
|
(do_neon_cvtp): Likewise.
|
|
|
|
|
|
(do_neon_cvtm): Likewise.
|
|
|
|
|
|
(insns): Add new VCVT instructions.
|
|
|
|
|
|
|
2012-08-24 08:09:01 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (CVT_FLAVOUR_VAR): New define.
|
|
|
|
|
|
(CVT_VAR): New helper define.
|
|
|
|
|
|
(neon_cvt_flavour): New enumeration, function renamed...
|
|
|
|
|
|
(get_neon_cvt_flavour): ...to this.
|
|
|
|
|
|
(do_vfp_nsyn_cvt): Update to use new neon_cvt_flavour.
|
|
|
|
|
|
(do_vfp_nsyn_cvtz): Likewise.
|
|
|
|
|
|
(do_neon_cvt_1): Likewise.
|
|
|
|
|
|
|
2012-08-24 08:07:36 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (NEON_ENC_TAB): Add vmaxnm, vminnm entries.
|
|
|
|
|
|
(vfp_or_neon_is_neon_bits): Add NEON_CHECK_ARCH8 enumerator.
|
|
|
|
|
|
(vfp_or_neon_is_neon): Add check for SIMD for ARMv8.
|
|
|
|
|
|
(do_maxnm): New function.
|
|
|
|
|
|
(insns): Add vmaxnm, vminnm entries.
|
|
|
|
|
|
|
2012-08-24 08:06:36 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (NEON_ENC_TAB): Add entries for VSEL.
|
|
|
|
|
|
(NEON_ENC_FPV8_): New define.
|
|
|
|
|
|
(do_vfp_nsyn_fpv8): New function.
|
|
|
|
|
|
(do_vsel): Likewise.
|
|
|
|
|
|
(insns): Add VSEL instructions.
|
|
|
|
|
|
|
2012-08-24 08:03:39 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_rm_rn): New function.
|
|
|
|
|
|
(do_strlex): Likewise.
|
|
|
|
|
|
(do_t_strlex): Likewise.
|
|
|
|
|
|
(insns): Add support for LDRA/STRL instructions.
|
|
|
|
|
|
|
2012-08-24 08:02:51 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_t_bkpt_hlt1): New function.
|
|
|
|
|
|
(do_t_hlt): New function.
|
|
|
|
|
|
(do_t_bkpt): Use do_t_bkpt_hlt1.
|
|
|
|
|
|
(insns): Add HLT.
|
|
|
|
|
|
|
2012-08-24 08:02:09 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (insns): Add DCPS instruction.
|
|
|
|
|
|
|
2012-08-24 08:01:18 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (T16_32_TAB): Add _sevl.
|
|
|
|
|
|
(insns): Add SEVL.
|
|
|
|
|
|
|
2012-08-24 08:00:20 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (asm_barrier_opt): Add arch field.
|
|
|
|
|
|
(mark_feature_used): New function.
|
|
|
|
|
|
(parse_barrier): Check specified option is valid for the
|
|
|
|
|
|
specified architecture.
|
|
|
|
|
|
(UL_BARRIER): New macro.
|
|
|
|
|
|
(barrier_opt_names): Update for new barrier options.
|
|
|
|
|
|
|
2012-08-24 07:58:02 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_setend): Warn on deprecated SETEND.
|
|
|
|
|
|
(do_t_setend): Likewise.
|
|
|
|
|
|
|
2012-08-24 07:57:19 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_t_it): Fully initialise now_it.
|
|
|
|
|
|
(new_automatic_it_block): Likewise.
|
|
|
|
|
|
(handle_it_block): Record whether current instruction is
|
|
|
|
|
|
conditionally executed.
|
|
|
|
|
|
* config/tc-arm.c (depr_insn_mask): New structure.
|
|
|
|
|
|
(depr_it_insns): New variable.
|
|
|
|
|
|
(it_fsm_post_encode): Warn on deprecated uses.
|
|
|
|
|
|
* config/tc-arm.h (current_it): Add new fields.
|
|
|
|
|
|
|
2012-08-24 07:54:45 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (deprecated_coproc_regs_s): New structure.
|
|
|
|
|
|
(deprecated_coproc_regs): New variable.
|
|
|
|
|
|
(deprecated_coproc_reg_count): Likewise.
|
|
|
|
|
|
(do_co_reg): Error on obsolete & warn on deprecated registers.
|
|
|
|
|
|
|
2012-08-24 07:52:49 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (check_obsolete): New function.
|
|
|
|
|
|
(do_rd_rm_rn): Check swp{b} for obsoletion.
|
|
|
|
|
|
|
2012-08-24 07:50:38 +00:00
|
|
|
|
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.h (arm_ext_v8): New variable.
|
|
|
|
|
|
(fpu_vfp_ext_armv8): Likewise.
|
|
|
|
|
|
(fpu_neon_ext_armv8): Likewise.
|
|
|
|
|
|
(fpu_crypto_ext_armv8): Likewise.
|
|
|
|
|
|
(arm_archs): Add armv8-a.
|
|
|
|
|
|
(arm_extensions): Add crypto, fp, and simd.
|
|
|
|
|
|
(arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8.
|
|
|
|
|
|
(cpu_arch_ver): Add support for ARMv8.
|
|
|
|
|
|
(aeabi_set_public_sttributes): Likewise.
|
|
|
|
|
|
* doc/c-arm.texi (ARM Options): Document new architecture and
|
|
|
|
|
|
extension options for ARMv8.
|
|
|
|
|
|
|
2012-08-20 13:57:05 +00:00
|
|
|
|
2012-08-20 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo: Replace --n32 with --x32.
|
|
|
|
|
|
|
2012-08-17 17:12:36 +00:00
|
|
|
|
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add CPU_BTVER1_FLAGS and
|
|
|
|
|
|
CPU_BTVER2_FLAGS.
|
|
|
|
|
|
(i386_align_code): Add case for PROCESSOR_BT.
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.h (enum processor_type): Add PROCESSOR_BT.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Add -march={btver1, btver2} options.
|
|
|
|
|
|
|
2012-08-14 17:01:46 +00:00
|
|
|
|
2012-08-14 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/14457
|
|
|
|
|
|
* config/tc-i386.c (i386_att_operand): Terminate register name
|
|
|
|
|
|
when reporting bad register.
|
|
|
|
|
|
|
2012-08-14 02:29:01 +00:00
|
|
|
|
2012-08-14 Hans-Peter Nilsson <hp@bitrange.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mmix.c (loc_asserts): New variable.
|
|
|
|
|
|
(mmix_greg_internal): Handle expressions not determinable at first
|
|
|
|
|
|
pass.
|
|
|
|
|
|
(s_loc): Ditto. Record expressions where the section isn't
|
|
|
|
|
|
determinable at the first pass, and assume they don't refer to
|
|
|
|
|
|
other sections.
|
|
|
|
|
|
(mmix_md_end): Verify that recorded LOC expressions weren't
|
|
|
|
|
|
to other sections, else emit error messages.
|
|
|
|
|
|
|
2012-08-13 14:52:54 +00:00
|
|
|
|
2012-08-13 Ian Bolton <ian.bolton@arm.com>
|
|
|
|
|
|
Laurent Desnogues <laurent.desnogues@arm.com>
|
|
|
|
|
|
Jim MacArthur <jim.macarthur@arm.com>
|
|
|
|
|
|
Marcus Shawcroft <marcus.shawcroft@arm.com>
|
|
|
|
|
|
Nigel Stephens <nigel.stephens@arm.com>
|
|
|
|
|
|
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
|
|
|
|
|
|
Richard Earnshaw <rearnsha@arm.com>
|
|
|
|
|
|
Sofiane Naci <sofiane.naci@arm.com>
|
|
|
|
|
|
Tejas Belagod <tejas.belagod@arm.com>
|
|
|
|
|
|
Yufeng Zhang <yufeng.zhang@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Add AArch64.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* config/tc-aarch64.c: New file.
|
|
|
|
|
|
* config/tc-aarch64.h: New file.
|
|
|
|
|
|
* configure.tgt: Add AArch64.
|
|
|
|
|
|
* doc/Makefile.am: Add AArch64.
|
|
|
|
|
|
* doc/Makefile.in: Regenerate.
|
|
|
|
|
|
* doc/all.texi: Add AArch64.
|
|
|
|
|
|
* doc/as.texinfo: Add AArch64.
|
|
|
|
|
|
* doc/c-aarch64.texi: New file.
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
* NEWS: Mention the new support.
|
|
|
|
|
|
|
2012-08-13 14:26:14 +00:00
|
|
|
|
2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (NO_ISA_COP, COP_INSN): Remove macros.
|
|
|
|
|
|
(is_opcode_valid): Remove coprocessor instruction exclusions.
|
|
|
|
|
|
Replace OPCODE_IS_MEMBER with opcode_is_member.
|
|
|
|
|
|
(is_opcode_valid_16): Replace OPCODE_IS_MEMBER with
|
|
|
|
|
|
opcode_is_member.
|
|
|
|
|
|
(macro): Remove coprocessor instruction exclusions.
|
|
|
|
|
|
|
2012-08-13 14:09:44 +00:00
|
|
|
|
2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (s_cpload, s_cpsetup): Fail if MIPS16 mode.
|
|
|
|
|
|
(s_cplocal, s_cprestore, s_cpreturn): Likewise.
|
|
|
|
|
|
|
2012-08-07 16:57:49 +00:00
|
|
|
|
2012-08-07 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386-intel.c (build_modrm_byte): Split determining
|
|
|
|
|
|
default segment from figuring out encoding. Honor RegRex for
|
|
|
|
|
|
the former.
|
|
|
|
|
|
|
The VGATHER group of instructions requires that all three involved
xmm/ymm registers are distinct. This patch adds code to check for this,
and at once eliminates a superfluous check for not using PC-relative
addressing for these instructions (the fact that an index register is
required here already excludes valid PC-relative addresses). The
severity of the resulting diagnostics can be controlled via command
line option or directive.
gas/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (set_check): Renamed from set_sse_check.
Generalize to also handle operand checking option.
(enum i386_error): New enumerator 'invalid_vector_register_set'.
(match_template): Handle it.
(enum check_kind): Give it a tag. Drop sse_ prefixes from
enumerators.
(operand_check): New.
(md_pseudo_table): Add "operand_check".
(check_VecOperands): Don't special case RIP addressing. Check
that vSIB operands use distinct vector registers unless no
checking was requested.
(OPTION_MOPERAND_CHECK): New.
(md_parse_option): Handle it.
(OPTION_MAVXSCALAR, OPTION_X32): Adjust.
(md_longopts): Add "moperand-check".
(md_show_usage): Add help text for it.
gas/testsuite/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* gas/i386/vgather-check-error.{s,l}: New.
* gas/i386/vgather-check-none.{s,d}: New.
* gas/i386/vgather-check-warn.{d,e}: New.
* gas/i386/vgather-check.{s,d}: New.
* gas/i386/x86-64-vgather-check-error.{s,l}: New.
* gas/i386/x86-64-vgather-check-none.{s,d}: New.
* gas/i386/x86-64-vgather-check-warn.{d,e}: New.
* gas/i386/x86-64-vgather-check.{s,d}: New.
* gas/i386/i386.exp: Run new tests.
2012-08-07 16:55:00 +00:00
|
|
|
|
2012-08-07 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (set_check): Renamed from set_sse_check.
|
|
|
|
|
|
Generalize to also handle operand checking option.
|
|
|
|
|
|
(enum i386_error): New enumerator 'invalid_vector_register_set'.
|
|
|
|
|
|
(match_template): Handle it.
|
|
|
|
|
|
(enum check_kind): Give it a tag. Drop sse_ prefixes from
|
|
|
|
|
|
enumerators.
|
|
|
|
|
|
(operand_check): New.
|
|
|
|
|
|
(md_pseudo_table): Add "operand_check".
|
|
|
|
|
|
(check_VecOperands): Don't special case RIP addressing. Check
|
|
|
|
|
|
that vSIB operands use distinct vector registers unless no
|
|
|
|
|
|
checking was requested.
|
|
|
|
|
|
(OPTION_MOPERAND_CHECK): New.
|
|
|
|
|
|
(md_parse_option): Handle it.
|
|
|
|
|
|
(OPTION_MAVXSCALAR, OPTION_X32): Adjust.
|
|
|
|
|
|
(md_longopts): Add "moperand-check".
|
|
|
|
|
|
(md_show_usage): Add help text for it.
|
|
|
|
|
|
|
2012-08-07 16:51:34 +00:00
|
|
|
|
2012-08-07 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (register_number): New function.
|
|
|
|
|
|
(build_vex_prefix, process_immext, process_operands,
|
|
|
|
|
|
build_modrm_byte, i386_index_check): Use it.
|
|
|
|
|
|
|
2012-08-07 13:47:19 +00:00
|
|
|
|
2012-08-07 Daniel Green <venix1@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (lex_got): Provide implementation for PE
|
|
|
|
|
|
format.
|
|
|
|
|
|
|
2012-08-06 20:33:00 +00:00
|
|
|
|
2012-08-06 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (append_insn): Also handle moving delay-slot
|
|
|
|
|
|
instruction across frags for fixed branches.
|
|
|
|
|
|
|
2012-08-03 22:23:44 +00:00
|
|
|
|
2012-08-03 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frags.c (frag_grow): Never shrink the obstack size requested
|
|
|
|
|
|
below the default.
|
|
|
|
|
|
|
2012-08-02 20:26:52 +00:00
|
|
|
|
2012-08-02 Sean Keys <skeys@ipdatasys.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-m68hc11.c (s_m68hc11_parse_pseudo_instruction):
|
|
|
|
|
|
New function to parse pseudo ops that are unreleated to
|
|
|
|
|
|
existing pseudo ops.
|
|
|
|
|
|
|
2012-08-01 19:59:43 +00:00
|
|
|
|
2012-08-01 Catherine Moore <clm@codesourcery.com>
|
|
|
|
|
|
Sandra Loosemore <sandra@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/mips/tc-mips.c (mips_cpu_info): Add the 34kn.
|
|
|
|
|
|
* doc/c-mips.texi (MIPS Opts): Document it.
|
|
|
|
|
|
|
2012-08-01 13:46:59 +00:00
|
|
|
|
2012-08-01 James Lemke <jwlemke@codesourcery.com>
|
|
|
|
|
|
|
2012-08-01 15:59:55 +00:00
|
|
|
|
* dwarf2dbg.c (out_set_addr): Allow for non-constant value of
|
2012-08-01 13:46:59 +00:00
|
|
|
|
DWARF2_LINE_MIN_INSN_LENGTH
|
2012-08-01 15:59:55 +00:00
|
|
|
|
* config/tc-ppc.c (ppc_dwarf2_line_min_insn_length): Declare
|
2012-08-01 13:46:59 +00:00
|
|
|
|
and initialize.
|
|
|
|
|
|
(md_apply_fix): Branch addr can be a multiple of 2 or 4.
|
2012-08-01 15:59:55 +00:00
|
|
|
|
* config/tc-ppc.h (DWARF2_LINE_MIN_INSN_LENGTH): Now a
|
2012-08-01 13:46:59 +00:00
|
|
|
|
variable reference.
|
|
|
|
|
|
|
include/opcode/
* mips.h: Document microMIPS DSP ASE usage.
(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for
microMIPS DSP ASE support.
(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
gas/
* config/tc-mips.c (macro_build) <'2'>: Handle microMIPS.
(macro) <M_BALIGN>: Update error handling.
(validate_micromips_insn) <'2', '3', '4', '5', '6'>: New cases.
<'7', '8', '0', '@', '^'>: Likewise.
(mips_ip) <'2', '3', '4', '5', '6', '7', '8'>: Handle microMIPS.
<'9'>: Fix formatting.
<'0', '@'>: Handle microMIPS.
<'^'>: New case.
gas/testsuite/
* gas/mips/micromips@mips32-dsp.d: New.
* gas/mips/micromips@mips32-dspr2.d: New.
* gas/mips/mips32-dsp.d: Remove -mips32r2.
* gas/mips/mips32-dspr2.d: Likewise.
* gas/mips/mips.exp: (mips_create_arch): Use -mips64r2
for micromips. Use run_dump_test_arches to run dsp tests.
opcodes/
* micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
(DSP_VOLA): Likewise.
(D32, D33): Likewise.
(micromips_opcodes): Add DSP ASE instructions.
* micromips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
<'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
2012-07-31 21:38:54 +00:00
|
|
|
|
2012-07-31 Maciej W. Rozycki <macro@codesourcery.com>
|
2012-08-01 15:59:55 +00:00
|
|
|
|
Chao-Ying Fu <fu@mips.com>
|
|
|
|
|
|
Catherine Moore <clm@codesourcery.com>
|
include/opcode/
* mips.h: Document microMIPS DSP ASE usage.
(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for
microMIPS DSP ASE support.
(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
gas/
* config/tc-mips.c (macro_build) <'2'>: Handle microMIPS.
(macro) <M_BALIGN>: Update error handling.
(validate_micromips_insn) <'2', '3', '4', '5', '6'>: New cases.
<'7', '8', '0', '@', '^'>: Likewise.
(mips_ip) <'2', '3', '4', '5', '6', '7', '8'>: Handle microMIPS.
<'9'>: Fix formatting.
<'0', '@'>: Handle microMIPS.
<'^'>: New case.
gas/testsuite/
* gas/mips/micromips@mips32-dsp.d: New.
* gas/mips/micromips@mips32-dspr2.d: New.
* gas/mips/mips32-dsp.d: Remove -mips32r2.
* gas/mips/mips32-dspr2.d: Likewise.
* gas/mips/mips.exp: (mips_create_arch): Use -mips64r2
for micromips. Use run_dump_test_arches to run dsp tests.
opcodes/
* micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
(DSP_VOLA): Likewise.
(D32, D33): Likewise.
(micromips_opcodes): Add DSP ASE instructions.
* micromips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
<'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
2012-07-31 21:38:54 +00:00
|
|
|
|
|
2012-08-01 03:05:50 +00:00
|
|
|
|
* config/tc-mips.c (ISA_SUPPORTS_DSP_ASE): Also set if microMIPS
|
|
|
|
|
|
mode.
|
|
|
|
|
|
(ISA_SUPPORTS_DSPR2_ASE): Likewise.
|
|
|
|
|
|
(macro_build) <'2'>: Handle microMIPS.
|
include/opcode/
* mips.h: Document microMIPS DSP ASE usage.
(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for
microMIPS DSP ASE support.
(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
gas/
* config/tc-mips.c (macro_build) <'2'>: Handle microMIPS.
(macro) <M_BALIGN>: Update error handling.
(validate_micromips_insn) <'2', '3', '4', '5', '6'>: New cases.
<'7', '8', '0', '@', '^'>: Likewise.
(mips_ip) <'2', '3', '4', '5', '6', '7', '8'>: Handle microMIPS.
<'9'>: Fix formatting.
<'0', '@'>: Handle microMIPS.
<'^'>: New case.
gas/testsuite/
* gas/mips/micromips@mips32-dsp.d: New.
* gas/mips/micromips@mips32-dspr2.d: New.
* gas/mips/mips32-dsp.d: Remove -mips32r2.
* gas/mips/mips32-dspr2.d: Likewise.
* gas/mips/mips.exp: (mips_create_arch): Use -mips64r2
for micromips. Use run_dump_test_arches to run dsp tests.
opcodes/
* micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
(DSP_VOLA): Likewise.
(D32, D33): Likewise.
(micromips_opcodes): Add DSP ASE instructions.
* micromips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
<'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
2012-07-31 21:38:54 +00:00
|
|
|
|
(macro) <M_BALIGN>: Update error handling.
|
|
|
|
|
|
(validate_micromips_insn) <'2', '3', '4', '5', '6'>: New cases.
|
|
|
|
|
|
<'7', '8', '0', '@', '^'>: Likewise.
|
|
|
|
|
|
(mips_ip) <'2', '3', '4', '5', '6', '7', '8'>: Handle microMIPS.
|
|
|
|
|
|
<'9'>: Fix formatting.
|
|
|
|
|
|
<'0', '@'>: Handle microMIPS.
|
|
|
|
|
|
<'^'>: New case.
|
|
|
|
|
|
|
2012-07-31 07:45:48 +00:00
|
|
|
|
2012-07-31 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_template): Adjust error message
|
|
|
|
|
|
for 'bad_imm4' case.
|
|
|
|
|
|
|
2012-07-31 07:43:38 +00:00
|
|
|
|
2012-07-31 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (check_byte_reg): Check for I/O port
|
|
|
|
|
|
register earlier, and just once. Drop diagnostic that got
|
|
|
|
|
|
issued only for some registers.
|
|
|
|
|
|
|
2012-07-31 07:41:39 +00:00
|
|
|
|
2012-07-31 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_template): New local variable
|
|
|
|
|
|
'specific_error'. Set it from i.error after failed
|
|
|
|
|
|
check_VecOperands or VEX_check_operands. Use it if set in
|
|
|
|
|
|
preference to i.error when actually issuing disagnostic.
|
|
|
|
|
|
|
2012-07-30 08:43:46 +00:00
|
|
|
|
2012-07-30 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/gas.pot: Updated template.
|
|
|
|
|
|
* po/es.po: Updated Spanish translation.
|
|
|
|
|
|
* po/fi.po: Updated Finnish translation.
|
|
|
|
|
|
* po/fr.po: Updated French translation.
|
|
|
|
|
|
|
2012-07-27 16:30:57 +00:00
|
|
|
|
2012-07-27 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.in (BFD_VERSION): Run bfd/configure --version and
|
|
|
|
|
|
parse the output of that.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2012-07-27 08:13:03 +00:00
|
|
|
|
2012-07-27 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* NEWS: Add marker for 2.23.
|
|
|
|
|
|
|
2012-07-30 16:49:05 +00:00
|
|
|
|
2012-07-27 James Murray <jsm@jsm-net.demon.co.uk>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-m68hc11.c: Replace binary with hex for cygwin.
|
|
|
|
|
|
|
2012-07-27 03:32:21 +00:00
|
|
|
|
2012-07-26 Segher Boessenkool <segher@kernel.crashing.org>
|
|
|
|
|
|
|
|
|
|
|
|
* listing.c (struct list_message): New.
|
|
|
|
|
|
(struct list_info_struct): Delete "message". Add "messages"
|
|
|
|
|
|
and "last_message".
|
|
|
|
|
|
(listing_message): Adjust.
|
|
|
|
|
|
(listing_newline): Adjust.
|
|
|
|
|
|
(print_lines): Adjust.
|
|
|
|
|
|
|
2012-07-25 11:34:49 +00:00
|
|
|
|
2012-07-24 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386-intel.c (i386_intel_simplify_register): Handle
|
|
|
|
|
|
xmm/ymm index register being specified first as well as esp/rsp
|
|
|
|
|
|
base register being specified last in a memory operand.
|
|
|
|
|
|
|
2012-07-25 11:33:23 +00:00
|
|
|
|
2012-07-24 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386-intel.c (i386_intel_simplify_register):
|
|
|
|
|
|
Replace literal 4 by corresponding ESP_REG_NUM.
|
|
|
|
|
|
|
2012-07-24 16:38:35 +00:00
|
|
|
|
2012-07-24 Sandra Loosemore <sandra@codesourcery.com>
|
|
|
|
|
|
Jie Zhang <jzhang918@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (md_apply_fix): Use encoding A2 of ADR
|
|
|
|
|
|
if offset is negative.
|
|
|
|
|
|
|
Implement RDRSEED, ADX and PRFCHW instructions
gas/
* config/tc-i386.c: Add ADX, RDSEED and PRFCHW asm directives.
* doc/c-i386.texi: Document the new directives.
gas/testsuite/
* gas/i386/i386.exp: Run adx, rdseed and prefetchw tests.
* gas/i386/x86-64-arch-2.s: Use prefetchw as 3dnow and Prfchw tests.
* gas/i386/arch-10.s: Likewise.
* gas/i386/arch-10-1.l: Changed correspondingly.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-lzcnt.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
* gas/i386/arch-10-prefetchw.d: New file.
* gas/i386/x86-64-arch-2-prefetchw.d: Likewise.
* gas/i386/rdseed.s: Likewise.
* gas/i386/rdseed.d: Likewise.
* gas/i386/rdseed-intel.d: Likewise.
* gas/i386/adx.s: Likewise.
* gas/i386/adx.d: Likewise.
* gas/i386/adx-intel.d: Likewise.
* gas/i386/x86-64-rdseed.s: Likewise.
* gas/i386/x86-64-rdseed.d: Likewise.
* gas/i386/x86-64-rdseed-intel.d: Likewise.
* gas/i386/x86-64-adx.s: Likewise.
* gas/i386/x86-64-adx.d: Likewise.
* gas/i386/x86-64-adx-intel.d: Likewise.
opcodes/
* i386-dis.c (PREFIX_0F38F6): New.
(prefix_table): Add adcx, adox instructions.
(three_byte_table): Use PREFIX_0F38F6.
(mod_table): Add rdseed instruction.
* i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
(cpu_flags): Likewise.
* i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
(i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
* i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
prefetchw.
* i386-tbl.h: Regenerate.
* i386-init.h: Likewise.
2012-07-16 12:58:29 +00:00
|
|
|
|
2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c: Add ADX, RDSEED and PRFCHW asm directives.
|
|
|
|
|
|
* doc/c-i386.texi: Document the new directives.
|
|
|
|
|
|
|
2012-07-30 21:29:59 +00:00
|
|
|
|
2012-07-05 Sean Keys <skeys@ipdatasys.com>
|
2012-08-01 15:59:55 +00:00
|
|
|
|
|
|
|
|
|
|
* config/tc-xgate.c: Revised assembler so that operands
|
|
|
|
|
|
are collected before the addressing mode is determined.
|
2012-07-30 21:29:59 +00:00
|
|
|
|
|
2012-07-02 07:35:06 +00:00
|
|
|
|
2012-07-02 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* write.c (fixup_segment): Only perform the subtraction of an
|
|
|
|
|
|
fx_subsy symbol if MD_APPLY_SYM_VALUE allows it and the symbol is
|
|
|
|
|
|
properly defined.
|
|
|
|
|
|
* config/tc-msp430.h (MD_APPLY_SYM_VALUE): Define.
|
|
|
|
|
|
|
2012-06-30 06:32:29 +00:00
|
|
|
|
2012-06-30 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/14315
|
|
|
|
|
|
* config/obj-elf.c (obj_elf_weak): Don't set local.
|
|
|
|
|
|
|
2012-06-30 00:27:31 +00:00
|
|
|
|
2012-06-30 Johan Olmutz Nielsen <jnielsen@ddci.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frags.h (frag_offset_fixed_p): Update prototype.
|
|
|
|
|
|
* frags.c (frag_offset_fixed_p): Change type of "offset" to offsetT.
|
|
|
|
|
|
* expr.c (expr, resolve_expression): Likewise for frag_off var.
|
|
|
|
|
|
|
2012-06-29 15:15:48 +00:00
|
|
|
|
2012-06-29 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/14263
|
|
|
|
|
|
* config/tc-arm.c (parse_operands): Initialise val.
|
|
|
|
|
|
|
2012-06-28 15:38:15 +00:00
|
|
|
|
2012-06-28 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/14260
|
|
|
|
|
|
* config/tc-arm.c (encode_arm_addr_mode_common): Generate an error
|
|
|
|
|
|
message if literal pool addressing is used.
|
|
|
|
|
|
|
2012-06-28 11:31:14 +00:00
|
|
|
|
2012-06-28 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): Enable when using
|
|
|
|
|
|
linker relaxation.
|
|
|
|
|
|
(dwarf2_gen_line_info): Generate real, local, labels for line
|
|
|
|
|
|
numbers.
|
|
|
|
|
|
(dwarf2dbg_convert_frag): Do not finalize the computation of the
|
|
|
|
|
|
frag's symbol value when linker relaxation is enabled.
|
|
|
|
|
|
(ADDR_DELTA_LIMIT): Define.
|
|
|
|
|
|
(size_fixed_inc_line_addr): Use ADDR_DELTA_LIMIT.
|
|
|
|
|
|
(emit_fixed_inc_line_addr): Likewise.
|
|
|
|
|
|
* write.c (fixup_segment): If the subtraction of two symbols
|
|
|
|
|
|
cannot be resolved but is valid, then prevent bogus range warnings
|
|
|
|
|
|
by pre-biasing add_number.
|
|
|
|
|
|
* config/tc-h8300.h (DWARF2_USE_FIXED_ADVANCE_PC): Define to 0.
|
|
|
|
|
|
|
2012-07-30 21:29:59 +00:00
|
|
|
|
2012-06-28 Sean Keys <skeys@ipdatasys.com>
|
|
|
|
|
|
|
2012-08-01 15:59:55 +00:00
|
|
|
|
* config/tc-xgate.h: Defined tc_frob_symbol.
|
|
|
|
|
|
* config/tc-xgate.c (xgate_frob_symbol): Wrote new function to mark
|
|
|
|
|
|
symbols as being XGATE by setting st_target_internal value.
|
2012-07-30 21:29:59 +00:00
|
|
|
|
|
2012-06-22 16:42:08 +00:00
|
|
|
|
2012-06-22 Roland McGrath <mcgrathr@google.com>
|
|
|
|
|
|
|
2012-06-22 21:54:06 +00:00
|
|
|
|
* NEWS: Mention 'rep ret' too.
|
|
|
|
|
|
|
2012-06-22 16:42:08 +00:00
|
|
|
|
* config/tc-i386.c (parse_insn): Don't complain about REP prefix
|
|
|
|
|
|
when the template has opcode_modifier.repprefixok set.
|
|
|
|
|
|
* NEWS: Mention the change.
|
|
|
|
|
|
|
2012-06-18 04:23:15 +00:00
|
|
|
|
2012-06-18 Iain Sandoe <iain@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.in: Check DECLS for free, getenv, malloc, realloc,
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* config.in: Likewise.
|
|
|
|
|
|
|
2012-06-13 21:41:07 +00:00
|
|
|
|
2012-06-13 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (x86_address_bytes): New.
|
|
|
|
|
|
* config/tc-i386.h (TC_ADDRESS_BYTES): Likewise.
|
|
|
|
|
|
(x86_address_bytes): Likewise.
|
|
|
|
|
|
|
2012-06-13 14:19:00 +00:00
|
|
|
|
2012-06-13 Zhenqiang Chen <zhenqiang.chen@linaro.org>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/12698
|
|
|
|
|
|
* config/tc-arm.c (do_t_mrs): Do not require an m-profile
|
|
|
|
|
|
architecure when assembling for all archiectures.
|
|
|
|
|
|
(do_t_msr): Likewise.
|
|
|
|
|
|
|
2012-06-11 14:26:41 +00:00
|
|
|
|
2012-06-11 Georg-Johann Lay <avr@gjlay.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR 13503
|
|
|
|
|
|
* config/tc-avr.c (exp_mod): Fix typo introduced in 1.82
|
|
|
|
|
|
from 2012-05-16.
|
|
|
|
|
|
|
2012-06-09 13:22:00 +00:00
|
|
|
|
2012-06-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* input-scrub.c (input_scrub_include_sb): Use sb_build to
|
|
|
|
|
|
allocate sufficient space for from_sb. Use sb_terminate to
|
|
|
|
|
|
terminate string.
|
|
|
|
|
|
* read.c (read_a_source_file): Use sb_build to allocate
|
|
|
|
|
|
sufficient space and replace sb_add_string with sb_add_buffer.
|
|
|
|
|
|
(s_macro): Likewise.
|
|
|
|
|
|
(input_scrub_insert_line): Likewise.
|
|
|
|
|
|
(s_irp): Use sb_build to allocate sufficient space.
|
|
|
|
|
|
(do_repeat): Use sb_build to allocate sufficient space
|
|
|
|
|
|
for many.
|
|
|
|
|
|
* sb.c (sb_build): Remove static.
|
|
|
|
|
|
* sb.h (sb_build): New prototype.
|
|
|
|
|
|
|
2012-06-09 08:32:43 +00:00
|
|
|
|
2012-06-09 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* sb.c: Include limits.h.
|
|
|
|
|
|
(dsize): Delete.
|
|
|
|
|
|
(MALLOC_OVERHEAD, INIT_ALLOC): Define.
|
|
|
|
|
|
(sb_new): Use INIT_ALLOC.
|
|
|
|
|
|
(sb_check): Modify allocation strategy using MALLOC_OVERHEAD.
|
|
|
|
|
|
(sb_terminate): Don't use sb_add_char.
|
|
|
|
|
|
|
PR gas/14201
* sb.h (sb_max_power_two): Delete.
(struct sb): Delete "item" and "pot". Make "len" a size_t. Add "max".
(sb_element): Delete.
(sb_add_char, sb_add_buffer, sb_skip_comma, sb_skip_write): Update
prototypes.
* sb.c (string_count, free_list): Delete.
(sb_build, sb_kill, sb_check): Rewrite.
(scrub_from_sb, sb_add_char, sb_add_string, sb_add_buffer,
sb_skip_white, sb_skip_comma): Replace assorted int params,
vars and return types with size_t.
* input-scrub.c: Likewise.
* macro.c: Likewise.
* macro.h: Likewise.
* as.c: Likewise.
* as.h: Likewise.
* input-file.h: Likewise.
* input-file.c: Likewise.
* read.c: Likewise.
* app.c: ..or ptrdiff_t.
* input-file.c (input_file_get): Use ferror.
(input_file_give_next_buffer): Use input_file_get.
2012-06-07 12:47:23 +00:00
|
|
|
|
2012-06-07 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/14201
|
|
|
|
|
|
* sb.h (sb_max_power_two): Delete.
|
|
|
|
|
|
(struct sb): Delete "item" and "pot". Make "len" a size_t. Add "max".
|
|
|
|
|
|
(sb_element): Delete.
|
|
|
|
|
|
(sb_add_char, sb_add_buffer, sb_skip_comma, sb_skip_write): Update
|
|
|
|
|
|
prototypes.
|
|
|
|
|
|
* sb.c (string_count, free_list): Delete.
|
|
|
|
|
|
(sb_build, sb_kill, sb_check): Rewrite.
|
|
|
|
|
|
(scrub_from_sb, sb_add_char, sb_add_string, sb_add_buffer,
|
|
|
|
|
|
sb_skip_white, sb_skip_comma): Replace assorted int params,
|
|
|
|
|
|
vars and return types with size_t.
|
|
|
|
|
|
* input-scrub.c: Likewise.
|
|
|
|
|
|
* macro.c: Likewise.
|
|
|
|
|
|
* macro.h: Likewise.
|
|
|
|
|
|
* as.c: Likewise.
|
|
|
|
|
|
* as.h: Likewise.
|
|
|
|
|
|
* input-file.h: Likewise.
|
|
|
|
|
|
* input-file.c: Likewise.
|
|
|
|
|
|
* read.c: Likewise.
|
|
|
|
|
|
* app.c: ..or ptrdiff_t.
|
|
|
|
|
|
* input-file.c (input_file_get): Use ferror.
|
|
|
|
|
|
(input_file_give_next_buffer): Use input_file_get.
|
|
|
|
|
|
|
2012-07-30 21:29:59 +00:00
|
|
|
|
2012-05-31 Sean Keys <skeys@ipdatasys.com>
|
|
|
|
|
|
|
2012-08-01 15:59:55 +00:00
|
|
|
|
* config/tc-xgate.c (md_begin): Refactored code.
|
2012-07-30 21:29:59 +00:00
|
|
|
|
|
2012-05-29 16:32:11 +00:00
|
|
|
|
2012-05-29 Roland McGrath <mcgrathr@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
* read.c [HANDLE_BUNDLE] (bundle_lock_depth): New variable.
|
|
|
|
|
|
(read_a_source_file) [HANDLE_BUNDLE]: Reset it.
|
|
|
|
|
|
[HANDLE_BUNDLE] (s_bundle_lock, s_bundle_unlock): Allow nested
|
|
|
|
|
|
pairs.
|
|
|
|
|
|
|
2012-05-28 14:20:19 +00:00
|
|
|
|
2012-05-28 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* read.c (read_symbol_name): New function. Reads a symbol names.
|
|
|
|
|
|
Allows escape codes in names.
|
|
|
|
|
|
(s_comm_internal): Use read_symbol_name.
|
|
|
|
|
|
(s_globl, s_lsym, s_set, s_weakref): Likewise.
|
|
|
|
|
|
* doc/as.texinfo: Document support for multibyte characters in
|
|
|
|
|
|
symbol names.
|
|
|
|
|
|
|
2012-05-22 01:55:16 +00:00
|
|
|
|
2012-05-21 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_after_parse_args): Assert that arch_info
|
|
|
|
|
|
is non-NULL.
|
|
|
|
|
|
|
2012-05-19 10:36:32 +00:00
|
|
|
|
2012-05-19 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-elf.c (obj_elf_section): Cater for TC_KEEP_OPERAND_SPACES
|
|
|
|
|
|
targets when checking for "comdat".
|
|
|
|
|
|
|
2012-05-18 23:21:49 +00:00
|
|
|
|
2012-05-19 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-dlx.c (s_proc): Don't use asprintf.
|
|
|
|
|
|
|
2012-05-18 05:48:50 +00:00
|
|
|
|
2012-05-18 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-dlx.c (s_proc): Avoid warning about ignoring asprintf
|
|
|
|
|
|
return value.
|
|
|
|
|
|
|
2012-05-18 05:42:24 +00:00
|
|
|
|
2012-05-18 James Lemke <jwlemke@codesourcery.com>
|
|
|
|
|
|
Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c: Don't capitalise error and warning messages.
|
|
|
|
|
|
(md_parse_option): Add checks for -a32 -mvle.
|
|
|
|
|
|
|
2012-05-18 05:32:03 +00:00
|
|
|
|
2012-05-18 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-evax.c: Include as.h first.
|
|
|
|
|
|
|
2012-05-17 22:23:42 +00:00
|
|
|
|
2012-05-18 Andreas Schwab <schwab@linux-m68k.org>
|
|
|
|
|
|
|
|
|
|
|
|
* aclocal.m4: Regenerate.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2012-05-17 15:13:28 +00:00
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2012-05-17 Daniel Richard G. <skunk@iskunk.org>
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Nick Clifton <nickc@redhat.com>
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PR 14072
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* configure.in: Add check that sysdep.h has been included before
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any system header files.
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* configure: Regenerate.
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* config.in: Regenerate.
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* aclocal.m4: Regenerate.
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* Makefile.am: Use wrappers around C files generated by flex.
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* Makefile.in: Regenerate.
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* doc/Makefile.in: Regenerate.
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* itbl-lex-wrapper.c: New file.
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* config/bfin-lex-wrapper.c: New file.
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* cgen.c: Include as.h before setjmp.h.
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* config/tc-dlx.c: Include as.h before any other header.
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* config/tc-h8300.c: Likewise.
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* config/tc-lm32.c: Likewise.
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* config/tc-mep.c: Likewise.
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* config/tc-microblaze.c: Likewise.
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* config/tc-mmix.c: Likewise.
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* config/tc-msp430.c: Likewise.
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* config/tc-or32.c: Likewise.
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* config/tc-tic4x.c: Likewise.
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* config/tc-tic54x.c: Likewise.
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* config/tc-xtensa.c: Likewise.
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2012-05-16 16:38:29 +00:00
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2012-05-16 Sergio Durigan Junior <sergiodj@redhat.com>
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* config/tc-alpha.c (maybe_set_gp): Pass proper `bfd'
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as the first argument for `bfd_get_section_vma'.
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2012-05-16 15:25:30 +00:00
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2012-05-16 Alberto Garcia <agarcia@igalia.com>
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PR gas/14082
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* app.c (do_scrub_chars): Prevent possible out of bounds access to
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lex[] array.
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2012-05-16 14:52:16 +00:00
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2012-05-16 Georg-Johann Lay <avr@gjlay.de>
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PR target/13503
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* config/tc-avr.c (avr_cons_fix_new): Rename R_AVR_8_HHI8 to
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R_AVR_8_HLO8.
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(exp_mod_data) Ditto. And replace "hhi8" with "hlo8".
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(md_apply_fix): Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO.
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2012-05-16 10:26:47 +00:00
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2012-05-16 Nathan Sidwell <nathan@codesourcery.com>
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Kwok Cheung Yeung <kcy@codesourcery.com>
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* config/tc-m68k.c (m68k_cpus): Add 51ag, 51je, 51jf, 51jg, 51mm,
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51qm variants.
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2012-05-15 12:55:51 +00:00
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2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
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* config/tc-m68hc11.c: Add S12X and XGATE co-processor support.
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Add option to offset S12 addresses into XGATE memory space.
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Tweak target flags to match other tools. (i.e. -m m68hc11).
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* doc/as.texinfo: Mention new options.
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* doc/c-m68hc11.texi: Document new options.
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* NEWS: Mention new support.
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2012-05-15 03:04:47 +00:00
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2012-05-14 DJ Delorie <dj@redhat.com>
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2012-05-15 03:23:37 +00:00
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* config/rx-parse.y (rx_range): declare.
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(O1,O2,O3,O4): Add calls to rx_range.
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(UO1,UO2,UO3): Likewise.
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(IMM2,IMMB): Likewise.
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(rx_range): New.
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2012-05-15 03:04:47 +00:00
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* config/tc-rx.c (rx_fetchalign): Declare.
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(md_pseudo_table): Add .fetchalign.
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(RX_NBASE_FETCHALIGN): New.
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(fetchalign_bytes): New.
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(rx_fetchalign): New.
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(rx_frag_init): If a "magic" value is found, also init the
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machine-specific data.
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(md_assemble): Note following opcode size if called for.
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(rx_next_opcode): New.
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(rx_relax_frag): Support .fetchalign.
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(md_convert_frag): Likewise.
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* doc/c-rx.texi (RX-Directives): Add .fetchalign.
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Add support for PowerPC VLE.
2012-05-14 Catherine Moore <clm@codesourcery.com>
* NEWS: Mention PowerPC VLE port.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
bfd/
* bfd.c (bfd_lookup_section_flags): Add section parm.
* ecoff.c (bfd_debug_section): Remove flag_info initializer.
* elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
(bfd_elf_lookup_section_flags): Add section parm.
* elf32-ppc.c (is_ppc_vle): New function.
(ppc_elf_modify_segment_map): New function.
(elf_backend_modify_segment_map): Define.
(has_vle_insns): New define.
* elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
* elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
Move in logic to omit / include a section.
* libbfd-in.h (bfd_link_info): Add section parm.
(bfd_generic_lookup_section_flags): Likewise.
* reloc.c (bfd_generic_lookup_section_flags): Likewise.
* section.c (bfd_section): Move out section_flag_info.
(BFD_FAKE_SECTION): Remove flag_info initializer.
* targets.c (_bfd_lookup_section_flags): Add section parm.
2012-05-14 Catherine Moore <clm@codesourcery.com>
bfd/
* archures.c (bfd_mach_ppc_vle): New.
* bfd-in2.h: Regenerated.
* cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
* elf32-ppc.c (split16_format_type): New enumeration.
(ppc_elf_vle_split16): New function.
(HOWTO): Add entries for R_PPC_VLE relocations.
(ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
(ppc_elf_section_flags): New function.
(ppc_elf_lookup_section_flags): New function.
(ppc_elf_section_processing): New function.
(ppc_elf_check_relocs): Handle PPC_VLE relocations.
(ppc_elf_relocation_section): Likewise.
(elf_backend_lookup_section_flags_hook): Define.
(elf_backend_section_flags): Define.
(elf_backend_section_processing): Define.
* elf32-ppc.h (ppc_elf_section_processing): Declare.
* libbfd.h: Regenerated.
* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (insn_validate): New func of existing code to call..
(ppc_setup_opcodes): ..from 2 places here.
Revise for second (VLE) opcode table.
Add #ifdef'd code to print opcode tables.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
for the VLE conditional branches.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/
* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
(PPC_VLE_SPLIT16D): New macro.
(PPC_VLE_LO16A): New macro.
(PPC_VLE_LO16D): New macro.
(PPC_VLE_HI16A): New macro.
(PPC_VLE_HI16D): New macro.
(PPC_VLE_HA16A): New macro.
(PPC_VLE_HA16D): New macro.
(PPC_APUINFO_VLE): New definition.
(md_chars_to_number): New function.
(md_parse_option): Check for combinations of little
endian and -mvle.
(md_show_usage): Document -mvle.
(ppc_arch): Recognize VLE.
(ppc_mach): Recognize bfd_mach_ppc_vle.
(ppc_setup_opcodes): Print the opcode table if
* config/tc-ppc.h (ppc_frag_check): Declare.
* doc/c-ppc.texi: Document -mvle.
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
gas/
* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
* dwarf2dbg.c (scale_addr_delta): Handle values of 1
for DWARF2_LINE_MIN_INSN_LENGTH.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/testsuite/
* gas/ppc/ppc.exp: Run new tests.
* gas/ppc/vle-reloc.d: New test.
* gas/ppc/vle-reloc.s: New test.
* gas/ppc/vle-simple-1.d: New test.
* gas/ppc/vle-simple-1.s: New test.
* gas/ppc/vle-simple-2.d: New test.
* gas/ppc/vle-simple-2.s: New test.
* gas/ppc/vle-simple-3.d: New test.
* gas/ppc/vle-simple-3.s: New test.
* gas/ppc/vle-simple-4.d: New test.
* gas/ppc/vle-simple-4.s: New test.
* gas/ppc/vle-simple-5.d: New test.
* gas/ppc/vle-simple-5.s: New test.
* gas/ppc/vle-simple-6.d: New test.
* gas/ppc/vle-simple-6.s: New test.
* gas/ppc/vle.d: New test.
* gas/ppc/vle.s: New test.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (SEC_PPC_VLE): Remove.
2012-05-14 Catherine Moore <clm@codesourcery.com>
James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (R_PPC_VLE_REL8): New reloction.
(R_PPC_VLE_REL15): Likewise.
(R_PPC_VLE_REL24): Likewise.
(R_PPC_VLE_LO16A): Likewise.
(R_PPC_VLE_LO16D): Likewise.
(R_PPC_VLE_HI16A): Likewise.
(R_PPC_VLE_HI16D): Likewise.
(R_PPC_VLE_HA16A): Likewise.
(R_PPC_VLE_HA16D): Likewise.
(R_PPC_VLE_SDA21): Likewise.
(R_PPC_VLE_SDA21_LO): Likewise.
(R_PPC_VLE_SDAREL_LO16A): Likewise.
(R_PPC_VLE_SDAREL_LO16D): Likewise.
(R_PPC_VLE_SDAREL_HI16A): Likewise.
(R_PPC_VLE_SDAREL_HI16D): Likewise.
(R_PPC_VLE_SDAREL_HA16A): Likewise.
(R_PPC_VLE_SDAREL_HA16D): Likewise.
(SEC_PPC_VLE): Remove.
(PF_PPC_VLE): New program header flag.
(SHF_PPC_VLE): New section header flag.
(vle_opcodes, vle_num_opcodes): New.
(VLE_OP): New macro.
(VLE_OP_TO_SEG): New macro.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
include/opcode/
* ppc.h (PPC_OPCODE_VLE): New definition.
(PPC_OP_SA): New macro.
(PPC_OP_SE_VLE): New macro.
(PPC_OP): Use a variable shift amount.
(powerpc_operand): Update comments.
(PPC_OPSHIFT_INV): New macro.
(PPC_OPERAND_CR): Replace with...
(PPC_OPERAND_CR_BIT): ...this and
(PPC_OPERAND_CR_REG): ...this.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/
* ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
Pass it to callback.
(walk_wild_section_general): Pass section_flag_list to callback.
(lang_add_section): Add sflag_list parm.
Move out logic to keep / omit a section & call bfd_lookup_section_flags.
(output_section_callback_fast): Add sflag_list parm.
Add new parm to lang_add_section calls.
(output_section_callback): Likewise.
(check_section_callback): Add sflag_list parm.
(lang_place_orphans): Add new parm to lang_add_section calls.
(gc_section_callback): Add sflag_list parm.
(find_relro_section_callback): Likewise.
* ldlang.h (callback_t): Add flag_info parm.
(lang_add_section): Add sflag_list parm.
* emultempl/armelf.em (elf32_arm_add_stub_section):
Add lang_add_section parm.
* emultempl/beos.em (gld*_place_orphan): Likewise.
* emultempl/elf32.em (gld*_place_orphan): Likewise.
* emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
* emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
* emultempl/mipself.em (mips_add_stub_section): Likewise.
* emultempl/mmo.em (mmo_place_orphan): Likewise.
* emultempl/pe.em (gld_*_place_orphan): Likewise.
* emultempl/pep.em (gld_*_place_orphan): Likewise.
* emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
* emultempl/spuelf.em (spu_place_special_section): Likewise.
* emultempl/vms.em (vms_place_orphan): Likewise.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/testsuite/
* ld-powerpc/powerpc.exp: Create ppceabitests.
* ld-powerpc/vle-multiseg.s: New.
* ld-powerpc/vle-multiseg-1.d: New.
* ld-powerpc/vle-multiseg-1.ld: New.
* ld-powerpc/vle-multiseg-2.d: New.
* ld-powerpc/vle-multiseg-2.ld: New.
* ld-powerpc/vle-multiseg-3.d: New.
* ld-powerpc/vle-multiseg-3.ld: New.
* ld-powerpc/vle-multiseg-4.d: New.
* ld-powerpc/vle-multiseg-4.ld: New.
* ld-powerpc/vle-multiseg-5.d: New.
* ld-powerpc/vle-multiseg-5.ld: New.
* ld-powerpc/vle-multiseg-6.d: New.
* ld-powerpc/vle-multiseg-6.ld: New.
* ld-powerpc/vle-multiseg-6a.s: New.
* ld-powerpc/vle-multiseg-6b.s: New.
* ld-powerpc/vle-multiseg-6c.s: New.
* ld-powerpc/vle-multiseg-6d.s: New.
* ld-powerpc/powerpc.exp: Run new tests.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/testsuite/
* ld-powerpc/apuinfo.rd: Update for VLE.
* ld-powerpc/vle-reloc-1.d: New.
* ld-powerpc/vle-reloc-1.s: New.
* ld-powerpc/vle-reloc-2.d: New.
* ld-powerpc/vle-reloc-2.s: New.
* ld-powerpc/vle-reloc-3.d: New.
* ld-powerpc/vle-reloc-3.s: New.
* ld-powerpc/vle-reloc-def-1.s: New.
* ld-powerpc/vle-reloc-def-2.s: New.
* ld-powerpc/vle-reloc-def-3.s: New.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
opcodes/
* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
(vle_opcd_indices): New array.
(lookup_vle): New function.
(disassemble_init_powerpc): Revise for second (VLE) opcode table.
(print_insn_powerpc): Likewise.
* ppc-opc.c: Likewise.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
Nathan Froyd <froydnj@codesourcery.com>
opcodes/
* ppc-opc.c (insert_arx, extract_arx): New functions.
(insert_ary, extract_ary): New functions.
(insert_li20, extract_li20): New functions.
(insert_rx, extract_rx): New functions.
(insert_ry, extract_ry): New functions.
(insert_sci8, extract_sci8): New functions.
(insert_sci8n, extract_sci8n): New functions.
(insert_sd4h, extract_sd4h): New functions.
(insert_sd4w, extract_sd4w): New functions.
(insert_vlesi, extract_vlesi): New functions.
(insert_vlensi, extract_vlensi): New functions.
(insert_vleui, extract_vleui): New functions.
(insert_vleil, extract_vleil): New functions.
(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
(BI16, BI32, BO32, B8): New.
(B15, B24, CRD32, CRS): New.
(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
(SH6_MASK): Use PPC_OPSHIFT_INV.
(SI8, UI5, OIMM5, UI7, BO16): New.
(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
(ALLOW8_SPRG): New.
(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
(OPVUP, OPVUP_MASK OPVUP): New
(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
(SE_IM5, SE_IM5_MASK): New.
(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
(BO32DNZ, BO32DZ): New.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
(PPCVLE): New.
(powerpc_opcodes): Add new VLE instructions. Update existing
instruction to include PPCVLE if supported.
* ppc-dis.c (ppc_opts): Add vle entry.
(get_powerpc_dialect): New function.
(powerpc_init_dialect): VLE support.
(print_insn_big_powerpc): Call get_powerpc_dialect.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Handle negative shift counts.
(print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 19:45:30 +00:00
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2012-05-14 James Lemke <jwlemke@codesourcery.com>
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* config/tc-ppc.c (insn_validate): New func of existing code to call..
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(ppc_setup_opcodes): ..from 2 places here.
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Revise for second (VLE) opcode table.
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Add #ifdef'd code to print opcode tables.
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2012-05-14 James Lemke <jwlemke@codesourcery.com>
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* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
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for the VLE conditional branches.
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2012-05-14 Catherine Moore <clm@codesourcery.com>
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Maciej W. Rozycki <macro@codesourcery.com>
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Rhonda Wittels <rhonda@codesourcery.com>
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* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
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(PPC_VLE_SPLIT16D): New macro.
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(PPC_VLE_LO16A): New macro.
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(PPC_VLE_LO16D): New macro.
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(PPC_VLE_HI16A): New macro.
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(PPC_VLE_HI16D): New macro.
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(PPC_VLE_HA16A): New macro.
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(PPC_VLE_HA16D): New macro.
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(PPC_APUINFO_VLE): New definition.
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(md_chars_to_number): New function.
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(md_parse_option): Check for combinations of little
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endian and -mvle.
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(md_show_usage): Document -mvle.
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(ppc_arch): Recognize VLE.
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(ppc_mach): Recognize bfd_mach_ppc_vle.
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2012-05-15 12:55:51 +00:00
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(ppc_setup_opcodes): Print the opcode table if
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Add support for PowerPC VLE.
2012-05-14 Catherine Moore <clm@codesourcery.com>
* NEWS: Mention PowerPC VLE port.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
bfd/
* bfd.c (bfd_lookup_section_flags): Add section parm.
* ecoff.c (bfd_debug_section): Remove flag_info initializer.
* elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
(bfd_elf_lookup_section_flags): Add section parm.
* elf32-ppc.c (is_ppc_vle): New function.
(ppc_elf_modify_segment_map): New function.
(elf_backend_modify_segment_map): Define.
(has_vle_insns): New define.
* elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
* elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
Move in logic to omit / include a section.
* libbfd-in.h (bfd_link_info): Add section parm.
(bfd_generic_lookup_section_flags): Likewise.
* reloc.c (bfd_generic_lookup_section_flags): Likewise.
* section.c (bfd_section): Move out section_flag_info.
(BFD_FAKE_SECTION): Remove flag_info initializer.
* targets.c (_bfd_lookup_section_flags): Add section parm.
2012-05-14 Catherine Moore <clm@codesourcery.com>
bfd/
* archures.c (bfd_mach_ppc_vle): New.
* bfd-in2.h: Regenerated.
* cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
* elf32-ppc.c (split16_format_type): New enumeration.
(ppc_elf_vle_split16): New function.
(HOWTO): Add entries for R_PPC_VLE relocations.
(ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
(ppc_elf_section_flags): New function.
(ppc_elf_lookup_section_flags): New function.
(ppc_elf_section_processing): New function.
(ppc_elf_check_relocs): Handle PPC_VLE relocations.
(ppc_elf_relocation_section): Likewise.
(elf_backend_lookup_section_flags_hook): Define.
(elf_backend_section_flags): Define.
(elf_backend_section_processing): Define.
* elf32-ppc.h (ppc_elf_section_processing): Declare.
* libbfd.h: Regenerated.
* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (insn_validate): New func of existing code to call..
(ppc_setup_opcodes): ..from 2 places here.
Revise for second (VLE) opcode table.
Add #ifdef'd code to print opcode tables.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
for the VLE conditional branches.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/
* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
(PPC_VLE_SPLIT16D): New macro.
(PPC_VLE_LO16A): New macro.
(PPC_VLE_LO16D): New macro.
(PPC_VLE_HI16A): New macro.
(PPC_VLE_HI16D): New macro.
(PPC_VLE_HA16A): New macro.
(PPC_VLE_HA16D): New macro.
(PPC_APUINFO_VLE): New definition.
(md_chars_to_number): New function.
(md_parse_option): Check for combinations of little
endian and -mvle.
(md_show_usage): Document -mvle.
(ppc_arch): Recognize VLE.
(ppc_mach): Recognize bfd_mach_ppc_vle.
(ppc_setup_opcodes): Print the opcode table if
* config/tc-ppc.h (ppc_frag_check): Declare.
* doc/c-ppc.texi: Document -mvle.
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
gas/
* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
* dwarf2dbg.c (scale_addr_delta): Handle values of 1
for DWARF2_LINE_MIN_INSN_LENGTH.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/testsuite/
* gas/ppc/ppc.exp: Run new tests.
* gas/ppc/vle-reloc.d: New test.
* gas/ppc/vle-reloc.s: New test.
* gas/ppc/vle-simple-1.d: New test.
* gas/ppc/vle-simple-1.s: New test.
* gas/ppc/vle-simple-2.d: New test.
* gas/ppc/vle-simple-2.s: New test.
* gas/ppc/vle-simple-3.d: New test.
* gas/ppc/vle-simple-3.s: New test.
* gas/ppc/vle-simple-4.d: New test.
* gas/ppc/vle-simple-4.s: New test.
* gas/ppc/vle-simple-5.d: New test.
* gas/ppc/vle-simple-5.s: New test.
* gas/ppc/vle-simple-6.d: New test.
* gas/ppc/vle-simple-6.s: New test.
* gas/ppc/vle.d: New test.
* gas/ppc/vle.s: New test.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (SEC_PPC_VLE): Remove.
2012-05-14 Catherine Moore <clm@codesourcery.com>
James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (R_PPC_VLE_REL8): New reloction.
(R_PPC_VLE_REL15): Likewise.
(R_PPC_VLE_REL24): Likewise.
(R_PPC_VLE_LO16A): Likewise.
(R_PPC_VLE_LO16D): Likewise.
(R_PPC_VLE_HI16A): Likewise.
(R_PPC_VLE_HI16D): Likewise.
(R_PPC_VLE_HA16A): Likewise.
(R_PPC_VLE_HA16D): Likewise.
(R_PPC_VLE_SDA21): Likewise.
(R_PPC_VLE_SDA21_LO): Likewise.
(R_PPC_VLE_SDAREL_LO16A): Likewise.
(R_PPC_VLE_SDAREL_LO16D): Likewise.
(R_PPC_VLE_SDAREL_HI16A): Likewise.
(R_PPC_VLE_SDAREL_HI16D): Likewise.
(R_PPC_VLE_SDAREL_HA16A): Likewise.
(R_PPC_VLE_SDAREL_HA16D): Likewise.
(SEC_PPC_VLE): Remove.
(PF_PPC_VLE): New program header flag.
(SHF_PPC_VLE): New section header flag.
(vle_opcodes, vle_num_opcodes): New.
(VLE_OP): New macro.
(VLE_OP_TO_SEG): New macro.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
include/opcode/
* ppc.h (PPC_OPCODE_VLE): New definition.
(PPC_OP_SA): New macro.
(PPC_OP_SE_VLE): New macro.
(PPC_OP): Use a variable shift amount.
(powerpc_operand): Update comments.
(PPC_OPSHIFT_INV): New macro.
(PPC_OPERAND_CR): Replace with...
(PPC_OPERAND_CR_BIT): ...this and
(PPC_OPERAND_CR_REG): ...this.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/
* ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
Pass it to callback.
(walk_wild_section_general): Pass section_flag_list to callback.
(lang_add_section): Add sflag_list parm.
Move out logic to keep / omit a section & call bfd_lookup_section_flags.
(output_section_callback_fast): Add sflag_list parm.
Add new parm to lang_add_section calls.
(output_section_callback): Likewise.
(check_section_callback): Add sflag_list parm.
(lang_place_orphans): Add new parm to lang_add_section calls.
(gc_section_callback): Add sflag_list parm.
(find_relro_section_callback): Likewise.
* ldlang.h (callback_t): Add flag_info parm.
(lang_add_section): Add sflag_list parm.
* emultempl/armelf.em (elf32_arm_add_stub_section):
Add lang_add_section parm.
* emultempl/beos.em (gld*_place_orphan): Likewise.
* emultempl/elf32.em (gld*_place_orphan): Likewise.
* emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
* emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
* emultempl/mipself.em (mips_add_stub_section): Likewise.
* emultempl/mmo.em (mmo_place_orphan): Likewise.
* emultempl/pe.em (gld_*_place_orphan): Likewise.
* emultempl/pep.em (gld_*_place_orphan): Likewise.
* emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
* emultempl/spuelf.em (spu_place_special_section): Likewise.
* emultempl/vms.em (vms_place_orphan): Likewise.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/testsuite/
* ld-powerpc/powerpc.exp: Create ppceabitests.
* ld-powerpc/vle-multiseg.s: New.
* ld-powerpc/vle-multiseg-1.d: New.
* ld-powerpc/vle-multiseg-1.ld: New.
* ld-powerpc/vle-multiseg-2.d: New.
* ld-powerpc/vle-multiseg-2.ld: New.
* ld-powerpc/vle-multiseg-3.d: New.
* ld-powerpc/vle-multiseg-3.ld: New.
* ld-powerpc/vle-multiseg-4.d: New.
* ld-powerpc/vle-multiseg-4.ld: New.
* ld-powerpc/vle-multiseg-5.d: New.
* ld-powerpc/vle-multiseg-5.ld: New.
* ld-powerpc/vle-multiseg-6.d: New.
* ld-powerpc/vle-multiseg-6.ld: New.
* ld-powerpc/vle-multiseg-6a.s: New.
* ld-powerpc/vle-multiseg-6b.s: New.
* ld-powerpc/vle-multiseg-6c.s: New.
* ld-powerpc/vle-multiseg-6d.s: New.
* ld-powerpc/powerpc.exp: Run new tests.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/testsuite/
* ld-powerpc/apuinfo.rd: Update for VLE.
* ld-powerpc/vle-reloc-1.d: New.
* ld-powerpc/vle-reloc-1.s: New.
* ld-powerpc/vle-reloc-2.d: New.
* ld-powerpc/vle-reloc-2.s: New.
* ld-powerpc/vle-reloc-3.d: New.
* ld-powerpc/vle-reloc-3.s: New.
* ld-powerpc/vle-reloc-def-1.s: New.
* ld-powerpc/vle-reloc-def-2.s: New.
* ld-powerpc/vle-reloc-def-3.s: New.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
opcodes/
* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
(vle_opcd_indices): New array.
(lookup_vle): New function.
(disassemble_init_powerpc): Revise for second (VLE) opcode table.
(print_insn_powerpc): Likewise.
* ppc-opc.c: Likewise.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
Nathan Froyd <froydnj@codesourcery.com>
opcodes/
* ppc-opc.c (insert_arx, extract_arx): New functions.
(insert_ary, extract_ary): New functions.
(insert_li20, extract_li20): New functions.
(insert_rx, extract_rx): New functions.
(insert_ry, extract_ry): New functions.
(insert_sci8, extract_sci8): New functions.
(insert_sci8n, extract_sci8n): New functions.
(insert_sd4h, extract_sd4h): New functions.
(insert_sd4w, extract_sd4w): New functions.
(insert_vlesi, extract_vlesi): New functions.
(insert_vlensi, extract_vlensi): New functions.
(insert_vleui, extract_vleui): New functions.
(insert_vleil, extract_vleil): New functions.
(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
(BI16, BI32, BO32, B8): New.
(B15, B24, CRD32, CRS): New.
(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
(SH6_MASK): Use PPC_OPSHIFT_INV.
(SI8, UI5, OIMM5, UI7, BO16): New.
(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
(ALLOW8_SPRG): New.
(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
(OPVUP, OPVUP_MASK OPVUP): New
(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
(SE_IM5, SE_IM5_MASK): New.
(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
(BO32DNZ, BO32DZ): New.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
(PPCVLE): New.
(powerpc_opcodes): Add new VLE instructions. Update existing
instruction to include PPCVLE if supported.
* ppc-dis.c (ppc_opts): Add vle entry.
(get_powerpc_dialect): New function.
(powerpc_init_dialect): VLE support.
(print_insn_big_powerpc): Call get_powerpc_dialect.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Handle negative shift counts.
(print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 19:45:30 +00:00
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* config/tc-ppc.h (ppc_frag_check): Declare.
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* doc/c-ppc.texi: Document -mvle.
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* NEWS: Mention PowerPC VLE port.
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2012-05-14 Catherine Moore <clm@codesourcery.com>
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* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
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(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
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* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
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* dwarf2dbg.c (scale_addr_delta): Handle values of 1
|
2012-05-15 12:55:51 +00:00
|
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|
for DWARF2_LINE_MIN_INSN_LENGTH.
|
Add support for PowerPC VLE.
2012-05-14 Catherine Moore <clm@codesourcery.com>
* NEWS: Mention PowerPC VLE port.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
bfd/
* bfd.c (bfd_lookup_section_flags): Add section parm.
* ecoff.c (bfd_debug_section): Remove flag_info initializer.
* elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
(bfd_elf_lookup_section_flags): Add section parm.
* elf32-ppc.c (is_ppc_vle): New function.
(ppc_elf_modify_segment_map): New function.
(elf_backend_modify_segment_map): Define.
(has_vle_insns): New define.
* elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
* elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
Move in logic to omit / include a section.
* libbfd-in.h (bfd_link_info): Add section parm.
(bfd_generic_lookup_section_flags): Likewise.
* reloc.c (bfd_generic_lookup_section_flags): Likewise.
* section.c (bfd_section): Move out section_flag_info.
(BFD_FAKE_SECTION): Remove flag_info initializer.
* targets.c (_bfd_lookup_section_flags): Add section parm.
2012-05-14 Catherine Moore <clm@codesourcery.com>
bfd/
* archures.c (bfd_mach_ppc_vle): New.
* bfd-in2.h: Regenerated.
* cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
* elf32-ppc.c (split16_format_type): New enumeration.
(ppc_elf_vle_split16): New function.
(HOWTO): Add entries for R_PPC_VLE relocations.
(ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
(ppc_elf_section_flags): New function.
(ppc_elf_lookup_section_flags): New function.
(ppc_elf_section_processing): New function.
(ppc_elf_check_relocs): Handle PPC_VLE relocations.
(ppc_elf_relocation_section): Likewise.
(elf_backend_lookup_section_flags_hook): Define.
(elf_backend_section_flags): Define.
(elf_backend_section_processing): Define.
* elf32-ppc.h (ppc_elf_section_processing): Declare.
* libbfd.h: Regenerated.
* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (insn_validate): New func of existing code to call..
(ppc_setup_opcodes): ..from 2 places here.
Revise for second (VLE) opcode table.
Add #ifdef'd code to print opcode tables.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
for the VLE conditional branches.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/
* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
(PPC_VLE_SPLIT16D): New macro.
(PPC_VLE_LO16A): New macro.
(PPC_VLE_LO16D): New macro.
(PPC_VLE_HI16A): New macro.
(PPC_VLE_HI16D): New macro.
(PPC_VLE_HA16A): New macro.
(PPC_VLE_HA16D): New macro.
(PPC_APUINFO_VLE): New definition.
(md_chars_to_number): New function.
(md_parse_option): Check for combinations of little
endian and -mvle.
(md_show_usage): Document -mvle.
(ppc_arch): Recognize VLE.
(ppc_mach): Recognize bfd_mach_ppc_vle.
(ppc_setup_opcodes): Print the opcode table if
* config/tc-ppc.h (ppc_frag_check): Declare.
* doc/c-ppc.texi: Document -mvle.
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
gas/
* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
* dwarf2dbg.c (scale_addr_delta): Handle values of 1
for DWARF2_LINE_MIN_INSN_LENGTH.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/testsuite/
* gas/ppc/ppc.exp: Run new tests.
* gas/ppc/vle-reloc.d: New test.
* gas/ppc/vle-reloc.s: New test.
* gas/ppc/vle-simple-1.d: New test.
* gas/ppc/vle-simple-1.s: New test.
* gas/ppc/vle-simple-2.d: New test.
* gas/ppc/vle-simple-2.s: New test.
* gas/ppc/vle-simple-3.d: New test.
* gas/ppc/vle-simple-3.s: New test.
* gas/ppc/vle-simple-4.d: New test.
* gas/ppc/vle-simple-4.s: New test.
* gas/ppc/vle-simple-5.d: New test.
* gas/ppc/vle-simple-5.s: New test.
* gas/ppc/vle-simple-6.d: New test.
* gas/ppc/vle-simple-6.s: New test.
* gas/ppc/vle.d: New test.
* gas/ppc/vle.s: New test.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (SEC_PPC_VLE): Remove.
2012-05-14 Catherine Moore <clm@codesourcery.com>
James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (R_PPC_VLE_REL8): New reloction.
(R_PPC_VLE_REL15): Likewise.
(R_PPC_VLE_REL24): Likewise.
(R_PPC_VLE_LO16A): Likewise.
(R_PPC_VLE_LO16D): Likewise.
(R_PPC_VLE_HI16A): Likewise.
(R_PPC_VLE_HI16D): Likewise.
(R_PPC_VLE_HA16A): Likewise.
(R_PPC_VLE_HA16D): Likewise.
(R_PPC_VLE_SDA21): Likewise.
(R_PPC_VLE_SDA21_LO): Likewise.
(R_PPC_VLE_SDAREL_LO16A): Likewise.
(R_PPC_VLE_SDAREL_LO16D): Likewise.
(R_PPC_VLE_SDAREL_HI16A): Likewise.
(R_PPC_VLE_SDAREL_HI16D): Likewise.
(R_PPC_VLE_SDAREL_HA16A): Likewise.
(R_PPC_VLE_SDAREL_HA16D): Likewise.
(SEC_PPC_VLE): Remove.
(PF_PPC_VLE): New program header flag.
(SHF_PPC_VLE): New section header flag.
(vle_opcodes, vle_num_opcodes): New.
(VLE_OP): New macro.
(VLE_OP_TO_SEG): New macro.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
include/opcode/
* ppc.h (PPC_OPCODE_VLE): New definition.
(PPC_OP_SA): New macro.
(PPC_OP_SE_VLE): New macro.
(PPC_OP): Use a variable shift amount.
(powerpc_operand): Update comments.
(PPC_OPSHIFT_INV): New macro.
(PPC_OPERAND_CR): Replace with...
(PPC_OPERAND_CR_BIT): ...this and
(PPC_OPERAND_CR_REG): ...this.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/
* ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
Pass it to callback.
(walk_wild_section_general): Pass section_flag_list to callback.
(lang_add_section): Add sflag_list parm.
Move out logic to keep / omit a section & call bfd_lookup_section_flags.
(output_section_callback_fast): Add sflag_list parm.
Add new parm to lang_add_section calls.
(output_section_callback): Likewise.
(check_section_callback): Add sflag_list parm.
(lang_place_orphans): Add new parm to lang_add_section calls.
(gc_section_callback): Add sflag_list parm.
(find_relro_section_callback): Likewise.
* ldlang.h (callback_t): Add flag_info parm.
(lang_add_section): Add sflag_list parm.
* emultempl/armelf.em (elf32_arm_add_stub_section):
Add lang_add_section parm.
* emultempl/beos.em (gld*_place_orphan): Likewise.
* emultempl/elf32.em (gld*_place_orphan): Likewise.
* emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
* emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
* emultempl/mipself.em (mips_add_stub_section): Likewise.
* emultempl/mmo.em (mmo_place_orphan): Likewise.
* emultempl/pe.em (gld_*_place_orphan): Likewise.
* emultempl/pep.em (gld_*_place_orphan): Likewise.
* emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
* emultempl/spuelf.em (spu_place_special_section): Likewise.
* emultempl/vms.em (vms_place_orphan): Likewise.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/testsuite/
* ld-powerpc/powerpc.exp: Create ppceabitests.
* ld-powerpc/vle-multiseg.s: New.
* ld-powerpc/vle-multiseg-1.d: New.
* ld-powerpc/vle-multiseg-1.ld: New.
* ld-powerpc/vle-multiseg-2.d: New.
* ld-powerpc/vle-multiseg-2.ld: New.
* ld-powerpc/vle-multiseg-3.d: New.
* ld-powerpc/vle-multiseg-3.ld: New.
* ld-powerpc/vle-multiseg-4.d: New.
* ld-powerpc/vle-multiseg-4.ld: New.
* ld-powerpc/vle-multiseg-5.d: New.
* ld-powerpc/vle-multiseg-5.ld: New.
* ld-powerpc/vle-multiseg-6.d: New.
* ld-powerpc/vle-multiseg-6.ld: New.
* ld-powerpc/vle-multiseg-6a.s: New.
* ld-powerpc/vle-multiseg-6b.s: New.
* ld-powerpc/vle-multiseg-6c.s: New.
* ld-powerpc/vle-multiseg-6d.s: New.
* ld-powerpc/powerpc.exp: Run new tests.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/testsuite/
* ld-powerpc/apuinfo.rd: Update for VLE.
* ld-powerpc/vle-reloc-1.d: New.
* ld-powerpc/vle-reloc-1.s: New.
* ld-powerpc/vle-reloc-2.d: New.
* ld-powerpc/vle-reloc-2.s: New.
* ld-powerpc/vle-reloc-3.d: New.
* ld-powerpc/vle-reloc-3.s: New.
* ld-powerpc/vle-reloc-def-1.s: New.
* ld-powerpc/vle-reloc-def-2.s: New.
* ld-powerpc/vle-reloc-def-3.s: New.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
opcodes/
* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
(vle_opcd_indices): New array.
(lookup_vle): New function.
(disassemble_init_powerpc): Revise for second (VLE) opcode table.
(print_insn_powerpc): Likewise.
* ppc-opc.c: Likewise.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
Nathan Froyd <froydnj@codesourcery.com>
opcodes/
* ppc-opc.c (insert_arx, extract_arx): New functions.
(insert_ary, extract_ary): New functions.
(insert_li20, extract_li20): New functions.
(insert_rx, extract_rx): New functions.
(insert_ry, extract_ry): New functions.
(insert_sci8, extract_sci8): New functions.
(insert_sci8n, extract_sci8n): New functions.
(insert_sd4h, extract_sd4h): New functions.
(insert_sd4w, extract_sd4w): New functions.
(insert_vlesi, extract_vlesi): New functions.
(insert_vlensi, extract_vlensi): New functions.
(insert_vleui, extract_vleui): New functions.
(insert_vleil, extract_vleil): New functions.
(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
(BI16, BI32, BO32, B8): New.
(B15, B24, CRD32, CRS): New.
(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
(SH6_MASK): Use PPC_OPSHIFT_INV.
(SI8, UI5, OIMM5, UI7, BO16): New.
(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
(ALLOW8_SPRG): New.
(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
(OPVUP, OPVUP_MASK OPVUP): New
(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
(SE_IM5, SE_IM5_MASK): New.
(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
(BO32DNZ, BO32DZ): New.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
(PPCVLE): New.
(powerpc_opcodes): Add new VLE instructions. Update existing
instruction to include PPCVLE if supported.
* ppc-dis.c (ppc_opts): Add vle entry.
(get_powerpc_dialect): New function.
(powerpc_init_dialect): VLE support.
(print_insn_big_powerpc): Call get_powerpc_dialect.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Handle negative shift counts.
(print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 19:45:30 +00:00
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2012-05-12 12:34:37 +00:00
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2012-05-12 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (tc_gen_reloc): Remove x32 addend overflow
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for BFD_RELOC_64.
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2012-05-11 14:25:30 +00:00
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2012-05-11 Daniel Richard G. <skunk@iskunk.org>
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PR binutils/14028
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* configure.in: Invoke ACX_HEADER_STRING.
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* configure: Regenerate.
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* config.in: Regenerate.
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* as.h: If STRINGS_WITH_STRING is defined then include both
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string.h and strings.h.
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PR 13503
* reloc.c: Add new ENUM for BFD_RELOC_AVR_8_LO,
BFD_RELOC_AVR_8_HI, BFD_RELOC_AVR_8_HHI.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenrate.
* elf32-avr.c (elf_avr_howto_table): Add entries for
R_AVR_8_LO8, R_AVR_8_HI8, R_AVR_8_HHI8.
(avr_reloc_map): Add RELOC mappings for R_AVR_8_LO8, R_AVR_8_HI8,
R_AVR_8_HHI8.
* config/tc-avr.c (exp_mod_pm): Remove variable.
(exp_mod_data_t): New typedef.
(pexp_mod_data, exp_mod_data): New variables.
(avr_parse_cons_expression): Scan through exp_mod_data[] to find
data expression modifiers "pm", "gs", "lo8", hi8", "hhi8", "hh8"
and set pexp_mod_data accordingly to be used in avr_cons_fix_new.
(avr_cons_fix_new): Handle new data expression modifiers shipped
in pexp_mod_data.
(md_apply_fix): Handle BFD_RELOC_AVR_8_LO, BFD_RELOC_AVR_8_HI,
BFD_RELOC_AVR_8_HHI.
* elf/avr.h (RELOC_NUMBERS): Add values for R_AVR_8_LO8,
R_AVR_8_HI8, R_AVR_8_HHI8.
2012-05-11 12:59:23 +00:00
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2012-05-11 Georg-Johann Lay <avr@gjlay.de
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PR target/13503
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* config/tc-avr.c (exp_mod_pm): Remove variable.
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(exp_mod_data_t): New typedef.
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(pexp_mod_data, exp_mod_data): New variables.
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(avr_parse_cons_expression): Scan through exp_mod_data[] to find
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data expression modifiers "pm", "gs", "lo8", hi8", "hhi8", "hh8"
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and set pexp_mod_data accordingly to be used in avr_cons_fix_new.
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(avr_cons_fix_new): Handle new data expression modifiers shipped
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in pexp_mod_data.
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(md_apply_fix): Handle BFD_RELOC_AVR_8_LO, BFD_RELOC_AVR_8_HI,
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BFD_RELOC_AVR_8_HHI.
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2012-05-11 00:50:43 +00:00
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2012-05-10 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (tc_gen_reloc): Use bfd_signed_vma in x32
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addend overflow check.
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2012-05-10 20:46:34 +00:00
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2012-05-10 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (tc_gen_reloc): Display signed hex number in
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x32 addend overflow check.
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2012-05-10 03:48:33 +00:00
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2012-05-09 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (tc_gen_reloc): Use fits_in_signed_long.
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2012-05-10 03:25:17 +00:00
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2012-05-09 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (tc_gen_reloc): Check x32 addend overflow
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for BFD_RELOC_64.
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2012-05-08 12:14:15 +00:00
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2012-05-08 Alan Modra <amodra@gmail.com>
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* Makefile.am (check_DEJAGNU): Export LC_ALL=C in place of other
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LC and LANG environment vars.
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* Makefile.in: Regenerate.
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2012-05-07 09:21:48 +00:00
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2012-05-07 Alan Modra <amodra@gmail.com>
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* Makefile.am (check-DEJAGNU): Clear LC_COLLATE, LC_ALL and LANG.
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* Makefile.in: Regenerate.
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2012-05-06 09:49:21 +00:00
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2012-05-06 Arnold Metselaar <arnold_m@operamail.com>
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* config/tc-z80.h(md_register_arithmetic): Define as 0.
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2012-05-07 09:21:48 +00:00
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* config/tc-z80.c(md_begin): Store register names in symbol table,
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preventing usage as ordinary symbol.
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2012-05-06 09:49:21 +00:00
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* config/tc-z80.c(contains_register): New function.
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* config/tc-z80.c(parse_exp2): Removed.
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* config/tc-z80.c(parse_exp_not_indexed): New function.
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2012-05-07 09:21:48 +00:00
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* config/tc-z80.c(parse_exp): Add code to recogize indexed
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addressing after parsing.
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2012-05-06 09:49:21 +00:00
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* config/tc-z80.c(emit_byte, emit_word): Use contains_register.
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2012-05-07 09:21:48 +00:00
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* config/tc-z80.c(emit_jp): Use parse_exp_not_indexed, simplify
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condition for jump to register.
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* config/tc-z80.c(emit_call, emit_jr, emit_ex, emit_rst): Use
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parse_exp_not_indexed.
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2012-05-06 09:49:21 +00:00
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2012-05-05 03:05:32 +00:00
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2012-05-05 Alan Modra <amodra@gmail.com>
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* ecoff.c: Replace all uses of bfd_abs_section, bfd_com_section,
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bfd_und_section and bfd_ind_section with their _ptr variants, or
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use corresponding bfd_is_* macros.
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* symbols.c: Likewise.
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* config/obj-aout.c: Likewise.
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* config/obj-coff-seh.h: Likewise.
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* config/tc-hppa.c: Likewise.
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* config/tc-hppa.h: Likewise.
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* config/tc-ia64.c: Likewise.
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* config/tc-m32r.c: Likewise.
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* config/tc-microblaze.c: Likewise.
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* config/tc-mips.c: Likewise.
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* config/tc-score.c: Likewise.
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* config/tc-score7.c: Likewise.
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* config/tc-tic6x.c: Likewise.
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2012-05-04 20:01:03 +00:00
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2012-05-04 H.J. Lu <hongjiu.lu@intel.com>
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* configure.tgt: Support x86_64-*-linux-gnux32.
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2012-05-04 19:18:02 +00:00
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2012-05-04 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (match_template): Add `instruction' to
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unsupported error message.
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2012-05-04 19:11:04 +00:00
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2012-05-04 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (output_insn): Reformat.
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2012-05-04 18:06:38 +00:00
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2012-05-04 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (output_insn): Remove the extra VEX check.
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2012-05-04 17:55:38 +00:00
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2012-05-04 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (match_template): Improve unsupported error
|
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message.
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2012-05-03 13:12:08 +00:00
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2012-05-03 Sean Keys <skeys@ipdatasys.com>
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* configure, Makefile.in: Regenerate.
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* Makefile.am (CPU_TYPES, TARGET_CPU_CFILES, TARGET_CPU_HFILES):
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* configure.tgt: Added cpu type.
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Added files for XGATE assembler.
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* config/tc-xgate.c: Assembler for XGATE.
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* config/tc-xgate.h: Header definition for assembler
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Added files for XGATE testsuite.
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* doc/Makefile.am (CPU_DOCS): Added XGATE file.
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* doc/c-xgate.texi: Document XGATE and XGATE port.
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* doc/as.texinfo: Ditto.
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* doc/all.texi: Ditto
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* NEWS: Mention the new support.
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2012-04-30 22:09:09 +00:00
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2012-04-30 DJ Delorie <dj@redhat.com>
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* config/rx-parse.y (rx_intop): Add parameter for operation size.
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Check for large positive constants really being small negative
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ones.
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(BRA, BSR): Update calls to rx_intop.
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(immediate): Likewise.
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2012-04-30 14:32:28 +00:00
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2012-04-26 Mark Wielaard <mjw@redhat.com>
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* dwarf2dbg.c (DWARF2_ARANGES_VERSION): New define to 2.
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(DWARF2_LINE_VERSION): Likewise.
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(out_debug_line): Use DWARF2_LINE_VERSION not DWARF2_VERSION.
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(out_debug_aranges): Use DWARF2_ARANGES_VERSION not DWARF2_VERSION.
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(out_debug_abbrev): Use DW_FORM_data for DW_AT_high_pc when
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DWARF2_VERSION >= 4.
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(out_debug_info): Use difference between start and end as data
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value for DW_AT_high_pc when DWARF2_VERSION >= 4.
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* config/tc-ia64.h (DWARF2_LINE_VERSION): Override it.
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Move sparc opcode hwcaps out of sparc_opcode flags field.
include/opcode/
* sparc.h (struct sparc_opcode): New field 'hwcaps'.
F_MUL32, F_DIV32, F_FDMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING, F_HWCAP_MASK): Delete.
(HWCAP_MUL32, HWCAP_DIV32, HWCAP_FSMULD, HWCAP_V8PLUS, HWCAP_POPC,
HWCAP_VIS, HWCAP_VIS2, HWCAP_ASI_BLK_INIT, HWCAP_FMAF,
HWCAP_VIS3, HWCAP_HPC, HWCAP_RANDOM, HWCAP_TRANS, HWCAP_FJFMAU,
HWCAP_IMA, HWCAP_ASI_CACHE_SPARING, HWCAP_AES, HWCAP_DES,
HWCAP_KASUMI, HWCAP_CAMELLIA, HWCAP_MD5, HWCAP_SHA1,
HWCAP_SHA256, HWCAP_SHA512, HWCAP_MPMUL, HWCAP_MONT, HWCAP_PAUSE,
HWCAP_CBCOND, HWCAP_CRC32): New defines.
opcodes/
* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
gas/
* config/tc-sparc.c (sparc_arch_table): Rework to use HWCAP_*
masks.
(sparc_md_end): No longer need to translate hwcap_seen values into
ELF hwcap bits, they now match exactly.
(get_hwcap_name): Use HWCAP_* and handle new values.
(sparc_ip): Fetch hwcaps from insn->hwcaps instead of insn->flags.
2012-04-27 18:01:35 +00:00
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2012-04-27 David S. Miller <davem@davemloft.net>
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2012-04-27 20:45:23 +00:00
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* doc/c-sparc.text: Document %l34 and %h34.
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2012-04-27 20:43:35 +00:00
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* config/tc-sparc.c (v9a_asr_table): Add 'cfr'.
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2012-04-27 18:04:00 +00:00
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* config/tc-sparc.c (sparc_arch_table): Add HWCAP_PAUSE to sparc4,
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v8pluse, v8plusv, v9e, and v9v.
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(v9a_asr_table): Add 'pause'.
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2012-04-27 18:03:13 +00:00
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* config/tc-sparc.c (sparc_arch_table): Add HWCAP_CBCOND to
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sparc4, v8pluse, v8plusv, v9e, and v9v.
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(sparc_ip): Handle R_SPARC_5 of immediate constants inline in
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order to accomodate cbcond which otherwise would require two
|
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relocations to be handled in a single instruction..
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2012-04-27 18:02:35 +00:00
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* config/tc-sparc.c (sparc_ip): Likewise. Accept instruction
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names containing "_".
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(sparc_arch_table): Add sparc4, v8pluse, and v9e. Add crypto
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hwcap masks to v8plusv and v9v.
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Move sparc opcode hwcaps out of sparc_opcode flags field.
include/opcode/
* sparc.h (struct sparc_opcode): New field 'hwcaps'.
F_MUL32, F_DIV32, F_FDMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING, F_HWCAP_MASK): Delete.
(HWCAP_MUL32, HWCAP_DIV32, HWCAP_FSMULD, HWCAP_V8PLUS, HWCAP_POPC,
HWCAP_VIS, HWCAP_VIS2, HWCAP_ASI_BLK_INIT, HWCAP_FMAF,
HWCAP_VIS3, HWCAP_HPC, HWCAP_RANDOM, HWCAP_TRANS, HWCAP_FJFMAU,
HWCAP_IMA, HWCAP_ASI_CACHE_SPARING, HWCAP_AES, HWCAP_DES,
HWCAP_KASUMI, HWCAP_CAMELLIA, HWCAP_MD5, HWCAP_SHA1,
HWCAP_SHA256, HWCAP_SHA512, HWCAP_MPMUL, HWCAP_MONT, HWCAP_PAUSE,
HWCAP_CBCOND, HWCAP_CRC32): New defines.
opcodes/
* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
gas/
* config/tc-sparc.c (sparc_arch_table): Rework to use HWCAP_*
masks.
(sparc_md_end): No longer need to translate hwcap_seen values into
ELF hwcap bits, they now match exactly.
(get_hwcap_name): Use HWCAP_* and handle new values.
(sparc_ip): Fetch hwcaps from insn->hwcaps instead of insn->flags.
2012-04-27 18:01:35 +00:00
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* config/tc-sparc.c (sparc_arch_table): Rework to use HWCAP_*
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masks.
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|
(sparc_md_end): No longer need to translate hwcap_seen values into
|
|
|
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|
|
ELF hwcap bits, they now match exactly.
|
|
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|
(get_hwcap_name): Use HWCAP_* and handle new values.
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|
|
(sparc_ip): Fetch hwcaps from insn->hwcaps instead of insn->flags.
|
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|
2012-04-20 10:21:33 +00:00
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|
2012-04-20 Tristan Gingold <gingold@adacore.com>
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* config/tc-ia64.c (obj_elf_vms_common): New function.
|
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|
(md_pseudo_table): Add .vms_common pseudo.
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|
* config/obj-elf.h (obj_elf_section_name): Add a prototype.
|
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|
* config/obj-elf.c (obj_elf_section_name): Make it public.
|
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|
2012-04-17 13:59:41 +00:00
|
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|
2012-04-17 Richard Sandiford <r.sandiford@uk.ibm.com>
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* config/tc-avr.c (md_apply_fix): Fix handling of BFD_RELOC32.
|
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|
2012-04-12 16:26:06 +00:00
|
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|
2012-04-12 David S. Miller <davem@davemloft.net>
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* config/tc-sparc.c (sparc_ip): Handle '=', "%h34", "%l34", and
|
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BFD_RELOC_SPARC_H34.
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|
(md_apply_fix): Handle BFD_RELOC_SPARC_WDISP10 and BFD_RELOC_SPARC_H34.
|
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|
(tc_gen_reloc): Likewise.
|
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|
|
* elf32-arm.c (elf32_arm_nacl_plt0_entry, elf32_arm_nacl_plt_entry):
New variables.
(struct elf32_arm_link_hash_table): New member `nacl_p'.
(elf32_arm_link_hash_table_create): Initialize it.
(elf32_arm_nacl_link_hash_table_create): New function.
(arm_movw_immediate, arm_movt_immediate): New functions.
(elf32_arm_populate_plt_entry): Test HTAB->nacl_p.
(elf32_arm_finish_dynamic_sections): Likewise.
(elf32_arm_output_plt_map_1): Likewise.
(bfd_elf32_littlearm_nacl_vec, bfd_elf32_bigarm_nacl_vec):
New backend vector stanza.
(elf32_arm_nacl_modify_segment_map): New function.
* config.bfd: Handle arm-*-nacl*, armeb-*-nacl*.
* targets.c: Support bfd_elf32_{big,little}_nacl_vec.
* configure.in: Likewise.
(bfd_elf32_bigarm_nacl_vec): Add elf-nacl.lo here.
(bfd_elf32_littlearm_nacl_vec): Likewise.
(bfd_elf32_bigarm_vec, bfd_elf32_littlearm_vec): Likewise.
(bfd_elf32_bigarm_symbian_vec): Likewise.
(bfd_elf32_littlearm_symbian_vec): Likewise.
(bfd_elf32_bigarm_vxworks_vec): Likewise.
(bfd_elf32_littlearm_vxworks_vec): Likewise.
* configure: Regenerated.
* configure.tgt (arm-*-nacl*): Match it.
* config/te-nacl.h (FPU_DEFAULT, EABI_DEFAULT): Define.
(LOCAL_LABELS_DOLLAR): Define.
* config/tc-arm.c (elf32_arm_target_format) [TE_NACL]:
Use nacl format variants.
* gas/elf/elf.exp (run_elf_list_test): Treat arm-*-nacl* targets
as -armeabi.
* gas/arm/any-idiv.d: Match *-*-nacl* targets too.
* gas/arm/arch4t.d: Likewise.
* gas/arm/arch4t-eabi.d: Likewise.
* gas/arm/attr-any-armv4t.d: Likewise.
* gas/arm/attr-any-thumbv6.d: Likewise.
* gas/arm/attr-cpu-directive.d: Likewise.
* gas/arm/attr-default.d: Likewise.
* gas/arm/attr-march-all.d: Likewise.
* gas/arm/attr-march-armv1.d: Likewise.
* gas/arm/attr-march-armv2a.d: Likewise.
* gas/arm/attr-march-armv2.d: Likewise.
* gas/arm/attr-march-armv2s.d: Likewise.
* gas/arm/attr-march-armv3.d: Likewise.
* gas/arm/attr-march-armv3m.d: Likewise.
* gas/arm/attr-march-armv4.d: Likewise.
* gas/arm/attr-march-armv4t.d: Likewise.
* gas/arm/attr-march-armv4txm.d: Likewise.
* gas/arm/attr-march-armv4xm.d: Likewise.
* gas/arm/attr-march-armv5.d: Likewise.
* gas/arm/attr-march-armv5t.d: Likewise.
* gas/arm/attr-march-armv5te.d: Likewise.
* gas/arm/attr-march-armv5tej.d: Likewise.
* gas/arm/attr-march-armv5texp.d: Likewise.
* gas/arm/attr-march-armv5txm.d: Likewise.
* gas/arm/attr-march-armv6.d: Likewise.
* gas/arm/attr-march-armv6j.d: Likewise.
* gas/arm/attr-march-armv6k.d: Likewise.
* gas/arm/attr-march-armv6k+sec.d: Likewise.
* gas/arm/attr-march-armv6kt2.d: Likewise.
* gas/arm/attr-march-armv6-m.d: Likewise.
* gas/arm/attr-march-armv6-m+os.d: Likewise.
* gas/arm/attr-march-armv6s-m.d: Likewise.
* gas/arm/attr-march-armv6t2.d: Likewise.
* gas/arm/attr-march-armv6z.d: Likewise.
* gas/arm/attr-march-armv6zk.d: Likewise.
* gas/arm/attr-march-armv6zkt2.d: Likewise.
* gas/arm/attr-march-armv6zt2.d: Likewise.
* gas/arm/attr-march-armv7-a.d: Likewise.
* gas/arm/attr-march-armv7a.d: Likewise.
* gas/arm/attr-march-armv7-a+idiv.d: Likewise.
* gas/arm/attr-march-armv7-a+mp.d: Likewise.
* gas/arm/attr-march-armv7-a+sec.d: Likewise.
* gas/arm/attr-march-armv7-a+sec+virt.d: Likewise.
* gas/arm/attr-march-armv7-a+virt.d: Likewise.
* gas/arm/attr-march-armv7.d: Likewise.
* gas/arm/attr-march-armv7em.d: Likewise.
* gas/arm/attr-march-armv7-m.d: Likewise.
* gas/arm/attr-march-armv7m.d: Likewise.
* gas/arm/attr-march-armv7-r.d: Likewise.
* gas/arm/attr-march-armv7r.d: Likewise.
* gas/arm/attr-march-armv7-r+mp.d: Likewise.
* gas/arm/attr-march-iwmmxt2.d: Likewise.
* gas/arm/attr-march-iwmmxt.d: Likewise.
* gas/arm/attr-march-xscale.d: Likewise.
* gas/arm/attr-mcpu.d: Likewise.
* gas/arm/attr-mfpu-arm1020e.d: Likewise.
* gas/arm/attr-mfpu-arm1020t.d: Likewise.
* gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
* gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
* gas/arm/attr-mfpu-arm7500fe.d: Likewise.
* gas/arm/attr-mfpu-fpa10.d: Likewise.
* gas/arm/attr-mfpu-fpa11.d: Likewise.
* gas/arm/attr-mfpu-fpa.d: Likewise.
* gas/arm/attr-mfpu-fpe2.d: Likewise.
* gas/arm/attr-mfpu-fpe3.d: Likewise.
* gas/arm/attr-mfpu-fpe.d: Likewise.
* gas/arm/attr-mfpu-maverick.d: Likewise.
* gas/arm/attr-mfpu-neon.d: Likewise.
* gas/arm/attr-mfpu-neon-fp16.d: Likewise.
* gas/arm/attr-mfpu-softfpa.d: Likewise.
* gas/arm/attr-mfpu-softvfp.d: Likewise.
* gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
* gas/arm/attr-mfpu-vfp10.d: Likewise.
* gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
* gas/arm/attr-mfpu-vfp3.d: Likewise.
* gas/arm/attr-mfpu-vfp9.d: Likewise.
* gas/arm/attr-mfpu-vfp.d: Likewise.
* gas/arm/attr-mfpu-vfpv2.d: Likewise.
* gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv3.d: Likewise.
* gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/arm/attr-mfpu-vfpxd.d: Likewise.
* gas/arm/attr-names.d: Likewise.
* gas/arm/attr-order.d: Likewise.
* gas/arm/attr-override-cpu-directive.d: Likewise.
* gas/arm/attr-override-mcpu.d: Likewise.
* gas/arm/got_prel.d: Likewise.
* gas/arm/mapdir.d: Likewise.
* gas/arm/mapmisc.d: Likewise.
* gas/arm/mapsecs.d: Likewise.
* gas/arm/mapshort-eabi.d: Likewise.
* gas/arm/mapshort-elf.d: Likewise.
* gas/arm/mov-highregs-any.d: Likewise.
* gas/arm/mov-lowregs-any.d: Likewise.
* gas/arm/pr12198-1.d: Likewise.
* gas/arm/pr12198-2.d: Likewise.
* gas/arm/thumb.d: Likewise.
* gas/arm/thumb-eabi.d: Likewise.
* gas/arm/thumbrel.d: Likewise.
* configure.tgt (arm*-*-nacl*, arm*b-*-nacl*): Handle them.
* emulparams/armelf_nacl.sh: New file.
* emulparams/armelfb_nacl.sh: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add earmelf_nacl.c
and earmelfb_nacl.c here.
(earmelf_nacl.c, earmelfb_nacl.c): New targets.
* Makefile.in: Regenerated.
* ld-arm/arm-elf.exp (armelftests): Split out into ...
(armelftests_common, armelftests_nonacl): ... these two.
(armeabitests): Split out into ...
(armeabitests_common, armeabitests_nonacl): ... these two.
Omit _nonacl sets for arm*-*-nacl* targets.
* ld-arm/farcall-mix.d: Don't match exact addresses, only symbolic ones.
* ld-arm/farcall-mix2.d: Likewise.
* ld-arm/farcall-group.d: Likewise.
* ld-arm/tls-gdesc-got.d: Match variant file formats too.
Accept some variation in exact addresses.
* ld-arm/thumb2-b-interwork.d: Match variant file formats too.
Fix regexps not to care about exact addresses where not relevant.
* ld-arm/thumb2-bl-undefweak.d: Match any hex strings, not any
strings of particular exact lengths.
* ld-arm/thumb2-bl-undefweak1.d: Likewise.
* ld-arm/arm-app.r: Match variant file formats too.
* ld-arm/arm-app-abs32.r: Likewise.
* ld-arm/arm-lib.d: Likewise.
* ld-arm/arm-lib.r: Likewise.
* ld-arm/arm-static-app.r: Likewise.
* ld-arm/armv4-bx.d: Likewise.
* ld-arm/data-only-map.d: Likewise.
* ld-arm/group-relocs.d: Likewise.
* ld-arm/jump19.d: Likewise.
* ld-arm/reloc-boundaries.d: Likewise.
* ld-arm/thumb1-bl.d: Likewise.
* ld-arm/thumb2-bl.d: Likewise.
* ld-arm/tls-app.d: Likewise.
* ld-arm/tls-app.r: Likewise.
* ld-arm/tls-gdierelax.d: Likewise.
* ld-arm/tls-gdierelax2.d: Likewise.
* ld-arm/tls-gdlerelax.d: Likewise.
* ld-arm/tls-lib.d: Likewise.
* ld-arm/tls-lib.r: Likewise.
* ld-arm/tls-mixed.r: Likewise.
* ld-arm/vfp11-fix-none.d: Likewise.
* ld-arm/vfp11-fix-scalar.d: Likewise.
* ld-arm/vfp11-fix-vector.d: Likewise.
* ld-arm/arm-static-app.d: Likewise.
Fix regexps not to care about exact number of leading spaces.
* ld-arm/arm-app-abs32.d: Likewise.
* ld-arm/fix-arm1176-off.d: Likewise.
* ld-arm/fix-arm1176-on.d: Likewise.
* ld-arm/arm-elf.exp: Treat nacl targets like eabi targets.
2012-04-12 13:01:15 +00:00
|
|
|
|
2012-04-12 Roland McGrath <mcgrathr@google.com>
|
|
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|
|
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|
|
* configure.tgt (arm-*-nacl*): Match it.
|
|
|
|
|
|
* config/te-nacl.h (FPU_DEFAULT, EABI_DEFAULT): Define.
|
|
|
|
|
|
(LOCAL_LABELS_DOLLAR): Define.
|
|
|
|
|
|
* config/tc-arm.c (elf32_arm_target_format) [TE_NACL]:
|
|
|
|
|
|
Use nacl format variants.
|
|
|
|
|
|
|
2012-04-12 07:46:54 +00:00
|
|
|
|
2012-04-12 Jie Zhang <jie@codesourcery.com>
|
2012-08-01 15:59:55 +00:00
|
|
|
|
Meador Inge <meadori@codesourcery.com>
|
2012-04-12 07:46:54 +00:00
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (only_one_reg_in_list): New function.
|
|
|
|
|
|
(encode_ldmstm): Ditto.
|
|
|
|
|
|
(do_ldmstm): Use a different encoding when pushing or poping
|
|
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|
|
|
a single register.
|
|
|
|
|
|
(A_COND_MASK): New macro.
|
|
|
|
|
|
(A_PUSH_POP_OP_MASK): Ditto.
|
|
|
|
|
|
(A1_OPCODE_PUSH): Ditto.
|
|
|
|
|
|
(A2_OPCODE_PUSH): Ditto.
|
|
|
|
|
|
(A2_OPCODE_POP): Ditto.
|
|
|
|
|
|
|
2012-04-06 22:02:43 +00:00
|
|
|
|
2012-04-06 Maciej W. Rozycki <macro@linux-mips.org>
|
|
|
|
|
|
|
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|
|
|
|
* doc/c-mips.texi (MIPS Opts): Correct -no-mfix-24k to
|
|
|
|
|
|
-mno-fix-24k.
|
|
|
|
|
|
|
2012-04-06 16:49:02 +00:00
|
|
|
|
2012-04-06 Roland McGrath <mcgrathr@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.in (AC_CHECK_HEADERS): Add locale.h.
|
|
|
|
|
|
* config.in: Regenerate.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2012-04-05 08:43:41 +00:00
|
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|
|
2012-04-05 Nick Clifton <nickc@redhat.com>
|
|
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|
|
|
|
|
|
|
|
|
* configure.in (AC_CHECK_FUNCS): Add setlocale.
|
|
|
|
|
|
(AM_LC_MESSAGES): Add.
|
|
|
|
|
|
* aclocal.m4: Regenerate.
|
|
|
|
|
|
* config.in: Regenerate.
|
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|
|
|
|
* configure: Regenerate.
|
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|
|
2012-04-03 19:06:40 +00:00
|
|
|
|
2012-04-03 DJ Delorie <dj@redhat.com>
|
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|
|
|
|
|
|
|
|
|
|
* config/rx-parse.y: Make the .L optional for ADC and SBB.
|
|
|
|
|
|
|
* config/rx-parse.y: IMM->IMM_, take an extra parameter for the
transfer size.
(IMM): New, call IMM_ with the default 32.
(IMMW,IMMB): Likewise, for 16 and 8.
(NIMM, MBIMM): Add size parameter.
(immediate): Likewise. Allow 32768..65535 for 16-bit transfers.
(MOV.W): Use IMMW instead of IMM.
* config/rx-parse.y (ADC,SBB): ADC and SBB only allow .L.
(op_dp20_rm_l): New.
(op_dp20_rim_l): New.
* config/rx-parse.y (op_dp20_rms): Rename to op_dp20_rr, don't allow mem.
(ABS, NEG, NOT): These only take REG or REG,REG (rr, not rms).
* gas/rx/mov.d: Update patterns for fixed MOV.W encoding.
2012-04-03 03:01:57 +00:00
|
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|
|
2012-04-02 DJ Delorie <dj@redhat.com>
|
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|
|
* config/rx-parse.y: IMM->IMM_, take an extra parameter for the
|
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|
|
|
|
transfer size.
|
|
|
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|
|
(IMM): New, call IMM_ with the default 32.
|
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|
|
|
|
(IMMW,IMMB): Likewise, for 16 and 8.
|
|
|
|
|
|
(NIMM, MBIMM): Add size parameter.
|
|
|
|
|
|
(immediate): Likewise. Allow 32768..65535 for 16-bit transfers.
|
|
|
|
|
|
(MOV.W): Use IMMW instead of IMM.
|
|
|
|
|
|
|
|
|
|
|
|
* config/rx-parse.y (ADC,SBB): ADC and SBB only allow .L.
|
|
|
|
|
|
(op_dp20_rm_l): New.
|
|
|
|
|
|
(op_dp20_rim_l): New.
|
|
|
|
|
|
|
|
|
|
|
|
* config/rx-parse.y (op_dp20_rms): Rename to op_dp20_rr, don't allow mem.
|
|
|
|
|
|
(ABS, NEG, NOT): These only take REG or REG,REG (rr, not rms).
|
|
|
|
|
|
|
2012-03-29 10:28:40 +00:00
|
|
|
|
2012-03-29 Terry Guo <terry.guo@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_cpus): Add cortex-m0plus.
|
|
|
|
|
|
* doc/c-arm.texi (ARM Options): Document -mcpu=cortex-m0plus.
|
|
|
|
|
|
|
2012-03-24 01:09:28 +00:00
|
|
|
|
2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_cpu_info_table): Add entry for Broadcom XLP.
|
|
|
|
|
|
* doc/c-mips.texi: Mention XLP.
|
|
|
|
|
|
|
2012-03-21 08:58:40 +00:00
|
|
|
|
2012-03-21 Thomas Schwinge <thomas@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
[SH] Support the .uaquad and .8byte directives also for non-sh64
|
|
|
|
|
|
configurations.
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-sh.c (sh_cons_fix_new, md_apply_fix) [!HAVE_SH64]: Handle
|
|
|
|
|
|
BFD_RELOC_64.
|
|
|
|
|
|
* doc/c-sh64.texi (SH64 Machine Directives): Move .uaquad
|
|
|
|
|
|
description...
|
|
|
|
|
|
* doc/c-sh.texi (SH Machine Directives): ... here.
|
|
|
|
|
|
|
2012-03-20 11:55:07 +00:00
|
|
|
|
2012-03-20 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_vmrs): Accept priviledged mode VFP system
|
|
|
|
|
|
registers.
|
|
|
|
|
|
(do_vmsr): Likewise.
|
|
|
|
|
|
(arm_opcode_insns): Do not default to using the FPSCR register in
|
|
|
|
|
|
the VMRS and VMSR registers.
|
|
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|
|
2012-03-16 23:19:47 +00:00
|
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|
|
2012-03-16 Roland McGrath <mcgrathr@google.com>
|
|
|
|
|
|
|
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|
|
* config/tc-i386.h [TE_NACL] (ELF_TARGET_FORMAT32, ELF_TARGET_FORMAT64):
|
|
|
|
|
|
Define for this case.
|
|
|
|
|
|
* configure.tgt (i386-*-nacl*): If ${cpu} is x86_64*, default to x32.
|
|
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|
|
2012-03-16 14:02:33 +00:00
|
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|
|
2012-03-16 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (aeabi_set_public_attributes): Correct
|
|
|
|
|
|
handling of Tag_DIV_use.
|
|
|
|
|
|
|
2012-03-15 11:19:13 +00:00
|
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|
|
2012-03-15 Thomas Schwinge <thomas@codesourcery.com>
|
|
|
|
|
|
|
|
|
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|
|
* doc/as.texinfo (Bundle directives): Fix typo.
|
|
|
|
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|
|
2012-03-14 17:51:16 +00:00
|
|
|
|
2012-03-14 Ryan Mansfield <rmansfield@qnx.com>
|
|
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|
|
|
|
|
|
|
|
|
* doc/as.texinfo (Bundle directives): Replace @defn with @dfn.
|
|
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|
|
|
|
2012-03-13 17:01:34 +00:00
|
|
|
|
2012-03-13 Roland McGrath <mcgrathr@google.com>
|
2012-03-13 16:59:57 +00:00
|
|
|
|
|
|
|
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|
|
* config/tc-arm.c (arm_frag_max_var): New function.
|
|
|
|
|
|
* config/tc-arm.h: Declare it.
|
|
|
|
|
|
(md_frag_max_var): New macro.
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (i386_frag_max_var): New function.
|
|
|
|
|
|
* config/tc-i386.h: Declare it.
|
|
|
|
|
|
(md_frag_max_var): New macro.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo (Bundle directives): New node.
|
|
|
|
|
|
(Pseudo Ops): Add it to the menu.
|
|
|
|
|
|
* NEWS: Mention new feature.
|
|
|
|
|
|
* read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro.
|
|
|
|
|
|
[HANDLE_BUNDLE] (bundle_align_p2): New variable.
|
|
|
|
|
|
[HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables.
|
|
|
|
|
|
[HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle):
|
|
|
|
|
|
New functions.
|
|
|
|
|
|
(assemble_one): New function if [HANDLE_BUNDLE], #define directly
|
|
|
|
|
|
to md_assembly if not.
|
|
|
|
|
|
(read_a_source_file): Call assemble_one in place of md_assemble.
|
|
|
|
|
|
(read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated
|
|
|
|
|
|
.bundle_lock at end of processing.
|
|
|
|
|
|
[HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock):
|
|
|
|
|
|
New functions.
|
|
|
|
|
|
[HANDLE_BUNDLE] (potable): Add their entries.
|
|
|
|
|
|
* read.h: Declare new functions.
|
|
|
|
|
|
|
include/opcode/
* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR.
opcodes/
* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
(PPCVEC2, PPCTMR, E6500): New short names.
(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
optional operands on sync instruction for E6500 target.
bfd/
* archures.c: Add bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add entryies for
bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
gas/
* config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500.
(ppc_handle_align): Add termination nop opcode for e500mc family.
* doc/as.texinfo: Document options -me5500 and -me6500.
* doc/c-ppc.texi: Likewise.
gas/testsuite/
* gas/ppc/e500mc64_nop.s: New test case for e500mc family
termination nops.
* gas/ppc/e500mc64_nop.d: Likewise.
* gas/ppc/e5500_nop.s: Likewise.
* gas/ppc/e5500_nop.d: Likewise.
* gas/ppc/e6500_nop.s: Likewise.
* gas/ppc/e6500_nop.d: Likewise.
* gas/ppc/e6500.s: New.
* gas/ppc/e6500.d: Likewise.
* gas/ppc/ppc.exp: Run e6500, e500mc64_nop, e5500_nop, and e6500_nop.
2012-03-09 23:39:06 +00:00
|
|
|
|
2012-03-10 Edmar Wienskoski <edmar@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500.
|
|
|
|
|
|
(ppc_handle_align): Add termination nop opcode for e500mc family.
|
|
|
|
|
|
* doc/as.texinfo: Document options -me5500 and -me6500.
|
|
|
|
|
|
* doc/c-ppc.texi: Likewise.
|
|
|
|
|
|
|
* mn10300.h (elf_mn10300_reloc_type): Add R_MN10300_TLS_GD,
R_MN10300_TLS_LD, R_MN10300_TLS_LDO, R_MN10300_TLS_GOTIE,
R_MN10300_TLS_IE, R_MN10300_TLS_LE, R_MN10300_TLS_DPTMOD,
R_MN10300_TLS_DTPOFF and R_MN10300_TLS_TPOFF.
* elf-m10300.c (elf32_mn10300_link_hash_entry): Add tls_type
field.
(elf32_mn10300_link_hash_table): Add tls_ldm_got entry;
(elf_mn10300_tdata): Define.
(elf_mn10300_local_got_tls_type): Define.
(elf_mn10300_howto_table): Add entries for R_MN10300_TLS_GD,
R_MN10300_TLS_LD, R_MN10300_TLS_LDO, R_MN10300_TLS_GOTIE,
R_MN10300_TLS_IE, R_MN10300_TLS_LE, R_MN10300_TLS_DPTMOD,
R_MN10300_TLS_DTPOFF, R_MN10300_TLS_TPOFF relocs.
(mn10300_reloc_map): Likewise.
(elf_mn10300_tls_transition): New function.
(dtpoff, tpoff, mn10300_do_tls_transition): New functions.
(mn10300_elf_check_relocs): Add TLS support.
(mn10300_elf_final_link_relocate): Likewise.
(mn10300_elf_relocate_section): Likewise.
(mn10300_elf_relax_section): Likewise.
(elf32_mn10300_link_hash_newfunc): Initialise new field.
(_bfd_mn10300_copy_indirect_symbol): New function.
(elf32_mn10300_link_hash_table_create): Initialise new fields.
(_bfd_mn10300_elf_size_dynamic_sections): Add TLS support.
(_bfd_mn10300_elf_finish_dynamic_symbol): Likewise.
(_bfd_mn10300_elf_reloc_type_class): Allocate an
elf_mn10300_obj_tdata structure.
(elf_backend_copy_indirect_symbol): Define.
* reloc.c (BFD_MN10300_TLS_GD, BFD_MN10300_TLS_LD,
BFD_MN10300_TLS_LDO, BFD_MN10300_TLS_GOTIE, BFD_MN10300_TLS_IE,
BFD_MN10300_TLS_LE, BFD_MN10300_TLS_DPTMOD,
BFD_MN10300_TLS_DTPOFF, BFD_MN10300_TLS_TPOFF): New relocations.
(BFD_RELOC_MN10300_32_PCREL, BFD_RELOC_MN10300_16_PCREL): Move to
alongside other MN10300 relocations.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* config/tc-mn10300.c (other_registers): Add SSP and USP.
(md_assemble): Add support for TLS relocs.
(mn10300_parse_name): Likewise.
* readelf.c (is_16bit_abs_reloc): Add detection of R_MN10300_16.
2012-03-07 17:52:00 +00:00
|
|
|
|
2012-03-07 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mn10300.c (other_registers): Add SSP and USP.
|
|
|
|
|
|
(md_assemble): Add support for TLS relocs.
|
|
|
|
|
|
(mn10300_parse_name): Likewise.
|
|
|
|
|
|
|
2012-02-27 12:36:21 +00:00
|
|
|
|
2012-02-27 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-crx.c (check_range): Correct uint32_t misconceptions.
|
|
|
|
|
|
|
2012-02-27 06:52:20 +00:00
|
|
|
|
2012-02-27 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-tic4x.c (tic4x_do_align): Remove ATTRIBUTE_UNUSED on
|
|
|
|
|
|
params. Properly generate NOP pattern. Comment reason for
|
|
|
|
|
|
subseg_text_p failure.
|
|
|
|
|
|
|
2012-02-27 06:40:42 +00:00
|
|
|
|
2012-02-27 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-h8300.c (constant_fits_width_p): Trim constant to 32 bits
|
|
|
|
|
|
and sign extend before range tests.
|
|
|
|
|
|
(constant_fits_size_p): Similarly.
|
|
|
|
|
|
(get_specific): Trim X_add_number to 32 bits.
|
|
|
|
|
|
(fix_operand_size): Likewise, and use unsigned test for signed
|
|
|
|
|
|
ranges.
|
|
|
|
|
|
|
2012-02-27 06:37:40 +00:00
|
|
|
|
2012-02-27 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-crx.c: Include bfd_stdint.h.
|
|
|
|
|
|
(getconstant): Remove irrelevant comment. Don't fail due to
|
|
|
|
|
|
sign-extension of int mask.
|
|
|
|
|
|
(check_range): Rewrite using unsigned arithmetic throughout.
|
|
|
|
|
|
|
2012-02-25 22:40:48 +00:00
|
|
|
|
2012-02-25 Walter Lee <walt@tilera.com>
|
|
|
|
|
|
|
|
|
|
|
|
* tc-tilepro.c (emit_tilepro_instruction): Check if symbol is
|
|
|
|
|
|
non-local before checking sy_value.
|
|
|
|
|
|
* tc-tilegx.c (emit_tilegx_instruction): Ditto.
|
|
|
|
|
|
|
Improve TLS support on TILE-Gx/TILEPro:
- Add support for TLS LE references.
- Support linker optimization of TLS references.
- Delete relocations of GOT/tp relative offsets beyond 32-bits.
This brings binutils in line with the support expected in gcc 4.7, for
TILE-Gx/TILEPro.
bfd/
* reloc.c: Add BFD_RELOC_TILEPRO_TLS_GD_CALL,
BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD,
BFD_RELOC_TILEPRO_TLS_IE_LOAD, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA,
BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE,
BFD_RELOC_TILEGX_TLS_GD_CALL, BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD, BFD_RELOC_TILEGX_TLS_IE_LOAD,
BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD,
BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD,
BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD, BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD.
Delete BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE.
* elf32-tilepro.c (tilepro_elf_howto_table): Update tilepro
relocations.
(tilepro_reloc_map): Ditto.
(tilepro_info_to_howto_rela): Ditto.
(reloc_to_create_func): Ditto.
(tilepro_tls_translate_to_le): New.
(tilepro_tls_translate_to_ie): New.
(tilepro_elf_tls_transition): New.
(tilepro_elf_check_relocs): Handle new tls relocations.
(tilepro_elf_gc_sweep_hook): Ditto.
(allocate_dynrelocs): Ditto.
(tilepro_elf_relocate_section): Ditto.
(tilepro_replace_insn): New.
(insn_mask_X1): New.
(insn_mask_X0_no_dest_no_srca): New
(insn_mask_X1_no_dest_no_srca): New
(insn_mask_Y0_no_dest_no_srca): New
(insn_mask_Y1_no_dest_no_srca): New
(srca_mask_X0): New
(srca_mask_X1): New
(insn_tls_le_move_X1): New
(insn_tls_le_move_zero_X0X1): New
(insn_tls_ie_lw_X1): New
(insn_tls_ie_add_X0X1): New
(insn_tls_ie_add_Y0Y1): New
(insn_tls_gd_add_X0X1): New
(insn_tls_gd_add_Y0Y1): New
* elfxx-tilegx.c (tilegx_elf_howto_table): Update tilegx
relocations.
(tilegx_reloc_map): Ditto.
(tilegx_info_to_howto_rela): Ditto.
(reloc_to_create_func): Ditto.
(tilegx_elf_link_hash_table): New field disable_le_transition.
(tilegx_tls_translate_to_le): New.
(tilegx_tls_translate_to_ie): New.
(tilegx_elf_tls_transition): New.
(tilegx_elf_check_relocs): Handle new tls relocations.
(tilegx_elf_gc_sweep_hook): Ditto.
(allocate_dynrelocs): Ditto.
(tilegx_elf_relocate_section): Ditto.
(tilegx_copy_bits): New.
(tilegx_replace_insn): New.
(insn_mask_X1): New.
(insn_mask_X0_no_dest_no_srca): New.
(insn_mask_X1_no_dest_no_srca): New.
(insn_mask_Y0_no_dest_no_srca): New.
(insn_mask_Y1_no_dest_no_srca): New.
(insn_mask_X0_no_operand): New.
(insn_mask_X1_no_operand): New.
(insn_mask_Y0_no_operand): New.
(insn_mask_Y1_no_operand): New.
(insn_tls_ie_ld_X1): New.
(insn_tls_ie_ld4s_X1): New.
(insn_tls_ie_add_X0X1): New.
(insn_tls_ie_add_Y0Y1): New.
(insn_tls_ie_addx_X0X1): New.
(insn_tls_ie_addx_Y0Y1): New.
(insn_tls_gd_add_X0X1): New.
(insn_tls_gd_add_Y0Y1): New.
(insn_move_X0X1): New.
(insn_move_Y0Y1): New.
(insn_add_X0X1): New.
(insn_add_Y0Y1): New.
(insn_addx_X0X1): New.
(insn_addx_Y0Y1): New.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* tc-tilepro.c (O_tls_le): Define operator.
(O_tls_le_lo16): Ditto.
(O_tls_le_hi16): Ditto.
(O_tls_le_ha16): Ditto.
(O_tls_gd_call): Ditto.
(O_tls_gd_add): Ditto.
(O_tls_ie_load): Ditto.
(md_begin): Delete old operators; handle new operators.
(emit_tilepro_instruction): Ditto.
(md_apply_fix): Ditto.
* tc-tilegx.c (O_hw1_got): Delete operator.
(O_hw2_got): Ditto.
(O_hw3_got): Ditto.
(O_hw2_last_got): Ditto.
(O_hw1_tls_gd): Ditto.
(O_hw2_tls_gd): Ditto.
(O_hw3_tls_gd): Ditto.
(O_hw2_last_tls_gd): Ditto.
(O_hw1_tls_ie): Ditto.
(O_hw2_tls_ie): Ditto.
(O_hw3_tls_ie): Ditto.
(O_hw2_last_tls_ie): Ditto.
(O_hw0_tls_le): Define operator.
(O_hw0_last_tls_le): Ditto.
(O_hw1_last_tls_le): Ditto.
(O_tls_gd_call): Ditto.
(O_tls_gd_add): Ditto.
(O_tls_ie_load): Ditto.
(O_tls_add): Ditto.
(md_begin): Delete old operators; handle new operators.
(emit_tilegx_instruction): Ditto.
(md_apply_fix): Ditto.
* doc/c-tilegx.texi: Delete old operators; document new operators.
* doc/c-tilepro.texi: Ditto.
include/elf/
* tilegx.h (R_TILEGX_IMM16_X0_HW1_GOT): Delete.
(R_TILEGX_IMM16_X1_HW1_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW2_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW2_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW3_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW3_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW1_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW1_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW2_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW2_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW3_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW3_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW1_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW1_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW2_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW2_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW3_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW3_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW0_TLS_LE): New relocation.
(R_TILEGX_IMM16_X1_HW0_TLS_LE): Ditto.
(R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE): Ditto.
(R_TILEGX_TLS_GD_CALL): Ditto.
(R_TILEGX_IMM8_X0_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_X1_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_Y0_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_Y1_TLS_GD_ADD): Ditto.
(R_TILEGX_TLS_IE_LOAD): Ditto.
(R_TILEGX_IMM8_X0_TLS_ADD): Ditto.
(R_TILEGX_IMM8_X1_TLS_ADD): Ditto.
(R_TILEGX_IMM8_Y0_TLS_ADD): Ditto.
(R_TILEGX_IMM8_Y1_TLS_ADD): Ditto.
* tilepro.h (R_TILEPRO_TLS_GD_CALL): New relocation.
(R_TILEPRO_IMM8_X0_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_X1_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_Y0_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_Y1_TLS_GD_ADD): Ditto.
(R_TILEPRO_TLS_IE_LOAD): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_LO): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_LO): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_HI): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_HI): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_HA): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_HA): Ditto.
include/opcode/
* tilegx.h (tilegx_mnemonic): Add TILEGX_OPC_LD4S_TLS,
TILEGX_OPC_LD_TLS.
* tilepro.h (tilepro_mnemonic): Add TILEPRO_OPC_LW_TLS,
TILEPRO_OPC_LW_TLS_SN.
opcodes/
* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
TILEPRO_OPC_LW_TLS_SN.
2012-02-25 22:24:21 +00:00
|
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|
2012-02-25 Walter Lee <walt@tilera.com>
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* tc-tilepro.c (O_tls_le): Define operator.
|
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(O_tls_le_lo16): Ditto.
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(O_tls_le_hi16): Ditto.
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(O_tls_le_ha16): Ditto.
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(O_tls_gd_call): Ditto.
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(O_tls_gd_add): Ditto.
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(O_tls_ie_load): Ditto.
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(md_begin): Delete old operators; handle new operators.
|
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(emit_tilepro_instruction): Ditto.
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(md_apply_fix): Ditto.
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* tc-tilegx.c (O_hw1_got): Delete operator.
|
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(O_hw2_got): Ditto.
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(O_hw3_got): Ditto.
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(O_hw2_last_got): Ditto.
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(O_hw1_tls_gd): Ditto.
|
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(O_hw2_tls_gd): Ditto.
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(O_hw3_tls_gd): Ditto.
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(O_hw2_last_tls_gd): Ditto.
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(O_hw1_tls_ie): Ditto.
|
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(O_hw2_tls_ie): Ditto.
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(O_hw3_tls_ie): Ditto.
|
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(O_hw2_last_tls_ie): Ditto.
|
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(O_hw0_tls_le): Define operator.
|
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(O_hw0_last_tls_le): Ditto.
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(O_hw1_last_tls_le): Ditto.
|
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(O_tls_gd_call): Ditto.
|
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(O_tls_gd_add): Ditto.
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(O_tls_ie_load): Ditto.
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(O_tls_add): Ditto.
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(md_begin): Delete old operators; handle new operators.
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(emit_tilegx_instruction): Ditto.
|
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(md_apply_fix): Ditto.
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* doc/c-tilegx.texi: Delete old operators; document new operators.
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* doc/c-tilepro.texi: Ditto.
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|
2012-02-25 18:57:55 +00:00
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|
2012-02-25 Walter Lee <walt@tilera.com>
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2012-02-25 20:07:08 +00:00
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* tc-tilepro.c (apply_special_operator): delete cases for
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got and tls operators.
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(md_apply_fix): Ditto.
|
2012-02-25 19:51:34 +00:00
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* tc-tilegx.c (md_begin): Set architecture and machine.
|
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(tilegx_target_format): Handle big endian.
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(OPTION_EB): Define.
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(OPTION_EL): Define.
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(md_longopts): Add entries for "EB" and "EL".
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(md_parse_option): Handle OPTION_EB and OPTION_EL.
|
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(md_show_usage): Add -EB and -EL.
|
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(md_number_to_chars): New.
|
2012-02-25 20:07:08 +00:00
|
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(apply_special_operator): delete cases for got and tls
|
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operators.
|
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(md_apply_fix): Ditto.
|
2012-02-25 19:51:34 +00:00
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* tc-tilegx.h (TARGET_BYTES_BIG_ENDIAN): Guard definition with
|
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ifndef.
|
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(md_number_to_chars): Delete.
|
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* configure.tgt (tilegx*be): Handle.
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* doc/as.texinfo [TILE-Gx]: Document -EB and -EL.
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* doc/c-tilegx.texi: Ditto.
|
2012-02-25 18:57:55 +00:00
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2012-02-21 18:09:48 +00:00
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2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (check_hle): Use HLEPrefixNone, HLEPrefixLock,
|
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HLEPrefixAny and HLEPrefixRelease.
|
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2012-02-21 16:55:31 +00:00
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2012-02-21 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* gas/config/tc-arm.h (DOUBLESLASH_LINE_COMMENTS): Define.
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2012-02-21 13:39:37 +00:00
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2012-02-21 Iain Sandoe <idsandoe@googlemail.com>
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* write.c (write_object_file): Add md_pre_output_hook.
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* config/obj-macho.c (obj_mach_o_check_before_writing): New.
|
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(obj_mach_o_pre_output_hook): New.
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* config/obj-macho.h (md_pre_output_hook): Define.
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(obj_mach_o_pre_output_hook): Declare.
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2012-02-21 09:13:02 +00:00
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2012-02-21 Tristan Gingold <gingold@adacore.com>
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* config/tc-i386.h (OBJ_MACH_O): New section.
|
|
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|
|
(TC_FORCE_RELOCATION): Use obj_mach_o_force_reloc.
|
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(TC_FORCE_RELOCATION_SUB_SAME): New
|
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|
(TC_FORCE_RELOCATION_SUB_LOCAL): New.
|
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|
|
(TC_VALIDATE_FIX_SUB): New.
|
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* frags.h (struct frag): OBJ_FRAG_TYPE, new field.
|
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|
* symbols.c (colon): obj_frob_colon: New hook.
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* write.c (write_object_file): md_pre_relax_hook, new
|
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hook.
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* config/obj-macho.c (obj_mach_o_frob_colon): New.
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(obj_mach_o_frob_label): Record sub-section labels.
|
|
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(obj_mach_o_frob_symbol): Rename from obj_macho_frob_symbol.
|
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(obj_mach_o_set_subsections): New.
|
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|
|
(obj_mach_o_pre_relax_hook): New.
|
|
|
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|
|
(obj_mach_o_in_different_subsection): New.
|
|
|
|
|
|
(obj_mach_o_force_reloc_sub_same): New.
|
|
|
|
|
|
(obj_mach_o_force_reloc_sub_local): New.
|
|
|
|
|
|
(obj_mach_o_force_reloc): New.
|
|
|
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|
|
* config/obj-macho.h (OBJ_SYMFIELD_TYPE): New.
|
|
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|
|
(obj_frob_colon): New Define.
|
|
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|
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|
(obj_mach_o_frob_label): Renamed.
|
|
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|
(obj_mach_o_frob_symbol): Renamed.
|
|
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|
|
(OBJ_FRAG_TYPE): New.
|
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|
|
|
|
(obj_mach_o_in_different_subsection, obj_mach_o_force_reloc,
|
|
|
|
|
|
obj_mach_o_force_reloc_sub_same,
|
|
|
|
|
|
obj_mach_o_force_reloc_sub_local): New declarations.
|
|
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|
|
|
|
2012-02-20 20:11:32 +00:00
|
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|
|
2012-02-20 Iain Sandoe <idsandoe@googlemail.com>
|
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|
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* config/obj-macho.c (obj_mach_o_is_frame_section): New.
|
|
|
|
|
|
(obj_mach_o_allow_local_subtract): New.
|
|
|
|
|
|
* config/obj-macho.h (md_allow_local_subtract): Define.
|
|
|
|
|
|
(obj_mach_o_allow_local_subtract): Declare.
|
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|
|
2012-02-20 19:44:40 +00:00
|
|
|
|
2012-02-20 Iain Sandoe <idsandoe@googlemail.com>
|
|
|
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|
|
|
|
|
|
|
|
* config/obj-macho.c (obj_mach_o_make_or_get_sect): In the absence of
|
|
|
|
|
|
canonical information, try to determine CODE and DEBUG section flags
|
|
|
|
|
|
from the mach-o section data.
|
|
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|
|
2012-02-20 10:25:02 +00:00
|
|
|
|
2012-02-20 Nick Clifton <nickc@redhat.com>
|
|
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|
|
|
|
|
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|
|
* cgen.c (gas_cgen_parse_operand): Do not set BSF_RELC flag on
|
|
|
|
|
|
local symbols.
|
|
|
|
|
|
|
2012-02-12 15:47:17 +00:00
|
|
|
|
2012-02-12 Iain Sandoe <idsandoe@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-macho.c (obj_mach_o_indirect_symbol): Force promotion of
|
|
|
|
|
|
any local symbol used as an indirect.
|
|
|
|
|
|
|
2012-02-10 13:12:55 +00:00
|
|
|
|
2012-02-10 Iain Sandoe <idsandoe@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-macho.c (obj_mach_o_make_or_get_sect): Always fill in
|
|
|
|
|
|
stub size when provided. (obj_mach_o_section): Flag that stub-size
|
|
|
|
|
|
has been provided.
|
|
|
|
|
|
|
Implement Intel Transactional Synchronization Extensions
gas/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (HLE_PREFIX): New.
(check_hle): Likewise.
(_i386_insn): Add have_hle.
(cpu_arch): Add .hle and .rtm.
(md_assemble): Call check_hle if i.have_hle isn't zero.
(parse_insn): Set i.have_hle to 1 for HLE prefix.
(output_jump): Support up to 2 byte opcode.
* doc/c-i386.texi: Document hle/.hle and rtm/.rtm.
gas/testsuite/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/hle-intel.d: New.
* gas/i386/hle.d: Likewise.
* gas/i386/hle.s: Likewise.
* gas/i386/hlebad.l: Likewise.
* gas/i386/hlebad.s: Likewise.
* gas/i386/rtm-intel.d: Likewise.
* gas/i386/rtm.d: Likewise.
* gas/i386/rtm.s: Likewise.
* gas/i386/x86-64-hle-intel.d: Likewise.
* gas/i386/x86-64-hle.d: Likewise.
* gas/i386/x86-64-hle.s: Likewise.
* gas/i386/x86-64-hlebad.l: Likewise.
* gas/i386/x86-64-hlebad.s: Likewise.
* gas/i386/x86-64-rtm-intel.d: Likewise.
* gas/i386/x86-64-rtm.d: Likewise.
* gas/i386/x86-64-rtm.s: Likewise.
* gas/i386/i386.exp: Run hle, hle-intel, hlebad x86-64-hle, rtm,
rtm-intel, x86-64-hle-intel, x86-64-hlebad, x86-64-rtm and
x86-64-rtm-intel.
include/opcode/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (XACQUIRE_PREFIX_OPCODE): New.
(XRELEASE_PREFIX_OPCODE): Likewise.
opcodes/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (HLE_Fixup1): New.
(HLE_Fixup2): Likewise.
(HLE_Fixup3): Likewise.
(Ebh1): Likewise.
(Evh1): Likewise.
(Ebh2): Likewise.
(Evh2): Likewise.
(Ebh3): Likewise.
(Evh3): Likewise.
(MOD_C6_REG_7): Likewise.
(MOD_C7_REG_7): Likewise.
(RM_C6_REG_7): Likewise.
(RM_C7_REG_7): Likewise.
(XACQUIRE_PREFIX): Likewise.
(XRELEASE_PREFIX): Likewise.
(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
MOD_C6_REG_7 and MOD_C7_REG_7.
(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
xtest.
(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
CPU_RTM_FLAGS.
(cpu_flags): Add CpuHLE and CpuRTM.
(opcode_modifiers): Add HLEPrefixOk.
* i386-opc.h (CpuHLE): New.
(CpuRTM): Likewise.
(HLEPrefixOk): Likewise.
(i386_cpu_flags): Add cpuhle and cpurtm.
(i386_opcode_modifier): Add hleprefixok.
* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
operand. Add xacquire, xrelease, xabort, xbegin, xend and
xtest.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2012-02-08 18:20:41 +00:00
|
|
|
|
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (HLE_PREFIX): New.
|
|
|
|
|
|
(check_hle): Likewise.
|
|
|
|
|
|
(_i386_insn): Add have_hle.
|
|
|
|
|
|
(cpu_arch): Add .hle and .rtm.
|
|
|
|
|
|
(md_assemble): Call check_hle if i.have_hle isn't zero.
|
|
|
|
|
|
(parse_insn): Set i.have_hle to 1 for HLE prefix.
|
|
|
|
|
|
(output_jump): Support up to 2 byte opcode.
|
|
|
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|
|
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|
|
* doc/c-i386.texi: Document hle/.hle and rtm/.rtm.
|
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|
|
|
|
2012-02-02 11:55:43 +00:00
|
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|
|
2012-02-02 Tristan Gingold <gingold@adacore.com>
|
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|
|
|
|
|
|
|
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|
|
* config/obj-macho.c (obj_mach_o_zerofill): Silent
|
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|
|
|
|
uninitialized variable warning.
|
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|
|
2012-02-02 09:26:04 +00:00
|
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|
|
2012-02-02 Nick Clifton <nickc@redhat.com>
|
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|
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|
|
|
|
|
|
PR gas/13224
|
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|
|
* config/obj-elf.c (obj_elf_parse_section_letters): Rename 'clone'
|
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|
|
to 'is_clone' to avoid shadowing a gloabl.
|
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|
|
(obj_elf_section): Likewise.
|
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|
|
2012-01-31 15:01:56 +00:00
|
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|
|
2012-01-31 Paul Brook <paul@codesourcery.com>
|
2012-02-02 09:26:04 +00:00
|
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|
2012-01-31 15:01:56 +00:00
|
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|
* doc/c-tic6x.c: Fix typo.
|
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|
|
2012-01-26 14:56:49 +00:00
|
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|
2012-01-26 Alexey Makhalov <makhaloff@gmail.com>
|
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|
|
PR gas/13624
|
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|
|
* app.c (app_push): Set 'add_newlines' to zero after saving.
|
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|
|
2012-01-25 01:40:11 +00:00
|
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|
2012-01-24 DJ Delorie <dj@redhat.com>
|
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|
|
* config/rl78-parse.y (NOT1): Add.
|
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|
|
2012-01-23 21:42:04 +00:00
|
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|
|
2012-01-23 Roland McGrath <mcgrathr@google.com>
|
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|
|
* configure.tgt (i386-*-nacl*): Match it.
|
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|
|
* config/te-nacl.h: New file.
|
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|
|
* config/tc-i386.h [TE_NACL] (ELF_TARGET_FORMAT): Define for this case.
|
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|
|
* config/tc-i386.c [TE_NACL] (i386_comment_chars, PREFIX_SEPARATOR):
|
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|
|
|
|
Use TE_GNU et al case for TE_NACL too.
|
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|
|
|
2012-01-20 20:53:50 +00:00
|
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|
|
2012-01-20 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (_i386_insn): Replace disp32_encoding with
|
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|
|
|
disp_encoding.
|
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|
|
(md_assemble): Updated.
|
|
|
|
|
|
(output_branch): Likewise.
|
|
|
|
|
|
(parse_insn): Support .d8 suffix.
|
|
|
|
|
|
(build_modrm_byte): Fake zero displacement for .d8 and .d32
|
|
|
|
|
|
suffixes.
|
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|
|
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|
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|
|
* doc/c-i386.texi: Document .d8 suffix.
|
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|
|
2012-01-17 00:20:30 +00:00
|
|
|
|
2012-01-17 Andrew Burgess <aburgess@broadcom.com>
|
|
|
|
|
|
|
|
|
|
|
|
* write.c (fix_new_internal): Don't mark used parameter as unused.
|
|
|
|
|
|
|
2012-01-17 00:07:04 +00:00
|
|
|
|
2012-01-17 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* as.c (parse_args): Update copyright message year.
|
|
|
|
|
|
|
2012-01-13 22:19:32 +00:00
|
|
|
|
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add ".vmfunc".
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Document vmfunc.
|
|
|
|
|
|
|
2012-01-13 15:19:13 +00:00
|
|
|
|
2012-01-13 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-macho.c (obj_mach_o_reorder_section_relocs): New.
|
|
|
|
|
|
* config/obj-macho.h (SET_SECTION_RELOCS): Define.
|
|
|
|
|
|
(obj_mach_o_reorder_section_relocs): Declare.
|
|
|
|
|
|
|
2012-01-13 12:59:30 +00:00
|
|
|
|
2012-01-13 Iain Sandoe <idsandoe@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-macho.c (obj_mach_o_set_indirect_symbols): Handle
|
|
|
|
|
|
absolute indirect symbols.
|
|
|
|
|
|
|
2012-01-13 11:55:02 +00:00
|
|
|
|
2012-01-13 Iain Sandoe <idsandoe@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-macho.c (obj_mach_o_set_vma_data): New type.
|
|
|
|
|
|
(obj_mach_o_set_section_vma): New.
|
|
|
|
|
|
(obj_mach_o_post_relax_hook): New.
|
|
|
|
|
|
* config/obj-macho.h (md_post_relax_hook): Define.
|
|
|
|
|
|
(obj_mach_o_post_relax_hook): Declare.
|
|
|
|
|
|
|
2012-01-12 14:03:12 +00:00
|
|
|
|
2012-01-12 Iain Sandoe <idsandoe@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-macho.c (obj_mach_o_set_symbol_qualifier): Switch off
|
|
|
|
|
|
lazy when the symbol is private_extern.
|
|
|
|
|
|
(obj_mach_o_indirect_sym): New type.
|
|
|
|
|
|
(obj_mach_o_indirect_symbol): New.
|
|
|
|
|
|
(mach_o_pseudo_table): Use obj_mach_o_indirect_symbol.
|
|
|
|
|
|
(obj_macho_frob_label): Adjust to avoid adding bsyms for locals.
|
|
|
|
|
|
(obj_macho_frob_label): Likewise. Adjust external and comm
|
|
|
|
|
|
symbol tests.
|
|
|
|
|
|
(obj_mach_o_set_indirect_symbols): New.
|
|
|
|
|
|
(obj_mach_o_frob_file_after_relocs): New.
|
|
|
|
|
|
*config/obj-macho.h (obj_frob_file_after_relocs): Define.
|
|
|
|
|
|
(obj_mach_o_frob_file_after_relocs): Declare.
|
|
|
|
|
|
|
2012-01-12 08:53:34 +00:00
|
|
|
|
2012-01-12 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/13591
|
|
|
|
|
|
* config/obj-coff.h (sy_obj): Rename macro to avoid a name conflict.
|
|
|
|
|
|
|
2012-01-10 Tristan Gingold <gingold@adacore.com>
* struc-symbol.h (struct symbol_flags): New struct, created from...
(struct symbol): ... this one. Add sy_flags field, remove flag fields.
(struct local_symbol): Replace lsy_marker field by lsy_flags.
Adjust comment.
(local_symbol_resolved_p): Adjust.
(local_symbol_mark_resolved): Likewise.
* symbols.c (LOCAL_SYMBOL_CHECK): Adjust.
(local_symbol_make, local_symbol_convert, colon)
(symbol_clone_if_forward_ref, verify_symbol_chain)
(resolve_symbol_value, snapshot_symbol, S_GET_VALUE)
(S_IS_WEAKREFR, S_IS_WEAKREFD, S_IS_VOLATILE, S_IS_FORWARD_REF)
(S_SET_WEAKREFR, S_CLEAR_WEAKREFR, S_SET_WEAKREFD)
(S_CLEAR_WEAKREFD, S_SET_VOLATILE, S_CLEAR_VOLATILE)
(S_SET_FORWARD_REF, symbol_same_p, symbol_mark_used)
(symbol_clear_used, symbol_used_p, symbol_mark_used_in_reloc)
(symbol_clear_used_in_reloc, symbol_used_in_reloc_p)
(symbol_mark_mri_common, symbol_clear_mri_common)
(symbol_mri_common_p, symbol_mark_written, symbol_clear_written)
(symbol_written_p, symbol_mark_resolved, symbol_resolved_p)
(symbol_equated_reloc_p, dot_symbol_init)
(print_symbol_value_1): Adjust.
2012-01-10 11:48:26 +00:00
|
|
|
|
2012-01-10 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* struc-symbol.h (struct symbol_flags): New struct, created from...
|
|
|
|
|
|
(struct symbol): ... this one. Add sy_flags field, remove flag fields.
|
|
|
|
|
|
(struct local_symbol): Replace lsy_marker field by lsy_flags.
|
|
|
|
|
|
Adjust comment.
|
|
|
|
|
|
(local_symbol_resolved_p): Adjust.
|
|
|
|
|
|
(local_symbol_mark_resolved): Likewise.
|
|
|
|
|
|
* symbols.c (LOCAL_SYMBOL_CHECK): Adjust.
|
|
|
|
|
|
(local_symbol_make, local_symbol_convert, colon)
|
|
|
|
|
|
(symbol_clone_if_forward_ref, verify_symbol_chain)
|
|
|
|
|
|
(resolve_symbol_value, snapshot_symbol, S_GET_VALUE)
|
|
|
|
|
|
(S_IS_WEAKREFR, S_IS_WEAKREFD, S_IS_VOLATILE, S_IS_FORWARD_REF)
|
|
|
|
|
|
(S_SET_WEAKREFR, S_CLEAR_WEAKREFR, S_SET_WEAKREFD)
|
|
|
|
|
|
(S_CLEAR_WEAKREFD, S_SET_VOLATILE, S_CLEAR_VOLATILE)
|
|
|
|
|
|
(S_SET_FORWARD_REF, symbol_same_p, symbol_mark_used)
|
|
|
|
|
|
(symbol_clear_used, symbol_used_p, symbol_mark_used_in_reloc)
|
|
|
|
|
|
(symbol_clear_used_in_reloc, symbol_used_in_reloc_p)
|
|
|
|
|
|
(symbol_mark_mri_common, symbol_clear_mri_common)
|
|
|
|
|
|
(symbol_mri_common_p, symbol_mark_written, symbol_clear_written)
|
|
|
|
|
|
(symbol_written_p, symbol_mark_resolved, symbol_resolved_p)
|
|
|
|
|
|
(symbol_equated_reloc_p, dot_symbol_init)
|
|
|
|
|
|
(print_symbol_value_1): Adjust.
|
|
|
|
|
|
|
2012-01-09 10:47:50 +00:00
|
|
|
|
2012-01-09 Iain Sandoe <idsandoe@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-macho.c (obj_mach_o_weak): Remove.
|
|
|
|
|
|
(obj_mach_o_common_parse): Set symbol qualifiers.
|
|
|
|
|
|
(LAZY, REFE): New macros.
|
|
|
|
|
|
(obj_mach_o_symbol_type): New enum.
|
|
|
|
|
|
(obj_mach_o_set_symbol_qualifier): New.
|
|
|
|
|
|
(obj_mach_o_sym_qual): New.
|
|
|
|
|
|
(mach_o_pseudo_table): Add symbol qualifiers, set indirect_symbol to
|
|
|
|
|
|
a dummy function.
|
|
|
|
|
|
(obj_mach_o_type_for_symbol): New.
|
|
|
|
|
|
(obj_macho_frob_label): New.
|
|
|
|
|
|
(obj_macho_frob_symbol): New.
|
|
|
|
|
|
* config/obj-macho.h (S_SET_ALIGN): Amend temorary var name.
|
|
|
|
|
|
(obj_frob_label, obj_macho_frob_label): Declare.
|
|
|
|
|
|
(obj_frob_symbol, obj_macho_frob_symbol): Declare.
|
|
|
|
|
|
|
2012-01-08 12:33:54 +00:00
|
|
|
|
2012-01-08 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (s_tls_rel_directive): Call mips_clear_insn_labels.
|
|
|
|
|
|
|
2012-01-08 12:11:42 +00:00
|
|
|
|
2012-01-08 Andrew Pinski <andrew.pinski@caviumnetworks.com>
|
|
|
|
|
|
Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_move_labels): Take the list of labels and
|
|
|
|
|
|
textness as parameters.
|
|
|
|
|
|
(mips_move_text_labels): New function.
|
|
|
|
|
|
(append_insn): Use it instead of mips_move_labels.
|
|
|
|
|
|
(mips_emit_delays, start_noreorder): Likewise.
|
|
|
|
|
|
(mips_align): Take the labels rather than just one label.
|
|
|
|
|
|
Move all labels to after the .align.
|
|
|
|
|
|
(s_align): Change the last argument to mips_align.
|
|
|
|
|
|
(s_cons): Likewise.
|
|
|
|
|
|
(s_float_cons): Likewise.
|
|
|
|
|
|
(s_gpword): Likewise.
|
|
|
|
|
|
(s_gpdword): Likewise.
|
|
|
|
|
|
|
2012-01-06 16:23:39 +00:00
|
|
|
|
2012-01-06 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c: Update copyright year.
|
|
|
|
|
|
(lex_got): Also defined for Mach-O.
|
|
|
|
|
|
Add a guard for non-ELF configuration.
|
|
|
|
|
|
(md_longopts): Also handle -64 for Mach-O.
|
|
|
|
|
|
(md_parse_option): Likewise.
|
|
|
|
|
|
(i386_target_format): Adjust for x86_64-darwin.
|
|
|
|
|
|
|
2012-01-04 10:59:54 +00:00
|
|
|
|
2012-01-04 Iain Sandoe <idsandoe@googlemail.com>
|
|
|
|
|
|
|
|
|
|
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* config/obj-macho.c (obj_mach_o_segT_from_bfd_name): Tidy definition.
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(obj_mach_o_get_section_names): New (split from obj_mach_o_section).
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(obj_mach_o_make_or_get_sect): Likewise.
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(obj_mach_o_section): Split out the functionality shared with zerofill.
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(obj_mach_o_zerofill): New.
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(obj_mach_o_common_parse): Ensure whitespace is skipped.
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(mach_o_pseudo_table): Add .zerofill.
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2012-01-03 13:18:48 +00:00
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2012-01-03 Iain Sandoe <idsandoe@googlemail.com>
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* config/obj-macho.c (obj_macho_process_stab): New.
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* config/obj-macho.h (OBJ_PROCESS_STAB): Define.
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(obj_macho_process_stab): Declare.
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2012-01-05 10:09:39 +00:00
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For older changes see ChangeLog-2011
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2002-01-07 12:12:47 +00:00
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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