old-cross-binutils/include/opcode
Andrew Pinski b015e599c7 binutils/ChangeLog:
* doc/binutils.texi: Document -Mvirt disassembler option.

gas/ChangeLog:
* config/tc-mips.c (struct mips_set_options): New ase_virt field.
(mips_opts): Update for the new field.
(file_ase_virt): New variable.
(ISA_SUPPORTS_VIRT_ASE): New macro.
(ISA_SUPPORTS_VIRT64_ASE): New macro.
(MIPS_CPU_ASE_VIRT): New define.
(is_opcode_valid): Handle ase_virt.
(macro_build): Handle "+J".
(validate_mips_insn): Likewise.
(mips_ip): Likewise.
(enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
(md_longopts): Add mvirt and mnovirt
(md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
(mips_after_parse_args): Handle ase_virt field.
(s_mipsset): Handle "virt" and "novirt".
(mips_elf_final_processing): Add a comment about virt ASE might need a new flag.
(md_show_usage): Print out the usage of -mvirt and mno-virt options.
* doc/c-mips.texi: Document -mvirt and -mno-virt.
Document ".set virt" and ".set novirt".

gas/testsuite/ChangeLog:
* gas/mips/mips.exp: Run virt and virt64 testcases.
* gas/mips/virt.d: New file.
* gas/mips/virt.s: New file.
* gas/mips/virt64.d: New file.
* gas/mips/virt64.s: New file.

include/opcode/ChangeLog:
* mips.h (OP_MASK_CODE10): Correct definition.
(OP_SH_CODE10): Likewise.
Add a comment that "+J" is used now for OP_*CODE10.
(INSN_ASE_MASK): Update.
(INSN_VIRT): New macro.
(INSN_VIRT64): New macro

opcodes/ChangeLog:
* mips-dis.c (mips_arch_choices): Add INSN_VIRT to mips32r2 .
Add INSN_VIRT and INSN_VIRT64 to mips64r2.
(parse_mips_dis_option): Handle the virt option.
(print_insn_args): Handle "+J".
(print_mips_disassembler_options): Print out message about virt64.
* mips-opc.c (IVIRT): New define.
(IVIRT64): New define.
(mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0,
tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp VIRT instructions.
Move rfe to the bottom as it conflicts with tlbgp.
2013-05-10 01:08:48 +00:00
..
aarch64.h include/opcode/ 2013-02-28 19:18:40 +00:00
alpha.h
arc.h
arm.h Add support for AArch32 CRC instruction in ARMv8. 2013-03-11 11:09:33 +00:00
avr.h
bfin.h
cgen.h
ChangeLog binutils/ChangeLog: 2013-05-10 01:08:48 +00:00
ChangeLog-9103
convex.h
cr16.h (make_instruction): Rename to cr16_make_instruction. 2013-01-07 15:09:07 +00:00
cris.h
crx.h
d10v.h
d30v.h
dlx.h
h8300.h * elf32-h8300 (h8_relax_section): Add new relaxation of mov 2013-03-21 16:08:07 +00:00
hppa.h
i370.h
i386.h
i860.h
i960.h
ia64.h
m68hc11.h
m68k.h
m88k.h
metag.h * common.h: Fix case of "Meta". 2013-01-10 09:49:22 +00:00
mips.h binutils/ChangeLog: 2013-05-10 01:08:48 +00:00
mmix.h
mn10200.h
mn10300.h
moxie.h
msp430.h * archures.c: Add some more MSP430 machine numbers. 2013-05-02 21:06:15 +00:00
nios2.h 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de> 2013-03-12 19:18:57 +00:00
np1.h
ns32k.h
or32.h
pdp11.h
pj.h
pn.h
ppc.h include/opcode/ 2013-01-11 02:25:36 +00:00
pyr.h
rl78.h
rx.h
s390.h
score-datadep.h
score-inst.h
sparc.h Increase the accuracy of sparc instruction aliases. 2013-04-06 22:22:03 +00:00
spu-insns.h
spu.h
tahoe.h
tic4x.h
tic6x-control-registers.h
tic6x-insn-formats.h PR binutils/15068 2013-03-27 11:43:37 +00:00
tic6x-opcode-table.h PR binutils/15068 2013-03-28 09:25:11 +00:00
tic6x.h PR binutils/15068 2013-03-27 11:43:37 +00:00
tic30.h
tic54x.h
tic80.h
tilegx.h
tilepro.h
v850.h * elf32-v850.c (v850_elf_is_target_special_symbol): New function. 2013-04-03 14:42:10 +00:00
vax.h
xgate.h