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PR binutils/15068

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* tic6x-dis.c: Add support for displaying 16-bit insns.
	* tic6xc-insn-formats.h (FLD): Add use of bitfield array.
	Add 16-bit opcodes.
	* tic6xc-opcode-table.h: Add 16-bit insns.
	* tic6x.h: Add support for 16-bit insns.
	* config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
	* gas/tic6x/insns16-d-unit.s: New test.
	* gas/tic6x/insns16-d-unit.d: Expected disassembly.
	* gas/tic6x/insns16-ddec.s: New test.
	* gas/tic6x/insns16-ddec.d: Expected disassembly.
	* gas/tic6x/insns16-dinc.s: New test.
	* gas/tic6x/insns16-dinc.d: Expected disassembly.
	* gas/tic6x/insns16-dind.s: New test.
	* gas/tic6x/insns16-dind.d: Expected disassembly.
	* gas/tic6x/insns16-doff4.s: New test.
	* gas/tic6x/insns16-doff4.d: Expected disassembly.
	* gas/tic6x/insns16-l-unit.s: New test.
	* gas/tic6x/insns16-l-unit.d: Expected disassembly.
	* gas/tic6x/insns16-lsd-unit.s: New test.
	* gas/tic6x/insns16-lsd-unit.d: Expected disassembly.
	* gas/tic6x/insns16-m-unit.s: New test.
	* gas/tic6x/insns16-m-unit.d: Expected disassembly.
	* gas/tic6x/insns16-s-unit-pcrel.s: New test.
	* gas/tic6x/insns16-s-unit-pcrel.d: Expected disassembly.
	* gas/tic6x/insns16-s-unit: New test.
	* gas/tic6x/insns16-s-unit.d: Expected disassembly.
This commit is contained in:
Nick Clifton 2013-03-27 11:43:37 +00:00
parent 6f820c855c
commit 51dcdd4d3e
29 changed files with 4941 additions and 96 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
gas/ChangeLog
View file

@ -1,3 +1,8 @@
2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
PR binutils/15068
* config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
2013-03-26 Nick Clifton <nickc@redhat.com>
PR gas/15295

48
gas/config/tc-tic6x.c
View file

@ -2484,7 +2484,7 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
fldd = tic6x_field_from_fmt (fmt, opct->fixed_fields[fld].field_id);
if (fldd == NULL)
abort ();
opcode_value |= opct->fixed_fields[fld].min_val << fldd->low_pos;
opcode_value |= opct->fixed_fields[fld].min_val << fldd->bitfields[0].low_pos;
}
}
@ -2515,7 +2515,7 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
ucexp = operands[opno].value.exp;
unsigned_constant:
if (ucexp.X_add_number < 0
|| ucexp.X_add_number >= (1 << fldd->width))
|| ucexp.X_add_number >= (1 << fldd->bitfields[0].width))
{
if (print_errors)
as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
@ -2534,7 +2534,7 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
value = 0;
/* Opcode table should not permit non-constants without
a known relocation for them. */
if (fldd->low_pos != 7 || fldd->width != 16)
if (fldd->bitfields[0].low_pos != 7 || fldd->bitfields[0].width != 16)
abort ();
*fix_needed = TRUE;
*fix_exp = &operands[opno].value.exp;
@ -2545,8 +2545,8 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
}
sign_value = SEXT (operands[opno].value.exp.X_add_number);
signed_constant:
if (sign_value < -(1 << (fldd->width - 1))
|| (sign_value >= (1 << (fldd->width - 1))))
if (sign_value < -(1 << (fldd->bitfields[0].width - 1))
|| (sign_value >= (1 << (fldd->bitfields[0].width - 1))))
{
if (print_errors)
as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
@ -2554,8 +2554,8 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
*ok = FALSE;
return 0;
}
value = sign_value + (1 << (fldd->width - 1));
value ^= (1 << (fldd->width - 1));
value = sign_value + (1 << (fldd->bitfields[0].width - 1));
value ^= (1 << (fldd->bitfields[0].width - 1));
break;
case tic6x_coding_ucst_minus_one:
@ -2564,7 +2564,7 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
if (operands[opno].value.exp.X_op != O_constant)
abort ();
if (operands[opno].value.exp.X_add_number <= 0
|| operands[opno].value.exp.X_add_number > (1 << fldd->width))
|| operands[opno].value.exp.X_add_number > (1 << fldd->bitfields[0].width))
{
if (print_errors)
as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
@ -2636,7 +2636,7 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
value = 0;
/* Opcode table should not use this encoding without a known
relocation. */
if (fldd->low_pos != 8 || fldd->width != 15)
if (fldd->bitfields[0].low_pos != 8 || fldd->bitfields[0].width != 15)
abort ();
/* We do not check for offset divisibility here; such a
check is not needed at this point to encode the value,
@ -2663,7 +2663,7 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
value = 0;
/* Opcode table should not use this encoding without a
known relocation. */
if (fldd->low_pos != 7 || fldd->width != 16)
if (fldd->bitfields[0].low_pos != 7 || fldd->bitfields[0].width != 16)
abort ();
*fix_needed = TRUE;
*fix_exp = &operands[opno].value.exp;
@ -2683,7 +2683,7 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
value = 0;
/* Opcode table should not use this encoding without a
known relocation. */
if (fldd->low_pos != 7 || fldd->width != 16)
if (fldd->bitfields[0].low_pos != 7 || fldd->bitfields[0].width != 16)
abort ();
*fix_needed = TRUE;
*fix_exp = &operands[opno].value.exp;
@ -2701,13 +2701,13 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
*fix_needed = TRUE;
*fix_exp = &operands[opno].value.exp;
*fix_pcrel = 1;
if (fldd->low_pos == 7 && fldd->width == 21)
if (fldd->bitfields[0].low_pos == 7 && fldd->bitfields[0].width == 21)
*fx_r_type = BFD_RELOC_C6000_PCR_S21;
else if (fldd->low_pos == 16 && fldd->width == 12)
else if (fldd->bitfields[0].low_pos == 16 && fldd->bitfields[0].width == 12)
*fx_r_type = BFD_RELOC_C6000_PCR_S12;
else if (fldd->low_pos == 13 && fldd->width == 10)
else if (fldd->bitfields[0].low_pos == 13 && fldd->bitfields[0].width == 10)
*fx_r_type = BFD_RELOC_C6000_PCR_S10;
else if (fldd->low_pos == 16 && fldd->width == 7)
else if (fldd->bitfields[0].low_pos == 16 && fldd->bitfields[0].width == 7)
*fx_r_type = BFD_RELOC_C6000_PCR_S7;
else
/* Opcode table should not use this encoding without a
@ -2825,7 +2825,7 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
abort ();
}
if (mem.offset.exp.X_add_number < 0
|| mem.offset.exp.X_add_number >= (1 << fldd->width) * scale)
|| mem.offset.exp.X_add_number >= (1 << fldd->bitfields[0].width) * scale)
{
if (print_errors)
as_bad (_("offset in operand %u of '%.*s' out of range"),
@ -2858,7 +2858,7 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
if (mem.offset.exp.X_op != O_constant)
abort ();
if (mem.offset.exp.X_add_number < 0
|| mem.offset.exp.X_add_number >= (1 << fldd->width))
|| mem.offset.exp.X_add_number >= (1 << fldd->bitfields[0].width))
{
if (print_errors)
as_bad (_("offset in operand %u of '%.*s' out of range"),
@ -2931,7 +2931,7 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
case tic6x_coding_spmask:
/* The position of such a field is hardcoded in the handling
of "||^". */
if (fldd->low_pos != 18)
if (fldd->bitfields[0].low_pos != 18)
abort ();
value = 0;
for (opno = 0; opno < num_operands; opno++)
@ -2986,7 +2986,7 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
fcyc_bits = 4;
else
abort ();
if (fcyc_bits > fldd->width)
if (fcyc_bits > fldd->bitfields[0].width)
abort ();
if (opct->variable_fields[fld].coding_method == tic6x_coding_fstg)
@ -2994,7 +2994,7 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
int i, t;
if (operands[opno].value.exp.X_add_number < 0
|| (operands[opno].value.exp.X_add_number
>= (1 << (fldd->width - fcyc_bits))))
>= (1 << (fldd->bitfields[0].width - fcyc_bits))))
{
if (print_errors)
as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
@ -3003,7 +3003,7 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
return 0;
}
value = operands[opno].value.exp.X_add_number;
for (t = 0, i = fcyc_bits; i < fldd->width; i++)
for (t = 0, i = fcyc_bits; i < fldd->bitfields[0].width; i++)
{
t = (t << 1) | (value & 1);
value >>= 1;
@ -3054,7 +3054,7 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
return 0;
}
opcode_value |= value << fldd->low_pos;
opcode_value |= value << fldd->bitfields[0].low_pos;
}
if (this_line_creg)
@ -3077,8 +3077,8 @@ tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
if (z == NULL)
abort ();
opcode_value |= this_line_creg << creg->low_pos;
opcode_value |= this_line_z << z->low_pos;
opcode_value |= this_line_creg << creg->bitfields[0].low_pos;
opcode_value |= this_line_z << z->bitfields[0].low_pos;
}
*ok = TRUE;

24
gas/testsuite/ChangeLog
View file

@ -1,3 +1,27 @@
2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
PR binutils/15068
* gas/tic6x/insns16-d-unit.s: New test.
* gas/tic6x/insns16-d-unit.d: Expected disassembly.
* gas/tic6x/insns16-ddec.s: New test.
* gas/tic6x/insns16-ddec.d: Expected disassembly.
* gas/tic6x/insns16-dinc.s: New test.
* gas/tic6x/insns16-dinc.d: Expected disassembly.
* gas/tic6x/insns16-dind.s: New test.
* gas/tic6x/insns16-dind.d: Expected disassembly.
* gas/tic6x/insns16-doff4.s: New test.
* gas/tic6x/insns16-doff4.d: Expected disassembly.
* gas/tic6x/insns16-l-unit.s: New test.
* gas/tic6x/insns16-l-unit.d: Expected disassembly.
* gas/tic6x/insns16-lsd-unit.s: New test.
* gas/tic6x/insns16-lsd-unit.d: Expected disassembly.
* gas/tic6x/insns16-m-unit.s: New test.
* gas/tic6x/insns16-m-unit.d: Expected disassembly.
* gas/tic6x/insns16-s-unit-pcrel.s: New test.
* gas/tic6x/insns16-s-unit-pcrel.d: Expected disassembly.
* gas/tic6x/insns16-s-unit: New test.
* gas/tic6x/insns16-s-unit.d: Expected disassembly.
2013-03-26 Douglas B Rupp <rupp@adacore.com>
* gas/ia64/ia64.exp: Add new test reloc-mlx

100
gas/testsuite/gas/tic6x/insns16-d-unit.d Normal file
View file

@ -0,0 +1,100 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name:
#as: -march=c64x+ -mlittle-endian
.*: *file format elf32-tic6x-le
Disassembly of section .text:
[ \t]*\.\.\.
[0-9a-f]+[02468ace] <[^>]*> 8c05[ \t]+stw \.D2T1 a0,\*\+b15\(0\)
[0-9a-f]+[02468ace] <[^>]*> 9c05[ \t]+stw \.D2T2 b0,\*\+b15\(0\)
[0-9a-f]+[02468ace] <[^>]*> 8c05[ \t]+stw \.D2T1 a0,\*\+b15\(0\)
[0-9a-f]+[02468ace] <[^>]*> 9c05[ \t]+stw \.D2T2 b0,\*\+b15\(0\)
[0-9a-f]+[02468ace] <[^>]*> cc35[ \t]+stw \.D2T1 a3,\*\+b15\(8\)
[0-9a-f]+[02468ace] <[^>]*> fc05[ \t]+stw \.D2T2 b0,\*\+b15\(12\)
[0-9a-f]+[02468ace] <[^>]*> dcf5[ \t]+stw \.D2T2 b7,\*\+b15\(24\)
[0-9a-f]+[02468ace] <[^>]*> 8c0d[ \t]+ldw \.D2T1 \*\+b15\(0\),a0
[0-9a-f]+[02468ace] <[^>]*> 9c0d[ \t]+ldw \.D2T2 \*\+b15\(0\),b0
[0-9a-f]+[02468ace] <[^>]*> 8c0d[ \t]+ldw \.D2T1 \*\+b15\(0\),a0
[0-9a-f]+[02468ace] <[^>]*> 9c0d[ \t]+ldw \.D2T2 \*\+b15\(0\),b0
[0-9a-f]+[02468ace] <[^>]*> cc3d[ \t]+ldw \.D2T1 \*\+b15\(8\),a3
[0-9a-f]+[02468ace] <[^>]*> fc0d[ \t]+ldw \.D2T2 \*\+b15\(12\),b0
[0-9a-f]+[02468ace] <[^>]*> dcfd[ \t]+ldw \.D2T2 \*\+b15\(24\),b7
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0036[ \t]+add \.D1 a0,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 0037[ \t]+add \.D2 b0,b0,b0
[0-9a-f]+[02468ace] <[^>]*> 0836[ \t]+sub \.D1 a0,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 0837[ \t]+sub \.D2 b0,b0,b0
[0-9a-f]+[02468ace] <[^>]*> 1036[ \t]+add \.D1X a0,b0,a0
[0-9a-f]+[02468ace] <[^>]*> 1837[ \t]+sub \.D2X b0,a0,b0
[0-9a-f]+[02468ace] <[^>]*> 8036[ \t]+add \.D1 a4,a0,a4
[0-9a-f]+[02468ace] <[^>]*> c037[ \t]+add \.D2 b6,b0,b6
[0-9a-f]+[02468ace] <[^>]*> e836[ \t]+sub \.D1 a7,a0,a7
[0-9a-f]+[02468ace] <[^>]*> 8837[ \t]+sub \.D2 b4,b0,b4
[0-9a-f]+[02468ace] <[^>]*> da36[ \t]+sub \.D1X a6,b4,a6
[0-9a-f]+[02468ace] <[^>]*> e037[ \t]+add \.D2 b7,b0,b7
[0-9a-f]+[02468ace] <[^>]*> d236[ \t]+add \.D1X a6,b4,a6
[0-9a-f]+[02468ace] <[^>]*> e3b7[ \t]+add \.D2 b7,b7,b7
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0436[ \t]+addaw \.D1X b15,0,a0
[0-9a-f]+[02468ace] <[^>]*> 0437[ \t]+addaw \.D2 b15,0,b0
[0-9a-f]+[02468ace] <[^>]*> 0c36[ \t]+addaw \.D1X b15,8,a0
[0-9a-f]+[02468ace] <[^>]*> 0c37[ \t]+addaw \.D2 b15,8,b0
[0-9a-f]+[02468ace] <[^>]*> 1436[ \t]+addaw \.D1X b15,16,a0
[0-9a-f]+[02468ace] <[^>]*> 1c37[ \t]+addaw \.D2 b15,24,b0
[0-9a-f]+[02468ace] <[^>]*> 8436[ \t]+addaw \.D1X b15,4,a0
[0-9a-f]+[02468ace] <[^>]*> c437[ \t]+addaw \.D2 b15,6,b0
[0-9a-f]+[02468ace] <[^>]*> ec36[ \t]+addaw \.D1X b15,15,a0
[0-9a-f]+[02468ace] <[^>]*> 8c37[ \t]+addaw \.D2 b15,12,b0
[0-9a-f]+[02468ace] <[^>]*> de36[ \t]+addaw \.D1X b15,30,a4
[0-9a-f]+[02468ace] <[^>]*> e437[ \t]+addaw \.D2 b15,7,b0
[0-9a-f]+[02468ace] <[^>]*> d636[ \t]+addaw \.D1X b15,22,a4
[0-9a-f]+[02468ace] <[^>]*> e7b7[ \t]+addaw \.D2 b15,7,b7
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0c77[ \t]+addaw \.D2 b15,0,b15
[0-9a-f]+[02468ace] <[^>]*> 2d77[ \t]+addaw \.D2 b15,9,b15
[0-9a-f]+[02468ace] <[^>]*> 4e77[ \t]+addaw \.D2 b15,18,b15
[0-9a-f]+[02468ace] <[^>]*> 6f77[ \t]+addaw \.D2 b15,27,b15
[0-9a-f]+[02468ace] <[^>]*> 8c77[ \t]+addaw \.D2 b15,4,b15
[0-9a-f]+[02468ace] <[^>]*> ad77[ \t]+addaw \.D2 b15,13,b15
[0-9a-f]+[02468ace] <[^>]*> ce77[ \t]+addaw \.D2 b15,22,b15
[0-9a-f]+[02468ace] <[^>]*> eff7[ \t]+subaw \.D2 b15,31,b15
[0-9a-f]+[02468ace] <[^>]*> 2cf7[ \t]+subaw \.D2 b15,1,b15
[0-9a-f]+[02468ace] <[^>]*> 4df7[ \t]+subaw \.D2 b15,10,b15
[0-9a-f]+[02468ace] <[^>]*> 6ef7[ \t]+subaw \.D2 b15,19,b15
[0-9a-f]+[02468ace] <[^>]*> 8ff7[ \t]+subaw \.D2 b15,28,b15
[0-9a-f]+[02468ace] <[^>]*> acf7[ \t]+subaw \.D2 b15,5,b15
[0-9a-f]+[02468ace] <[^>]*> cdf7[ \t]+subaw \.D2 b15,14,b15
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 7876[ \t]+sub \.D1 a0,1,a0
[0-9a-f]+[02468ace] <[^>]*> 7877[ \t]+sub \.D2 b0,1,b0
[0-9a-f]+[02468ace] <[^>]*> 78f6[ \t]+sub \.D1 a1,1,a1
[0-9a-f]+[02468ace] <[^>]*> 79f7[ \t]+sub \.D2 b3,1,b3
[0-9a-f]+[02468ace] <[^>]*> 5876[ \t]+<undefined instruction 0x5876>
[0-9a-f]+[02468ace] <[^>]*> 9877[ \t]+<undefined instruction 0x9877>
[0-9a-f]+[02468ace] <[^>]*> d876[ \t]+<undefined instruction 0xd876>
[0-9a-f]+[02468ace] <[^>]*> 7877[ \t]+sub \.D2 b0,1,b0
[0-9a-f]+[02468ace] <[^>]*> 7876[ \t]+sub \.D1 a0,1,a0
[0-9a-f]+[02468ace] <[^>]*> 7877[ \t]+sub \.D2 b0,1,b0
[0-9a-f]+[02468ace] <[^>]*> 7876[ \t]+sub \.D1 a0,1,a0
[0-9a-f]+[02468ace] <[^>]*> 7877[ \t]+sub \.D2 b0,1,b0
[0-9a-f]+[02468ace] <[^>]*> 7876[ \t]+sub \.D1 a0,1,a0
[0-9a-f]+[02468ace] <[^>]*> 7877[ \t]+sub \.D2 b0,1,b0
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0077[ \t]+stw \.D2T1 a0,\*b15--\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4177[ \t]+ldw \.D2T1 \*\+\+b15\(4\),a2
[0-9a-f]+[02468ace] <[^>]*> a277[ \t]+stdw \.D2T1 a5:a4,\*b15--\(16\)
[0-9a-f]+[02468ace] <[^>]*> e377[ \t]+lddw \.D2T1 \*\+\+b15\(16\),a7:a6
[0-9a-f]+[02468ace] <[^>]*> 2477[ \t]+stw \.D2T1 a8,\*b15--\(8\)
[0-9a-f]+[02468ace] <[^>]*> 6577[ \t]+ldw \.D2T1 \*\+\+b15\(8\),a10
[0-9a-f]+[02468ace] <[^>]*> 8677[ \t]+stdw \.D2T1 a13:a12,\*b15--\(8\)
[0-9a-f]+[02468ace] <[^>]*> 0777[ \t]+stw \.D2T1 a14,\*b15--\(4\)
[0-9a-f]+[02468ace] <[^>]*> 11f7[ \t]+stw \.D2T2 b3,\*b15--\(4\)
[0-9a-f]+[02468ace] <[^>]*> 52f7[ \t]+ldw \.D2T2 \*\+\+b15\(4\),b5
[0-9a-f]+[02468ace] <[^>]*> 4777[ \t]+ldw \.D2T1 \*\+\+b15\(4\),a14
[0-9a-f]+[02468ace] <[^>]*> 6777[ \t]+ldw \.D2T1 \*\+\+b15\(8\),a14
[0-9a-f]+[02468ace] <[^>]*> 15f7[ \t]+stw \.D2T2 b11,\*b15--\(4\)
[0-9a-f]+[02468ace] <[^>]*> 56f7[ \t]+ldw \.D2T2 \*\+\+b15\(4\),b13
[0-9a-f]+[02468ace] <[^>]*> efe80000[ \t]+<fetch packet header 0xefe80000>
[ \t]*\.\.\.

104
gas/testsuite/gas/tic6x/insns16-d-unit.s Normal file
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@ -0,0 +1,104 @@
; Test C64x+ D-unit compact instruction formats
.text
nop
.align 16
nop
.align 16
dstk: ; op = 0 | STW (.unit) src, *B15[ucst5]
; op = 1 | LDW (.unit)*B15[ucst5], dst
.short 0x8c05
.short 0x9c05
.short 0x8c05
.short 0x9c05
.short 0xcc35
.short 0xfc05
.short 0xdcf5
.short 0x8c0d
.short 0x9c0d
.short 0x8c0d
.short 0x9c0d
.short 0xcc3d
.short 0xfc0d
.short 0xdcfd
.word 0xefe00000
dx2op: ; op = 0 | ADD (.unit) src1, src2, dst (src1 = dst)
; op = 1 | SUB (.unit) src1, src2, dst (src1 = dst, dst = src1 - src2
.short 0x0036
.short 0x0037
.short 0x0836
.short 0x0837
.short 0x1036
.short 0x1837
.short 0x8036
.short 0xc037
.short 0xe836
.short 0x8837
.short 0xda36
.short 0xe037
.short 0xd236
.short 0xe3b7
.word 0xefe00000
dx5: ; ADDAW (.unit)B15, ucst5, dst
.short 0x0436
.short 0x0437
.short 0x0c36
.short 0x0c37
.short 0x1436
.short 0x1c37
.short 0x8436
.short 0xc437
.short 0xec36
.short 0x8c37
.short 0xde36
.short 0xe437
.short 0xd636
.short 0xe7b7
.word 0xefe00000
dx5p:
.short 0x0c77
.short 0x2d77
.short 0x4e77
.short 0x6f77
.short 0x8c77
.short 0xad77
.short 0xce77
.short 0xeff7
.short 0x2cf7
.short 0x4df7
.short 0x6ef7
.short 0x8ff7
.short 0xacf7
.short 0xcdf7
.word 0xefe00000
dx1:
.short 0x7876
.short 0x7877
.short 0x78f6
.short 0x79f7
.short 0x5876
.short 0x9877
.short 0xd876
.short 0x7877
.short 0x7876
.short 0x7877
.short 0x7876
.short 0x7877
.short 0x7876
.short 0x7877
.word 0xefe00000
dpp:
.short 0x0077
.short 0x4177
.short 0xa277
.short 0xe377
.short 0x2477
.short 0x6577
.short 0x8677
.short 0x0777
.short 0x11f7
.short 0x52f7
.short 0x4777
.short 0x6777
.short 0x15f7
.short 0x56f7
.word 0xefe80000

160
gas/testsuite/gas/tic6x/insns16-ddec.d Normal file
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@ -0,0 +1,160 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name:
#as: -march=c64x+ -mlittle-endian
.*: *file format elf32-tic6x-le
Disassembly of section .text:
[ \t]*\.\.\.
[0-9a-f]+[02468ace] <[^>]*> 4c04[ \t]+stw \.D1T1 a0,\*--a4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 5c04[ \t]+stw \.D1T2 b0,\*--a4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4e04[ \t]+stb \.D1T1 a0,\*--a4\(1\)
[0-9a-f]+[02468ace] <[^>]*> 4c0c[ \t]+ldw \.D1T1 \*--a4\(4\),a0
[0-9a-f]+[02468ace] <[^>]*> 4c05[ \t]+stw \.D2T1 a0,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stw \.D2T2 b0,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+stb \.D2T1 a0,\*--b4\(1\)
[0-9a-f]+[02468ace] <[^>]*> 4c0d[ \t]+ldw \.D2T1 \*--b4\(4\),a0
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stw \.D2T2 b0,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4c05[ \t]+stw \.D2T1 a0,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 5e0d[ \t]+ldbu \.D2T2 \*--b4\(1\),b0
[0-9a-f]+[02468ace] <[^>]*> 6e0d[ \t]+ldbu \.D2T1 \*--b4\(2\),a0
[0-9a-f]+[02468ace] <[^>]*> 7e1d[ \t]+ldbu \.D2T2 \*--b4\(2\),b1
[0-9a-f]+[02468ace] <[^>]*> 6e1d[ \t]+ldbu \.D2T1 \*--b4\(2\),a1
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 4c04[ \t]+stw \.D1T1 a16,\*--a4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 5c04[ \t]+stw \.D1T2 b16,\*--a4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4e04[ \t]+stb \.D1T1 a16,\*--a4\(1\)
[0-9a-f]+[02468ace] <[^>]*> 4c0c[ \t]+ldw \.D1T1 \*--a4\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 4c05[ \t]+stw \.D2T1 a16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stw \.D2T2 b16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+stb \.D2T1 a16,\*--b4\(1\)
[0-9a-f]+[02468ace] <[^>]*> 4c0d[ \t]+ldw \.D2T1 \*--b4\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stw \.D2T2 b16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+stb \.D2T1 a16,\*--b4\(1\)
[0-9a-f]+[02468ace] <[^>]*> 5e0d[ \t]+ldbu \.D2T2 \*--b4\(1\),b16
[0-9a-f]+[02468ace] <[^>]*> 6e0d[ \t]+ldbu \.D2T1 \*--b4\(2\),a16
[0-9a-f]+[02468ace] <[^>]*> 7e1d[ \t]+ldbu \.D2T2 \*--b4\(2\),b17
[0-9a-f]+[02468ace] <[^>]*> 6e1d[ \t]+ldbu \.D2T1 \*--b4\(2\),a17
[0-9a-f]+[02468ace] <[^>]*> efe8c000[ \t]+<fetch packet header 0xefe8c000>
[0-9a-f]+[02468ace] <[^>]*> 4c04[ \t]+stw \.D1T1 a16,\*--a4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 5c04[ \t]+stw \.D1T2 b16,\*--a4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4e04[ \t]+stb \.D1T1 a16,\*--a4\(1\)
[0-9a-f]+[02468ace] <[^>]*> 4c0c[ \t]+ldw \.D1T1 \*--a4\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 4c05[ \t]+stw \.D2T1 a16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stw \.D2T2 b16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+stb \.D2T1 a16,\*--b4\(1\)
[0-9a-f]+[02468ace] <[^>]*> 4c0d[ \t]+ldw \.D2T1 \*--b4\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stw \.D2T2 b16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+stb \.D2T1 a16,\*--b4\(1\)
[0-9a-f]+[02468ace] <[^>]*> 5e0d[ \t]+ldb \.D2T2 \*--b4\(1\),b16
[0-9a-f]+[02468ace] <[^>]*> 6e0d[ \t]+ldb \.D2T1 \*--b4\(2\),a16
[0-9a-f]+[02468ace] <[^>]*> 7e1d[ \t]+ldb \.D2T2 \*--b4\(2\),b17
[0-9a-f]+[02468ace] <[^>]*> 6e1d[ \t]+ldb \.D2T1 \*--b4\(2\),a17
[0-9a-f]+[02468ace] <[^>]*> efe9c000[ \t]+<fetch packet header 0xefe9c000>
[0-9a-f]+[02468ace] <[^>]*> 4c04[ \t]+stw \.D1T1 a16,\*--a4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 5c04[ \t]+stw \.D1T2 b16,\*--a4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4e04[ \t]+sth \.D1T1 a16,\*--a4\(2\)
[0-9a-f]+[02468ace] <[^>]*> 4c0c[ \t]+ldw \.D1T1 \*--a4\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 4c05[ \t]+stw \.D2T1 a16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stw \.D2T2 b16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+sth \.D2T1 a16,\*--b4\(2\)
[0-9a-f]+[02468ace] <[^>]*> 4c0d[ \t]+ldw \.D2T1 \*--b4\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stw \.D2T2 b16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+sth \.D2T1 a16,\*--b4\(2\)
[0-9a-f]+[02468ace] <[^>]*> 5e0d[ \t]+ldhu \.D2T2 \*--b4\(2\),b16
[0-9a-f]+[02468ace] <[^>]*> 6e0d[ \t]+ldhu \.D2T1 \*--b4\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 7e1d[ \t]+ldhu \.D2T2 \*--b4\(4\),b17
[0-9a-f]+[02468ace] <[^>]*> 6e1d[ \t]+ldhu \.D2T1 \*--b4\(4\),a17
[0-9a-f]+[02468ace] <[^>]*> efeac000[ \t]+<fetch packet header 0xefeac000>
[0-9a-f]+[02468ace] <[^>]*> 4e04[ \t]+sth \.D1T1 a16,\*--a4\(2\)
[0-9a-f]+[02468ace] <[^>]*> 5e04[ \t]+sth \.D1T2 b16,\*--a4\(2\)
[0-9a-f]+[02468ace] <[^>]*> 4e04[ \t]+sth \.D1T1 a16,\*--a4\(2\)
[0-9a-f]+[02468ace] <[^>]*> 4c0c[ \t]+ldw \.D1T1 \*--a4\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 4c05[ \t]+stw \.D2T1 a16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stw \.D2T2 b16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+sth \.D2T1 a16,\*--b4\(2\)
[0-9a-f]+[02468ace] <[^>]*> 4c0d[ \t]+ldw \.D2T1 \*--b4\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stw \.D2T2 b16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+sth \.D2T1 a16,\*--b4\(2\)
[0-9a-f]+[02468ace] <[^>]*> 5e0d[ \t]+ldh \.D2T2 \*--b4\(2\),b16
[0-9a-f]+[02468ace] <[^>]*> 6e0d[ \t]+ldh \.D2T1 \*--b4\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 7e1d[ \t]+ldh \.D2T2 \*--b4\(4\),b17
[0-9a-f]+[02468ace] <[^>]*> 6e1d[ \t]+ldh \.D2T1 \*--b4\(4\),a17
[0-9a-f]+[02468ace] <[^>]*> efebc000[ \t]+<fetch packet header 0xefebc000>
[0-9a-f]+[02468ace] <[^>]*> 4c04[ \t]+stdw \.D1T1 a17:a16,\*--a4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 5c04[ \t]+stdw \.D1T2 b17:b16,\*--a4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 4e04[ \t]+stw \.D1T1 a16,\*--a4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4c0c[ \t]+lddw \.D1T1 \*--a4\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 4c05[ \t]+stdw \.D2T1 a17:a16,\*--b4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stdw \.D2T2 b17:b16,\*--b4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+stw \.D2T1 a16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4c0d[ \t]+lddw \.D2T1 \*--b4\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stdw \.D2T2 b17:b16,\*--b4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+stw \.D2T1 a16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 5e0d[ \t]+ldw \.D2T2 \*--b4\(4\),b16
[0-9a-f]+[02468ace] <[^>]*> 6e0d[ \t]+ldw \.D2T1 \*--b4\(8\),a16
[0-9a-f]+[02468ace] <[^>]*> 7e1d[ \t]+ldw \.D2T2 \*--b4\(8\),b17
[0-9a-f]+[02468ace] <[^>]*> 6e1d[ \t]+ldw \.D2T1 \*--b4\(8\),a17
[0-9a-f]+[02468ace] <[^>]*> efecc000[ \t]+<fetch packet header 0xefecc000>
[0-9a-f]+[02468ace] <[^>]*> 4c04[ \t]+stdw \.D1T1 a17:a16,\*--a4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 5c04[ \t]+stdw \.D1T2 b17:b16,\*--a4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 4e04[ \t]+stb \.D1T1 a16,\*--a4\(1\)
[0-9a-f]+[02468ace] <[^>]*> 4c0c[ \t]+lddw \.D1T1 \*--a4\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 4c05[ \t]+stdw \.D2T1 a17:a16,\*--b4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stdw \.D2T2 b17:b16,\*--b4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+stb \.D2T1 a16,\*--b4\(1\)
[0-9a-f]+[02468ace] <[^>]*> 4c0d[ \t]+lddw \.D2T1 \*--b4\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stdw \.D2T2 b17:b16,\*--b4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+stb \.D2T1 a16,\*--b4\(1\)
[0-9a-f]+[02468ace] <[^>]*> 5e0d[ \t]+ldb \.D2T2 \*--b4\(1\),b16
[0-9a-f]+[02468ace] <[^>]*> 6e0d[ \t]+ldb \.D2T1 \*--b4\(2\),a16
[0-9a-f]+[02468ace] <[^>]*> 7e1d[ \t]+ldb \.D2T2 \*--b4\(2\),b17
[0-9a-f]+[02468ace] <[^>]*> 6e1d[ \t]+ldb \.D2T1 \*--b4\(2\),a17
[0-9a-f]+[02468ace] <[^>]*> efedc000[ \t]+<fetch packet header 0xefedc000>
[0-9a-f]+[02468ace] <[^>]*> 4c04[ \t]+stdw \.D1T1 a17:a16,\*--a4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 5c04[ \t]+stdw \.D1T2 b17:b16,\*--a4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 4e04[ \t]+stnw \.D1T1 a16,\*--a4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4c0c[ \t]+lddw \.D1T1 \*--a4\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 4c05[ \t]+stdw \.D2T1 a17:a16,\*--b4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stdw \.D2T2 b17:b16,\*--b4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+stnw \.D2T1 a16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 4c0d[ \t]+lddw \.D2T1 \*--b4\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stdw \.D2T2 b17:b16,\*--b4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+stnw \.D2T1 a16,\*--b4\(4\)
[0-9a-f]+[02468ace] <[^>]*> 5e0d[ \t]+ldnw \.D2T2 \*--b4\(4\),b16
[0-9a-f]+[02468ace] <[^>]*> 6e0d[ \t]+ldnw \.D2T1 \*--b4\(8\),a16
[0-9a-f]+[02468ace] <[^>]*> 7e1d[ \t]+ldnw \.D2T2 \*--b4\(8\),b17
[0-9a-f]+[02468ace] <[^>]*> 6e1d[ \t]+ldnw \.D2T1 \*--b4\(8\),a17
[0-9a-f]+[02468ace] <[^>]*> efeec000[ \t]+<fetch packet header 0xefeec000>
[0-9a-f]+[02468ace] <[^>]*> 4c04[ \t]+stdw \.D1T1 a17:a16,\*--a4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 5c04[ \t]+stdw \.D1T2 b17:b16,\*--a4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 4e04[ \t]+sth \.D1T1 a16,\*--a4\(2\)
[0-9a-f]+[02468ace] <[^>]*> 4c0c[ \t]+lddw \.D1T1 \*--a4\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 4c05[ \t]+stdw \.D2T1 a17:a16,\*--b4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stdw \.D2T2 b17:b16,\*--b4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+sth \.D2T1 a16,\*--b4\(2\)
[0-9a-f]+[02468ace] <[^>]*> 4c0d[ \t]+lddw \.D2T1 \*--b4\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 5c05[ \t]+stdw \.D2T2 b17:b16,\*--b4\(8\)
[0-9a-f]+[02468ace] <[^>]*> 4e05[ \t]+sth \.D2T1 a16,\*--b4\(2\)
[0-9a-f]+[02468ace] <[^>]*> 5e0d[ \t]+ldh \.D2T2 \*--b4\(2\),b16
[0-9a-f]+[02468ace] <[^>]*> 6e0d[ \t]+ldh \.D2T1 \*--b4\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 7e1d[ \t]+ldh \.D2T2 \*--b4\(4\),b17
[0-9a-f]+[02468ace] <[^>]*> 6e1d[ \t]+ldh \.D2T1 \*--b4\(4\),a17
[0-9a-f]+[02468ace] <[^>]*> efefc000[ \t]+<fetch packet header 0xefefc000>
[0-9a-f]+[02468ace] <[^>]*> 4c14[ \t]+stndw \.D1T1 a17:a16,\*--a4\[1\]
[0-9a-f]+[02468ace] <[^>]*> 5c14[ \t]+stndw \.D1T2 b17:b16,\*--a4\[1\]
[0-9a-f]+[02468ace] <[^>]*> 4e14[ \t]+sth \.D1T1 a17,\*--a4\(2\)
[0-9a-f]+[02468ace] <[^>]*> 4c1c[ \t]+ldndw \.D1T1 \*--a4\[1\],a17:a16
[0-9a-f]+[02468ace] <[^>]*> 4c15[ \t]+stndw \.D2T1 a17:a16,\*--b4\[1\]
[0-9a-f]+[02468ace] <[^>]*> 5c15[ \t]+stndw \.D2T2 b17:b16,\*--b4\[1\]
[0-9a-f]+[02468ace] <[^>]*> 4e15[ \t]+sth \.D2T1 a17,\*--b4\(2\)
[0-9a-f]+[02468ace] <[^>]*> 4c1d[ \t]+ldndw \.D2T1 \*--b4\[1\],a17:a16
[0-9a-f]+[02468ace] <[^>]*> 5c15[ \t]+stndw \.D2T2 b17:b16,\*--b4\[1\]
[0-9a-f]+[02468ace] <[^>]*> 4e15[ \t]+sth \.D2T1 a17,\*--b4\(2\)
[0-9a-f]+[02468ace] <[^>]*> 5e1d[ \t]+ldh \.D2T2 \*--b4\(2\),b17
[0-9a-f]+[02468ace] <[^>]*> 6e1d[ \t]+ldh \.D2T1 \*--b4\(4\),a17
[0-9a-f]+[02468ace] <[^>]*> 7e1d[ \t]+ldh \.D2T2 \*--b4\(4\),b17
[0-9a-f]+[02468ace] <[^>]*> 6e1d[ \t]+ldh \.D2T1 \*--b4\(4\),a17
[0-9a-f]+[02468ace] <[^>]*> efefc000[ \t]+<fetch packet header 0xefefc000>
[ \t]*\.\.\.

157
gas/testsuite/gas/tic6x/insns16-ddec.s Normal file
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@ -0,0 +1,157 @@
; Test C64x+ ddec compact instruction format
.text
ddec:
nop
.align 16
nop
.align 16
.short 0x4c04
.short 0x5c04
.short 0x4e04
.short 0x4c0c
.short 0x4c05
.short 0x5c05
.short 0x4e05
.short 0x4c0d
.short 0x5c05
.short 0x4c05
.short 0x5e0d
.short 0x6e0d
.short 0x7e1d
.short 0x6e1d
.word 0xefe00000
.short 0x4c04
.short 0x5c04
.short 0x4e04
.short 0x4c0c
.short 0x4c05
.short 0x5c05
.short 0x4e05
.short 0x4c0d
.short 0x5c05
.short 0x4e05
.short 0x5e0d
.short 0x6e0d
.short 0x7e1d
.short 0x6e1d
.word 0xefe8c000
.short 0x4c04
.short 0x5c04
.short 0x4e04
.short 0x4c0c
.short 0x4c05
.short 0x5c05
.short 0x4e05
.short 0x4c0d
.short 0x5c05
.short 0x4e05
.short 0x5e0d
.short 0x6e0d
.short 0x7e1d
.short 0x6e1d
.word 0xefe9c000
.short 0x4c04
.short 0x5c04
.short 0x4e04
.short 0x4c0c
.short 0x4c05
.short 0x5c05
.short 0x4e05
.short 0x4c0d
.short 0x5c05
.short 0x4e05
.short 0x5e0d
.short 0x6e0d
.short 0x7e1d
.short 0x6e1d
.word 0xefeac000
.short 0x4e04
.short 0x5e04
.short 0x4e04
.short 0x4c0c
.short 0x4c05
.short 0x5c05
.short 0x4e05
.short 0x4c0d
.short 0x5c05
.short 0x4e05
.short 0x5e0d
.short 0x6e0d
.short 0x7e1d
.short 0x6e1d
.word 0xefebc000
.short 0x4c04
.short 0x5c04
.short 0x4e04
.short 0x4c0c
.short 0x4c05
.short 0x5c05
.short 0x4e05
.short 0x4c0d
.short 0x5c05
.short 0x4e05
.short 0x5e0d
.short 0x6e0d
.short 0x7e1d
.short 0x6e1d
.word 0xefecc000
.short 0x4c04
.short 0x5c04
.short 0x4e04
.short 0x4c0c
.short 0x4c05
.short 0x5c05
.short 0x4e05
.short 0x4c0d
.short 0x5c05
.short 0x4e05
.short 0x5e0d
.short 0x6e0d
.short 0x7e1d
.short 0x6e1d
.word 0xefedc000
.short 0x4c04
.short 0x5c04
.short 0x4e04
.short 0x4c0c
.short 0x4c05
.short 0x5c05
.short 0x4e05
.short 0x4c0d
.short 0x5c05
.short 0x4e05
.short 0x5e0d
.short 0x6e0d
.short 0x7e1d
.short 0x6e1d
.word 0xefeec000
.short 0x4c04
.short 0x5c04
.short 0x4e04
.short 0x4c0c
.short 0x4c05
.short 0x5c05
.short 0x4e05
.short 0x4c0d
.short 0x5c05
.short 0x4e05
.short 0x5e0d
.short 0x6e0d
.short 0x7e1d
.short 0x6e1d
.word 0xefefc000
.short 0x4c14
.short 0x5c14
.short 0x4e14
.short 0x4c1c
.short 0x4c15
.short 0x5c15
.short 0x4e15
.short 0x4c1d
.short 0x5c15
.short 0x4e15
.short 0x5e1d
.short 0x6e1d
.short 0x7e1d
.short 0x6e1d
.word 0xefefc000

160
gas/testsuite/gas/tic6x/insns16-dinc.d Normal file
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@ -0,0 +1,160 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name:
#as: -march=c64x+ -mlittle-endian
.*: *file format elf32-tic6x-le
Disassembly of section .text:
[ \t]*\.\.\.
[0-9a-f]+[02468ace] <[^>]*> 0c04[ \t]+stw \.D1T1 a0,\*a4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 1c04[ \t]+stw \.D1T2 b0,\*a4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0e04[ \t]+stb \.D1T1 a0,\*a4\+\+\(1\)
[0-9a-f]+[02468ace] <[^>]*> 0c0c[ \t]+ldw \.D1T1 \*a4\+\+\(4\),a0
[0-9a-f]+[02468ace] <[^>]*> 0c05[ \t]+stw \.D2T1 a0,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stw \.D2T2 b0,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+stb \.D2T1 a0,\*b4\+\+\(1\)
[0-9a-f]+[02468ace] <[^>]*> 0c0d[ \t]+ldw \.D2T1 \*b4\+\+\(4\),a0
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stw \.D2T2 b0,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0c05[ \t]+stw \.D2T1 a0,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 1e0d[ \t]+ldbu \.D2T2 \*b4\+\+\(1\),b0
[0-9a-f]+[02468ace] <[^>]*> 2e0d[ \t]+ldbu \.D2T1 \*b4\+\+\(2\),a0
[0-9a-f]+[02468ace] <[^>]*> 3e1d[ \t]+ldbu \.D2T2 \*b4\+\+\(2\),b1
[0-9a-f]+[02468ace] <[^>]*> 2e1d[ \t]+ldbu \.D2T1 \*b4\+\+\(2\),a1
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0c04[ \t]+stw \.D1T1 a16,\*a4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 1c04[ \t]+stw \.D1T2 b16,\*a4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0e04[ \t]+stb \.D1T1 a16,\*a4\+\+\(1\)
[0-9a-f]+[02468ace] <[^>]*> 0c0c[ \t]+ldw \.D1T1 \*a4\+\+\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 0c05[ \t]+stw \.D2T1 a16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stw \.D2T2 b16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+stb \.D2T1 a16,\*b4\+\+\(1\)
[0-9a-f]+[02468ace] <[^>]*> 0c0d[ \t]+ldw \.D2T1 \*b4\+\+\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stw \.D2T2 b16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+stb \.D2T1 a16,\*b4\+\+\(1\)
[0-9a-f]+[02468ace] <[^>]*> 1e0d[ \t]+ldbu \.D2T2 \*b4\+\+\(1\),b16
[0-9a-f]+[02468ace] <[^>]*> 2e0d[ \t]+ldbu \.D2T1 \*b4\+\+\(2\),a16
[0-9a-f]+[02468ace] <[^>]*> 3e1d[ \t]+ldbu \.D2T2 \*b4\+\+\(2\),b17
[0-9a-f]+[02468ace] <[^>]*> 2e1d[ \t]+ldbu \.D2T1 \*b4\+\+\(2\),a17
[0-9a-f]+[02468ace] <[^>]*> efe8c000[ \t]+<fetch packet header 0xefe8c000>
[0-9a-f]+[02468ace] <[^>]*> 0c04[ \t]+stw \.D1T1 a16,\*a4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 1c04[ \t]+stw \.D1T2 b16,\*a4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0e04[ \t]+stb \.D1T1 a16,\*a4\+\+\(1\)
[0-9a-f]+[02468ace] <[^>]*> 0c0c[ \t]+ldw \.D1T1 \*a4\+\+\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 0c05[ \t]+stw \.D2T1 a16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stw \.D2T2 b16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+stb \.D2T1 a16,\*b4\+\+\(1\)
[0-9a-f]+[02468ace] <[^>]*> 0c0d[ \t]+ldw \.D2T1 \*b4\+\+\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stw \.D2T2 b16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+stb \.D2T1 a16,\*b4\+\+\(1\)
[0-9a-f]+[02468ace] <[^>]*> 1e0d[ \t]+ldb \.D2T2 \*b4\+\+\(1\),b16
[0-9a-f]+[02468ace] <[^>]*> 2e0d[ \t]+ldb \.D2T1 \*b4\+\+\(2\),a16
[0-9a-f]+[02468ace] <[^>]*> 3e1d[ \t]+ldb \.D2T2 \*b4\+\+\(2\),b17
[0-9a-f]+[02468ace] <[^>]*> 2e1d[ \t]+ldb \.D2T1 \*b4\+\+\(2\),a17
[0-9a-f]+[02468ace] <[^>]*> efe9c000[ \t]+<fetch packet header 0xefe9c000>
[0-9a-f]+[02468ace] <[^>]*> 0c04[ \t]+stw \.D1T1 a16,\*a4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 1c04[ \t]+stw \.D1T2 b16,\*a4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0e04[ \t]+sth \.D1T1 a16,\*a4\+\+\(2\)
[0-9a-f]+[02468ace] <[^>]*> 0c0c[ \t]+ldw \.D1T1 \*a4\+\+\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 0c05[ \t]+stw \.D2T1 a16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stw \.D2T2 b16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+sth \.D2T1 a16,\*b4\+\+\(2\)
[0-9a-f]+[02468ace] <[^>]*> 0c0d[ \t]+ldw \.D2T1 \*b4\+\+\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stw \.D2T2 b16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+sth \.D2T1 a16,\*b4\+\+\(2\)
[0-9a-f]+[02468ace] <[^>]*> 1e0d[ \t]+ldhu \.D2T2 \*b4\+\+\(2\),b16
[0-9a-f]+[02468ace] <[^>]*> 2e0d[ \t]+ldhu \.D2T1 \*b4\+\+\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 3e1d[ \t]+ldhu \.D2T2 \*b4\+\+\(4\),b17
[0-9a-f]+[02468ace] <[^>]*> 2e1d[ \t]+ldhu \.D2T1 \*b4\+\+\(4\),a17
[0-9a-f]+[02468ace] <[^>]*> efeac000[ \t]+<fetch packet header 0xefeac000>
[0-9a-f]+[02468ace] <[^>]*> 0e04[ \t]+sth \.D1T1 a16,\*a4\+\+\(2\)
[0-9a-f]+[02468ace] <[^>]*> 1e04[ \t]+sth \.D1T2 b16,\*a4\+\+\(2\)
[0-9a-f]+[02468ace] <[^>]*> 0e04[ \t]+sth \.D1T1 a16,\*a4\+\+\(2\)
[0-9a-f]+[02468ace] <[^>]*> 0c0c[ \t]+ldw \.D1T1 \*a4\+\+\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 0c05[ \t]+stw \.D2T1 a16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stw \.D2T2 b16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+sth \.D2T1 a16,\*b4\+\+\(2\)
[0-9a-f]+[02468ace] <[^>]*> 0c0d[ \t]+ldw \.D2T1 \*b4\+\+\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stw \.D2T2 b16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+sth \.D2T1 a16,\*b4\+\+\(2\)
[0-9a-f]+[02468ace] <[^>]*> 1e0d[ \t]+ldh \.D2T2 \*b4\+\+\(2\),b16
[0-9a-f]+[02468ace] <[^>]*> 2e0d[ \t]+ldh \.D2T1 \*b4\+\+\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 3e1d[ \t]+ldh \.D2T2 \*b4\+\+\(4\),b17
[0-9a-f]+[02468ace] <[^>]*> 2e1d[ \t]+ldh \.D2T1 \*b4\+\+\(4\),a17
[0-9a-f]+[02468ace] <[^>]*> efebc000[ \t]+<fetch packet header 0xefebc000>
[0-9a-f]+[02468ace] <[^>]*> 0c04[ \t]+stdw \.D1T1 a17:a16,\*a4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 1c04[ \t]+stdw \.D1T2 b17:b16,\*a4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 0e04[ \t]+stw \.D1T1 a16,\*a4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0c0c[ \t]+lddw \.D1T1 \*a4\+\+\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 0c05[ \t]+stdw \.D2T1 a17:a16,\*b4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stdw \.D2T2 b17:b16,\*b4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+stw \.D2T1 a16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0c0d[ \t]+lddw \.D2T1 \*b4\+\+\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stdw \.D2T2 b17:b16,\*b4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+stw \.D2T1 a16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 1e0d[ \t]+ldw \.D2T2 \*b4\+\+\(4\),b16
[0-9a-f]+[02468ace] <[^>]*> 2e0d[ \t]+ldw \.D2T1 \*b4\+\+\(8\),a16
[0-9a-f]+[02468ace] <[^>]*> 3e1d[ \t]+ldw \.D2T2 \*b4\+\+\(8\),b17
[0-9a-f]+[02468ace] <[^>]*> 2e1d[ \t]+ldw \.D2T1 \*b4\+\+\(8\),a17
[0-9a-f]+[02468ace] <[^>]*> efecc000[ \t]+<fetch packet header 0xefecc000>
[0-9a-f]+[02468ace] <[^>]*> 0c04[ \t]+stdw \.D1T1 a17:a16,\*a4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 1c04[ \t]+stdw \.D1T2 b17:b16,\*a4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 0e04[ \t]+stb \.D1T1 a16,\*a4\+\+\(1\)
[0-9a-f]+[02468ace] <[^>]*> 0c0c[ \t]+lddw \.D1T1 \*a4\+\+\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 0c05[ \t]+stdw \.D2T1 a17:a16,\*b4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stdw \.D2T2 b17:b16,\*b4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+stb \.D2T1 a16,\*b4\+\+\(1\)
[0-9a-f]+[02468ace] <[^>]*> 0c0d[ \t]+lddw \.D2T1 \*b4\+\+\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stdw \.D2T2 b17:b16,\*b4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+stb \.D2T1 a16,\*b4\+\+\(1\)
[0-9a-f]+[02468ace] <[^>]*> 1e0d[ \t]+ldb \.D2T2 \*b4\+\+\(1\),b16
[0-9a-f]+[02468ace] <[^>]*> 2e0d[ \t]+ldb \.D2T1 \*b4\+\+\(2\),a16
[0-9a-f]+[02468ace] <[^>]*> 3e1d[ \t]+ldb \.D2T2 \*b4\+\+\(2\),b17
[0-9a-f]+[02468ace] <[^>]*> 2e1d[ \t]+ldb \.D2T1 \*b4\+\+\(2\),a17
[0-9a-f]+[02468ace] <[^>]*> efedc000[ \t]+<fetch packet header 0xefedc000>
[0-9a-f]+[02468ace] <[^>]*> 0c04[ \t]+stdw \.D1T1 a17:a16,\*a4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 1c04[ \t]+stdw \.D1T2 b17:b16,\*a4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 0e04[ \t]+stnw \.D1T1 a16,\*a4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0c0c[ \t]+lddw \.D1T1 \*a4\+\+\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 0c05[ \t]+stdw \.D2T1 a17:a16,\*b4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stdw \.D2T2 b17:b16,\*b4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+stnw \.D2T1 a16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 0c0d[ \t]+lddw \.D2T1 \*b4\+\+\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stdw \.D2T2 b17:b16,\*b4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+stnw \.D2T1 a16,\*b4\+\+\(4\)
[0-9a-f]+[02468ace] <[^>]*> 1e0d[ \t]+ldnw \.D2T2 \*b4\+\+\(4\),b16
[0-9a-f]+[02468ace] <[^>]*> 2e0d[ \t]+ldnw \.D2T1 \*b4\+\+\(8\),a16
[0-9a-f]+[02468ace] <[^>]*> 3e1d[ \t]+ldnw \.D2T2 \*b4\+\+\(8\),b17
[0-9a-f]+[02468ace] <[^>]*> 2e1d[ \t]+ldnw \.D2T1 \*b4\+\+\(8\),a17
[0-9a-f]+[02468ace] <[^>]*> efeec000[ \t]+<fetch packet header 0xefeec000>
[0-9a-f]+[02468ace] <[^>]*> 0c04[ \t]+stdw \.D1T1 a17:a16,\*a4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 1c04[ \t]+stdw \.D1T2 b17:b16,\*a4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 0e04[ \t]+sth \.D1T1 a16,\*a4\+\+\(2\)
[0-9a-f]+[02468ace] <[^>]*> 0c0c[ \t]+lddw \.D1T1 \*a4\+\+\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 0c05[ \t]+stdw \.D2T1 a17:a16,\*b4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stdw \.D2T2 b17:b16,\*b4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+sth \.D2T1 a16,\*b4\+\+\(2\)
[0-9a-f]+[02468ace] <[^>]*> 0c0d[ \t]+lddw \.D2T1 \*b4\+\+\(8\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 1c05[ \t]+stdw \.D2T2 b17:b16,\*b4\+\+\(8\)
[0-9a-f]+[02468ace] <[^>]*> 0e05[ \t]+sth \.D2T1 a16,\*b4\+\+\(2\)
[0-9a-f]+[02468ace] <[^>]*> 1e0d[ \t]+ldh \.D2T2 \*b4\+\+\(2\),b16
[0-9a-f]+[02468ace] <[^>]*> 2e0d[ \t]+ldh \.D2T1 \*b4\+\+\(4\),a16
[0-9a-f]+[02468ace] <[^>]*> 3e1d[ \t]+ldh \.D2T2 \*b4\+\+\(4\),b17
[0-9a-f]+[02468ace] <[^>]*> 2e1d[ \t]+ldh \.D2T1 \*b4\+\+\(4\),a17
[0-9a-f]+[02468ace] <[^>]*> efefc000[ \t]+<fetch packet header 0xefefc000>
[0-9a-f]+[02468ace] <[^>]*> 0c14[ \t]+stndw \.D1T1 a17:a16,\*a4\+\+\[1\]
[0-9a-f]+[02468ace] <[^>]*> 1c14[ \t]+stndw \.D1T2 b17:b16,\*a4\+\+\[1\]
[0-9a-f]+[02468ace] <[^>]*> 0e14[ \t]+sth \.D1T1 a17,\*a4\+\+\(2\)
[0-9a-f]+[02468ace] <[^>]*> 0c1c[ \t]+ldndw \.D1T1 \*a4\+\+\[1\],a17:a16
[0-9a-f]+[02468ace] <[^>]*> 0c15[ \t]+stndw \.D2T1 a17:a16,\*b4\+\+\[1\]
[0-9a-f]+[02468ace] <[^>]*> 1c15[ \t]+stndw \.D2T2 b17:b16,\*b4\+\+\[1\]
[0-9a-f]+[02468ace] <[^>]*> 0e15[ \t]+sth \.D2T1 a17,\*b4\+\+\(2\)
[0-9a-f]+[02468ace] <[^>]*> 0c1d[ \t]+ldndw \.D2T1 \*b4\+\+\[1\],a17:a16
[0-9a-f]+[02468ace] <[^>]*> 1c15[ \t]+stndw \.D2T2 b17:b16,\*b4\+\+\[1\]
[0-9a-f]+[02468ace] <[^>]*> 0e15[ \t]+sth \.D2T1 a17,\*b4\+\+\(2\)
[0-9a-f]+[02468ace] <[^>]*> 1e1d[ \t]+ldh \.D2T2 \*b4\+\+\(2\),b17
[0-9a-f]+[02468ace] <[^>]*> 2e1d[ \t]+ldh \.D2T1 \*b4\+\+\(4\),a17
[0-9a-f]+[02468ace] <[^>]*> 3e1d[ \t]+ldh \.D2T2 \*b4\+\+\(4\),b17
[0-9a-f]+[02468ace] <[^>]*> 2e1d[ \t]+ldh \.D2T1 \*b4\+\+\(4\),a17
[0-9a-f]+[02468ace] <[^>]*> efefc000[ \t]+<fetch packet header 0xefefc000>
[ \t]*\.\.\.

157
gas/testsuite/gas/tic6x/insns16-dinc.s Normal file
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@ -0,0 +1,157 @@
; Test C64x+ dinc compact instruction format
.text
dinc:
nop
.align 16
nop
.align 16
.short 0x0c04
.short 0x1c04
.short 0x0e04
.short 0x0c0c
.short 0x0c05
.short 0x1c05
.short 0x0e05
.short 0x0c0d
.short 0x1c05
.short 0x0c05
.short 0x1e0d
.short 0x2e0d
.short 0x3e1d
.short 0x2e1d
.word 0xefe00000
.short 0x0c04
.short 0x1c04
.short 0x0e04
.short 0x0c0c
.short 0x0c05
.short 0x1c05
.short 0x0e05
.short 0x0c0d
.short 0x1c05
.short 0x0e05
.short 0x1e0d
.short 0x2e0d
.short 0x3e1d
.short 0x2e1d
.word 0xefe8c000
.short 0x0c04
.short 0x1c04
.short 0x0e04
.short 0x0c0c
.short 0x0c05
.short 0x1c05
.short 0x0e05
.short 0x0c0d
.short 0x1c05
.short 0x0e05
.short 0x1e0d
.short 0x2e0d
.short 0x3e1d
.short 0x2e1d
.word 0xefe9c000
.short 0x0c04
.short 0x1c04
.short 0x0e04
.short 0x0c0c
.short 0x0c05
.short 0x1c05
.short 0x0e05
.short 0x0c0d
.short 0x1c05
.short 0x0e05
.short 0x1e0d
.short 0x2e0d
.short 0x3e1d
.short 0x2e1d
.word 0xefeac000
.short 0x0e04
.short 0x1e04
.short 0x0e04
.short 0x0c0c
.short 0x0c05
.short 0x1c05
.short 0x0e05
.short 0x0c0d
.short 0x1c05
.short 0x0e05
.short 0x1e0d
.short 0x2e0d
.short 0x3e1d
.short 0x2e1d
.word 0xefebc000
.short 0x0c04
.short 0x1c04
.short 0x0e04
.short 0x0c0c
.short 0x0c05
.short 0x1c05
.short 0x0e05
.short 0x0c0d
.short 0x1c05
.short 0x0e05
.short 0x1e0d
.short 0x2e0d
.short 0x3e1d
.short 0x2e1d
.word 0xefecc000
.short 0x0c04
.short 0x1c04
.short 0x0e04
.short 0x0c0c
.short 0x0c05
.short 0x1c05
.short 0x0e05
.short 0x0c0d
.short 0x1c05
.short 0x0e05
.short 0x1e0d
.short 0x2e0d
.short 0x3e1d
.short 0x2e1d
.word 0xefedc000
.short 0x0c04
.short 0x1c04
.short 0x0e04
.short 0x0c0c
.short 0x0c05
.short 0x1c05
.short 0x0e05
.short 0x0c0d
.short 0x1c05
.short 0x0e05
.short 0x1e0d
.short 0x2e0d
.short 0x3e1d
.short 0x2e1d
.word 0xefeec000
.short 0x0c04
.short 0x1c04
.short 0x0e04
.short 0x0c0c
.short 0x0c05
.short 0x1c05
.short 0x0e05
.short 0x0c0d
.short 0x1c05
.short 0x0e05
.short 0x1e0d
.short 0x2e0d
.short 0x3e1d
.short 0x2e1d
.word 0xefefc000
.short 0x0c14
.short 0x1c14
.short 0x0e14
.short 0x0c1c
.short 0x0c15
.short 0x1c15
.short 0x0e15
.short 0x0c1d
.short 0x1c15
.short 0x0e15
.short 0x1e1d
.short 0x2e1d
.short 0x3e1d
.short 0x2e1d
.word 0xefefc000

160
gas/testsuite/gas/tic6x/insns16-dind.d Normal file
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@ -0,0 +1,160 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name:
#as: -march=c64x+ -mlittle-endian
.*: *file format elf32-tic6x-le
Disassembly of section .text:
[ \t]*\.\.\.
[0-9a-f]+[02468ace] <[^>]*> 0404[ \t]+stw \.D1T1 a0,\*\+a4\[a0\]
[0-9a-f]+[02468ace] <[^>]*> 1404[ \t]+stw \.D1T2 b0,\*\+a4\[a0\]
[0-9a-f]+[02468ace] <[^>]*> 0604[ \t]+stb \.D1T1 a0,\*\+a4\[a0\]
[0-9a-f]+[02468ace] <[^>]*> 040c[ \t]+ldw \.D1T1 \*\+a4\[a0\],a0
[0-9a-f]+[02468ace] <[^>]*> 0405[ \t]+stw \.D2T1 a0,\*\+b4\[b0\]
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stw \.D2T2 b0,\*\+b4\[b0\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+stb \.D2T1 a0,\*\+b4\[b0\]
[0-9a-f]+[02468ace] <[^>]*> 040d[ \t]+ldw \.D2T1 \*\+b4\[b0\],a0
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stw \.D2T2 b0,\*\+b4\[b0\]
[0-9a-f]+[02468ace] <[^>]*> 0405[ \t]+stw \.D2T1 a0,\*\+b4\[b0\]
[0-9a-f]+[02468ace] <[^>]*> 160d[ \t]+ldbu \.D2T2 \*\+b4\[b0\],b0
[0-9a-f]+[02468ace] <[^>]*> 260d[ \t]+ldbu \.D2T1 \*\+b4\[b1\],a0
[0-9a-f]+[02468ace] <[^>]*> 361d[ \t]+ldbu \.D2T2 \*\+b4\[b1\],b1
[0-9a-f]+[02468ace] <[^>]*> 261d[ \t]+ldbu \.D2T1 \*\+b4\[b1\],a1
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0404[ \t]+stw \.D1T1 a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 1404[ \t]+stw \.D1T2 b16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 0604[ \t]+stb \.D1T1 a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 040c[ \t]+ldw \.D1T1 \*\+a4\[a16\],a16
[0-9a-f]+[02468ace] <[^>]*> 0405[ \t]+stw \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stw \.D2T2 b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+stb \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 040d[ \t]+ldw \.D2T1 \*\+b4\[b16\],a16
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stw \.D2T2 b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+stb \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 160d[ \t]+ldbu \.D2T2 \*\+b4\[b16\],b16
[0-9a-f]+[02468ace] <[^>]*> 260d[ \t]+ldbu \.D2T1 \*\+b4\[b17\],a16
[0-9a-f]+[02468ace] <[^>]*> 361d[ \t]+ldbu \.D2T2 \*\+b4\[b17\],b17
[0-9a-f]+[02468ace] <[^>]*> 261d[ \t]+ldbu \.D2T1 \*\+b4\[b17\],a17
[0-9a-f]+[02468ace] <[^>]*> efe8c000[ \t]+<fetch packet header 0xefe8c000>
[0-9a-f]+[02468ace] <[^>]*> 0404[ \t]+stw \.D1T1 a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 1404[ \t]+stw \.D1T2 b16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 0604[ \t]+stb \.D1T1 a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 040c[ \t]+ldw \.D1T1 \*\+a4\[a16\],a16
[0-9a-f]+[02468ace] <[^>]*> 0405[ \t]+stw \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stw \.D2T2 b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+stb \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 040d[ \t]+ldw \.D2T1 \*\+b4\[b16\],a16
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stw \.D2T2 b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+stb \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 160d[ \t]+ldb \.D2T2 \*\+b4\[b16\],b16
[0-9a-f]+[02468ace] <[^>]*> 260d[ \t]+ldb \.D2T1 \*\+b4\[b17\],a16
[0-9a-f]+[02468ace] <[^>]*> 361d[ \t]+ldb \.D2T2 \*\+b4\[b17\],b17
[0-9a-f]+[02468ace] <[^>]*> 261d[ \t]+ldb \.D2T1 \*\+b4\[b17\],a17
[0-9a-f]+[02468ace] <[^>]*> efe9c000[ \t]+<fetch packet header 0xefe9c000>
[0-9a-f]+[02468ace] <[^>]*> 0404[ \t]+stw \.D1T1 a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 1404[ \t]+stw \.D1T2 b16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 0604[ \t]+sth \.D1T1 a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 040c[ \t]+ldw \.D1T1 \*\+a4\[a16\],a16
[0-9a-f]+[02468ace] <[^>]*> 0405[ \t]+stw \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stw \.D2T2 b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+sth \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 040d[ \t]+ldw \.D2T1 \*\+b4\[b16\],a16
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stw \.D2T2 b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+sth \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 160d[ \t]+ldhu \.D2T2 \*\+b4\[b16\],b16
[0-9a-f]+[02468ace] <[^>]*> 260d[ \t]+ldhu \.D2T1 \*\+b4\[b17\],a16
[0-9a-f]+[02468ace] <[^>]*> 361d[ \t]+ldhu \.D2T2 \*\+b4\[b17\],b17
[0-9a-f]+[02468ace] <[^>]*> 261d[ \t]+ldhu \.D2T1 \*\+b4\[b17\],a17
[0-9a-f]+[02468ace] <[^>]*> efeac000[ \t]+<fetch packet header 0xefeac000>
[0-9a-f]+[02468ace] <[^>]*> 0604[ \t]+sth \.D1T1 a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 1604[ \t]+sth \.D1T2 b16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 0604[ \t]+sth \.D1T1 a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 040c[ \t]+ldw \.D1T1 \*\+a4\[a16\],a16
[0-9a-f]+[02468ace] <[^>]*> 0405[ \t]+stw \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stw \.D2T2 b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+sth \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 040d[ \t]+ldw \.D2T1 \*\+b4\[b16\],a16
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stw \.D2T2 b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+sth \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 160d[ \t]+ldh \.D2T2 \*\+b4\[b16\],b16
[0-9a-f]+[02468ace] <[^>]*> 260d[ \t]+ldh \.D2T1 \*\+b4\[b17\],a16
[0-9a-f]+[02468ace] <[^>]*> 361d[ \t]+ldh \.D2T2 \*\+b4\[b17\],b17
[0-9a-f]+[02468ace] <[^>]*> 261d[ \t]+ldh \.D2T1 \*\+b4\[b17\],a17
[0-9a-f]+[02468ace] <[^>]*> efebc000[ \t]+<fetch packet header 0xefebc000>
[0-9a-f]+[02468ace] <[^>]*> 0404[ \t]+stdw \.D1T1 a17:a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 1404[ \t]+stdw \.D1T2 b17:b16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 0604[ \t]+stw \.D1T1 a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 040c[ \t]+lddw \.D1T1 \*\+a4\[a16\],a17:a16
[0-9a-f]+[02468ace] <[^>]*> 0405[ \t]+stdw \.D2T1 a17:a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stdw \.D2T2 b17:b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+stw \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 040d[ \t]+lddw \.D2T1 \*\+b4\[b16\],a17:a16
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stdw \.D2T2 b17:b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+stw \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 160d[ \t]+ldw \.D2T2 \*\+b4\[b16\],b16
[0-9a-f]+[02468ace] <[^>]*> 260d[ \t]+ldw \.D2T1 \*\+b4\[b17\],a16
[0-9a-f]+[02468ace] <[^>]*> 361d[ \t]+ldw \.D2T2 \*\+b4\[b17\],b17
[0-9a-f]+[02468ace] <[^>]*> 261d[ \t]+ldw \.D2T1 \*\+b4\[b17\],a17
[0-9a-f]+[02468ace] <[^>]*> efecc000[ \t]+<fetch packet header 0xefecc000>
[0-9a-f]+[02468ace] <[^>]*> 0404[ \t]+stdw \.D1T1 a17:a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 1404[ \t]+stdw \.D1T2 b17:b16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 0604[ \t]+stb \.D1T1 a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 040c[ \t]+lddw \.D1T1 \*\+a4\[a16\],a17:a16
[0-9a-f]+[02468ace] <[^>]*> 0405[ \t]+stdw \.D2T1 a17:a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stdw \.D2T2 b17:b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+stb \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 040d[ \t]+lddw \.D2T1 \*\+b4\[b16\],a17:a16
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stdw \.D2T2 b17:b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+stb \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 160d[ \t]+ldb \.D2T2 \*\+b4\[b16\],b16
[0-9a-f]+[02468ace] <[^>]*> 260d[ \t]+ldb \.D2T1 \*\+b4\[b17\],a16
[0-9a-f]+[02468ace] <[^>]*> 361d[ \t]+ldb \.D2T2 \*\+b4\[b17\],b17
[0-9a-f]+[02468ace] <[^>]*> 261d[ \t]+ldb \.D2T1 \*\+b4\[b17\],a17
[0-9a-f]+[02468ace] <[^>]*> efedc000[ \t]+<fetch packet header 0xefedc000>
[0-9a-f]+[02468ace] <[^>]*> 0404[ \t]+stdw \.D1T1 a17:a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 1404[ \t]+stdw \.D1T2 b17:b16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 0604[ \t]+stnw \.D1T1 a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 040c[ \t]+lddw \.D1T1 \*\+a4\[a16\],a17:a16
[0-9a-f]+[02468ace] <[^>]*> 0405[ \t]+stdw \.D2T1 a17:a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stdw \.D2T2 b17:b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+stnw \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 040d[ \t]+lddw \.D2T1 \*\+b4\[b16\],a17:a16
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stdw \.D2T2 b17:b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+stnw \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 160d[ \t]+ldnw \.D2T2 \*\+b4\[b16\],b16
[0-9a-f]+[02468ace] <[^>]*> 260d[ \t]+ldnw \.D2T1 \*\+b4\[b17\],a16
[0-9a-f]+[02468ace] <[^>]*> 361d[ \t]+ldnw \.D2T2 \*\+b4\[b17\],b17
[0-9a-f]+[02468ace] <[^>]*> 261d[ \t]+ldnw \.D2T1 \*\+b4\[b17\],a17
[0-9a-f]+[02468ace] <[^>]*> efeec000[ \t]+<fetch packet header 0xefeec000>
[0-9a-f]+[02468ace] <[^>]*> 0404[ \t]+stdw \.D1T1 a17:a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 1404[ \t]+stdw \.D1T2 b17:b16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 0604[ \t]+sth \.D1T1 a16,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 040c[ \t]+lddw \.D1T1 \*\+a4\[a16\],a17:a16
[0-9a-f]+[02468ace] <[^>]*> 0405[ \t]+stdw \.D2T1 a17:a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stdw \.D2T2 b17:b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+sth \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 040d[ \t]+lddw \.D2T1 \*\+b4\[b16\],a17:a16
[0-9a-f]+[02468ace] <[^>]*> 1405[ \t]+stdw \.D2T2 b17:b16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 0605[ \t]+sth \.D2T1 a16,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 160d[ \t]+ldh \.D2T2 \*\+b4\[b16\],b16
[0-9a-f]+[02468ace] <[^>]*> 260d[ \t]+ldh \.D2T1 \*\+b4\[b17\],a16
[0-9a-f]+[02468ace] <[^>]*> 361d[ \t]+ldh \.D2T2 \*\+b4\[b17\],b17
[0-9a-f]+[02468ace] <[^>]*> 261d[ \t]+ldh \.D2T1 \*\+b4\[b17\],a17
[0-9a-f]+[02468ace] <[^>]*> efefc000[ \t]+<fetch packet header 0xefefc000>
[0-9a-f]+[02468ace] <[^>]*> 0414[ \t]+stndw \.D1T1 a17:a16,\*\+a4\(a16\)
[0-9a-f]+[02468ace] <[^>]*> 1414[ \t]+stndw \.D1T2 b17:b16,\*\+a4\(a16\)
[0-9a-f]+[02468ace] <[^>]*> 0614[ \t]+sth \.D1T1 a17,\*\+a4\[a16\]
[0-9a-f]+[02468ace] <[^>]*> 041c[ \t]+ldndw \.D1T1 \*\+a4\(a16\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 0415[ \t]+stndw \.D2T1 a17:a16,\*\+b4\(b16\)
[0-9a-f]+[02468ace] <[^>]*> 1415[ \t]+stndw \.D2T2 b17:b16,\*\+b4\(b16\)
[0-9a-f]+[02468ace] <[^>]*> 0615[ \t]+sth \.D2T1 a17,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 041d[ \t]+ldndw \.D2T1 \*\+b4\(b16\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 1415[ \t]+stndw \.D2T2 b17:b16,\*\+b4\(b16\)
[0-9a-f]+[02468ace] <[^>]*> 0615[ \t]+sth \.D2T1 a17,\*\+b4\[b16\]
[0-9a-f]+[02468ace] <[^>]*> 161d[ \t]+ldh \.D2T2 \*\+b4\[b16\],b17
[0-9a-f]+[02468ace] <[^>]*> 261d[ \t]+ldh \.D2T1 \*\+b4\[b17\],a17
[0-9a-f]+[02468ace] <[^>]*> 361d[ \t]+ldh \.D2T2 \*\+b4\[b17\],b17
[0-9a-f]+[02468ace] <[^>]*> 261d[ \t]+ldh \.D2T1 \*\+b4\[b17\],a17
[0-9a-f]+[02468ace] <[^>]*> efefc000[ \t]+<fetch packet header 0xefefc000>
[ \t]*\.\.\.

158
gas/testsuite/gas/tic6x/insns16-dind.s Normal file
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@ -0,0 +1,158 @@
; Test C64x+ dind compact instruction format
.text
.nocmp
dind:
nop
.align 16
nop
.align 16
.short 0x0404
.short 0x1404
.short 0x0604
.short 0x040c
.short 0x0405
.short 0x1405
.short 0x0605
.short 0x040d
.short 0x1405
.short 0x0405
.short 0x160d
.short 0x260d
.short 0x361d
.short 0x261d
.word 0xefe00000
.short 0x0404
.short 0x1404
.short 0x0604
.short 0x040c
.short 0x0405
.short 0x1405
.short 0x0605
.short 0x040d
.short 0x1405
.short 0x0605
.short 0x160d
.short 0x260d
.short 0x361d
.short 0x261d
.word 0xefe8c000
.short 0x0404
.short 0x1404
.short 0x0604
.short 0x040c
.short 0x0405
.short 0x1405
.short 0x0605
.short 0x040d
.short 0x1405
.short 0x0605
.short 0x160d
.short 0x260d
.short 0x361d
.short 0x261d
.word 0xefe9c000
.short 0x0404
.short 0x1404
.short 0x0604
.short 0x040c
.short 0x0405
.short 0x1405
.short 0x0605
.short 0x040d
.short 0x1405
.short 0x0605
.short 0x160d
.short 0x260d
.short 0x361d
.short 0x261d
.word 0xefeac000
.short 0x0604
.short 0x1604
.short 0x0604
.short 0x040c
.short 0x0405
.short 0x1405
.short 0x0605
.short 0x040d
.short 0x1405
.short 0x0605
.short 0x160d
.short 0x260d
.short 0x361d
.short 0x261d
.word 0xefebc000
.short 0x0404
.short 0x1404
.short 0x0604
.short 0x040c
.short 0x0405
.short 0x1405
.short 0x0605
.short 0x040d
.short 0x1405
.short 0x0605
.short 0x160d
.short 0x260d
.short 0x361d
.short 0x261d
.word 0xefecc000
.short 0x0404
.short 0x1404
.short 0x0604
.short 0x040c
.short 0x0405
.short 0x1405
.short 0x0605
.short 0x040d
.short 0x1405
.short 0x0605
.short 0x160d
.short 0x260d
.short 0x361d
.short 0x261d
.word 0xefedc000
.short 0x0404
.short 0x1404
.short 0x0604
.short 0x040c
.short 0x0405
.short 0x1405
.short 0x0605
.short 0x040d
.short 0x1405
.short 0x0605
.short 0x160d
.short 0x260d
.short 0x361d
.short 0x261d
.word 0xefeec000
.short 0x0404
.short 0x1404
.short 0x0604
.short 0x040c
.short 0x0405
.short 0x1405
.short 0x0605
.short 0x040d
.short 0x1405
.short 0x0605
.short 0x160d
.short 0x260d
.short 0x361d
.short 0x261d
.word 0xefefc000
.short 0x0414
.short 0x1414
.short 0x0614
.short 0x041c
.short 0x0415
.short 0x1415
.short 0x0615
.short 0x041d
.short 0x1415
.short 0x0615
.short 0x161d
.short 0x261d
.short 0x361d
.short 0x261d
.word 0xefefc000

160
gas/testsuite/gas/tic6x/insns16-doff4.d Normal file
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@ -0,0 +1,160 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name:
#as: -march=c64x+ -mlittle-endian
.*: *file format elf32-tic6x-le
Disassembly of section .text:
[ \t]*\.\.\.
[0-9a-f]+[02468ace] <[^>]*> 0004[ \t]+stw \.D1T1 a0,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1004[ \t]+stw \.D1T2 b0,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0204[ \t]+stb \.D1T1 a0,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000c[ \t]+ldw \.D1T1 \*\+a4\(0\),a0
[0-9a-f]+[02468ace] <[^>]*> 0005[ \t]+stw \.D2T1 a0,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stw \.D2T2 b0,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+stb \.D2T1 a0,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000d[ \t]+ldw \.D2T1 \*\+b4\(0\),a0
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stw \.D2T2 b0,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+stb \.D2T1 a0,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 120d[ \t]+ldbu \.D2T2 \*\+b4\(0\),b0
[0-9a-f]+[02468ace] <[^>]*> 2a0d[ \t]+ldbu \.D2T1 \*\+b4\(9\),a0
[0-9a-f]+[02468ace] <[^>]*> 3a1d[ \t]+ldbu \.D2T2 \*\+b4\(9\),b1
[0-9a-f]+[02468ace] <[^>]*> 221d[ \t]+ldbu \.D2T1 \*\+b4\(1\),a1
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0004[ \t]+stw \.D1T1 a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1004[ \t]+stw \.D1T2 b16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0204[ \t]+stb \.D1T1 a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000c[ \t]+ldw \.D1T1 \*\+a4\(0\),a16
[0-9a-f]+[02468ace] <[^>]*> 0005[ \t]+stw \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stw \.D2T2 b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+stb \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000d[ \t]+ldw \.D2T1 \*\+b4\(0\),a16
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stw \.D2T2 b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+stb \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 120d[ \t]+ldbu \.D2T2 \*\+b4\(0\),b16
[0-9a-f]+[02468ace] <[^>]*> 2a0d[ \t]+ldbu \.D2T1 \*\+b4\(9\),a16
[0-9a-f]+[02468ace] <[^>]*> 3a1d[ \t]+ldbu \.D2T2 \*\+b4\(9\),b17
[0-9a-f]+[02468ace] <[^>]*> 221d[ \t]+ldbu \.D2T1 \*\+b4\(1\),a17
[0-9a-f]+[02468ace] <[^>]*> efe8c000[ \t]+<fetch packet header 0xefe8c000>
[0-9a-f]+[02468ace] <[^>]*> 0004[ \t]+stw \.D1T1 a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1004[ \t]+stw \.D1T2 b16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0204[ \t]+stb \.D1T1 a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000c[ \t]+ldw \.D1T1 \*\+a4\(0\),a16
[0-9a-f]+[02468ace] <[^>]*> 0005[ \t]+stw \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stw \.D2T2 b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+stb \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000d[ \t]+ldw \.D2T1 \*\+b4\(0\),a16
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stw \.D2T2 b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+stb \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 120d[ \t]+ldb \.D2T2 \*\+b4\(0\),b16
[0-9a-f]+[02468ace] <[^>]*> 2a0d[ \t]+ldb \.D2T1 \*\+b4\(9\),a16
[0-9a-f]+[02468ace] <[^>]*> 3a1d[ \t]+ldb \.D2T2 \*\+b4\(9\),b17
[0-9a-f]+[02468ace] <[^>]*> 221d[ \t]+ldb \.D2T1 \*\+b4\(1\),a17
[0-9a-f]+[02468ace] <[^>]*> efe9c000[ \t]+<fetch packet header 0xefe9c000>
[0-9a-f]+[02468ace] <[^>]*> 0004[ \t]+stw \.D1T1 a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1004[ \t]+stw \.D1T2 b16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0204[ \t]+sth \.D1T1 a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000c[ \t]+ldw \.D1T1 \*\+a4\(0\),a16
[0-9a-f]+[02468ace] <[^>]*> 0005[ \t]+stw \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stw \.D2T2 b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+sth \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000d[ \t]+ldw \.D2T1 \*\+b4\(0\),a16
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stw \.D2T2 b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+sth \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 120d[ \t]+ldhu \.D2T2 \*\+b4\(0\),b16
[0-9a-f]+[02468ace] <[^>]*> 2a0d[ \t]+ldhu \.D2T1 \*\+b4\(18\),a16
[0-9a-f]+[02468ace] <[^>]*> 3a1d[ \t]+ldhu \.D2T2 \*\+b4\(18\),b17
[0-9a-f]+[02468ace] <[^>]*> 221d[ \t]+ldhu \.D2T1 \*\+b4\(2\),a17
[0-9a-f]+[02468ace] <[^>]*> efeac000[ \t]+<fetch packet header 0xefeac000>
[0-9a-f]+[02468ace] <[^>]*> 0004[ \t]+stw \.D1T1 a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1004[ \t]+stw \.D1T2 b16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0204[ \t]+sth \.D1T1 a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000c[ \t]+ldw \.D1T1 \*\+a4\(0\),a16
[0-9a-f]+[02468ace] <[^>]*> 0005[ \t]+stw \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stw \.D2T2 b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+sth \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000d[ \t]+ldw \.D2T1 \*\+b4\(0\),a16
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stw \.D2T2 b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+sth \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 120d[ \t]+ldh \.D2T2 \*\+b4\(0\),b16
[0-9a-f]+[02468ace] <[^>]*> 2a0d[ \t]+ldh \.D2T1 \*\+b4\(18\),a16
[0-9a-f]+[02468ace] <[^>]*> 3a1d[ \t]+ldh \.D2T2 \*\+b4\(18\),b17
[0-9a-f]+[02468ace] <[^>]*> 221d[ \t]+ldh \.D2T1 \*\+b4\(2\),a17
[0-9a-f]+[02468ace] <[^>]*> efebc000[ \t]+<fetch packet header 0xefebc000>
[0-9a-f]+[02468ace] <[^>]*> 0004[ \t]+stdw \.D1T1 a17:a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1004[ \t]+stdw \.D1T2 b17:b16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0204[ \t]+stw \.D1T1 a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000c[ \t]+lddw \.D1T1 \*\+a4\(0\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 0005[ \t]+stdw \.D2T1 a17:a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stdw \.D2T2 b17:b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+stw \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000d[ \t]+lddw \.D2T1 \*\+b4\(0\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stdw \.D2T2 b17:b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+stw \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 120d[ \t]+ldw \.D2T2 \*\+b4\(0\),b16
[0-9a-f]+[02468ace] <[^>]*> 2a0d[ \t]+ldw \.D2T1 \*\+b4\(36\),a16
[0-9a-f]+[02468ace] <[^>]*> 3a1d[ \t]+ldw \.D2T2 \*\+b4\(36\),b17
[0-9a-f]+[02468ace] <[^>]*> 221d[ \t]+ldw \.D2T1 \*\+b4\(4\),a17
[0-9a-f]+[02468ace] <[^>]*> efecc000[ \t]+<fetch packet header 0xefecc000>
[0-9a-f]+[02468ace] <[^>]*> 0004[ \t]+stdw \.D1T1 a17:a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1004[ \t]+stdw \.D1T2 b17:b16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0204[ \t]+stb \.D1T1 a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000c[ \t]+lddw \.D1T1 \*\+a4\(0\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 0005[ \t]+stdw \.D2T1 a17:a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stdw \.D2T2 b17:b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+stb \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000d[ \t]+lddw \.D2T1 \*\+b4\(0\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stdw \.D2T2 b17:b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+stb \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 120d[ \t]+ldb \.D2T2 \*\+b4\(0\),b16
[0-9a-f]+[02468ace] <[^>]*> 2a0d[ \t]+ldb \.D2T1 \*\+b4\(9\),a16
[0-9a-f]+[02468ace] <[^>]*> 3a1d[ \t]+ldb \.D2T2 \*\+b4\(9\),b17
[0-9a-f]+[02468ace] <[^>]*> 221d[ \t]+ldb \.D2T1 \*\+b4\(1\),a17
[0-9a-f]+[02468ace] <[^>]*> efedc000[ \t]+<fetch packet header 0xefedc000>
[0-9a-f]+[02468ace] <[^>]*> 0004[ \t]+stdw \.D1T1 a17:a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1004[ \t]+stdw \.D1T2 b17:b16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0204[ \t]+stnw \.D1T1 a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000c[ \t]+lddw \.D1T1 \*\+a4\(0\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 0005[ \t]+stdw \.D2T1 a17:a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stdw \.D2T2 b17:b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+stnw \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000d[ \t]+lddw \.D2T1 \*\+b4\(0\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stdw \.D2T2 b17:b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+stnw \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 120d[ \t]+ldnw \.D2T2 \*\+b4\(0\),b16
[0-9a-f]+[02468ace] <[^>]*> 2a0d[ \t]+ldnw \.D2T1 \*\+b4\(36\),a16
[0-9a-f]+[02468ace] <[^>]*> 3a1d[ \t]+ldnw \.D2T2 \*\+b4\(36\),b17
[0-9a-f]+[02468ace] <[^>]*> 221d[ \t]+ldnw \.D2T1 \*\+b4\(4\),a17
[0-9a-f]+[02468ace] <[^>]*> efeec000[ \t]+<fetch packet header 0xefeec000>
[0-9a-f]+[02468ace] <[^>]*> 0004[ \t]+stdw \.D1T1 a17:a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1004[ \t]+stdw \.D1T2 b17:b16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0204[ \t]+sth \.D1T1 a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000c[ \t]+lddw \.D1T1 \*\+a4\(0\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 0005[ \t]+stdw \.D2T1 a17:a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stdw \.D2T2 b17:b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+sth \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 000d[ \t]+lddw \.D2T1 \*\+b4\(0\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 1005[ \t]+stdw \.D2T2 b17:b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0205[ \t]+sth \.D2T1 a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 120d[ \t]+ldh \.D2T2 \*\+b4\(0\),b16
[0-9a-f]+[02468ace] <[^>]*> 2a0d[ \t]+ldh \.D2T1 \*\+b4\(18\),a16
[0-9a-f]+[02468ace] <[^>]*> 3a1d[ \t]+ldh \.D2T2 \*\+b4\(18\),b17
[0-9a-f]+[02468ace] <[^>]*> 221d[ \t]+ldh \.D2T1 \*\+b4\(2\),a17
[0-9a-f]+[02468ace] <[^>]*> efefc000[ \t]+<fetch packet header 0xefefc000>
[0-9a-f]+[02468ace] <[^>]*> 0014[ \t]+stndw \.D1T1 a17:a16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1014[ \t]+stndw \.D1T2 b17:b16,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0214[ \t]+sth \.D1T1 a17,\*\+a4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 001c[ \t]+ldndw \.D1T1 \*\+a4\(0\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 0015[ \t]+stndw \.D2T1 a17:a16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 1015[ \t]+stndw \.D2T2 b17:b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0215[ \t]+sth \.D2T1 a17,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 001d[ \t]+ldndw \.D2T1 \*\+b4\(0\),a17:a16
[0-9a-f]+[02468ace] <[^>]*> 1015[ \t]+stndw \.D2T2 b17:b16,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 0215[ \t]+sth \.D2T1 a17,\*\+b4\(0\)
[0-9a-f]+[02468ace] <[^>]*> 121d[ \t]+ldh \.D2T2 \*\+b4\(0\),b17
[0-9a-f]+[02468ace] <[^>]*> 2a1d[ \t]+ldh \.D2T1 \*\+b4\(18\),a17
[0-9a-f]+[02468ace] <[^>]*> 3a1d[ \t]+ldh \.D2T2 \*\+b4\(18\),b17
[0-9a-f]+[02468ace] <[^>]*> 221d[ \t]+ldh \.D2T1 \*\+b4\(2\),a17
[0-9a-f]+[02468ace] <[^>]*> efefc000[ \t]+<fetch packet header 0xefefc000>
[ \t]*\.\.\.

158
gas/testsuite/gas/tic6x/insns16-doff4.s Normal file
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@ -0,0 +1,158 @@
; Test C64x+ 16 bits instructions - doff4 format
.text
.nocmp
doff4:
nop
.align 16
nop
.align 16
.short 0x0004
.short 0x1004
.short 0x0204
.short 0x000c
.short 0x0005
.short 0x1005
.short 0x0205
.short 0x000d
.short 0x1005
.short 0x0205
.short 0x120d
.short 0x2a0d
.short 0x3a1d
.short 0x221d
.word 0xefe00000
.short 0x0004
.short 0x1004
.short 0x0204
.short 0x000c
.short 0x0005
.short 0x1005
.short 0x0205
.short 0x000d
.short 0x1005
.short 0x0205
.short 0x120d
.short 0x2a0d
.short 0x3a1d
.short 0x221d
.word 0xefe8c000
.short 0x0004
.short 0x1004
.short 0x0204
.short 0x000c
.short 0x0005
.short 0x1005
.short 0x0205
.short 0x000d
.short 0x1005
.short 0x0205
.short 0x120d
.short 0x2a0d
.short 0x3a1d
.short 0x221d
.word 0xefe9c000
.short 0x0004
.short 0x1004
.short 0x0204
.short 0x000c
.short 0x0005
.short 0x1005
.short 0x0205
.short 0x000d
.short 0x1005
.short 0x0205
.short 0x120d
.short 0x2a0d
.short 0x3a1d
.short 0x221d
.word 0xefeac000
.short 0x0004
.short 0x1004
.short 0x0204
.short 0x000c
.short 0x0005
.short 0x1005
.short 0x0205
.short 0x000d
.short 0x1005
.short 0x0205
.short 0x120d
.short 0x2a0d
.short 0x3a1d
.short 0x221d
.word 0xefebc000
.short 0x0004
.short 0x1004
.short 0x0204
.short 0x000c
.short 0x0005
.short 0x1005
.short 0x0205
.short 0x000d
.short 0x1005
.short 0x0205
.short 0x120d
.short 0x2a0d
.short 0x3a1d
.short 0x221d
.word 0xefecc000
.short 0x0004
.short 0x1004
.short 0x0204
.short 0x000c
.short 0x0005
.short 0x1005
.short 0x0205
.short 0x000d
.short 0x1005
.short 0x0205
.short 0x120d
.short 0x2a0d
.short 0x3a1d
.short 0x221d
.word 0xefedc000
.short 0x0004
.short 0x1004
.short 0x0204
.short 0x000c
.short 0x0005
.short 0x1005
.short 0x0205
.short 0x000d
.short 0x1005
.short 0x0205
.short 0x120d
.short 0x2a0d
.short 0x3a1d
.short 0x221d
.word 0xefeec000
.short 0x0004
.short 0x1004
.short 0x0204
.short 0x000c
.short 0x0005
.short 0x1005
.short 0x0205
.short 0x000d
.short 0x1005
.short 0x0205
.short 0x120d
.short 0x2a0d
.short 0x3a1d
.short 0x221d
.word 0xefefc000
.short 0x0014
.short 0x1014
.short 0x0214
.short 0x001c
.short 0x0015
.short 0x1015
.short 0x0215
.short 0x001d
.short 0x1015
.short 0x0215
.short 0x121d
.short 0x2a1d
.short 0x3a1d
.short 0x221d
.word 0xefefc000

175
gas/testsuite/gas/tic6x/insns16-l-unit.d Normal file
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#objdump: -dr --prefix-addresses --show-raw-insn
#name:
#as: -march=c64x+ -mlittle-endian
.*: *file format elf32-tic6x-le
Disassembly of section .text:
[ \t]*\.\.\.
[0-9a-f]+[02468ace] <[^>]*> 0010[ \t]+add \.L1 a0,a0,a1
[0-9a-f]+[02468ace] <[^>]*> 2120[ \t]+add \.L1 a1,a2,a2
[0-9a-f]+[02468ace] <[^>]*> 4230[ \t]+add \.L1 a2,a4,a3
[0-9a-f]+[02468ace] <[^>]*> 6340[ \t]+add \.L1 a3,a6,a4
[0-9a-f]+[02468ace] <[^>]*> 8050[ \t]+add \.L1 a4,a0,a5
[0-9a-f]+[02468ace] <[^>]*> a160[ \t]+add \.L1 a5,a2,a6
[0-9a-f]+[02468ace] <[^>]*> c270[ \t]+add \.L1 a6,a4,a7
[0-9a-f]+[02468ace] <[^>]*> eb80[ \t]+sub \.L1 a7,a7,a0
[0-9a-f]+[02468ace] <[^>]*> 0890[ \t]+sub \.L1 a0,a1,a1
[0-9a-f]+[02468ace] <[^>]*> 29a0[ \t]+sub \.L1 a1,a3,a2
[0-9a-f]+[02468ace] <[^>]*> 4ab0[ \t]+sub \.L1 a2,a5,a3
[0-9a-f]+[02468ace] <[^>]*> 6bc0[ \t]+sub \.L1 a3,a7,a4
[0-9a-f]+[02468ace] <[^>]*> 88d0[ \t]+sub \.L1 a4,a1,a5
[0-9a-f]+[02468ace] <[^>]*> a9e0[ \t]+sub \.L1 a5,a3,a6
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> c2f0[ \t]+sadd \.L1 a22,a21,a23
[0-9a-f]+[02468ace] <[^>]*> e300[ \t]+sadd \.L1 a23,a22,a16
[0-9a-f]+[02468ace] <[^>]*> 0010[ \t]+sadd \.L1 a16,a16,a17
[0-9a-f]+[02468ace] <[^>]*> 2120[ \t]+sadd \.L1 a17,a18,a18
[0-9a-f]+[02468ace] <[^>]*> 4230[ \t]+sadd \.L1 a18,a20,a19
[0-9a-f]+[02468ace] <[^>]*> 6340[ \t]+sadd \.L1 a19,a22,a20
[0-9a-f]+[02468ace] <[^>]*> 8050[ \t]+sadd \.L1 a20,a16,a21
[0-9a-f]+[02468ace] <[^>]*> a960[ \t]+ssub \.L1 a21,a18,a22
[0-9a-f]+[02468ace] <[^>]*> ca70[ \t]+ssub \.L1 a22,a20,a23
[0-9a-f]+[02468ace] <[^>]*> eb80[ \t]+ssub \.L1 a23,a23,a16
[0-9a-f]+[02468ace] <[^>]*> 0890[ \t]+ssub \.L1 a16,a17,a17
[0-9a-f]+[02468ace] <[^>]*> 29a0[ \t]+ssub \.L1 a17,a19,a18
[0-9a-f]+[02468ace] <[^>]*> 4ab0[ \t]+ssub \.L1 a18,a21,a19
[0-9a-f]+[02468ace] <[^>]*> 6bc0[ \t]+ssub \.L1 a19,a23,a20
[0-9a-f]+[02468ace] <[^>]*> efe84000[ \t]+<fetch packet header 0xefe84000>
[0-9a-f]+[02468ace] <[^>]*> 0410[ \t]+add \.L1 8,a0,a1
[0-9a-f]+[02468ace] <[^>]*> 3520[ \t]+add \.L1X 1,b2,a2
[0-9a-f]+[02468ace] <[^>]*> 4630[ \t]+add \.L1 2,a4,a3
[0-9a-f]+[02468ace] <[^>]*> 7740[ \t]+add \.L1X 3,b6,a4
[0-9a-f]+[02468ace] <[^>]*> 8550[ \t]+add \.L1 4,a2,a5
[0-9a-f]+[02468ace] <[^>]*> b660[ \t]+add \.L1X 5,b4,a6
[0-9a-f]+[02468ace] <[^>]*> c770[ \t]+add \.L1 6,a6,a7
[0-9a-f]+[02468ace] <[^>]*> 1c80[ \t]+add \.L1X -8,b1,a0
[0-9a-f]+[02468ace] <[^>]*> 2d90[ \t]+add \.L1 -7,a3,a1
[0-9a-f]+[02468ace] <[^>]*> 5ea0[ \t]+add \.L1X -6,b5,a2
[0-9a-f]+[02468ace] <[^>]*> 6fb0[ \t]+add \.L1 -5,a7,a3
[0-9a-f]+[02468ace] <[^>]*> 9cc0[ \t]+add \.L1X -4,b1,a4
[0-9a-f]+[02468ace] <[^>]*> add0[ \t]+add \.L1 -3,a3,a5
[0-9a-f]+[02468ace] <[^>]*> dee0[ \t]+add \.L1X -2,b5,a6
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0408[ \t]+and \.L1 a0,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 2409[ \t]+and \.L2 b1,b0,b0
[0-9a-f]+[02468ace] <[^>]*> 4418[ \t]+and \.L1 a2,a0,a1
[0-9a-f]+[02468ace] <[^>]*> 6419[ \t]+and \.L2 b3,b0,b1
[0-9a-f]+[02468ace] <[^>]*> 9408[ \t]+and \.L1X a4,b0,a0
[0-9a-f]+[02468ace] <[^>]*> b409[ \t]+and \.L2X b5,a0,b0
[0-9a-f]+[02468ace] <[^>]*> d418[ \t]+and \.L1X a6,b0,a1
[0-9a-f]+[02468ace] <[^>]*> f439[ \t]+or \.L2X b7,a0,b1
[0-9a-f]+[02468ace] <[^>]*> 2428[ \t]+or \.L1 a1,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 4429[ \t]+or \.L2 b2,b0,b0
[0-9a-f]+[02468ace] <[^>]*> 6438[ \t]+or \.L1 a3,a0,a1
[0-9a-f]+[02468ace] <[^>]*> 8439[ \t]+or \.L2 b4,b0,b1
[0-9a-f]+[02468ace] <[^>]*> b428[ \t]+or \.L1X a5,b0,a0
[0-9a-f]+[02468ace] <[^>]*> d429[ \t]+or \.L2X b6,a0,b0
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0458[ \t]+xor \.L1 a16,a16,a1
[0-9a-f]+[02468ace] <[^>]*> 2449[ \t]+xor \.L2 b17,b16,b0
[0-9a-f]+[02468ace] <[^>]*> 4448[ \t]+xor \.L1 a18,a16,a0
[0-9a-f]+[02468ace] <[^>]*> 6459[ \t]+xor \.L2 b19,b16,b1
[0-9a-f]+[02468ace] <[^>]*> 9458[ \t]+xor \.L1X a20,b16,a1
[0-9a-f]+[02468ace] <[^>]*> b449[ \t]+xor \.L2X b21,a16,b0
[0-9a-f]+[02468ace] <[^>]*> d448[ \t]+xor \.L1X a22,b16,a0
[0-9a-f]+[02468ace] <[^>]*> f479[ \t]+cmpeq \.L2X b23,a16,b1
[0-9a-f]+[02468ace] <[^>]*> 2468[ \t]+cmpeq \.L1 a17,a16,a0
[0-9a-f]+[02468ace] <[^>]*> 4469[ \t]+cmpeq \.L2 b18,b16,b0
[0-9a-f]+[02468ace] <[^>]*> 6478[ \t]+cmpeq \.L1 a19,a16,a1
[0-9a-f]+[02468ace] <[^>]*> 8479[ \t]+cmpeq \.L2 b20,b16,b1
[0-9a-f]+[02468ace] <[^>]*> b468[ \t]+cmpeq \.L1X a21,b16,a0
[0-9a-f]+[02468ace] <[^>]*> d469[ \t]+cmpeq \.L2X b22,a16,b0
[0-9a-f]+[02468ace] <[^>]*> efe80000[ \t]+<fetch packet header 0xefe80000>
[0-9a-f]+[02468ace] <[^>]*> 0c18[ \t]+cmplt \.L1 a0,a0,a1
[0-9a-f]+[02468ace] <[^>]*> 2c09[ \t]+cmplt \.L2 b1,b0,b0
[0-9a-f]+[02468ace] <[^>]*> 4c08[ \t]+cmplt \.L1 a2,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 6c19[ \t]+cmplt \.L2 b3,b0,b1
[0-9a-f]+[02468ace] <[^>]*> 9c18[ \t]+cmplt \.L1X a4,b0,a1
[0-9a-f]+[02468ace] <[^>]*> bc09[ \t]+cmplt \.L2X b5,a0,b0
[0-9a-f]+[02468ace] <[^>]*> dc08[ \t]+cmplt \.L1X a6,b0,a0
[0-9a-f]+[02468ace] <[^>]*> fc39[ \t]+cmpgt \.L2X b7,a0,b1
[0-9a-f]+[02468ace] <[^>]*> 2c28[ \t]+cmpgt \.L1 a1,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 4c29[ \t]+cmpgt \.L2 b2,b0,b0
[0-9a-f]+[02468ace] <[^>]*> 6c38[ \t]+cmpgt \.L1 a3,a0,a1
[0-9a-f]+[02468ace] <[^>]*> 8c39[ \t]+cmpgt \.L2 b4,b0,b1
[0-9a-f]+[02468ace] <[^>]*> bc28[ \t]+cmpgt \.L1X a5,b0,a0
[0-9a-f]+[02468ace] <[^>]*> dc29[ \t]+cmpgt \.L2X b6,a0,b0
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0c58[ \t]+cmpltu \.L1 a16,a16,a1
[0-9a-f]+[02468ace] <[^>]*> 2c49[ \t]+cmpltu \.L2 b17,b16,b0
[0-9a-f]+[02468ace] <[^>]*> 4c48[ \t]+cmpltu \.L1 a18,a16,a0
[0-9a-f]+[02468ace] <[^>]*> 6c59[ \t]+cmpltu \.L2 b19,b16,b1
[0-9a-f]+[02468ace] <[^>]*> 9c58[ \t]+cmpltu \.L1X a20,b16,a1
[0-9a-f]+[02468ace] <[^>]*> bc49[ \t]+cmpltu \.L2X b21,a16,b0
[0-9a-f]+[02468ace] <[^>]*> dc48[ \t]+cmpltu \.L1X a22,b16,a0
[0-9a-f]+[02468ace] <[^>]*> fc79[ \t]+cmpgtu \.L2X b23,a16,b1
[0-9a-f]+[02468ace] <[^>]*> 2c68[ \t]+cmpgtu \.L1 a17,a16,a0
[0-9a-f]+[02468ace] <[^>]*> 4c69[ \t]+cmpgtu \.L2 b18,b16,b0
[0-9a-f]+[02468ace] <[^>]*> 6c78[ \t]+cmpgtu \.L1 a19,a16,a1
[0-9a-f]+[02468ace] <[^>]*> 8c79[ \t]+cmpgtu \.L2 b20,b16,b1
[0-9a-f]+[02468ace] <[^>]*> bc68[ \t]+cmpgtu \.L1X a21,b16,a0
[0-9a-f]+[02468ace] <[^>]*> dc69[ \t]+cmpgtu \.L2X b22,a16,b0
[0-9a-f]+[02468ace] <[^>]*> efe80000[ \t]+<fetch packet header 0xefe80000>
[0-9a-f]+[02468ace] <[^>]*> 0426[ \t]+mvk \.L1 0,a0
[0-9a-f]+[02468ace] <[^>]*> 2527[ \t]+mvk \.L2 1,b2
[0-9a-f]+[02468ace] <[^>]*> 46a6[ \t]+mvk \.L1 2,a5
[0-9a-f]+[02468ace] <[^>]*> 67a7[ \t]+mvk \.L2 3,b7
[0-9a-f]+[02468ace] <[^>]*> 8626[ \t]+mvk \.L1 4,a4
[0-9a-f]+[02468ace] <[^>]*> a527[ \t]+mvk \.L2 5,b2
[0-9a-f]+[02468ace] <[^>]*> c4a6[ \t]+mvk \.L1 6,a1
[0-9a-f]+[02468ace] <[^>]*> f5a7[ \t]+mvk \.L2 -9,b3
[0-9a-f]+[02468ace] <[^>]*> 1626[ \t]+mvk \.L1 -16,a4
[0-9a-f]+[02468ace] <[^>]*> 3727[ \t]+mvk \.L2 -15,b6
[0-9a-f]+[02468ace] <[^>]*> 56a6[ \t]+mvk \.L1 -14,a5
[0-9a-f]+[02468ace] <[^>]*> 75a7[ \t]+mvk \.L2 -13,b3
[0-9a-f]+[02468ace] <[^>]*> 9426[ \t]+mvk \.L1 -12,a0
[0-9a-f]+[02468ace] <[^>]*> b527[ \t]+mvk \.L2 -11,b2
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0026[ \t]+cmpeq \.L1 0,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 2127[ \t]+cmpeq \.L2 1,b2,b0
[0-9a-f]+[02468ace] <[^>]*> 42a6[ \t]+cmpeq \.L1 2,a5,a0
[0-9a-f]+[02468ace] <[^>]*> 63a7[ \t]+cmpeq \.L2 3,b7,b0
[0-9a-f]+[02468ace] <[^>]*> 8226[ \t]+cmpeq \.L1 4,a4,a0
[0-9a-f]+[02468ace] <[^>]*> a127[ \t]+cmpeq \.L2 5,b2,b0
[0-9a-f]+[02468ace] <[^>]*> c0a6[ \t]+cmpeq \.L1 6,a1,a0
[0-9a-f]+[02468ace] <[^>]*> e1a7[ \t]+cmpeq \.L2 7,b3,b0
[0-9a-f]+[02468ace] <[^>]*> 0226[ \t]+cmpeq \.L1 0,a4,a0
[0-9a-f]+[02468ace] <[^>]*> 2327[ \t]+cmpeq \.L2 1,b6,b0
[0-9a-f]+[02468ace] <[^>]*> 42a6[ \t]+cmpeq \.L1 2,a5,a0
[0-9a-f]+[02468ace] <[^>]*> 61a7[ \t]+cmpeq \.L2 3,b3,b0
[0-9a-f]+[02468ace] <[^>]*> 8026[ \t]+cmpeq \.L1 4,a0,a0
[0-9a-f]+[02468ace] <[^>]*> a127[ \t]+cmpeq \.L2 5,b2,b0
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 1026[ \t]+cmplt \.L1 0,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 3127[ \t]+cmplt \.L2 1,b2,b0
[0-9a-f]+[02468ace] <[^>]*> 52a6[ \t]+cmpgt \.L1 0,a5,a0
[0-9a-f]+[02468ace] <[^>]*> 73a7[ \t]+cmpgt \.L2 1,b7,b0
[0-9a-f]+[02468ace] <[^>]*> 9226[ \t]+cmpltu \.L1 0,a4,a0
[0-9a-f]+[02468ace] <[^>]*> b127[ \t]+cmpltu \.L2 1,b2,b0
[0-9a-f]+[02468ace] <[^>]*> d0a6[ \t]+cmpgtu \.L1 0,a1,a0
[0-9a-f]+[02468ace] <[^>]*> f1a7[ \t]+cmpgtu \.L2 1,b3,b0
[0-9a-f]+[02468ace] <[^>]*> 1226[ \t]+cmplt \.L1 0,a4,a0
[0-9a-f]+[02468ace] <[^>]*> 3327[ \t]+cmplt \.L2 1,b6,b0
[0-9a-f]+[02468ace] <[^>]*> 52a6[ \t]+cmpgt \.L1 0,a5,a0
[0-9a-f]+[02468ace] <[^>]*> 71a7[ \t]+cmpgt \.L2 1,b3,b0
[0-9a-f]+[02468ace] <[^>]*> 9026[ \t]+cmpltu \.L1 0,a0,a0
[0-9a-f]+[02468ace] <[^>]*> b127[ \t]+cmpltu \.L2 1,b2,b0
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 5b66[ \t]+sub \.L1 0,a6,a6
[0-9a-f]+[02468ace] <[^>]*> 5a67[ \t]+sub \.L2 0,b4,b4
[0-9a-f]+[02468ace] <[^>]*> 59e6[ \t]+sub \.L1 0,a3,a3
[0-9a-f]+[02468ace] <[^>]*> 58e7[ \t]+sub \.L2 0,b1,b1
[0-9a-f]+[02468ace] <[^>]*> 5866[ \t]+sub \.L1 0,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 5967[ \t]+sub \.L2 0,b2,b2
[0-9a-f]+[02468ace] <[^>]*> 5ae6[ \t]+sub \.L1 0,a5,a5
[0-9a-f]+[02468ace] <[^>]*> 7be7[ \t]+add \.L2 -1,b7,b7
[0-9a-f]+[02468ace] <[^>]*> 7b66[ \t]+add \.L1 -1,a6,a6
[0-9a-f]+[02468ace] <[^>]*> 7a67[ \t]+add \.L2 -1,b4,b4
[0-9a-f]+[02468ace] <[^>]*> 79e6[ \t]+add \.L1 -1,a3,a3
[0-9a-f]+[02468ace] <[^>]*> 78e7[ \t]+add \.L2 -1,b1,b1
[0-9a-f]+[02468ace] <[^>]*> 7866[ \t]+add \.L1 -1,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 7967[ \t]+add \.L2 -1,b2,b2
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[ \t]*\.\.\.

186
gas/testsuite/gas/tic6x/insns16-l-unit.s Normal file
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; Test C64x+ L-unit compact instruction formats
.text
nop
.align 16
nop
.align 16
l3_nosat_l:
.short 0x0010
.short 0x2120
.short 0x4230
.short 0x6340
.short 0x8050
.short 0xa160
.short 0xc270
.short 0xeb80
.short 0x0890
.short 0x29a0
.short 0x4ab0
.short 0x6bc0
.short 0x88d0
.short 0xa9e0
.word 0xefe00000
l3_sat_h:
.short 0xc2f0
.short 0xe300
.short 0x0010
.short 0x2120
.short 0x4230
.short 0x6340
.short 0x8050
.short 0xa960
.short 0xca70
.short 0xeb80
.short 0x0890
.short 0x29a0
.short 0x4ab0
.short 0x6bc0
.word 0xefe84000
l3i:
.short 0x0410
.short 0x3520
.short 0x4630
.short 0x7740
.short 0x8550
.short 0xb660
.short 0xc770
.short 0x1c80
.short 0x2d90
.short 0x5ea0
.short 0x6fb0
.short 0x9cc0
.short 0xadd0
.short 0xdee0
.word 0xefe00000
l2c_op_000:
.short 0x0408
.short 0x2409
.short 0x4418
.short 0x6419
.short 0x9408
.short 0xb409
.short 0xd418
l2c_op_001:
.short 0xf439
.short 0x2428
.short 0x4429
.short 0x6438
.short 0x8439
.short 0xb428
.short 0xd429
.word 0xefe00000
l2c_op_010:
.short 0x0458
.short 0x2449
.short 0x4448
.short 0x6459
.short 0x9458
.short 0xb449
.short 0xd448
l2c_op_011:
.short 0xf479
.short 0x2468
.short 0x4469
.short 0x6478
.short 0x8479
.short 0xb468
.short 0xd469
.word 0xefe80000
l2c_op_100:
.short 0x0c18
.short 0x2c09
.short 0x4c08
.short 0x6c19
.short 0x9c18
.short 0xbc09
.short 0xdc08
l2c_op_101:
.short 0xfc39
.short 0x2c28
.short 0x4c29
.short 0x6c38
.short 0x8c39
.short 0xbc28
.short 0xdc29
.word 0xefe00000
l2c_op_110:
.short 0x0c58
.short 0x2c49
.short 0x4c48
.short 0x6c59
.short 0x9c58
.short 0xbc49
.short 0xdc48
l2c_op_111:
.short 0xfc79
.short 0x2c68
.short 0x4c69
.short 0x6c78
.short 0x8c79
.short 0xbc68
.short 0xdc69
.word 0xefe80000
lx5:
.short 0x0426
.short 0x2527
.short 0x46a6
.short 0x67a7
.short 0x8626
.short 0xa527
.short 0xc4a6
.short 0xf5a7
.short 0x1626
.short 0x3727
.short 0x56a6
.short 0x75a7
.short 0x9426
.short 0xb527
.word 0xefe00000
lx3c:
.short 0x0026
.short 0x2127
.short 0x42a6
.short 0x63a7
.short 0x8226
.short 0xa127
.short 0xc0a6
.short 0xe1a7
.short 0x0226
.short 0x2327
.short 0x42a6
.short 0x61a7
.short 0x8026
.short 0xa127
.word 0xefe00000
lx1c:
.short 0x1026
.short 0x3127
.short 0x52a6
.short 0x73a7
.short 0x9226
.short 0xb127
.short 0xd0a6
.short 0xf1a7
.short 0x1226
.short 0x3327
.short 0x52a6
.short 0x71a7
.short 0x9026
.short 0xb127
.word 0xefe00000
lx1:
.short 0x5b66
.short 0x5a67
.short 0x59e6
.short 0x58e7
.short 0x5866
.short 0x5967
.short 0x5ae6
.short 0x7be7
.short 0x7b66
.short 0x7a67
.short 0x79e6
.short 0x78e7
.short 0x7866
.short 0x7967
.word 0xefe00000

70
gas/testsuite/gas/tic6x/insns16-lsd-unit.d Normal file
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#objdump: -dr --prefix-addresses --show-raw-insn
#name:
#as: -march=c64x+ -mlittle-endian
.*: *file format elf32-tic6x-le
Disassembly of section .text:
[ \t]*\.\.\.
[0-9a-f]+[02468ace] <[^>]*> 0006[ \t]+mv \.L1 a0,a0
[0-9a-f]+[02468ace] <[^>]*> 000f[ \t]+mv \.S2 b0,b0
[0-9a-f]+[02468ace] <[^>]*> 0016[ \t]+mv \.D1 a0,a0
[0-9a-f]+[02468ace] <[^>]*> 0017[ \t]+mv \.D2 b0,b0
[0-9a-f]+[02468ace] <[^>]*> 000e[ \t]+mv \.S1 a0,a0
[0-9a-f]+[02468ace] <[^>]*> 0007[ \t]+mv \.L2 b0,b0
[0-9a-f]+[02468ace] <[^>]*> 0006[ \t]+mv \.L1 a0,a0
[0-9a-f]+[02468ace] <[^>]*> 100f[ \t]+mv \.S2X a0,b0
[0-9a-f]+[02468ace] <[^>]*> 1016[ \t]+mv \.D1X b0,a0
[0-9a-f]+[02468ace] <[^>]*> 1017[ \t]+mv \.D2X a0,b0
[0-9a-f]+[02468ace] <[^>]*> 100e[ \t]+mv \.S1X b0,a0
[0-9a-f]+[02468ace] <[^>]*> 1007[ \t]+mv \.L2X a0,b0
[0-9a-f]+[02468ace] <[^>]*> 1006[ \t]+mv \.L1X b0,a0
[0-9a-f]+[02468ace] <[^>]*> 100f[ \t]+mv \.S2X a0,b0
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0046[ \t]+mv \.L1 a0,a0
[0-9a-f]+[02468ace] <[^>]*> 004f[ \t]+mv \.S2 b0,b0
[0-9a-f]+[02468ace] <[^>]*> 0056[ \t]+mv \.D1 a0,a0
[0-9a-f]+[02468ace] <[^>]*> 0057[ \t]+mv \.D2 b0,b0
[0-9a-f]+[02468ace] <[^>]*> 004e[ \t]+mv \.S1 a0,a0
[0-9a-f]+[02468ace] <[^>]*> 0047[ \t]+mv \.L2 b0,b0
[0-9a-f]+[02468ace] <[^>]*> 0046[ \t]+mv \.L1 a0,a0
[0-9a-f]+[02468ace] <[^>]*> 104f[ \t]+mv \.S2X a0,b0
[0-9a-f]+[02468ace] <[^>]*> 1056[ \t]+mv \.D1X b0,a0
[0-9a-f]+[02468ace] <[^>]*> 1057[ \t]+mv \.D2X a0,b0
[0-9a-f]+[02468ace] <[^>]*> 104e[ \t]+mv \.S1X b0,a0
[0-9a-f]+[02468ace] <[^>]*> 1047[ \t]+mv \.L2X a0,b0
[0-9a-f]+[02468ace] <[^>]*> 1046[ \t]+mv \.L1X b0,a0
[0-9a-f]+[02468ace] <[^>]*> 104f[ \t]+mv \.S2X a0,b0
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0866[ \t]+\[a0\] mvk \.L1 0,a0
[0-9a-f]+[02468ace] <[^>]*> 4967[ \t]+\[!a0\] mvk \.L2 0,b2
[0-9a-f]+[02468ace] <[^>]*> 8ae6[ \t]+\[b0\] mvk \.L1 0,a5
[0-9a-f]+[02468ace] <[^>]*> cbe7[ \t]+\[!b0\] mvk \.L2 0,b7
[0-9a-f]+[02468ace] <[^>]*> 886e[ \t]+\[b0\] mvk \.S1 0,a0
[0-9a-f]+[02468ace] <[^>]*> 496f[ \t]+\[!a0\] mvk \.S2 0,b2
[0-9a-f]+[02468ace] <[^>]*> 0aee[ \t]+\[a0\] mvk \.S1 0,a5
[0-9a-f]+[02468ace] <[^>]*> 6bef[ \t]+\[!a0\] mvk \.S2 1,b7
[0-9a-f]+[02468ace] <[^>]*> a876[ \t]+\[b0\] mvk \.D1 1,a0
[0-9a-f]+[02468ace] <[^>]*> e977[ \t]+\[!b0\] mvk \.D2 1,b2
[0-9a-f]+[02468ace] <[^>]*> aaf6[ \t]+\[b0\] mvk \.D1 1,a5
[0-9a-f]+[02468ace] <[^>]*> 6bf7[ \t]+\[!a0\] mvk \.D2 1,b7
[0-9a-f]+[02468ace] <[^>]*> 2866[ \t]+\[a0\] mvk \.L1 1,a0
[0-9a-f]+[02468ace] <[^>]*> 6967[ \t]+\[!a0\] mvk \.L2 1,b2
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 1866[ \t]+mvk \.L1 0,a0
[0-9a-f]+[02468ace] <[^>]*> 1867[ \t]+mvk \.L2 0,b0
[0-9a-f]+[02468ace] <[^>]*> 1866[ \t]+mvk \.L1 0,a0
[0-9a-f]+[02468ace] <[^>]*> 1867[ \t]+mvk \.L2 0,b0
[0-9a-f]+[02468ace] <[^>]*> 1866[ \t]+mvk \.L1 0,a0
[0-9a-f]+[02468ace] <[^>]*> 1867[ \t]+mvk \.L2 0,b0
[0-9a-f]+[02468ace] <[^>]*> 1866[ \t]+mvk \.L1 0,a0
[0-9a-f]+[02468ace] <[^>]*> 1867[ \t]+mvk \.L2 0,b0
[0-9a-f]+[02468ace] <[^>]*> 1866[ \t]+mvk \.L1 0,a0
[0-9a-f]+[02468ace] <[^>]*> 1867[ \t]+mvk \.L2 0,b0
[0-9a-f]+[02468ace] <[^>]*> 1866[ \t]+mvk \.L1 0,a0
[0-9a-f]+[02468ace] <[^>]*> 1867[ \t]+mvk \.L2 0,b0
[0-9a-f]+[02468ace] <[^>]*> 1866[ \t]+mvk \.L1 0,a0
[0-9a-f]+[02468ace] <[^>]*> 1867[ \t]+mvk \.L2 0,b0
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[ \t]*\.\.\.

71
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; Test C64x+ L, S or D-unit compact instruction formats
.text
nop
.align 16
nop
.align 16
lsdmvto:
.short 0x0006
.short 0x000f
.short 0x0016
.short 0x0017
.short 0x000e
.short 0x0007
.short 0x0006
.short 0x100f
.short 0x1016
.short 0x1017
.short 0x100e
.short 0x1007
.short 0x1006
.short 0x100f
.word 0xefe00000 | 0x0000
lsdmvfr:
.short 0x0046
.short 0x004f
.short 0x0056
.short 0x0057
.short 0x004e
.short 0x0047
.short 0x0046
.short 0x104f
.short 0x1056
.short 0x1057
.short 0x104e
.short 0x1047
.short 0x1046
.short 0x104f
.word 0xefe00000 | 0x0000
lsdx1c:
.short 0x0866
.short 0x4967
.short 0x8ae6
.short 0xcbe7
.short 0x886e
.short 0x496f
.short 0x0aee
.short 0x6bef
.short 0xa876
.short 0xe977
.short 0xaaf6
.short 0x6bf7
.short 0x2866
.short 0x6967
.word 0xefe00000 | 0x0000
lsdx1:
.short 0x1866
.short 0x1867
.short 0x1866
.short 0x1867
.short 0x1866
.short 0x1867
.short 0x1866
.short 0x1867
.short 0x1866
.short 0x1867
.short 0x1866
.short 0x1867
.short 0x1866
.short 0x1867
.word 0xefe00000 | 0x0000

70
gas/testsuite/gas/tic6x/insns16-m-unit.d Normal file
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#objdump: -dr --prefix-addresses --show-raw-insn
#name:
#as: -march=c64x+ -mlittle-endian
.*: *file format elf32-tic6x-le
Disassembly of section .text:
[ \t]*\.\.\.
[0-9a-f]+[02468ace] <[^>]*> 231e[ \t]+mpy \.M1 a1,a6,a0
[0-9a-f]+[02468ace] <[^>]*> 469f[ \t]+mpy \.M2 b2,b5,b2
[0-9a-f]+[02468ace] <[^>]*> 799e[ \t]+mpy \.M1X a3,b3,a4
[0-9a-f]+[02468ace] <[^>]*> 9c1f[ \t]+mpy \.M2X b4,a0,b6
[0-9a-f]+[02468ace] <[^>]*> a71e[ \t]+mpy \.M1 a5,a6,a2
[0-9a-f]+[02468ace] <[^>]*> ca9f[ \t]+mpy \.M2 b6,b5,b4
[0-9a-f]+[02468ace] <[^>]*> fd9e[ \t]+mpy \.M1X a7,b3,a6
[0-9a-f]+[02468ace] <[^>]*> 213e[ \t]+mpyh \.M1 a1,a2,a0
[0-9a-f]+[02468ace] <[^>]*> 46bf[ \t]+mpyh \.M2 b2,b5,b2
[0-9a-f]+[02468ace] <[^>]*> 7bbe[ \t]+mpyh \.M1X a3,b7,a4
[0-9a-f]+[02468ace] <[^>]*> 9c3f[ \t]+mpyh \.M2X b4,a0,b6
[0-9a-f]+[02468ace] <[^>]*> a53e[ \t]+mpyh \.M1 a5,a2,a2
[0-9a-f]+[02468ace] <[^>]*> cabf[ \t]+mpyh \.M2 b6,b5,b4
[0-9a-f]+[02468ace] <[^>]*> ffbe[ \t]+mpyh \.M1X a7,b7,a6
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 225e[ \t]+mpylh \.M1 a17,a20,a16
[0-9a-f]+[02468ace] <[^>]*> 47df[ \t]+mpylh \.M2 b18,b23,b18
[0-9a-f]+[02468ace] <[^>]*> 78de[ \t]+mpylh \.M1X a19,b17,a20
[0-9a-f]+[02468ace] <[^>]*> 9d5f[ \t]+mpylh \.M2X b20,a18,b22
[0-9a-f]+[02468ace] <[^>]*> a6de[ \t]+mpylh \.M1 a21,a21,a18
[0-9a-f]+[02468ace] <[^>]*> cbdf[ \t]+mpylh \.M2 b22,b23,b20
[0-9a-f]+[02468ace] <[^>]*> fc5e[ \t]+mpylh \.M1X a23,b16,a22
[0-9a-f]+[02468ace] <[^>]*> 207e[ \t]+mpyhl \.M1 a17,a16,a16
[0-9a-f]+[02468ace] <[^>]*> 45ff[ \t]+mpyhl \.M2 b18,b19,b18
[0-9a-f]+[02468ace] <[^>]*> 7afe[ \t]+mpyhl \.M1X a19,b21,a20
[0-9a-f]+[02468ace] <[^>]*> 9f7f[ \t]+mpyhl \.M2X b20,a22,b22
[0-9a-f]+[02468ace] <[^>]*> a47e[ \t]+mpyhl \.M1 a21,a16,a18
[0-9a-f]+[02468ace] <[^>]*> c9ff[ \t]+mpyhl \.M2 b22,b19,b20
[0-9a-f]+[02468ace] <[^>]*> fefe[ \t]+mpyhl \.M1X a23,b21,a22
[0-9a-f]+[02468ace] <[^>]*> efe80000[ \t]+<fetch packet header 0xefe80000>
[0-9a-f]+[02468ace] <[^>]*> 231e[ \t]+smpy \.M1 a17,a22,a16
[0-9a-f]+[02468ace] <[^>]*> 469f[ \t]+smpy \.M2 b18,b21,b18
[0-9a-f]+[02468ace] <[^>]*> 799e[ \t]+smpy \.M1X a19,b19,a20
[0-9a-f]+[02468ace] <[^>]*> 9c1f[ \t]+smpy \.M2X b20,a16,b22
[0-9a-f]+[02468ace] <[^>]*> a71e[ \t]+smpy \.M1 a21,a22,a18
[0-9a-f]+[02468ace] <[^>]*> ca9f[ \t]+smpy \.M2 b22,b21,b20
[0-9a-f]+[02468ace] <[^>]*> fd9e[ \t]+smpy \.M1X a23,b19,a22
[0-9a-f]+[02468ace] <[^>]*> 213e[ \t]+smpyh \.M1 a17,a18,a16
[0-9a-f]+[02468ace] <[^>]*> 46bf[ \t]+smpyh \.M2 b18,b21,b18
[0-9a-f]+[02468ace] <[^>]*> 7bbe[ \t]+smpyh \.M1X a19,b23,a20
[0-9a-f]+[02468ace] <[^>]*> 9c3f[ \t]+smpyh \.M2X b20,a16,b22
[0-9a-f]+[02468ace] <[^>]*> a53e[ \t]+smpyh \.M1 a21,a18,a18
[0-9a-f]+[02468ace] <[^>]*> cabf[ \t]+smpyh \.M2 b22,b21,b20
[0-9a-f]+[02468ace] <[^>]*> ffbe[ \t]+smpyh \.M1X a23,b23,a22
[0-9a-f]+[02468ace] <[^>]*> efe84000[ \t]+<fetch packet header 0xefe84000>
[0-9a-f]+[02468ace] <[^>]*> 225e[ \t]+smpylh \.M1 a1,a4,a0
[0-9a-f]+[02468ace] <[^>]*> 47df[ \t]+smpylh \.M2 b2,b7,b2
[0-9a-f]+[02468ace] <[^>]*> 78de[ \t]+smpylh \.M1X a3,b1,a4
[0-9a-f]+[02468ace] <[^>]*> 9d5f[ \t]+smpylh \.M2X b4,a2,b6
[0-9a-f]+[02468ace] <[^>]*> a6de[ \t]+smpylh \.M1 a5,a5,a2
[0-9a-f]+[02468ace] <[^>]*> cbdf[ \t]+smpylh \.M2 b6,b7,b4
[0-9a-f]+[02468ace] <[^>]*> fc5e[ \t]+smpylh \.M1X a7,b0,a6
[0-9a-f]+[02468ace] <[^>]*> 207e[ \t]+smpyhl \.M1 a1,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 45ff[ \t]+smpyhl \.M2 b2,b3,b2
[0-9a-f]+[02468ace] <[^>]*> 7afe[ \t]+smpyhl \.M1X a3,b5,a4
[0-9a-f]+[02468ace] <[^>]*> 9f7f[ \t]+smpyhl \.M2X b4,a6,b6
[0-9a-f]+[02468ace] <[^>]*> a47e[ \t]+smpyhl \.M1 a5,a0,a2
[0-9a-f]+[02468ace] <[^>]*> c9ff[ \t]+smpyhl \.M2 b6,b3,b4
[0-9a-f]+[02468ace] <[^>]*> fefe[ \t]+smpyhl \.M1X a7,b5,a6
[0-9a-f]+[02468ace] <[^>]*> efe04000[ \t]+<fetch packet header 0xefe04000>
[ \t]*\.\.\.

74
gas/testsuite/gas/tic6x/insns16-m-unit.s Normal file
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; Test C64x+ M-unit compact instruction formats
.text
nop
.align 16
nop
.align 16
m3_op_00:
.short 0x231e
.short 0x469f
.short 0x799e
.short 0x9c1f
.short 0xa71e
.short 0xca9f
.short 0xfd9e
m3_op_01:
.short 0x213e
.short 0x46bf
.short 0x7bbe
.short 0x9c3f
.short 0xa53e
.short 0xcabf
.short 0xffbe
.word 0xefe00000
m3_op_10:
.short 0x225e
.short 0x47df
.short 0x78de
.short 0x9d5f
.short 0xa6de
.short 0xcbdf
.short 0xfc5e
m3_op_11:
.short 0x207e
.short 0x45ff
.short 0x7afe
.short 0x9f7f
.short 0xa47e
.short 0xc9ff
.short 0xfefe
.word 0xefe80000
m3_op_00_sat:
.short 0x231e
.short 0x469f
.short 0x799e
.short 0x9c1f
.short 0xa71e
.short 0xca9f
.short 0xfd9e
m3_op_01_sat:
.short 0x213e
.short 0x46bf
.short 0x7bbe
.short 0x9c3f
.short 0xa53e
.short 0xcabf
.short 0xffbe
.word 0xefe84000
m3_op_10_sat:
.short 0x225e
.short 0x47df
.short 0x78de
.short 0x9d5f
.short 0xa6de
.short 0xcbdf
.short 0xfc5e
m3_op_11_sat:
.short 0x207e
.short 0x45ff
.short 0x7afe
.short 0x9f7f
.short 0xa47e
.short 0xc9ff
.short 0xfefe
.word 0xefe04000

85
gas/testsuite/gas/tic6x/insns16-s-unit-pcrel.d Normal file
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#objdump: -dr --prefix-addresses --show-raw-insn
#name:
#as: -march=c64x+ -mlittle-endian
.*: *file format elf32-tic6x-le
Disassembly of section .text:
[ \t]*\.\.\.
[0-9a-f]+[02468ace] <[^>]*> 000a[ \t]+bnop \.S1 [0-9a-f]{8} <[^>]*>,0
[0-9a-f]+[02468ace] <[^>]*> 004a[ \t]+bnop \.S1 [0-9a-f]{8} <[^+]*\+0x2>,0
[0-9a-f]+[02468ace] <[^>]*> 214b[ \t]+bnop \.S2 [0-9a-f]{8} <[^+]*\+0xa>,1
[0-9a-f]+[02468ace] <[^>]*> 428a[ \t]+bnop \.S1 [0-9a-f]{8} <[^+]*\+0x14>,2
[0-9a-f]+[02468ace] <[^>]*> 63cb[ \t]+bnop \.S2 [0-9a-f]{8} <[^+]*\+0x1e>,3
[0-9a-f]+[02468ace] <[^>]*> 840a[ \t]+bnop \.S1 [0-9a-f]{8} <[^+]*>,4
[0-9a-f]+[02468ace] <[^>]*> a54b[ \t]+bnop \.S2 [0-9a-f]{8} <[^+]*\+0xa>,5
[0-9a-f]+[02468ace] <[^>]*> 868a[ \t]+bnop \.S1 [0-9a-f]{8} <[^+]*\+0x14>,4
[0-9a-f]+[02468ace] <[^>]*> 77cb[ \t]+bnop \.S2 [0-9a-f]{8} <[^+]*-0x42>,3
[0-9a-f]+[02468ace] <[^>]*> 580a[ \t]+bnop \.S1 [0-9a-f]{8} <[^+]*-0x40>,2
[0-9a-f]+[02468ace] <[^>]*> 394b[ \t]+bnop \.S2 [0-9a-f]{8} <[^+]*-0x36>,1
[0-9a-f]+[02468ace] <[^>]*> 1a8a[ \t]+bnop \.S1 [0-9a-f]{8} <[^+]*-0x2c>,0
[0-9a-f]+[02468ace] <[^>]*> 3bcb[ \t]+bnop \.S2 [0-9a-f]{8} <[^+]*-0x22>,1
[0-9a-f]+[02468ace] <[^>]*> 5c0a[ \t]+bnop \.S1 [0-9a-f]{8} <[^+]*-0x20>,2
[0-9a-f]+[02468ace] <[^>]*> efe08000[ \t]+<fetch packet header 0xefe08000>
[0-9a-f]+[02468ace] <[^>]*> caca[ \t]+bnop \.S1 [0-9a-f]{8} <[^+]*\+0x16>,5
[0-9a-f]+[02468ace] <[^>]*> e7cb[ \t]+bnop \.S2 [0-9a-f]{8} <[^+]*\+0xde>,5
[0-9a-f]+[02468ace] <[^>]*> f84a[ \t]+bnop \.S1 [0-9a-f]{8} <[^+]*\+0x162>,5
[0-9a-f]+[02468ace] <[^>]*> cacb[ \t]+bnop \.S2 [0-9a-f]{8} <[^+]*\+0x16>,5
[0-9a-f]+[02468ace] <[^>]*> d84a[ \t]+bnop \.S1 [0-9a-f]{8} <[^+]*\+0x62>,5
[0-9a-f]+[02468ace] <[^>]*> f18b[ \t]+bnop \.S2 [0-9a-f]{8} <[^+]*\+0x12c>,5
[0-9a-f]+[02468ace] <[^>]*> e84a[ \t]+bnop \.S1 [0-9a-f]{8} <[^+]*\+0xe2>,5
[0-9a-f]+[02468ace] <[^>]*> d10b[ \t]+bnop \.S2 [0-9a-f]{8} <[^+]*\+0x28>,5
[0-9a-f]+[02468ace] <[^>]*> c74a[ \t]+bnop \.S1 [0-9a-f]{8} <[^+]*\+0x1a>,5
[0-9a-f]+[02468ace] <[^>]*> eacb[ \t]+bnop \.S2 [0-9a-f]{8} <[^+]*\+0xf6>,5
[0-9a-f]+[02468ace] <[^>]*> d18a[ \t]+bnop \.S1 [0-9a-f]{8} <[^+]*\+0x2c>,5
[0-9a-f]+[02468ace] <[^>]*> ea4b[ \t]+bnop \.S2 [0-9a-f]{8} <[^+]*\+0xf2>,5
[0-9a-f]+[02468ace] <[^>]*> da4a[ \t]+bnop \.S1 [0-9a-f]{8} <[^+]*\+0x72>,5
[0-9a-f]+[02468ace] <[^>]*> d7cb[ \t]+bnop \.S2 [0-9a-f]{8} <[^+]*\+0x5e>,5
[0-9a-f]+[02468ace] <[^>]*> efe08000[ \t]+<fetch packet header 0xefe08000>
[0-9a-f]+[02468ace] <[^>]*> 0f1a[ \t]+callp \.S1 [0-9a-f]{8} <[^+]*\+0xb0>,a3
[0-9a-f]+[02468ace] <[^>]*> 1e5b[ \t]+callp \.S2 [0-9a-f]{8} <[^+]*\+0x1a4>,b3
[0-9a-f]+[02468ace] <[^>]*> 2d9a[ \t]+callp \.S1 [0-9a-f]{8} <[^+]*\+0x298>,a3
[0-9a-f]+[02468ace] <[^>]*> 3cdb[ \t]+callp \.S2 [0-9a-f]{8} <[^+]*\+0x38c>,b3
[0-9a-f]+[02468ace] <[^>]*> 4b9a[ \t]+callp \.S1 [0-9a-f]{8} <[^+]*\+0x478>,a3
[0-9a-f]+[02468ace] <[^>]*> 5a5b[ \t]+callp \.S2 [0-9a-f]{8} <[^+]*\+0x564>,b3
[0-9a-f]+[02468ace] <[^>]*> 691a[ \t]+callp \.S1 [0-9a-f]{8} <[^+]*\+0x650>,a3
[0-9a-f]+[02468ace] <[^>]*> 785b[ \t]+callp \.S2 [0-9a-f]{8} <[^+]*\+0x744>,b3
[0-9a-f]+[02468ace] <[^>]*> 879a[ \t]+callp \.S1 [0-9a-f]{8} <[^+]*-0x748>,a3
[0-9a-f]+[02468ace] <[^>]*> 96db[ \t]+callp \.S2 [0-9a-f]{8} <[^+]*-0x654>,b3
[0-9a-f]+[02468ace] <[^>]*> a59a[ \t]+callp \.S1 [0-9a-f]{8} <[^+]*-0x568>,a3
[0-9a-f]+[02468ace] <[^>]*> b45b[ \t]+callp \.S2 [0-9a-f]{8} <[^+]*-0x47c>,b3
[0-9a-f]+[02468ace] <[^>]*> c31a[ \t]+callp \.S1 [0-9a-f]{8} <[^+]*-0x390>,a3
[0-9a-f]+[02468ace] <[^>]*> d2db[ \t]+callp \.S2 [0-9a-f]{8} <[^+]*-0x294>,b3
[0-9a-f]+[02468ace] <[^>]*> efe08000[ \t]+<fetch packet header 0xefe08000>
[0-9a-f]+[02468ace] <[^>]*> 002a[ \t]+\[a0\] bnop \.S1 [0-9a-f]{8} <[^+]*>,0
[0-9a-f]+[02468ace] <[^>]*> 216b[ \t]+\[b0\] bnop \.S2 [0-9a-f]{8} <[^+]*\+0xa>,1
[0-9a-f]+[02468ace] <[^>]*> 427b[ \t]+\[!b0\] bnop \.S2 [0-9a-f]{8} <[^+]*\+0x12>,2
[0-9a-f]+[02468ace] <[^>]*> 637a[ \t]+\[!a0\] bnop \.S1 [0-9a-f]{8} <[^+]*\+0x1a>,3
[0-9a-f]+[02468ace] <[^>]*> 846b[ \t]+\[b0\] bnop \.S2 [0-9a-f]{8} <[^+]*\+0x2>,4
[0-9a-f]+[02468ace] <[^>]*> a52a[ \t]+\[a0\] bnop \.S1 [0-9a-f]{8} <[^+]*\+0x8>,5
[0-9a-f]+[02468ace] <[^>]*> 06bb[ \t]+\[!b0\] bnop \.S2 [0-9a-f]{8} <[^+]*\+0x14>,0
[0-9a-f]+[02468ace] <[^>]*> 07ba[ \t]+\[!a0\] bnop \.S1 [0-9a-f]{8} <[^+]*\+0x1c>,0
[0-9a-f]+[02468ace] <[^>]*> 38ab[ \t]+\[b0\] bnop \.S2 [0-9a-f]{8} <[^+]*\+0x4>,1
[0-9a-f]+[02468ace] <[^>]*> 592a[ \t]+\[a0\] bnop \.S1 [0-9a-f]{8} <[^+]*\+0x8>,2
[0-9a-f]+[02468ace] <[^>]*> 7afb[ \t]+\[!b0\] bnop \.S2 [0-9a-f]{8} <[^+]*\+0x16>,3
[0-9a-f]+[02468ace] <[^>]*> 9bfa[ \t]+\[!a0\] bnop \.S1 [0-9a-f]{8} <[^+]*\+0x1e>,4
[0-9a-f]+[02468ace] <[^>]*> bceb[ \t]+\[b0\] bnop \.S2 [0-9a-f]{8} <[^+]*\+0x6>,5
[0-9a-f]+[02468ace] <[^>]*> 0f2a[ \t]+\[a0\] bnop \.S1 [0-9a-f]{8} <[^+]*\+0x58>,0
[0-9a-f]+[02468ace] <[^>]*> efe08000[ \t]+<fetch packet header 0xefe08000>
[0-9a-f]+[02468ace] <[^>]*> c02a[ \t]+\[a0\] bnop \.S1 [0-9a-f]{8} <[^+]*>,5
[0-9a-f]+[02468ace] <[^>]*> d16b[ \t]+\[b0\] bnop \.S2 [0-9a-f]{8} <[^+]*\+0x8a>,5
[0-9a-f]+[02468ace] <[^>]*> d27b[ \t]+\[!b0\] bnop \.S2 [0-9a-f]{8} <[^+]*\+0x92>,5
[0-9a-f]+[02468ace] <[^>]*> d37a[ \t]+\[!a0\] bnop \.S1 [0-9a-f]{8} <[^+]*\+0x9a>,5
[0-9a-f]+[02468ace] <[^>]*> c46b[ \t]+\[b0\] bnop \.S2 [0-9a-f]{8} <[^+]*\+0x22>,5
[0-9a-f]+[02468ace] <[^>]*> e52a[ \t]+\[a0\] bnop \.S1 [0-9a-f]{8} <[^+]*\+0x128>,5
[0-9a-f]+[02468ace] <[^>]*> e6bb[ \t]+\[!b0\] bnop \.S2 [0-9a-f]{8} <[^+]*\+0x134>,5
[0-9a-f]+[02468ace] <[^>]*> e7ba[ \t]+\[!a0\] bnop \.S1 [0-9a-f]{8} <[^+]*\+0x13c>,5
[0-9a-f]+[02468ace] <[^>]*> c8ab[ \t]+\[b0\] bnop \.S2 [0-9a-f]{8} <[^+]*\+0x44>,5
[0-9a-f]+[02468ace] <[^>]*> f92a[ \t]+\[a0\] bnop \.S1 [0-9a-f]{8} <[^+]*\+0x1c8>,5
[0-9a-f]+[02468ace] <[^>]*> fafb[ \t]+\[!b0\] bnop \.S2 [0-9a-f]{8} <[^+]*\+0x1d6>,5
[0-9a-f]+[02468ace] <[^>]*> fbfa[ \t]+\[!a0\] bnop \.S1 [0-9a-f]{8} <[^+]*\+0x1de>,5
[0-9a-f]+[02468ace] <[^>]*> cceb[ \t]+\[b0\] bnop \.S2 [0-9a-f]{8} <[^+]*\+0x66>,5
[0-9a-f]+[02468ace] <[^>]*> cf2a[ \t]+\[a0\] bnop \.S1 [0-9a-f]{8} <[^+]*\+0x78>,5
[0-9a-f]+[02468ace] <[^>]*> efe08000[ \t]+<fetch packet header 0xefe08000>
[ \t]*\.\.\.

86
gas/testsuite/gas/tic6x/insns16-s-unit-pcrel.s Normal file
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; Test C64x+ S-unit pcrel compact instruction formats
.text
nop
.align 16
nop
.align 16
sbs7:
.short 0x000a
.short 0x004a
.short 0x214b
.short 0x428a
.short 0x63cb
.short 0x840a
.short 0xa54b
.short 0x868a
.short 0x77cb
.short 0x580a
.short 0x394b
.short 0x1a8a
.short 0x3bcb
.short 0x5c0a
.word 0xefe00000 | 0x8000
sbu8:
.short 0xcaca
.short 0xe7cb
.short 0xf84a
.short 0xcacb
.short 0xd84a
.short 0xf18b
.short 0xe84a
.short 0xd10b
.short 0xc74a
.short 0xeacb
.short 0xd18a
.short 0xea4b
.short 0xda4a
.short 0xd7cb
.word 0xefe00000 | 0x8000
scs10:
.short 0x0f1a
.short 0x1e5b
.short 0x2d9a
.short 0x3cdb
.short 0x4b9a
.short 0x5a5b
.short 0x691a
.short 0x785b
.short 0x879a
.short 0x96db
.short 0xa59a
.short 0xb45b
.short 0xc31a
.short 0xd2db
.word 0xefe00000 | 0x8000
sbs7c:
.short 0x002a
.short 0x216b
.short 0x427b
.short 0x637a
.short 0x846b
.short 0xa52a
.short 0x06bb
.short 0x07ba
.short 0x38ab
.short 0x592a
.short 0x7afb
.short 0x9bfa
.short 0xbceb
.short 0x0f2a
.word 0xefe00000 | 0x8000
sbu8c:
.short 0xc02a
.short 0xd16b
.short 0xd27b
.short 0xd37a
.short 0xc46b
.short 0xe52a
.short 0xe6bb
.short 0xe7ba
.short 0xc8ab
.short 0xf92a
.short 0xfafb
.short 0xfbfa
.short 0xcceb
.short 0xcf2a
.word 0xefe00000 | 0x8000

235
gas/testsuite/gas/tic6x/insns16-s-unit.d Normal file
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#objdump: -dr --prefix-addresses --show-raw-insn
#name:
#as: -march=c64x+ -mlittle-endian
.*: *file format elf32-tic6x-le
Disassembly of section .text:
[ \t]*\.\.\.
[0-9a-f]+[02468ace] <[^>]*> 000a[ \t]+add \.S1 a0,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 201b[ \t]+add \.S2 b1,b0,b1
[0-9a-f]+[02468ace] <[^>]*> 512a[ \t]+add \.S1X a2,b2,a2
[0-9a-f]+[02468ace] <[^>]*> 713b[ \t]+add \.S2X b3,a2,b3
[0-9a-f]+[02468ace] <[^>]*> 824a[ \t]+add \.S1 a4,a4,a4
[0-9a-f]+[02468ace] <[^>]*> a25b[ \t]+add \.S2 b5,b4,b5
[0-9a-f]+[02468ace] <[^>]*> d36a[ \t]+add \.S1X a6,b6,a6
[0-9a-f]+[02468ace] <[^>]*> f37b[ \t]+add \.S2X b7,a6,b7
[0-9a-f]+[02468ace] <[^>]*> e28a[ \t]+add \.S1 a7,a5,a0
[0-9a-f]+[02468ace] <[^>]*> 0a9b[ \t]+sub \.S2 b0,b5,b1
[0-9a-f]+[02468ace] <[^>]*> 39aa[ \t]+sub \.S1X a1,b3,a2
[0-9a-f]+[02468ace] <[^>]*> 59bb[ \t]+sub \.S2X b2,a3,b3
[0-9a-f]+[02468ace] <[^>]*> 68ca[ \t]+sub \.S1 a3,a1,a4
[0-9a-f]+[02468ace] <[^>]*> 88db[ \t]+sub \.S2 b4,b1,b5
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 21ea[ \t]+sadd \.S1 a1,a3,a6
[0-9a-f]+[02468ace] <[^>]*> 41fb[ \t]+sadd \.S2 b2,b3,b7
[0-9a-f]+[02468ace] <[^>]*> 720a[ \t]+sadd \.S1X a3,b4,a0
[0-9a-f]+[02468ace] <[^>]*> 921b[ \t]+sadd \.S2X b4,a4,b1
[0-9a-f]+[02468ace] <[^>]*> c32a[ \t]+sadd \.S1 a6,a6,a2
[0-9a-f]+[02468ace] <[^>]*> e33b[ \t]+sadd \.S2 b7,b6,b3
[0-9a-f]+[02468ace] <[^>]*> f24a[ \t]+sadd \.S1X a7,b4,a4
[0-9a-f]+[02468ace] <[^>]*> b25b[ \t]+sadd \.S2X b5,a4,b5
[0-9a-f]+[02468ace] <[^>]*> 816a[ \t]+sadd \.S1 a4,a2,a6
[0-9a-f]+[02468ace] <[^>]*> a87b[ \t]+sub \.S2 b5,b0,b7
[0-9a-f]+[02468ace] <[^>]*> d88a[ \t]+sub \.S1X a6,b1,a0
[0-9a-f]+[02468ace] <[^>]*> fa9b[ \t]+sub \.S2X b7,a5,b1
[0-9a-f]+[02468ace] <[^>]*> eaaa[ \t]+sub \.S1 a7,a5,a2
[0-9a-f]+[02468ace] <[^>]*> 7bbb[ \t]+sub \.S2X b3,a7,b3
[0-9a-f]+[02468ace] <[^>]*> efe04000[ \t]+<fetch packet header 0xefe04000>
[0-9a-f]+[02468ace] <[^>]*> 040a[ \t]+shl \.S1 a0,16,a0
[0-9a-f]+[02468ace] <[^>]*> 251b[ \t]+shl \.S2 b2,1,b1
[0-9a-f]+[02468ace] <[^>]*> 362a[ \t]+shl \.S1X b4,1,a2
[0-9a-f]+[02468ace] <[^>]*> 573b[ \t]+shl \.S2X a6,2,b3
[0-9a-f]+[02468ace] <[^>]*> 444a[ \t]+shl \.S1 a0,2,a4
[0-9a-f]+[02468ace] <[^>]*> 655b[ \t]+shl \.S2 b2,3,b5
[0-9a-f]+[02468ace] <[^>]*> 766a[ \t]+shl \.S1X b4,3,a6
[0-9a-f]+[02468ace] <[^>]*> 9ffb[ \t]+shr \.S2X a7,4,b7
[0-9a-f]+[02468ace] <[^>]*> 8cea[ \t]+shr \.S1 a1,4,a6
[0-9a-f]+[02468ace] <[^>]*> addb[ \t]+shr \.S2 b3,5,b5
[0-9a-f]+[02468ace] <[^>]*> beca[ \t]+shr \.S1X b5,5,a4
[0-9a-f]+[02468ace] <[^>]*> dfbb[ \t]+shr \.S2X a7,6,b3
[0-9a-f]+[02468ace] <[^>]*> ccaa[ \t]+shr \.S1 a1,6,a2
[0-9a-f]+[02468ace] <[^>]*> ed9b[ \t]+shr \.S2 b3,8,b1
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0012[ \t]+mvk \.S1 0,a0
[0-9a-f]+[02468ace] <[^>]*> 1113[ \t]+mvk \.S2 16,b2
[0-9a-f]+[02468ace] <[^>]*> 2232[ \t]+mvk \.S1 33,a4
[0-9a-f]+[02468ace] <[^>]*> 3333[ \t]+mvk \.S2 49,b6
[0-9a-f]+[02468ace] <[^>]*> 4752[ \t]+mvk \.S1 194,a6
[0-9a-f]+[02468ace] <[^>]*> 5653[ \t]+mvk \.S2 210,b4
[0-9a-f]+[02468ace] <[^>]*> 6572[ \t]+mvk \.S1 227,a2
[0-9a-f]+[02468ace] <[^>]*> 78f3[ \t]+mvk \.S2 123,b1
[0-9a-f]+[02468ace] <[^>]*> 8992[ \t]+mvk \.S1 12,a3
[0-9a-f]+[02468ace] <[^>]*> 9a93[ \t]+mvk \.S2 28,b5
[0-9a-f]+[02468ace] <[^>]*> abb2[ \t]+mvk \.S1 45,a7
[0-9a-f]+[02468ace] <[^>]*> bed2[ \t]+mvk \.S1 221,a5
[0-9a-f]+[02468ace] <[^>]*> cdf3[ \t]+mvk \.S2 238,b3
[0-9a-f]+[02468ace] <[^>]*> fc92[ \t]+mvk \.S1 159,a1
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0402[ \t]+shl \.S1 a0,0,a0
[0-9a-f]+[02468ace] <[^>]*> 1503[ \t]+shl \.S2 b2,16,b2
[0-9a-f]+[02468ace] <[^>]*> 2682[ \t]+shl \.S1 a5,1,a5
[0-9a-f]+[02468ace] <[^>]*> 3783[ \t]+shl \.S2 b7,17,b7
[0-9a-f]+[02468ace] <[^>]*> 4c22[ \t]+shr \.S1 a0,10,a0
[0-9a-f]+[02468ace] <[^>]*> 5d23[ \t]+shr \.S2 b2,26,b2
[0-9a-f]+[02468ace] <[^>]*> 6ea2[ \t]+shr \.S1 a5,11,a5
[0-9a-f]+[02468ace] <[^>]*> 7fa3[ \t]+shr \.S2 b7,27,b7
[0-9a-f]+[02468ace] <[^>]*> 8442[ \t]+shru \.S1 a0,4,a0
[0-9a-f]+[02468ace] <[^>]*> 9543[ \t]+shru \.S2 b2,20,b2
[0-9a-f]+[02468ace] <[^>]*> a6c2[ \t]+shru \.S1 a5,5,a5
[0-9a-f]+[02468ace] <[^>]*> b7c3[ \t]+shru \.S2 b7,21,b7
[0-9a-f]+[02468ace] <[^>]*> cc42[ \t]+shru \.S1 a0,14,a0
[0-9a-f]+[02468ace] <[^>]*> dd43[ \t]+shru \.S2 b2,30,b2
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> ec02[ \t]+shl \.S1 a0,15,a0
[0-9a-f]+[02468ace] <[^>]*> fd03[ \t]+shl \.S2 b2,31,b2
[0-9a-f]+[02468ace] <[^>]*> e682[ \t]+shl \.S1 a5,7,a5
[0-9a-f]+[02468ace] <[^>]*> d783[ \t]+shl \.S2 b7,22,b7
[0-9a-f]+[02468ace] <[^>]*> c422[ \t]+shr \.S1 a0,6,a0
[0-9a-f]+[02468ace] <[^>]*> b523[ \t]+shr \.S2 b2,21,b2
[0-9a-f]+[02468ace] <[^>]*> aea2[ \t]+shr \.S1 a5,13,a5
[0-9a-f]+[02468ace] <[^>]*> 9fa3[ \t]+shr \.S2 b7,28,b7
[0-9a-f]+[02468ace] <[^>]*> 8c42[ \t]+sshl \.S1 a0,12,a0
[0-9a-f]+[02468ace] <[^>]*> 7d43[ \t]+sshl \.S2 b2,27,b2
[0-9a-f]+[02468ace] <[^>]*> 66c2[ \t]+sshl \.S1 a5,3,a5
[0-9a-f]+[02468ace] <[^>]*> 57c3[ \t]+sshl \.S2 b7,18,b7
[0-9a-f]+[02468ace] <[^>]*> 4442[ \t]+sshl \.S1 a0,2,a0
[0-9a-f]+[02468ace] <[^>]*> 3543[ \t]+sshl \.S2 b2,17,b2
[0-9a-f]+[02468ace] <[^>]*> efe04000[ \t]+<fetch packet header 0xefe04000>
[0-9a-f]+[02468ace] <[^>]*> 0462[ \t]+shl \.S1 a0,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 2563[ \t]+shl \.S2 b2,b1,b2
[0-9a-f]+[02468ace] <[^>]*> 4662[ \t]+shl \.S1 a4,a2,a4
[0-9a-f]+[02468ace] <[^>]*> 6f63[ \t]+shr \.S2 b6,b3,b6
[0-9a-f]+[02468ace] <[^>]*> 8c62[ \t]+shr \.S1 a0,a4,a0
[0-9a-f]+[02468ace] <[^>]*> ad63[ \t]+shr \.S2 b2,b5,b2
[0-9a-f]+[02468ace] <[^>]*> ce62[ \t]+shr \.S1 a4,a6,a4
[0-9a-f]+[02468ace] <[^>]*> f7e3[ \t]+shru \.S2 b7,b7,b7
[0-9a-f]+[02468ace] <[^>]*> d4e2[ \t]+shru \.S1 a1,a6,a1
[0-9a-f]+[02468ace] <[^>]*> b5e3[ \t]+shru \.S2 b3,b5,b3
[0-9a-f]+[02468ace] <[^>]*> 96e2[ \t]+shru \.S1 a5,a4,a5
[0-9a-f]+[02468ace] <[^>]*> 7fe3[ \t]+sshl \.S2 b7,b3,b7
[0-9a-f]+[02468ace] <[^>]*> 5ce2[ \t]+sshl \.S1 a1,a2,a1
[0-9a-f]+[02468ace] <[^>]*> 3de3[ \t]+sshl \.S2 b3,b1,b3
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0002[ \t]+extu \.S1 a0,0,31,a0
[0-9a-f]+[02468ace] <[^>]*> 1103[ \t]+extu \.S2 b2,16,31,b0
[0-9a-f]+[02468ace] <[^>]*> 2202[ \t]+extu \.S1 a4,1,31,a0
[0-9a-f]+[02468ace] <[^>]*> 3303[ \t]+extu \.S2 b6,17,31,b0
[0-9a-f]+[02468ace] <[^>]*> 4a22[ \t]+set \.S1 a4,10,10,a4
[0-9a-f]+[02468ace] <[^>]*> 5923[ \t]+set \.S2 b2,26,26,b2
[0-9a-f]+[02468ace] <[^>]*> 6822[ \t]+set \.S1 a0,11,11,a0
[0-9a-f]+[02468ace] <[^>]*> 71a3[ \t]+set \.S2 b3,19,19,b3
[0-9a-f]+[02468ace] <[^>]*> 82a2[ \t]+set \.S1 a5,4,4,a5
[0-9a-f]+[02468ace] <[^>]*> 93c3[ \t]+clr \.S2 b7,20,20,b7
[0-9a-f]+[02468ace] <[^>]*> a2c2[ \t]+clr \.S1 a5,5,5,a5
[0-9a-f]+[02468ace] <[^>]*> b9c3[ \t]+clr \.S2 b3,29,29,b3
[0-9a-f]+[02468ace] <[^>]*> c8c2[ \t]+clr \.S1 a1,14,14,a1
[0-9a-f]+[02468ace] <[^>]*> f9c3[ \t]+clr \.S2 b3,31,31,b3
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 0062[ \t]+ext \.S1 a0,16,16,a0
[0-9a-f]+[02468ace] <[^>]*> 2163[ \t]+ext \.S2 b2,16,16,b1
[0-9a-f]+[02468ace] <[^>]*> 4262[ \t]+ext \.S1 a4,16,16,a2
[0-9a-f]+[02468ace] <[^>]*> 6b63[ \t]+ext \.S2 b6,24,24,b3
[0-9a-f]+[02468ace] <[^>]*> 8862[ \t]+ext \.S1 a0,24,24,a4
[0-9a-f]+[02468ace] <[^>]*> a963[ \t]+ext \.S2 b2,24,24,b5
[0-9a-f]+[02468ace] <[^>]*> ca62[ \t]+ext \.S1 a4,24,24,a6
[0-9a-f]+[02468ace] <[^>]*> f3e3[ \t]+extu \.S2 b7,16,16,b7
[0-9a-f]+[02468ace] <[^>]*> d0e2[ \t]+extu \.S1 a1,16,16,a6
[0-9a-f]+[02468ace] <[^>]*> b1e3[ \t]+extu \.S2 b3,16,16,b5
[0-9a-f]+[02468ace] <[^>]*> 9ae2[ \t]+extu \.S1 a5,24,24,a4
[0-9a-f]+[02468ace] <[^>]*> 7be3[ \t]+extu \.S2 b7,24,24,b3
[0-9a-f]+[02468ace] <[^>]*> 58e2[ \t]+extu \.S1 a1,24,24,a2
[0-9a-f]+[02468ace] <[^>]*> 39e3[ \t]+extu \.S2 b3,24,24,b1
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 002e[ \t]+add \.S1 a0,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 212f[ \t]+add \.S2 b1,b2,b1
[0-9a-f]+[02468ace] <[^>]*> 522e[ \t]+add \.S1X a2,b4,a2
[0-9a-f]+[02468ace] <[^>]*> 732f[ \t]+add \.S2X b3,a6,b3
[0-9a-f]+[02468ace] <[^>]*> 802e[ \t]+add \.S1 a4,a0,a4
[0-9a-f]+[02468ace] <[^>]*> a12f[ \t]+add \.S2 b5,b2,b5
[0-9a-f]+[02468ace] <[^>]*> d22e[ \t]+add \.S1X a6,b4,a6
[0-9a-f]+[02468ace] <[^>]*> fb2f[ \t]+sub \.S2X b7,a6,b7
[0-9a-f]+[02468ace] <[^>]*> 082e[ \t]+sub \.S1 a0,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 292f[ \t]+sub \.S2 b1,b2,b1
[0-9a-f]+[02468ace] <[^>]*> 5a2e[ \t]+sub \.S1X a2,b4,a2
[0-9a-f]+[02468ace] <[^>]*> 7b2f[ \t]+sub \.S2X b3,a6,b3
[0-9a-f]+[02468ace] <[^>]*> 882e[ \t]+sub \.S1 a4,a0,a4
[0-9a-f]+[02468ace] <[^>]*> a92f[ \t]+sub \.S2 b5,b2,b5
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 042e[ \t]+addk \.S1 0,a0
[0-9a-f]+[02468ace] <[^>]*> 152f[ \t]+addk \.S2 16,b2
[0-9a-f]+[02468ace] <[^>]*> 262e[ \t]+addk \.S1 1,a4
[0-9a-f]+[02468ace] <[^>]*> 372f[ \t]+addk \.S2 17,b6
[0-9a-f]+[02468ace] <[^>]*> 4c2e[ \t]+addk \.S1 10,a0
[0-9a-f]+[02468ace] <[^>]*> 5d2f[ \t]+addk \.S2 26,b2
[0-9a-f]+[02468ace] <[^>]*> 6e2e[ \t]+addk \.S1 11,a4
[0-9a-f]+[02468ace] <[^>]*> 77af[ \t]+addk \.S2 19,b7
[0-9a-f]+[02468ace] <[^>]*> 84ae[ \t]+addk \.S1 4,a1
[0-9a-f]+[02468ace] <[^>]*> 95af[ \t]+addk \.S2 20,b3
[0-9a-f]+[02468ace] <[^>]*> aeae[ \t]+addk \.S1 13,a5
[0-9a-f]+[02468ace] <[^>]*> bfaf[ \t]+addk \.S2 29,b7
[0-9a-f]+[02468ace] <[^>]*> ccae[ \t]+addk \.S1 14,a1
[0-9a-f]+[02468ace] <[^>]*> fdaf[ \t]+addk \.S2 31,b3
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 586e[ \t]+sub \.S1 0,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 596f[ \t]+sub \.S2 0,b2,b2
[0-9a-f]+[02468ace] <[^>]*> 5a6e[ \t]+sub \.S1 0,a4,a4
[0-9a-f]+[02468ace] <[^>]*> 5b6f[ \t]+sub \.S2 0,b6,b6
[0-9a-f]+[02468ace] <[^>]*> 586e[ \t]+sub \.S1 0,a0,a0
[0-9a-f]+[02468ace] <[^>]*> 796f[ \t]+add \.S2 -1,b2,b2
[0-9a-f]+[02468ace] <[^>]*> 7a6e[ \t]+add \.S1 -1,a4,a4
[0-9a-f]+[02468ace] <[^>]*> 7bef[ \t]+add \.S2 -1,b7,b7
[0-9a-f]+[02468ace] <[^>]*> 78ee[ \t]+add \.S1 -1,a1,a1
[0-9a-f]+[02468ace] <[^>]*> 79ef[ \t]+add \.S2 -1,b3,b3
[0-9a-f]+[02468ace] <[^>]*> daee[ \t]+mvc \.S1 b5,ilc
[0-9a-f]+[02468ace] <[^>]*> dbef[ \t]+mvc \.S2 b7,ilc
[0-9a-f]+[02468ace] <[^>]*> d8ee[ \t]+mvc \.S1 b1,ilc
[0-9a-f]+[02468ace] <[^>]*> d9ef[ \t]+mvc \.S2 b3,ilc
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 586e[ \t]+sub \.S1 0,a16,a16
[0-9a-f]+[02468ace] <[^>]*> 596f[ \t]+sub \.S2 0,b18,b18
[0-9a-f]+[02468ace] <[^>]*> 5a6e[ \t]+sub \.S1 0,a20,a20
[0-9a-f]+[02468ace] <[^>]*> 5b6f[ \t]+sub \.S2 0,b22,b22
[0-9a-f]+[02468ace] <[^>]*> 586e[ \t]+sub \.S1 0,a16,a16
[0-9a-f]+[02468ace] <[^>]*> 796f[ \t]+add \.S2 -1,b18,b18
[0-9a-f]+[02468ace] <[^>]*> 7a6e[ \t]+add \.S1 -1,a20,a20
[0-9a-f]+[02468ace] <[^>]*> 7bef[ \t]+add \.S2 -1,b23,b23
[0-9a-f]+[02468ace] <[^>]*> 78ee[ \t]+add \.S1 -1,a17,a17
[0-9a-f]+[02468ace] <[^>]*> 79ef[ \t]+add \.S2 -1,b19,b19
[0-9a-f]+[02468ace] <[^>]*> daee[ \t]+mvc \.S1 b21,ilc
[0-9a-f]+[02468ace] <[^>]*> dbef[ \t]+mvc \.S2 b23,ilc
[0-9a-f]+[02468ace] <[^>]*> d8ee[ \t]+mvc \.S1 b17,ilc
[0-9a-f]+[02468ace] <[^>]*> d9ef[ \t]+mvc \.S2 b19,ilc
[0-9a-f]+[02468ace] <[^>]*> efe80000[ \t]+<fetch packet header 0xefe80000>
[0-9a-f]+[02468ace] <[^>]*> 006e[ \t]+bnop \.S1 b0,0
[0-9a-f]+[02468ace] <[^>]*> 216f[ \t]+bnop \.S2 b2,1
[0-9a-f]+[02468ace] <[^>]*> 22ee[ \t]+bnop \.S1 b5,1
[0-9a-f]+[02468ace] <[^>]*> 43ef[ \t]+bnop \.S2 b7,2
[0-9a-f]+[02468ace] <[^>]*> 446e[ \t]+bnop \.S1 b8,2
[0-9a-f]+[02468ace] <[^>]*> 656f[ \t]+bnop \.S2 b10,3
[0-9a-f]+[02468ace] <[^>]*> 66ee[ \t]+bnop \.S1 b13,3
[0-9a-f]+[02468ace] <[^>]*> 87ef[ \t]+bnop \.S2 b15,4
[0-9a-f]+[02468ace] <[^>]*> 866e[ \t]+bnop \.S1 b12,4
[0-9a-f]+[02468ace] <[^>]*> a56f[ \t]+bnop \.S2 b10,5
[0-9a-f]+[02468ace] <[^>]*> a4ee[ \t]+bnop \.S1 b9,5
[0-9a-f]+[02468ace] <[^>]*> c3ef[ \t]+bnop \.S2 b7,6
[0-9a-f]+[02468ace] <[^>]*> c26e[ \t]+bnop \.S1 b4,6
[0-9a-f]+[02468ace] <[^>]*> e16f[ \t]+bnop \.S2 b2,7
[0-9a-f]+[02468ace] <[^>]*> efe00000[ \t]+<fetch packet header 0xefe00000>
[0-9a-f]+[02468ace] <[^>]*> 006e[ \t]+bnop \.S1 b0,0
[0-9a-f]+[02468ace] <[^>]*> 216f[ \t]+bnop \.S2 b2,1
[0-9a-f]+[02468ace] <[^>]*> 22ee[ \t]+bnop \.S1 b5,1
[0-9a-f]+[02468ace] <[^>]*> 43ef[ \t]+bnop \.S2 b7,2
[0-9a-f]+[02468ace] <[^>]*> 446e[ \t]+bnop \.S1 b8,2
[0-9a-f]+[02468ace] <[^>]*> 656f[ \t]+bnop \.S2 b10,3
[0-9a-f]+[02468ace] <[^>]*> 66ee[ \t]+bnop \.S1 b13,3
[0-9a-f]+[02468ace] <[^>]*> 87ef[ \t]+bnop \.S2 b15,4
[0-9a-f]+[02468ace] <[^>]*> 866e[ \t]+bnop \.S1 b12,4
[0-9a-f]+[02468ace] <[^>]*> a56f[ \t]+bnop \.S2 b10,5
[0-9a-f]+[02468ace] <[^>]*> a4ee[ \t]+bnop \.S1 b9,5
[0-9a-f]+[02468ace] <[^>]*> c3ef[ \t]+bnop \.S2 b7,6
[0-9a-f]+[02468ace] <[^>]*> c26e[ \t]+bnop \.S1 b4,6
[0-9a-f]+[02468ace] <[^>]*> e16f[ \t]+bnop \.S2 b2,7
[0-9a-f]+[02468ace] <[^>]*> efe80000[ \t]+<fetch packet header 0xefe80000>
[ \t]*\.\.\.

248
gas/testsuite/gas/tic6x/insns16-s-unit.s Normal file
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@ -0,0 +1,248 @@
; Test C64x+ S-unit compact instruction formats
.text
nop
.align 16
nop
.align 16
s3_nosat_op_0:
.short 0x000a
.short 0x201b
.short 0x512a
.short 0x713b
.short 0x824a
.short 0xa25b
.short 0xd36a
.short 0xf37b
.short 0xe28a
s3_nosat_op_1:
.short 0x0a9b
.short 0x39aa
.short 0x59bb
.short 0x68ca
.short 0x88db
.word 0xefe00000 | 0x0000
s3_sat_op_0:
.short 0x21ea
.short 0x41fb
.short 0x720a
.short 0x921b
.short 0xc32a
.short 0xe33b
.short 0xf24a
.short 0xb25b
.short 0x816a
s3_sat_op_1:
.short 0xa87b
.short 0xd88a
.short 0xfa9b
.short 0xeaaa
.short 0x7bbb
.word 0xefe00000 | 0x4000
s3i:
.short 0x040a
.short 0x251b
.short 0x362a
.short 0x573b
.short 0x444a
.short 0x655b
.short 0x766a
.short 0x9ffb
.short 0x8cea
.short 0xaddb
.short 0xbeca
.short 0xdfbb
.short 0xccaa
.short 0xed9b
.word 0xefe00000 | 0x0000
smvk8:
.short 0x0012
.short 0x1113
.short 0x2232
.short 0x3333
.short 0x4752
.short 0x5653
.short 0x6572
.short 0x78f3
.short 0x8992
.short 0x9a93
.short 0xabb2
.short 0xbed2
.short 0xcdf3
.short 0xfc92
.word 0xefe00000 | 0x0000
ssh5_nosat:
.short 0x0402
.short 0x1503
.short 0x2682
.short 0x3783
.short 0x4c22
.short 0x5d23
.short 0x6ea2
.short 0x7fa3
.short 0x8442
.short 0x9543
.short 0xa6c2
.short 0xb7c3
.short 0xcc42
.short 0xdd43
.word 0xefe00000 | 0x0000
ssh5_sat:
.short 0xec02
.short 0xfd03
.short 0xe682
.short 0xd783
.short 0xc422
.short 0xb523
.short 0xaea2
.short 0x9fa3
.short 0x8c42
.short 0x7d43
.short 0x66c2
.short 0x57c3
.short 0x4442
.short 0x3543
.word 0xefe00000 | 0x4000
s2sh:
.short 0x0462
.short 0x2563
.short 0x4662
.short 0x6f63
.short 0x8c62
.short 0xad63
.short 0xce62
.short 0xf7e3
.short 0xd4e2
.short 0xb5e3
.short 0x96e2
.short 0x7fe3
.short 0x5ce2
.short 0x3de3
.word 0xefe00000
sc5:
.short 0x0002
.short 0x1103
.short 0x2202
.short 0x3303
.short 0x4a22
.short 0x5923
.short 0x6822
.short 0x71a3
.short 0x82a2
.short 0x93c3
.short 0xa2c2
.short 0xb9c3
.short 0xc8c2
.short 0xf9c3
.word 0xefe00000
s2ext:
.short 0x0062
.short 0x2163
.short 0x4262
.short 0x6b63
.short 0x8862
.short 0xa963
.short 0xca62
.short 0xf3e3
.short 0xd0e2
.short 0xb1e3
.short 0x9ae2
.short 0x7be3
.short 0x58e2
.short 0x39e3
.word 0xefe00000
sx2op:
.short 0x002e
.short 0x212f
.short 0x522e
.short 0x732f
.short 0x802e
.short 0xa12f
.short 0xd22e
.short 0xfb2f
.short 0x082e
.short 0x292f
.short 0x5a2e
.short 0x7b2f
.short 0x882e
.short 0xa92f
.word 0xefe00000
sx5:
.short 0x042e
.short 0x152f
.short 0x262e
.short 0x372f
.short 0x4c2e
.short 0x5d2f
.short 0x6e2e
.short 0x77af
.short 0x84ae
.short 0x95af
.short 0xaeae
.short 0xbfaf
.short 0xccae
.short 0xfdaf
.word 0xefe00000
sx1:
.short 0x586e
.short 0x596f
.short 0x5a6e
.short 0x5b6f
.short 0x586e
.short 0x796f
.short 0x7a6e
.short 0x7bef
.short 0x78ee
.short 0x79ef
.short 0xdaee
.short 0xdbef
.short 0xd8ee
.short 0xd9ef
.word 0xefe00000
sx1_rs:
.short 0x586e
.short 0x596f
.short 0x5a6e
.short 0x5b6f
.short 0x586e
.short 0x796f
.short 0x7a6e
.short 0x7bef
.short 0x78ee
.short 0x79ef
.short 0xdaee
.short 0xdbef
.short 0xd8ee
.short 0xd9ef
.word 0xefe00000 | 0x00080000
sx1b:
.short 0x006e
.short 0x216f
.short 0x22ee
.short 0x43ef
.short 0x446e
.short 0x656f
.short 0x66ee
.short 0x87ef
.short 0x866e
.short 0xa56f
.short 0xa4ee
.short 0xc3ef
.short 0xc26e
.short 0xe16f
.word 0xefe00000
sx1b_rs:
.short 0x006e
.short 0x216f
.short 0x22ee
.short 0x43ef
.short 0x446e
.short 0x656f
.short 0x66ee
.short 0x87ef
.short 0x866e
.short 0xa56f
.short 0xa4ee
.short 0xc3ef
.short 0xc26e
.short 0xe16f
.word 0xefe00000 | 0x00080000

8
include/opcode/ChangeLog
View file

@ -1,3 +1,11 @@
2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
PR binutils/15068
* tic6xc-insn-formats.h (FLD): Add use of bitfield array.
Add 16-bit opcodes.
* tic6xc-opcode-table.h: Add 16-bit insns.
* tic6x.h: Add support for 16-bit insns.
2013-03-21 Michael Schewe <michael.schewe@gmx.net>
* h8300.h: Add MEMRELAX flag for mov.b/w/l @(d:32,ERs),Rd

424
include/opcode/tic6x-insn-formats.h
View file

@ -1,6 +1,5 @@
/* TI C6X instruction format information.
Copyright 2010
Free Software Foundation, Inc.
Copyright 2010-2013 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@ -20,7 +19,19 @@
/* Define the FMT macro before including this file; it takes a name
and the fields from tic6x_insn_format (defined in tic6x.h). */
#define FLD(name, pos, width) { CONCAT2(tic6x_field_,name), (pos), (width) }
/* Expansion fields values for 16 bits insn. */
#define SAT(a) (((a) & 1) << TIC6X_COMPACT_SAT_POS)
#define BR(a) (((a) & 1) << TIC6X_COMPACT_BR_POS)
#define DSZ(a) (((a) & 7) << TIC6X_COMPACT_DSZ_POS)
/* Composite fields for 16 bits insn. */
#define BFLD(low_pos, width, pos) { (low_pos), (width), (pos) }
#define BFLD1(a) 1, { a }
#define BFLD2(a, b) 2, { a, b }
#define BFLD3(a, b, c) 3, { a, b, c }
#define BFLD4(a, b, c, d) 4, { a, b, c, d }
#define COMPFLD(name, bitfields) { CONCAT2(tic6x_field_,name), bitfields }
/**/
#define FLD(name, pos, width) { CONCAT2(tic6x_field_,name), BFLD1(BFLD(pos, width, 0)) }
#define CFLDS FLD(p, 0, 1), FLD(creg, 29, 3), FLD(z, 28, 1)
#define CFLDS2(a, b) 5, { CFLDS, a, b }
#define CFLDS3(a, b, c) 6, { CFLDS, a, b, c }
@ -36,6 +47,21 @@
#define NFLDS5(a, b, c, d, e) 6, { NFLDS, a, b, c, d, e }
#define NFLDS6(a, b, c, d, e, f) 7, { NFLDS, a, b, c, d, e, f }
#define NFLDS7(a, b, c, d, e, f, g) 8, { NFLDS, a, b, c, d, e, f, g }
/* 16 bits insn */
#define FLDS1(a) 1, { a }
#define FLDS2(a, b) 2, { a, b }
#define FLDS3(a, b, c) 3, { a, b, c }
#define FLDS4(a, b, c, d) 4, { a, b, c, d }
#define FLDS5(a, b, c, d, e) 5, { a, b, c, d, e }
#define SFLDS FLD(s, 0, 1)
#define SFLDS1(a) 2, { SFLDS, a }
#define SFLDS2(a, b) 3, { SFLDS, a, b }
#define SFLDS3(a, b, c) 4, { SFLDS, a, b, c }
#define SFLDS4(a, b, c, d) 5, { SFLDS, a, b, c, d }
#define SFLDS5(a, b, c, d, e) 6, { SFLDS, a, b, c, d, e }
#define SFLDS6(a, b, c, d, e, f) 7, { SFLDS, a, b, c, d, e, f }
#define SFLDS7(a, b, c, d, e, f, g) 8, { SFLDS, a, b, c, d, e, f, g }
/**/
/* These are in the order from SPRUFE8, appendices C-H. */
@ -68,6 +94,194 @@ FMT(d_adda_long, 32, 0x1000000c, 0xf000000c,
/* Appendix C 16-bit formats will go here. */
/* C-8 */
FMT(d_doff4_dsz_0xx, 16, DSZ(0) | 0x0004, DSZ(0x4) | 0x0406,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1), FLD(t, 12, 1),
COMPFLD(cst, BFLD2(BFLD(13, 3, 0), BFLD(11, 1, 3)))))
FMT(d_doff4_dsz_100, 16, DSZ(4) | 0x0004, DSZ(0x7) | 0x0406,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1), FLD(t, 12, 1),
COMPFLD(cst, BFLD2(BFLD(13, 3, 0), BFLD(11, 1, 3)))))
FMT(d_doff4_dsz_000, 16, DSZ(0) | 0x0004, DSZ(0x7) | 0x0406,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1), FLD(t, 12, 1),
COMPFLD(cst, BFLD2(BFLD(13, 3, 0), BFLD(11, 1, 3)))))
FMT(d_doff4_dsz_x01, 16, DSZ(1) | 0x0004, DSZ(0x3) | 0x0406,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1), FLD(t, 12, 1),
COMPFLD(cst, BFLD2(BFLD(13, 3, 0), BFLD(11, 1, 3)))))
FMT(d_doff4_dsz_01x, 16, DSZ(2) | 0x0004, DSZ(0x6) | 0x0406,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1), FLD(t, 12, 1),
COMPFLD(cst, BFLD2(BFLD(13, 3, 0), BFLD(11, 1, 3)))))
FMT(d_doff4_dsz_111, 16, DSZ(7) | 0x0004, DSZ(0x7) | 0x0406,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1), FLD(t, 12, 1),
COMPFLD(cst, BFLD2(BFLD(13, 3, 0), BFLD(11, 1, 3)))))
FMT(d_doff4_dsz_x11, 16, DSZ(3) | 0x0004, DSZ(0x3) | 0x0406,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1), FLD(t, 12, 1),
COMPFLD(cst, BFLD2(BFLD(13, 3, 0), BFLD(11, 1, 3)))))
FMT(d_doff4_dsz_010, 16, DSZ(2) | 0x0004, DSZ(0x7) | 0x0406,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1), FLD(t, 12, 1),
COMPFLD(cst, BFLD2(BFLD(13, 3, 0), BFLD(11, 1, 3)))))
FMT(d_doff4_dsz_110, 16, DSZ(6) | 0x0004, DSZ(0x7) | 0x0406,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1), FLD(t, 12, 1),
COMPFLD(cst, BFLD2(BFLD(13, 3, 0), BFLD(11, 1, 3)))))
/* C-9 */
FMT(d_doff4dw, 16, DSZ(4) | 0x0004, DSZ(0x4) | 0x0406,
SFLDS7(FLD(op, 3, 1), FLD(na, 4, 1), FLD(srcdst, 5, 2), FLD(ptr, 7, 2), FLD(sz, 9, 1), FLD(t, 12, 1),
COMPFLD(cst, BFLD2(BFLD(13, 3, 0), BFLD(11, 1, 3)))))
/* C-10 */
FMT(d_dind_dsz_0xx, 16, DSZ(0) | 0x0404, DSZ(0x4) | 0x0c06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(src1, 13, 3)))
FMT(d_dind_dsz_x01, 16, DSZ(1) | 0x0404, DSZ(0x3) | 0x0c06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(src1, 13, 3)))
FMT(d_dind_dsz_x11, 16, DSZ(3) | 0x0404, DSZ(0x3) | 0x0c06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(src1, 13, 3)))
FMT(d_dind_dsz_01x, 16, DSZ(2) | 0x0404, DSZ(0x6) | 0x0c06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(src1, 13, 3)))
FMT(d_dind_dsz_000, 16, DSZ(0) | 0x0404, DSZ(0x7) | 0x0c06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(src1, 13, 3)))
FMT(d_dind_dsz_010, 16, DSZ(2) | 0x0404, DSZ(0x7) | 0x0c06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(src1, 13, 3)))
FMT(d_dind_dsz_100, 16, DSZ(4) | 0x0404, DSZ(0x7) | 0x0c06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(src1, 13, 3)))
FMT(d_dind_dsz_110, 16, DSZ(6) | 0x0404, DSZ(0x7) | 0x0c06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(src1, 13, 3)))
FMT(d_dind_dsz_111, 16, DSZ(7) | 0x0404, DSZ(0x7) | 0x0c06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(src1, 13, 3)))
/* C-11 */
FMT(d_dinddw, 16, DSZ(4) | 0x0404, DSZ(0x4) | 0x0c06,
SFLDS7(FLD(op, 3, 1), FLD(na, 4, 1), FLD(srcdst, 5, 2), FLD(ptr, 7, 2),
FLD(sz, 9, 1), FLD(t, 12, 1), FLD(src1, 13, 3)))
/* C-12 */
FMT(d_dinc_dsz_x01, 16, DSZ(1) | 0x0c04, DSZ(0x3) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_dinc_dsz_0xx, 16, DSZ(0) | 0x0c04, DSZ(0x4) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_dinc_dsz_01x, 16, DSZ(2) | 0x0c04, DSZ(0x6) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_dinc_dsz_x11,16, DSZ(3) | 0x0c04, DSZ(0x3) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_dinc_dsz_000, 16, DSZ(0) | 0x0c04, DSZ(0x7) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_dinc_dsz_010, 16, DSZ(2) | 0x0c04, DSZ(0x7) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_dinc_dsz_100, 16, DSZ(4) | 0x0c04, DSZ(0x7) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_dinc_dsz_110, 16, DSZ(6) | 0x0c04, DSZ(0x7) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_dinc_dsz_111, 16, DSZ(7) | 0x0c04, DSZ(0x7) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
/* C-13*/
FMT(d_dincdw, 16, DSZ(4) | 0x0c04, DSZ(0x4) | 0xcc06,
SFLDS7(FLD(op, 3, 1), FLD(na, 4, 1), FLD(srcdst, 5, 2), FLD(ptr, 7, 2),
FLD(sz, 9, 1), FLD(t, 12, 1), FLD(cst, 13, 1)))
/* C-14 */
FMT(d_ddec_dsz_01x, 16, DSZ(2) | 0x4c04, DSZ(0x6) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_ddec_dsz_0xx, 16, DSZ(0) | 0x4c04, DSZ(0x4) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_ddec_dsz_x01, 16, DSZ(1) | 0x4c04, DSZ(0x3) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_ddec_dsz_x11, 16, DSZ(3) | 0x4c04, DSZ(0x3) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_ddec_dsz_000, 16, DSZ(0) | 0x4c04, DSZ(0x7) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_ddec_dsz_010, 16, DSZ(2) | 0x4c04, DSZ(0x7) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_ddec_dsz_100, 16, DSZ(4) | 0x4c04, DSZ(0x7) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_ddec_dsz_110, 16, DSZ(6) | 0x4c04, DSZ(0x7) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
FMT(d_ddec_dsz_111, 16, DSZ(7) | 0x4c04, DSZ(0x7) | 0xcc06,
SFLDS6(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(ptr, 7, 2), FLD(sz, 9, 1),
FLD(t, 12, 1), FLD(cst, 13, 1)))
/* C-15 */
FMT(d_ddecdw, 16, DSZ(4) | 0x4c04, DSZ(0x4) | 0xcc06,
SFLDS7(FLD(op, 3, 1), FLD(na, 4, 1), FLD(srcdst, 5, 2), FLD(ptr, 7, 2),
FLD(sz, 9, 1), FLD(t, 12, 1), FLD(cst, 13, 1)))
/* C-16 */
FMT(d_dstk, 16, 0x8c04, 0x8c06,
SFLDS4(FLD(op, 3, 1), FLD(srcdst, 4, 3), FLD(t, 12, 1),
COMPFLD(cst, BFLD2(BFLD(7, 3, 2), BFLD(13, 2, 0)))))
/* C-17 */
FMT(d_dx2op, 16, 0x0036, 0x047e,
SFLDS4(FLD(src2, 7, 3), FLD(op, 11, 1), FLD(x, 12, 1), FLD(srcdst, 13, 3)))
/* C-18 */
FMT(d_dx5, 16, 0x0436, 0x047e,
SFLDS2(FLD(dst, 7, 3),
COMPFLD(cst, BFLD2(BFLD(11, 2, 3), BFLD(13, 3, 0)))))
/* C-19 */
FMT(d_dx5p, 16, 0x0c76, 0x1c7e,
SFLDS2(FLD(op, 7, 1),
COMPFLD(cst, BFLD2(BFLD(8, 2, 3), BFLD(13, 3, 0)))))
/* C-20 */
FMT(d_dx1, 16, 0x1876, 0x1c7e,
SFLDS2(FLD(srcdst, 7, 3), FLD(op, 13, 3)))
/* C-21 */
FMT(d_dpp, 16, 0x0077, 0x087f,
SFLDS5(FLD(srcdst, 7, 4), FLD(t, 12, 1), FLD(cst, 13, 1), FLD(op, 14, 1),
FLD(dw, 15, 1)))
/* Appendix D 32-bit formats. */
FMT(l_1_or_2_src, 32, 0x18, 0x1c,
@ -82,6 +296,44 @@ FMT(l_unary, 32, 0x358, 0xffc,
/* Appendix D 16-bit formats will go here. */
/* D-4 */
FMT(l_l3_sat_0, 16, SAT(0) | 0x0000, SAT(1) | 0x040e,
SFLDS5(FLD(dst, 4, 3), FLD(src2, 7, 3), FLD(op, 11, 1), FLD(x, 12, 1),
FLD(src1, 13, 3)))
FMT(l_l3_sat_1, 16, SAT(1) | 0x0000, SAT(1) | 0x040e,
SFLDS5(FLD(dst, 4, 3), FLD(src2, 7, 3), FLD(op, 11, 1), FLD(x, 12, 1),
FLD(src1, 13, 3)))
/* D-5 - combine cst3 and n fields into a single field cst */
FMT(l_l3i, 16, 0x0400, 0x040e,
SFLDS5(FLD(dst, 4, 3), FLD(src2, 7, 3), FLD(sn, 11, 1), FLD(x, 12, 1),
COMPFLD(cst, BFLD2(BFLD(13, 3, 0), BFLD(11, 1, 3)))))
/* D-6 Mtbd ? */
/* D-7 */
FMT(l_l2c, 16, 0x0408, 0x040e,
SFLDS5(FLD(dst, 4, 1), FLD(src2, 7, 3), FLD(x, 12, 1), FLD(src1, 13, 3),
COMPFLD(op, BFLD2(BFLD(5, 2, 0), BFLD(11, 1, 2)))))
/* D-8 */
FMT(l_lx5, 16, 0x0426, 0x047e,
SFLDS2(FLD(dst, 7, 3),
COMPFLD(cst, BFLD2(BFLD(11, 2, 3), BFLD(13, 3, 0)))))
/* D-9 */
FMT(l_lx3c, 16, 0x0026, 0x147e,
SFLDS3(FLD(src2, 7, 3), FLD(dst, 11, 1), FLD(cst, 13, 3)))
/* D-10 */
FMT(l_lx1c, 16, 0x1026, 0x147e,
SFLDS4(FLD(src2, 7, 3), FLD(dst, 11, 1), FLD(cst, 13, 1), FLD(op, 14, 2)))
/* D-11 */
FMT(l_lx1, 16, 0x1866, 0x1c7e,
SFLDS2(FLD(srcdst, 7, 3), FLD(op, 13, 3)))
/* Appendix E 32-bit formats. */
FMT(m_compound, 32, 0x30, 0x83c,
@ -101,6 +353,12 @@ FMT(m_mpy, 32, 0x0, 0x7c,
FLD(src2, 18, 5), FLD(dst, 23, 5)))
/* Appendix E 16-bit formats will go here. */
FMT(m_m3_sat_0, 16, SAT(0) | 0x001e, SAT(1) | 0x001e,
SFLDS5(FLD(op, 5, 2), FLD(src2, 7, 3), FLD(dst, 10, 2),
FLD(x, 12, 1), FLD(src1, 13, 3)))
FMT(m_m3_sat_1, 16, SAT(1) | 0x001e, SAT(1) | 0x001e,
SFLDS5(FLD(op, 5, 2), FLD(src2, 7, 3), FLD(dst, 10, 2),
FLD(x, 12, 1), FLD(src1, 13, 3)))
/* Appendix F 32-bit formats. */
@ -148,7 +406,113 @@ FMT(s_bpos, 32, 0x20, 0x1ffc,
/* Appendix F 16-bit formats will go here. */
/* F-17 Sbs7 Instruction Format */
FMT(s_sbs7, 16, BR(1) | 0x000a, BR(1) | 0x003e,
SFLDS2(FLD(cst, 6, 7), FLD(n, 13, 3)))
/* F-18 Sbu8 Instruction Format */
FMT(s_sbu8, 16, BR(1) | 0xc00a, BR(1) | 0xc03e,
SFLDS1(FLD(cst, 6, 8)))
/* F-19 Scs10 Instruction Format */
FMT(s_scs10, 16, BR(1) | 0x001a, BR(1) | 0x003e,
SFLDS1(FLD(cst, 6, 10)))
/* F-20 Sbs7c Instruction Format */
FMT(s_sbs7c, 16, BR(1) | 0x002a, BR(1) | 0x002e,
SFLDS3(FLD(z, 4, 1), FLD(cst, 6, 7), FLD(n, 13, 3)))
/* F-21 Sbu8c Instruction Format */
FMT(s_sbu8c, 16, BR(1) | 0xc02a, BR(1) | 0xc02e,
SFLDS2(FLD(z, 4, 1), FLD(cst, 6, 8)))
/* F-22 S3 Instruction Format */
FMT(s_s3, 16, BR(0) | 0x000a, BR(1) | 0x040e,
SFLDS5(FLD(dst, 4, 3), FLD(src2, 7, 3), FLD(op, 11, 1), FLD(x, 12, 1),
FLD(src1, 13, 3)))
FMT(s_s3_sat_x, 16, BR(0) | SAT(0) | 0x000a, BR(1) | SAT(0) | 0x040e,
SFLDS5(FLD(dst, 4, 3), FLD(src2, 7, 3), FLD(op, 11, 1), FLD(x, 12, 1),
FLD(src1, 13, 3)))
FMT(s_s3_sat_0, 16, BR(0) | SAT(0) | 0x000a, BR(1) | SAT(1) | 0x040e,
SFLDS5(FLD(dst, 4, 3), FLD(src2, 7, 3), FLD(op, 11, 1), FLD(x, 12, 1),
FLD(src1, 13, 3)))
FMT(s_s3_sat_1, 16, BR(0) | SAT(1) | 0x000a, BR(1) | SAT(1) | 0x040e,
SFLDS5(FLD(dst, 4, 3), FLD(src2, 7, 3), FLD(op, 11, 1), FLD(x, 12, 1),
FLD(src1, 13, 3)))
/* F-23 S3i Instruction Format */
FMT(s_s3i, 16, BR(0) | 0x040a, BR(1) | 0x040e,
SFLDS5(FLD(dst, 4, 3), FLD(src2, 7, 3), FLD(op, 11, 1), FLD(x, 12, 1),
FLD(cst, 13, 3)))
/* F-24 Smvk8 Instruction Format */
FMT(s_smvk8, 16, 0x0012, 0x001e,
SFLDS2(FLD(dst, 7, 3),
COMPFLD(cst, BFLD4(BFLD(10, 1, 7), BFLD(5, 2, 5), BFLD(11, 2, 3), BFLD(13, 3, 0)))))
/* F-25 Ssh5 Instruction Format */
FMT(s_ssh5_sat_x, 16, SAT(0) | 0x0402, SAT(0) | 0x041e,
SFLDS3(FLD(op, 5, 2), FLD(srcdst, 7, 3),
COMPFLD(cst, BFLD2(BFLD(11, 2, 3), BFLD(13, 3, 0)))))
FMT(s_ssh5_sat_0, 16, SAT(0) | 0x0402, SAT(1) | 0x041e,
SFLDS3(FLD(op, 5, 2), FLD(srcdst, 7, 3),
COMPFLD(cst, BFLD2(BFLD(11, 2, 3), BFLD(13, 3, 0)))))
FMT(s_ssh5_sat_1, 16, SAT(1) | 0x0402, SAT(1) | 0x041e,
SFLDS3(FLD(op, 5, 2), FLD(srcdst, 7, 3),
COMPFLD(cst, BFLD2(BFLD(11, 2, 3), BFLD(13, 3, 0)))))
/* F-26 S2sh Instruction Format */
FMT(s_s2sh, 16, 0x0462, 0x047e,
SFLDS3(FLD(srcdst, 7, 3), FLD(op, 11, 2), FLD(src1, 13, 3)))
/* F-27 Sc5 Instruction Format */
FMT(s_sc5, 16, 0x0002, 0x041e,
SFLDS3(FLD(op, 5, 2), FLD(srcdst, 7, 3),
COMPFLD(cst, BFLD2(BFLD(11, 2, 3), BFLD(13, 3, 0)))))
/* F-28 S2ext Instruction Format */
FMT(s_s2ext, 16, 0x0062, 0x047e,
SFLDS3(FLD(src, 7, 3), FLD(op, 11, 2), FLD(dst, 13, 3)))
/* F-29 Sx2op Instruction Format */
FMT(s_sx2op, 16, 0x002e, 0x047e,
SFLDS4(FLD(src2, 7, 3), FLD(op, 11, 1), FLD(x, 12, 1),
FLD(srcdst, 13, 3)))
/* F-30 Sx5 Instruction Format */
FMT(s_sx5, 16, 0x042e, 0x047e,
SFLDS2(FLD(dst, 7, 3),
COMPFLD(cst, BFLD2(BFLD(11, 2, 3), BFLD(13, 3, 0)))))
/* F-31 Sx1 Instruction Format */
FMT(s_sx1, 16, 0x186e, 0x1c7e,
SFLDS2(FLD(srcdst, 7, 3), FLD(op, 13, 3)))
/* F-32 Sx1b Instruction Format */
FMT(s_sx1b, 16, 0x006e, 0x187e,
SFLDS2(FLD(src2, 7, 4), FLD(n, 13, 3)))
/* Appendix G 16-bit formats will go here. */
FMT(lsdmvto, 16, 0x0006, 0x0066,
SFLDS4(FLD(unit, 3, 2),
FLD(x, 12, 1), FLD(dst, 13, 3),
COMPFLD(src2, BFLD2(BFLD(10, 2, 3), BFLD(7, 3, 0)))))
FMT(lsdmvfr, 16, 0x0046, 0x0066,
SFLDS4(FLD(unit, 3, 2), FLD(src2, 7, 3), FLD(x, 12, 1),
COMPFLD(dst, BFLD2(BFLD(10, 2, 3), BFLD(13, 3, 0)))))
/* G-3 */
FMT(lsdx1c, 16, 0x0866, 0x1c66,
SFLDS4(FLD(unit, 3, 2), FLD(dst, 7, 3), FLD(cst, 13, 1),
FLD(cc, 14, 2)))
/* G-4 */
FMT(lsdx1, 16, 0x1866, 0x1c66,
SFLDS3(FLD(unit, 3, 2), FLD(srcdst, 7, 3), FLD(op, 13, 3)))
/* Appendix H 32-bit formats. */
@ -180,6 +544,38 @@ FMT(nfu_spmask, 32, 0x00020000, 0xfc021ffc,
/* Appendix H 16-bit formats will go here. */
/* H-5 */
FMT(nfu_uspl, 16, 0x0c66, 0xbc7e,
FLDS2(FLD(op, 0, 1), COMPFLD(ii, BFLD2(BFLD(7, 3, 0), BFLD(14, 1, 3)))))
/* H-6 */
/* make up some fields to pretend to have s and z fields s for this format
so as to fit in other predicated compact instruction to avoid special-
casing this instruction in tic6x-dis.c
use op field as a predicate adress register selector (s field)
use the first zeroed bit as a z value as this insn only supports [a0]
and [b0] predicate forms.
*/
FMT(nfu_uspldr, 16, 0x8c66, 0xbc7e,
FLDS4(FLD(op, 0, 1), FLD(s, 0, 1), FLD(z, 3, 1),
COMPFLD(ii, BFLD2(BFLD(7, 3, 0), BFLD(14, 1, 3)))))
/* H-7 */
FMT(nfu_uspk, 16, 0x1c66, 0x3c7e,
FLDS1(COMPFLD(fstgfcyc, BFLD3(BFLD(0, 1, 0), BFLD(7, 3, 1), BFLD(14, 2, 4)))))
/* H-8a */
FMT(nfu_uspma, 16, 0x2c66, 0x3c7e,
FLDS1(COMPFLD(mask, BFLD3(BFLD(0, 1, 0), BFLD(7, 3, 1), BFLD(14, 2, 4)))))
/* H-8b */
FMT(nfu_uspmb, 16, 0x3c66, 0x3c7e,
FLDS1(COMPFLD(mask, BFLD3(BFLD(0, 1, 0), BFLD(7, 3, 1), BFLD(14, 2, 4)))))
/* H-9 */
FMT(nfu_unop, 16, 0x0c6e, 0x1fff,
FLDS1(FLD(n, 13, 3)))
#undef FLD
#undef CFLDS
#undef CFLDS2
@ -196,3 +592,25 @@ FMT(nfu_spmask, 32, 0x00020000, 0xfc021ffc,
#undef NFLDS5
#undef NFLDS6
#undef NFLDS7
#undef SFLDS
#undef SFLDS1
#undef SFLDS2
#undef SFLDS3
#undef SFLDS4
#undef SFLDS5
#undef SFLDS6
#undef SFLDS7
#undef BFLD
#undef BFLD1
#undef BFLD2
#undef BFLD3
#undef BFLD4
#undef FLDS1
#undef FLDS2
#undef FLDS3
#undef FLDS4
#undef FLDS5
#undef COMPFLD
#undef DSZ
#undef BR
#undef SAT

1123
include/opcode/tic6x-opcode-table.h
View file

File diff suppressed because it is too large Load diff

114
include/opcode/tic6x.h
View file

@ -27,18 +27,25 @@
typedef enum
{
tic6x_field_baseR,
tic6x_field_cc,
tic6x_field_creg,
tic6x_field_cst,
tic6x_field_csta,
tic6x_field_cstb,
tic6x_field_dst,
tic6x_field_dstms,
tic6x_field_dw,
tic6x_field_fstgfcyc,
tic6x_field_h,
tic6x_field_ii,
tic6x_field_mask,
tic6x_field_mode,
tic6x_field_n,
tic6x_field_na,
tic6x_field_offsetR,
tic6x_field_op,
tic6x_field_p,
tic6x_field_ptr,
tic6x_field_r,
tic6x_field_s,
tic6x_field_sc,
@ -46,6 +53,11 @@ typedef enum
tic6x_field_src1,
tic6x_field_src2,
tic6x_field_srcdst,
tic6x_field_srcms,
tic6x_field_sn,
tic6x_field_sz,
tic6x_field_unit,
tic6x_field_t,
tic6x_field_x,
tic6x_field_y,
tic6x_field_z
@ -53,14 +65,24 @@ typedef enum
typedef struct
{
/* The name used to reference the field. */
tic6x_insn_field_id field_id;
/* The least-significant bit position in the field. */
unsigned short low_pos;
unsigned short low_pos;
/* The number of bits in the field. */
unsigned short width;
/* The position of the bitfield in the field. */
unsigned short pos;
} tic6x_bitfield;
/* Maximum number of subfields in composite field. */
#define TIC6X_MAX_BITFIELDS 4
typedef struct
{
/* The name used to reference the field. */
tic6x_insn_field_id field_id;
unsigned int num_bitfields;
tic6x_bitfield bitfields[TIC6X_MAX_BITFIELDS];
} tic6x_insn_field;
/* Maximum number of variable fields in an instruction format. */
@ -119,6 +141,13 @@ typedef struct
unsigned int max_val;
} tic6x_fixed_field;
/* Pseudo opcode fields position for compact instructions
If 16 bits instruction detected, the opcode is enriched
[DSZ/3][BR][SAT][opcode] */
#define TIC6X_COMPACT_SAT_POS 16
#define TIC6X_COMPACT_BR_POS 17
#define TIC6X_COMPACT_DSZ_POS 18
/* Bit-masks for defining instructions present on some subset of
processors; each indicates an instruction present on that processor
and those that are supersets of it. The options passed to the
@ -188,6 +217,29 @@ typedef struct
values here. */
#define TIC6X_PREFER_VAL(n) (((n) & 0x8000) >> 15)
#define TIC6X_FLAG_PREFER(n) ((n) << 15)
/* 16 bits opcode is predicated by register a0 (s = 0) or b0 (s = 1) */
#define TIC6X_FLAG_INSN16_SPRED 0x00100000
/* 16 bits opcode ignores RS bit of fetch packet header */
#define TIC6X_FLAG_INSN16_NORS 0x00200000
/* 16 bits opcode only on side B */
#define TIC6X_FLAG_INSN16_BSIDE 0x00400000
/* 16 bits opcode ptr reg is b15 */
#define TIC6X_FLAG_INSN16_B15PTR 0x00800000
/* 16 bits opcode memory access modes */
#define TIC6X_INSN16_MEM_MODE(n) ((n) << 16)
#define TIC6X_INSN16_MEM_MODE_VAL(n) (((n) & 0x000F0000) >> 16)
#define TIC6X_MEM_MODE_NEGATIVE 0
#define TIC6X_MEM_MODE_POSITIVE 1
#define TIC6X_MEM_MODE_REG_NEGATIVE 4
#define TIC6X_MEM_MODE_REG_POSITIVE 5
#define TIC6X_MEM_MODE_PREDECR 8
#define TIC6X_MEM_MODE_PREINCR 9
#define TIC6X_MEM_MODE_POSTDECR 10
#define TIC6X_MEM_MODE_POSTINCR 11
#define TIC6X_FLAG_INSN16_MEM_MODE(mode) TIC6X_INSN16_MEM_MODE(TIC6X_MEM_MODE_##mode)
#define TIC6X_NUM_PREFER 2
/* Maximum number of fixed fields for a particular opcode. */
@ -230,6 +282,13 @@ typedef enum
/* A register, from the same side as the functional unit
selected. */
tic6x_operand_reg,
/* A register, from the same side as the functional unit
selected that ignore RS header bit */
tic6x_operand_reg_nors,
/* A register, from the b side */
tic6x_operand_reg_bside,
/* A register, from the b side and from the low register set */
tic6x_operand_reg_bside_nors,
/* A register, that is from the other side if a cross path is
used. */
tic6x_operand_xreg,
@ -241,6 +300,14 @@ typedef enum
path is not used, and the other side if a cross path is
used. */
tic6x_operand_areg,
/* The B15 register */
tic6x_operand_b15reg,
/* A register coded as an offset from either A16 or B16 depending
on the value of the t bit. */
tic6x_operand_treg,
/* A register (A0 or B0), from the same side as the
functional unit selected. */
tic6x_operand_zreg,
/* A return address register (A3 or B3), from the same side as the
functional unit selected. */
tic6x_operand_retreg,
@ -252,10 +319,15 @@ typedef enum
tic6x_operand_xregpair,
/* A register pair, from the side of the data path selected. */
tic6x_operand_dregpair,
/* A register pair coded as an offset from either A16 or B16 depending
on the value of the t bit. */
tic6x_operand_tregpair,
/* The literal string "irp" (case-insensitive). */
tic6x_operand_irp,
/* The literal string "nrp" (case-insensitive). */
tic6x_operand_nrp,
/* The literal string "ilc" (case-insensitive). */
tic6x_operand_ilc,
/* A control register. */
tic6x_operand_ctrl,
/* A memory reference (base and offset registers from the side of
@ -277,7 +349,16 @@ typedef enum
tic6x_operand_mem_deref,
/* A functional unit name or a list thereof (for SPMASK and
SPMASKR). */
tic6x_operand_func_unit
tic6x_operand_func_unit,
/* Hardwired constant '5' in Sbu8 Scs10 and Sbu8c 16 bits
instruction formats - spru732j.pdf Appendix F.4 */
tic6x_operand_hw_const_minus_1,
tic6x_operand_hw_const_0,
tic6x_operand_hw_const_1,
tic6x_operand_hw_const_5,
tic6x_operand_hw_const_16,
tic6x_operand_hw_const_24,
tic6x_operand_hw_const_31
} tic6x_operand_form;
/* Whether something is, or can be, read or written. */
@ -375,6 +456,8 @@ typedef enum
/* Likewise, but counting in half-words if in a header-based fetch
packet. */
tic6x_coding_pcrel_half,
/* Store an unsigned PC-relative value used in compact insn */
tic6x_coding_pcrel_half_unsigned,
/* Encode the register number (even number for a register pair) in
the field. When applied to a memory reference, encode the base
register. */
@ -388,6 +471,8 @@ typedef enum
/* Store 0 for register B14, 1 for register B15. When applied to
a memory reference, encode the base register. */
tic6x_coding_areg,
/* Compact instruction offset base register */
tic6x_coding_reg_ptr,
/* Store the low part of a control register address. */
tic6x_coding_crlo,
/* Store the high part of a control register address. */
@ -435,7 +520,16 @@ typedef enum
destination for load) is on side B, 0 for side A. */
tic6x_coding_data_fu,
/* Store 1 if the cross path is being used, 0 otherwise. */
tic6x_coding_xpath
tic6x_coding_xpath,
/* L3i constant coding */
tic6x_coding_scst_l3i,
/* S3i constant coding */
tic6x_coding_cst_s3i,
/* mem offset minus 1 */
tic6x_coding_mem_offset_minus_one,
/* non aligned mem offset minus 1 */
tic6x_coding_mem_offset_minus_one_noscale,
tic6x_coding_rside
} tic6x_coding_method;
/* How to generate the value of a particular field. */
@ -530,7 +624,7 @@ typedef struct
unsigned short isa_variants;
/* Flags for this instruction. */
unsigned short flags;
unsigned int flags;
/* Number of fixed fields, or fields with restricted value ranges,
for this instruction. */
@ -570,9 +664,15 @@ typedef enum
CONCAT6(tic6x_opcode_,name,_,func_unit,_,format),
#define INSNE(name, e, func_unit, format, type, isa, flags, fixed, ops, var) \
CONCAT4(tic6x_opcode_,name,_,e),
#define INSNU(name, func_unit, format, type, isa, flags, fixed, ops, var) \
CONCAT6(tic6x_opcode_,name,_,func_unit,_,format),
#define INSNUE(name, e, func_unit, format, type, isa, flags, fixed, ops, var) \
CONCAT6(tic6x_opcode_,name,_,func_unit,_,e),
#include "tic6x-opcode-table.h"
#undef INSN
#undef INSNE
#undef INSNU
#undef INSNUE
tic6x_opcode_max
} tic6x_opcode_id;

5
opcodes/ChangeLog
View file

@ -1,3 +1,8 @@
2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
PR binutils/15068
* tic6x-dis.c: Add support for displaying 16-bit insns.
2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
PR gas/15095

512
opcodes/tic6x-dis.c
View file

@ -52,6 +52,30 @@ const tic6x_ctrl tic6x_ctrl_table[tic6x_ctrl_max] =
/* Define the opcode table. */
const tic6x_opcode tic6x_opcode_table[tic6x_opcode_max] =
{
#define INSNU(name, func_unit, format, type, isa, flags, fixed, ops, var) \
{ \
STRINGX(name), \
CONCAT2(tic6x_func_unit_,func_unit), \
CONCAT3(tic6x_insn_format,_,format), \
CONCAT2(tic6x_pipeline_,type), \
CONCAT2(TIC6X_INSN_,isa), \
flags, \
fixed, \
ops, \
var \
},
#define INSNUE(name, e, func_unit, format, type, isa, flags, fixed, ops, var) \
{ \
STRINGX(name), \
CONCAT2(tic6x_func_unit_,func_unit), \
CONCAT3(tic6x_insn_format,_,format), \
CONCAT2(tic6x_pipeline_,type), \
CONCAT2(TIC6X_INSN_,isa), \
flags, \
fixed, \
ops, \
var \
},
#define INSN(name, func_unit, format, type, isa, flags, fixed, ops, var) \
{ \
STRINGX(name), \
@ -79,6 +103,8 @@ const tic6x_opcode tic6x_opcode_table[tic6x_opcode_max] =
#include "opcode/tic6x-opcode-table.h"
#undef INSN
#undef INSNE
#undef INSNU
#undef INSNUE
};
/* If instruction format FMT has a field FIELD, return a pointer to
@ -96,12 +122,39 @@ tic6x_field_from_fmt (const tic6x_insn_format *fmt, tic6x_insn_field_id field)
return NULL;
}
/* Extract the field width. */
static unsigned int
tic6x_field_width (const tic6x_insn_field *field)
{
unsigned int i;
unsigned int width = 0;
if (!field->num_bitfields)
return field->bitfields[0].width;
for (i = 0 ; i < field->num_bitfields ; i++)
width += field->bitfields[i].width;
return width;
}
/* Extract the bits corresponding to FIELD from OPCODE. */
static unsigned int
tic6x_field_bits (unsigned int opcode, const tic6x_insn_field *field)
{
return (opcode >> field->low_pos) & ((1u << field->width) - 1);
unsigned int i;
unsigned int val = 0;
if (!field->num_bitfields)
return (opcode >> field->bitfields[0].low_pos) & ((1u << field->bitfields[0].width) - 1);
for (i = 0 ; i < field->num_bitfields ; i++)
val |= ((opcode >> field->bitfields[i].low_pos) & ((1u << field->bitfields[i].width) - 1))
<< field->bitfields[i].pos;
return val;
}
/* Extract a 32-bit value read from the instruction stream. */
@ -118,12 +171,19 @@ tic6x_extract_32 (unsigned char *p, struct disassemble_info *info)
/* Extract a 16-bit value read from the instruction stream. */
static unsigned int
tic6x_extract_16 (unsigned char *p, struct disassemble_info *info)
tic6x_extract_16 (unsigned char *p, tic6x_fetch_packet_header *header,
struct disassemble_info *info)
{
unsigned int op16;
if (info->endian == BFD_ENDIAN_LITTLE)
return (p[0]) | (p[1] << 8);
op16 = (p[0]) | (p[1] << 8);
else
return (p[1]) | (p[0] << 8);
op16 = (p[1]) | (p[0] << 8);
op16 |= (header->sat << TIC6X_COMPACT_SAT_POS);
op16 |= (header->br << TIC6X_COMPACT_BR_POS);
op16 |= (header->dsz << TIC6X_COMPACT_DSZ_POS);
return op16;
}
/* FP points to a fetch packet. Return whether it is header-based; if
@ -137,8 +197,20 @@ tic6x_check_fetch_packet_header (unsigned char *fp,
int i;
header->header = tic6x_extract_32 (fp + 28, info);
if ((header->header & 0xf0000000) != 0xe0000000)
return FALSE;
{
header->prot = 0;
header->rs = 0;
header->dsz = 0;
header->br = 0;
header->sat = 0;
for (i = 0; i < 7; i++)
header->word_compact[i] = FALSE;
for (i = 0; i < 14; i++)
header->p_bits[i] = FALSE;
return FALSE;
}
for (i = 0; i < 7; i++)
header->word_compact[i]
@ -224,9 +296,9 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
pretending that the two halves of the word are in opposite
locations to where they actually are. */
if (info->endian == BFD_ENDIAN_LITTLE)
opcode = tic6x_extract_16 (fp + fp_offset, info);
opcode = tic6x_extract_16 (fp + fp_offset, &header, info);
else
opcode = tic6x_extract_16 (fp + (fp_offset ^ 2), info);
opcode = tic6x_extract_16 (fp + (fp_offset ^ 2), &header, info);
}
else
opcode = tic6x_extract_32 (fp + fp_offset, info);
@ -245,6 +317,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
unsigned int func_unit_side = 0;
unsigned int func_unit_data_side = 0;
unsigned int func_unit_cross = 0;
unsigned int t_val = 0;
/* The maximum length of the text of a non-PC-relative operand
is 24 bytes (SPMASK masking all eight functional units, with
separating commas and trailing NUL). */
@ -257,6 +330,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
unsigned int op_num;
bfd_boolean fixed_ok;
bfd_boolean operands_ok;
bfd_boolean have_t = FALSE;
if (opc->flags & TIC6X_FLAG_MACRO)
continue;
@ -291,7 +365,10 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
table. */
z_field = tic6x_field_from_fmt (fmt, tic6x_field_z);
if (!z_field)
abort ();
{
printf ("*** opcode %x: missing z field", opcode);
abort ();
}
creg_value = tic6x_field_bits (opcode, creg_field);
z_value = tic6x_field_bits (opcode, z_field);
@ -300,6 +377,62 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
continue;
}
if (opc->flags & TIC6X_FLAG_INSN16_SPRED)
{
const tic6x_insn_field *cc_field;
unsigned int s_value = 0;
unsigned int z_value = 0;
bfd_boolean cond_known = FALSE;
static const char *const conds[2][2] =
{
{ "[a0] ", "[!a0] " },
{ "[b0] ", "[!b0] " }
};
cc_field = tic6x_field_from_fmt (fmt, tic6x_field_cc);
if (cc_field)
{
unsigned int cc_value;
cc_value = tic6x_field_bits (opcode, cc_field);
s_value = (cc_value & 0x2) >> 1;
z_value = (cc_value & 0x1);
cond_known = TRUE;
}
else
{
const tic6x_insn_field *z_field;
const tic6x_insn_field *s_field;
s_field = tic6x_field_from_fmt (fmt, tic6x_field_s);
if (!s_field)
{
printf ("opcode %x: missing compact insn predicate register field (s field)\n",
opcode);
abort ();
}
s_value = tic6x_field_bits (opcode, s_field);
z_field = tic6x_field_from_fmt (fmt, tic6x_field_z);
if (!z_field)
{
printf ("opcode %x: missing compact insn predicate z_value (z field)\n", opcode);
abort ();
}
z_value = tic6x_field_bits (opcode, z_field);
cond_known = TRUE;
}
if (!cond_known)
{
printf ("opcode %x: unspecified ompact insn predicate\n", opcode);
abort ();
}
cond = conds[s_value][z_value];
}
/* All fixed fields must have matching values; all fields with
restricted ranges must have values within those ranges. */
fixed_ok = TRUE;
@ -310,7 +443,12 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
= tic6x_field_from_fmt (fmt, opc->fixed_fields[fix].field_id);
if (!field)
abort ();
{
printf ("opcode %x: missing field #%d for FIX #%d\n",
opcode, opc->fixed_fields[fix].field_id, fix);
abort ();
}
field_bits = tic6x_field_bits (opcode, field);
if (field_bits < opc->fixed_fields[fix].min_val
|| field_bits > opc->fixed_fields[fix].max_val)
@ -357,6 +495,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
/* Find the last instruction of the previous fetch
packet. */
unsigned char fp_prev[32];
status = info->read_memory_func (fp_addr - 32, fp_prev, 32, info);
if (status)
/* No previous instruction to be parallel with. */
@ -401,22 +540,37 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
unsigned int fld_val;
field = tic6x_field_from_fmt (fmt, enc->field_id);
if (!field)
abort ();
{
printf ("opcode %x: could not retrieve field (field_id:%d)\n",
opcode, fld_num);
abort ();
}
fld_val = tic6x_field_bits (opcode, field);
switch (enc->coding_method)
{
case tic6x_coding_fu:
/* The side must be specified exactly once. */
if (func_unit_side)
abort ();
{
printf ("opcode %x: field #%d use tic6x_coding_fu, but func_unit_side is already set!\n",
opcode, fld_num);
abort ();
}
func_unit_side = (fld_val ? 2 : 1);
break;
case tic6x_coding_data_fu:
/* The data side must be specified exactly once. */
if (func_unit_data_side)
abort ();
{
printf ("opcode %x: field #%d use tic6x_coding_fu, but func_unit_side is already set!\n",
opcode, fld_num);
abort ();
}
func_unit_data_side = (fld_val ? 2 : 1);
break;
@ -424,11 +578,22 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
/* Cross path use must be specified exactly
once. */
if (have_cross)
abort ();
{
printf ("opcode %x: field #%d use tic6x_coding_xpath, have_cross is already set!\n",
opcode, fld_num);
abort ();
}
have_cross = TRUE;
func_unit_cross = fld_val;
break;
case tic6x_coding_rside:
/* If the format has a t field, use it for src/dst register side. */
have_t = TRUE;
t_val = fld_val;
func_unit_data_side = (t_val ? 2 : 1);
break;
case tic6x_coding_areg:
have_areg = TRUE;
break;
@ -443,17 +608,28 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
determined either from the flags or from an instruction
field. */
if (func_unit_side != 1 && func_unit_side != 2)
abort ();
{
printf ("opcode %x: func_unit_side is not encoded!\n", opcode);
abort ();
}
/* Cross paths are not applicable when sides are specified
for both address and data paths. */
if (func_unit_data_side && have_cross)
abort ();
{
printf ("opcode %x: xpath not applicable when side are specified both for address and data!\n",
opcode);
abort ();
}
/* Separate address and data paths are only applicable for
the D unit. */
if (func_unit_data_side && opc->func_unit != tic6x_func_unit_d)
abort ();
{
printf ("opcode %x: separate address and data paths only applicable for D unit!\n",
opcode);
abort ();
}
/* If an address register is being used but in ADDA rather
than a load or store, it uses a cross path for side-A
@ -462,7 +638,10 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
if (have_areg && !func_unit_data_side)
{
if (have_cross)
abort ();
{
printf ("opcode %x: illegal cross path specifier in adda opcode!\n", opcode);
abort ();
}
func_unit_cross = (func_unit_side == 1 ? TRUE : FALSE);
}
@ -485,6 +664,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
break;
default:
printf ("opcode %x: illegal func_unit specifier %d\n", opcode, opc->func_unit);
abort ();
}
@ -503,9 +683,14 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
break;
default:
printf ("opcode %x: illegal data func_unit specifier %d\n",
opcode, func_unit_data_side);
abort ();
}
if (opc->flags & TIC6X_FLAG_INSN16_BSIDE && func_unit_side == 1)
func_unit_cross = 1;
snprintf (func_unit_buf, 7, " .%c%u%s%s", func_unit_char,
func_unit_side, (func_unit_cross ? "X" : ""), data_str);
func_unit = func_unit_buf;
@ -539,6 +724,19 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
switch (opc->operand_info[op_num].form)
{
case tic6x_operand_b15reg:
/* Fully determined by the functional unit. */
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "b15");
continue;
case tic6x_operand_zreg:
/* Fully determined by the functional unit. */
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "%c0",
(func_unit_side == 2 ? 'b' : 'a'));
continue;
case tic6x_operand_retreg:
/* Fully determined by the functional unit. */
operands_text[op_num] = TRUE;
@ -556,6 +754,46 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
snprintf (operands[op_num], 24, "nrp");
continue;
case tic6x_operand_ilc:
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "ilc");
continue;
case tic6x_operand_hw_const_minus_1:
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "-1");
continue;
case tic6x_operand_hw_const_0:
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "0");
continue;
case tic6x_operand_hw_const_1:
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "1");
continue;
case tic6x_operand_hw_const_5:
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "5");
continue;
case tic6x_operand_hw_const_16:
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "16");
continue;
case tic6x_operand_hw_const_24:
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "24");
continue;
case tic6x_operand_hw_const_31:
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "31");
continue;
default:
break;
}
@ -566,16 +804,25 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
= &opc->variable_fields[fld_num];
const tic6x_insn_field *field;
unsigned int fld_val;
unsigned int reg_base = 0;
signed int signed_fld_val;
char reg_side = '?';
if (enc->operand_num != op_num)
continue;
field = tic6x_field_from_fmt (fmt, enc->field_id);
if (!field)
abort ();
fld_val = tic6x_field_bits (opcode, field);
{
printf ("opcode %x: missing field (field_id:%d) in format\n", opcode, enc->field_id);
abort ();
}
fld_val = tic6x_field_bits (opcode, field);
switch (enc->coding_method)
{
case tic6x_coding_cst_s3i:
(fld_val == 0x00) && (fld_val = 0x10);
(fld_val == 0x07) && (fld_val = 0x08);
/* Fall through. */
case tic6x_coding_ucst:
case tic6x_coding_ulcst_dpr_byte:
case tic6x_coding_ulcst_dpr_half:
@ -595,6 +842,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
break;
default:
printf ("opcode %x: illegal operand form for operand#%d\n", opcode, op_num);
abort ();
}
break;
@ -604,11 +852,26 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
snprintf (operands[op_num], 24, "%u", fld_val << 16);
break;
case tic6x_coding_scst_l3i:
operands_text[op_num] = TRUE;
if (fld_val == 0)
{
signed_fld_val = 8;
}
else
{
signed_fld_val = (signed int) fld_val;
signed_fld_val ^= (1 << (tic6x_field_width (field) - 1));
signed_fld_val -= (1 << (tic6x_field_width (field) - 1));
}
snprintf (operands[op_num], 24, "%d", signed_fld_val);
break;
case tic6x_coding_scst:
operands_text[op_num] = TRUE;
signed_fld_val = (signed int) fld_val;
signed_fld_val ^= (1 << (field->width - 1));
signed_fld_val -= (1 << (field->width - 1));
signed_fld_val ^= (1 << (tic6x_field_width (field) - 1));
signed_fld_val -= (1 << (tic6x_field_width (field) - 1));
snprintf (operands[op_num], 24, "%d", signed_fld_val);
break;
@ -620,8 +883,8 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
case tic6x_coding_pcrel:
case tic6x_coding_pcrel_half:
signed_fld_val = (signed int) fld_val;
signed_fld_val ^= (1 << (field->width - 1));
signed_fld_val -= (1 << (field->width - 1));
signed_fld_val ^= (1 << (tic6x_field_width (field) - 1));
signed_fld_val -= (1 << (tic6x_field_width (field) - 1));
if (fetch_packet_header_based
&& enc->coding_method == tic6x_coding_pcrel_half)
signed_fld_val *= 2;
@ -640,70 +903,115 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
(func_unit_side == 2 ? 'b' : 'a'), (fld_val | 0x1) - 1);
break;
case tic6x_coding_pcrel_half_unsigned:
operands_pcrel[op_num] = TRUE;
operands_addresses[op_num] = fp_addr + 2 * fld_val;
break;
case tic6x_coding_reg_shift:
fld_val <<= 1;
/* Fall through. */
case tic6x_coding_reg:
if (num_bits == 16 && header.rs && !(opc->flags & TIC6X_FLAG_INSN16_NORS))
{
reg_base = 16;
}
switch (opc->operand_info[op_num].form)
{
case tic6x_operand_treg:
if (!have_t)
{
printf ("opcode %x: operand treg but missing t field\n", opcode);
abort ();
}
operands_text[op_num] = TRUE;
reg_side = t_val ? 'b' : 'a';
snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val);
break;
case tic6x_operand_reg:
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "%c%u",
(func_unit_side == 2 ? 'b' : 'a'), fld_val);
reg_side = (func_unit_side == 2) ? 'b' : 'a';
snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val);
break;
case tic6x_operand_reg_nors:
operands_text[op_num] = TRUE;
reg_side = (func_unit_side == 2) ? 'b' : 'a';
snprintf (operands[op_num], 24, "%c%u", reg_side, fld_val);
break;
case tic6x_operand_reg_bside:
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "b%u", reg_base + fld_val);
break;
case tic6x_operand_reg_bside_nors:
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "b%u", fld_val);
break;
case tic6x_operand_xreg:
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "%c%u",
(((func_unit_side == 2) ^ func_unit_cross)
? 'b'
: 'a'), fld_val);
reg_side = ((func_unit_side == 2) ^ func_unit_cross) ? 'b' : 'a';
snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val);
break;
case tic6x_operand_dreg:
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "%c%u",
(func_unit_data_side == 2 ? 'b' : 'a'),
fld_val);
reg_side = (func_unit_data_side == 2) ? 'b' : 'a';
snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val);
break;
case tic6x_operand_regpair:
operands_text[op_num] = TRUE;
if (fld_val & 1)
operands_ok = FALSE;
reg_side = (func_unit_side == 2) ? 'b' : 'a';
snprintf (operands[op_num], 24, "%c%u:%c%u",
(func_unit_side == 2 ? 'b' : 'a'), fld_val + 1,
(func_unit_side == 2 ? 'b' : 'a'), fld_val);
reg_side, reg_base + fld_val + 1,
reg_side, reg_base + fld_val);
break;
case tic6x_operand_xregpair:
operands_text[op_num] = TRUE;
if (fld_val & 1)
operands_ok = FALSE;
reg_side = ((func_unit_side == 2) ^ func_unit_cross) ? 'b' : 'a';
snprintf (operands[op_num], 24, "%c%u:%c%u",
(((func_unit_side == 2) ^ func_unit_cross)
? 'b'
: 'a'), fld_val + 1,
(((func_unit_side == 2) ^ func_unit_cross)
? 'b'
: 'a'), fld_val);
reg_side, reg_base + fld_val + 1,
reg_side, reg_base + fld_val);
break;
case tic6x_operand_tregpair:
if (!have_t)
{
printf ("opcode %x: operand tregpair but missing t field\n", opcode);
abort ();
}
operands_text[op_num] = TRUE;
if (fld_val & 1)
operands_ok = FALSE;
reg_side = t_val ? 'b' : 'a';
snprintf (operands[op_num], 24, "%c%u:%c%u",
reg_side, reg_base + fld_val + 1,
reg_side, reg_base + fld_val);
break;
case tic6x_operand_dregpair:
operands_text[op_num] = TRUE;
if (fld_val & 1)
operands_ok = FALSE;
reg_side = (func_unit_data_side) == 2 ? 'b' : 'a';
snprintf (operands[op_num], 24, "%c%u:%c%u",
(func_unit_data_side == 2 ? 'b' : 'a'),
fld_val + 1,
(func_unit_data_side == 2 ? 'b' : 'a'),
fld_val);
reg_side, reg_base + fld_val + 1,
reg_side, reg_base + fld_val);
break;
case tic6x_operand_mem_deref:
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "*%c%u",
(func_unit_side == 2 ? 'b' : 'a'), fld_val);
reg_side = func_unit_side == 2 ? 'b' : 'a';
snprintf (operands[op_num], 24, "*%c%u", reg_side, reg_base + fld_val);
break;
case tic6x_operand_mem_short:
@ -713,6 +1021,30 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
break;
default:
printf ("opcode %x: unexpected operand form %d for operand #%d",
opcode, opc->operand_info[op_num].form, op_num);
abort ();
}
break;
case tic6x_coding_reg_ptr:
switch (opc->operand_info[op_num].form)
{
case tic6x_operand_mem_short:
case tic6x_operand_mem_ndw:
if (fld_val > 0x3u)
{
printf("opcode %x: illegal field value for ptr register of operand #%d (%d)",
opcode, op_num, fld_val);
abort ();
}
mem_base_reg = 0x4 | fld_val;
mem_base_reg_known = TRUE;
break;
default:
printf ("opcode %x: unexpected operand form %d for operand #%d",
opcode, opc->operand_info[op_num].form, op_num);
abort ();
}
break;
@ -732,14 +1064,33 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
break;
default:
printf ("opcode %x: bad operand form\n", opcode);
abort ();
}
break;
case tic6x_coding_mem_offset:
case tic6x_coding_mem_offset_minus_one_noscale:
case tic6x_coding_mem_offset_minus_one:
fld_val += 1;
case tic6x_coding_mem_offset_noscale:
case tic6x_coding_mem_offset:
mem_offset = fld_val;
mem_offset_known = TRUE;
if (num_bits == 16)
{
mem_mode_known = TRUE;
mem_mode = TIC6X_INSN16_MEM_MODE_VAL (opc->flags);
mem_scaled_known = TRUE;
mem_scaled = TRUE;
if (opc->flags & TIC6X_FLAG_INSN16_B15PTR)
{
mem_base_reg_known = TRUE;
mem_base_reg = 15;
}
if ( enc->coding_method == tic6x_coding_mem_offset_noscale
|| enc->coding_method == tic6x_coding_mem_offset_noscale )
mem_scaled = FALSE;
}
break;
case tic6x_coding_mem_mode:
@ -830,11 +1181,11 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
if (info->endian == BFD_ENDIAN_LITTLE)
search_opcode
= (tic6x_extract_16
(search_fp + search_fp_offset, info));
(search_fp + search_fp_offset, &header, info));
else
search_opcode
= (tic6x_extract_16
(search_fp + (search_fp_offset ^ 2),
(search_fp + (search_fp_offset ^ 2), &header,
info));
}
else
@ -864,7 +1215,10 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
if (prev_sploop_found)
{
if (sploop_ii <= 0)
abort ();
{
printf ("opcode %x: sloop index not found (%d)\n", opcode, sploop_ii);
abort ();
}
else if (sploop_ii <= 1)
fcyc_bits = 0;
else if (sploop_ii <= 2)
@ -888,8 +1242,11 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
operands_text[op_num] = TRUE;
break;
}
if (fcyc_bits > field->width)
abort ();
if (fcyc_bits > tic6x_field_width(field))
{
printf ("opcode %x: illegal fcyc value (%d)\n", opcode, fcyc_bits);
abort ();
}
if (enc->coding_method == tic6x_coding_fstg)
{
int i, t;
@ -930,18 +1287,23 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
case tic6x_coding_fu:
case tic6x_coding_data_fu:
case tic6x_coding_xpath:
case tic6x_coding_rside:
/* Don't relate to operands, so operand number is
meaningless. */
break;
default:
printf ("opcode %x: illegal field encoding (%d)\n", opcode, enc->coding_method);
abort ();
}
if (mem_base_reg_known_long && mem_offset_known_long)
{
if (operands_text[op_num] || operands_pcrel[op_num])
abort ();
{
printf ("opcode %x: long access but operands already known ?\n", opcode);
abort ();
}
operands_text[op_num] = TRUE;
snprintf (operands[op_num], 24, "*+b%u(%u)", mem_base_reg,
mem_offset * opc->operand_info[op_num].size);
@ -960,7 +1322,10 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
char offsetp[6];
if (operands_text[op_num] || operands_pcrel[op_num])
abort ();
{
printf ("opcode %x: mem access operands already known ?\n", opcode);
abort ();
}
side = func_unit_side == 2 ? 'b' : 'a';
snprintf (base, 4, "%c%u", side, mem_base_reg);
@ -968,7 +1333,12 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
offset_is_reg = ((mem_mode & 4) ? TRUE : FALSE);
if (offset_is_reg)
{
snprintf (offset, 4, "%c%u", side, mem_offset);
if (num_bits == 16 && header.rs && !(opc->flags & TIC6X_FLAG_INSN16_NORS))
{
reg_base = 16;
}
snprintf (offset, 4, "%c%u", side, reg_base + mem_offset);
if (opc->operand_info[op_num].form
== tic6x_operand_mem_ndw)
offset_scaled = mem_scaled ? TRUE : FALSE;
@ -1034,6 +1404,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
break;
default:
printf ("*** unknown mem_mode : %d \n", mem_mode);
abort ();
}
}
@ -1044,12 +1415,18 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
tic6x_ctrl_id crid;
if (operands_text[op_num] || operands_pcrel[op_num])
abort ();
{
printf ("*** abort crlo crli\n");
abort ();
}
rw = opc->operand_info[op_num].rw;
if (rw != tic6x_rw_read
&& rw != tic6x_rw_write)
abort ();
{
printf ("*** abort rw : %d\n", rw);
abort ();
}
for (crid = 0; crid < tic6x_ctrl_max; crid++)
{
@ -1081,26 +1458,37 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
|| spmask_skip_operand)
break;
}
/* end for fld_num */
if (spmask_skip_operand)
{
/* SPMASK operands are only valid as the single operand
in the opcode table. */
if (num_operands != 1)
abort ();
{
printf ("opcode: %x, num_operands != 1 : %d\n", opcode, num_operands);
abort ();
}
num_operands = 0;
break;
}
/* The operand must by now have been decoded. */
if (!operands_text[op_num] && !operands_pcrel[op_num])
abort ();
}
{
printf ("opcode: %x, operand #%d not decoded\n", opcode, op_num);
abort ();
}
}
/* end for op_num */
if (!operands_ok)
continue;
info->bytes_per_chunk = num_bits / 8;
info->fprintf_func (info->stream, "%s%s%s%s", parallel, cond,
opc->name, func_unit);
info->fprintf_func (info->stream, "%s", parallel);
info->fprintf_func (info->stream, "%s%s%s", cond, opc->name,
func_unit);
for (op_num = 0; op_num < num_operands; op_num++)
{
info->fprintf_func (info->stream, "%c", (op_num == 0 ? ' ' : ','));