Gavin Romig-Koch 82aeada70c * configure.in (mips64vr4xxx): Enable TARGET_ENABLE_FR. ... Set mips_fpu, and mips_fpu_bitsize. Set sim_gen, and sim_igen_machine. * configure: Rebuild. * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts. * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.		1998-12-12 22:43:54 +00:00
..
arm	Fixes.	1998-12-10 23:36:40 +00:00
common	Compare with ZERO not NULL.	1998-12-11 06:00:55 +00:00
d10v
erc32
h8300
igen	* gen-engine.c (print_run_body): Prefix instruction_address.	1998-12-04 04:45:05 +00:00
m32r	* cpu.h,decode.c,sem-switch.c,sem.c: Regenerate.	1998-12-09 20:44:30 +00:00
m32r-gx	* gx prototype: simulator I/O bug fix	1998-12-05 10:32:12 +00:00
mips	* configure.in (mips64vr4xxx): Enable TARGET_ENABLE_FR.	1998-12-12 22:43:54 +00:00
mn10300
ppc	Fix problem where qnan was treated like an infinity	1998-11-20 00:44:03 +00:00
sh
testsuite	Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com>	1998-12-10 23:48:37 +00:00
tic80	Unify (well almost) --enable-build-warnings configuration option	1998-10-28 02:01:32 +00:00
v850	Fix --enable-build-warnings=-Werror failures.	1998-11-25 09:58:04 +00:00
w65	Unify (well almost) --enable-build-warnings configuration option	1998-10-28 02:01:32 +00:00
.Sanitize	i960 simulator.	1998-12-09 06:52:14 +00:00
ChangeLog	Wed Nov 4 19:11:43 1998 Dave Brolley <brolley@cygnus.com>	1998-11-05 20:25:22 +00:00
configure	Wed Nov 4 19:11:43 1998 Dave Brolley <brolley@cygnus.com>	1998-11-05 20:25:22 +00:00
configure.in	i960 simulator.	1998-12-09 06:52:14 +00:00
Makefile.in
README-HACKING	Add d10v and v850 to gennltvals.sh and regenerate.	1998-11-24 07:59:01 +00:00