4b8c8c02e9
opcodes: * arm-dis.c: Changed ldra and strl-form mnemonics to lda and stl-form. gas: * config/tc-arm.c: Changed ldra and strl-form mnemonics to lda and stl-form for armv8. gas/testsuite: * gas/arm/armv8-a-bad.l: Updated for changed mnemonics. * gas/arm/armv8-a-bad.s: Likewise. * gas/arm/armv8-a.d: Likewise. * gas/arm/armv8-a.s: Likewise. * gas/arm/inst.s: Added test for ldrt encoding compatibly with ldralt. * gas/arm/inst.d: Updated.
847 lines
27 KiB
Text
847 lines
27 KiB
Text
2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* arm-dis.c: Changed ldra and strl-form mnemonics
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to lda and stl-form.
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2012-09-18 Chao-ying Fu <fu@mips.com>
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* micromips-opc.c (micromips_opcodes): Correct the encoding of
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the "swxc1" instruction.
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2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
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* aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
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the parameter 'inst'.
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(aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
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(convert_mov_to_movewide): Change to assert (0) when
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aarch64_wide_constant_p returns FALSE.
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2012-09-14 David Edelsohn <dje.gcc@gmail.com>
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* configure: Regenerate.
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2012-09-14 Anthony Green <green@moxielogic.com>
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* moxie-dis.c (print_insn_moxie): Branch targets are relative to
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the address after the branch instruction.
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2012-09-13 Anthony Green <green@moxielogic.com>
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* moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
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2012-09-10 Matthias Klose <doko@ubuntu.com>
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* config.in: Disable sanity check for kfreebsd.
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2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
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* configure: Regenerated.
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2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
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* ia64-asmtab.h (completer_index): Extend bitfield to full uint.
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* ia64-gen.c: Promote completer index type to longlong.
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(irf_operand): Add new register recognition.
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(in_iclass_mov_x): Add an entry for the new mov_* instruction type.
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(lookup_specifier): Add new resource recognition.
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(insert_bit_table_ent): Relax abort condition according to the
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changed completer index type.
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(print_dis_table): Fix printf format for completer index.
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* ia64-ic.tbl: Add a new instruction class.
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* ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
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* ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
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* ia64-opc.h: Define short names for new operand types.
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* ia64-raw.tbl: Add new RAW resource for DAHR register.
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* ia64-waw.tbl: Add new WAW resource for DAHR register.
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* ia64-asmtab.c: Regenerate.
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2012-08-29 Peter Bergner <bergner@vnet.ibm.com>
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* ppc-opc.c (VXASHB_MASK): New define.
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(powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
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2012-08-28 Peter Bergner <bergner@vnet.ibm.com>
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* ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
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VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
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(powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
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vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
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vupklsh>: Use VXVA_MASK.
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<vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
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<mfvscr>: Use VXVAVB_MASK.
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<mtvscr>: Use VXVDVA_MASK.
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<vspltb>: Use VXUIMM4_MASK.
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<vsplth>: Use VXUIMM3_MASK.
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<vspltw>: Use VXUIMM2_MASK.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (neon_opcodes): Handle VMULL.P64.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (neon_opcodes): Add support for AES instructions.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (coprocessor_opcodes): Add support for HP/DP
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conversions.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (coprocessor_opcodes): Add VRINT.
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(neon_opcodes): Likewise.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (coprocessor_opcodes): Add support for new VCVT
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variants.
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(neon_opcodes): Likewise.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
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(neon_opcodes): Likewise.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (coprocessor_opcodes): Add VSEL.
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(print_insn_coprocessor): Add new %<>c bitfield format
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specifier.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
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(thumb32_opcodes): Likewise.
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(print_arm_insn): Add support for %<>T formatter.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (arm_opcodes): Add HLT.
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(thumb_opcodes): Likewise.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (thumb32_opcodes): Add DCPS instruction.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (arm_opcodes): Add SEVL.
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(thumb_opcodes): Likewise.
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(thumb32_opcodes): Likewise.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm-dis.c (data_barrier_option): New function.
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(print_insn_arm): Use data_barrier_option.
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(print_insn_thumb32): Use data_barrier_option.
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
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* arm-dis.c (COND_UNCOND): New constant.
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(print_insn_coprocessor): Add support for %u format specifier.
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(print_insn_neon): Likewise.
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2012-08-21 David S. Miller <davem@davemloft.net>
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* sparc-opc.c (4-argument crypto instructions): Fix encoding using
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F3F4 macro.
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2012-08-20 Edmar Wienskoski <edmar@freescale.com>
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* ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
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vabsduh, vabsduw, mviwsplt.
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2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
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* i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
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CPU_BTVER2_FLAGS.
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* i386-opc.h: Update CpuPRFCHW comment.
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* i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
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* i386-init.h: Regenerated.
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* i386-tbl.h: Likewise.
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2012-08-17 Nick Clifton <nickc@redhat.com>
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* po/uk.po: New Ukranian translation.
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* configure.in (ALL_LINGUAS): Add uk.
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* configure: Regenerate.
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2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
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* ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
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RBX for the third operand.
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<"lswi">: Use RAX for second and NBI for the third operand.
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2012-08-15 DJ Delorie <dj@redhat.com>
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* rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
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operands, so that data addresses can be corrected when not
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ES-overridden.
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* rl78-decode.c: Regenerate.
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* rl78-dis.c (print_insn_rl78): Make order of modifiers
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irrelevent. When the 'e' specifier is used on an operand and no
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ES prefix is provided, adjust address to make it absolute.
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2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
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* ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
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2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
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* ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
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2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
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* mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
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macros, use local variables for info struct member accesses,
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update the type of the variable used to hold the instruction
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word.
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(print_insn_mips, print_mips16_insn_arg): Likewise.
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(print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
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local variables for info struct member accesses.
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(print_insn_micromips): Add GET_OP_S local macro.
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(_print_insn_mips): Update the type of the variable used to hold
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the instruction word.
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2012-08-13 Ian Bolton <ian.bolton@arm.com>
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Laurent Desnogues <laurent.desnogues@arm.com>
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Jim MacArthur <jim.macarthur@arm.com>
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Marcus Shawcroft <marcus.shawcroft@arm.com>
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Nigel Stephens <nigel.stephens@arm.com>
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Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
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Richard Earnshaw <rearnsha@arm.com>
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Sofiane Naci <sofiane.naci@arm.com>
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Tejas Belagod <tejas.belagod@arm.com>
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Yufeng Zhang <yufeng.zhang@arm.com>
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* Makefile.am: Add AArch64.
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* Makefile.in: Regenerate.
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* aarch64-asm.c: New file.
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* aarch64-asm.h: New file.
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* aarch64-dis.c: New file.
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* aarch64-dis.h: New file.
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* aarch64-gen.c: New file.
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* aarch64-opc.c: New file.
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* aarch64-opc.h: New file.
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* aarch64-tbl.h: New file.
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* configure.in: Add AArch64.
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* configure: Regenerate.
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* disassemble.c: Add AArch64.
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* aarch64-asm-2.c: New file (automatically generated).
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* aarch64-dis-2.c: New file (automatically generated).
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* aarch64-opc-2.c: New file (automatically generated).
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* po/POTFILES.in: Regenerate.
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2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
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* micromips-opc.c (micromips_opcodes): Update comment.
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* mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
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instructions for IOCT as appropriate.
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* mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
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opcode_is_member.
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* configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
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the result of a check for the -Wno-missing-field-initializers
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GCC option.
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* Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
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(mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
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compilation.
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(mips16-opc.lo): Likewise.
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(micromips-opc.lo): Likewise.
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* aclocal.m4: Regenerate.
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* configure: Regenerate.
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* Makefile.in: Regenerate.
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2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
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PR gas/14423
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* i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
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* i386-init.h: Regenerated.
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2012-08-09 Nick Clifton <nickc@redhat.com>
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* po/vi.po: Updated Vietnamese translation.
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2012-08-07 Roland McGrath <mcgrathr@google.com>
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* i386-dis.c (reg_table): Fill out REG_0F0D table with
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AMD-reserved cases as "prefetch".
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(MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
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(MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
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(reg_table): Use those under REG_0F18.
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(mod_table): Add those cases as "nop/reserved".
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2012-08-07 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
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2012-08-06 Roland McGrath <mcgrathr@google.com>
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* i386-dis.c (print_insn): Print spaces between multiple excess
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prefixes. Return actual number of excess prefixes consumed,
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not always one.
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* i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
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2012-08-06 Roland McGrath <mcgrathr@google.com>
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Victor Khimenko <khim@google.com>
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H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
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(putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
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(intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
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(OP_E_register): Likewise.
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(OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
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2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
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* configure.in: Formatting.
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* configure: Regenerate.
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2012-08-01 Alan Modra <amodra@gmail.com>
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* h8300-dis.c: Fix printf arg warnings.
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* i960-dis.c: Likewise.
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* mips-dis.c: Likewise.
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* pdp11-dis.c: Likewise.
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* sh-dis.c: Likewise.
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* v850-dis.c: Likewise.
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* configure.in: Formatting.
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* configure: Regenerate.
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* rl78-decode.c: Regenerate.
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* po/POTFILES.in: Regenerate.
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2012-07-31 Chao-Ying Fu <fu@mips.com>
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Catherine Moore <clm@codesourcery.com>
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Maciej W. Rozycki <macro@codesourcery.com>
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* micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
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(DSP_VOLA): Likewise.
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(D32, D33): Likewise.
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(micromips_opcodes): Add DSP ASE instructions.
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* mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
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<'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
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2012-07-31 Jan Beulich <jbeulich@suse.com>
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||
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* i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
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instruction group. Mark as requiring AVX2.
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* i386-tbl.h: Re-generate.
|
||
|
||
2012-07-30 Nick Clifton <nickc@redhat.com>
|
||
|
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* po/opcodes.pot: Updated template.
|
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* po/es.po: Updated Spanish translation.
|
||
* po/fi.po: Updated Finnish translation.
|
||
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2012-07-27 Mike Frysinger <vapier@gentoo.org>
|
||
|
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* configure.in (BFD_VERSION): Run bfd/configure --version and
|
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parse the output of that.
|
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* configure: Regenerate.
|
||
|
||
2012-07-25 James Lemke <jwlemke@codesourcery.com>
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||
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* ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
|
||
|
||
2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
|
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Dr David Alan Gilbert <dave@treblig.org>
|
||
|
||
PR binutils/13135
|
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* arm-dis.c: Add necessary casts for printing integer values.
|
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Use %s when printing string values.
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||
* hppa-dis.c: Likewise.
|
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* m68k-dis.c: Likewise.
|
||
* microblaze-dis.c: Likewise.
|
||
* mips-dis.c: Likewise.
|
||
* sparc-dis.c: Likewise.
|
||
|
||
2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
|
||
|
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PR binutils/14355
|
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* i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
|
||
(VEX_LEN_0FXOP_08_CD): Likewise.
|
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(VEX_LEN_0FXOP_08_CE): Likewise.
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||
(VEX_LEN_0FXOP_08_CF): Likewise.
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||
(VEX_LEN_0FXOP_08_EC): Likewise.
|
||
(VEX_LEN_0FXOP_08_ED): Likewise.
|
||
(VEX_LEN_0FXOP_08_EE): Likewise.
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(VEX_LEN_0FXOP_08_EF): Likewise.
|
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(xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
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vpcomub, vpcomuw, vpcomud, vpcomuq.
|
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(vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
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VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
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VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
|
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VEX_LEN_0FXOP_08_EF.
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||
|
||
2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
|
||
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||
* i386-dis.c (PREFIX_0F38F6): New.
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(prefix_table): Add adcx, adox instructions.
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(three_byte_table): Use PREFIX_0F38F6.
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(mod_table): Add rdseed instruction.
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* i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
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(cpu_flags): Likewise.
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* i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
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(i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
|
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* i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
|
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prefetchw.
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* i386-tbl.h: Regenerate.
|
||
* i386-init.h: Likewise.
|
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|
||
2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
|
||
|
||
* mips-dis.c: Remove gratuitous newline.
|
||
|
||
2012-07-05 Sean Keys <skeys@ipdatasys.com>
|
||
|
||
* xgate-dis.c: Removed an IF statement that will
|
||
always be false due to overlapping operand masks.
|
||
* xgate-opc.c: Corrected 'com' opcode entry and
|
||
fixed spacing.
|
||
|
||
2012-07-02 Roland McGrath <mcgrathr@google.com>
|
||
|
||
* i386-opc.tbl: Add RepPrefixOk to nop.
|
||
* i386-tbl.h: Regenerate.
|
||
|
||
2012-06-28 Nick Clifton <nickc@redhat.com>
|
||
|
||
* po/vi.po: Updated Vietnamese translation.
|
||
|
||
2012-06-22 Roland McGrath <mcgrathr@google.com>
|
||
|
||
* i386-opc.tbl: Add RepPrefixOk to ret.
|
||
* i386-tbl.h: Regenerate.
|
||
|
||
* i386-opc.h (RepPrefixOk): New enum constant.
|
||
(i386_opcode_modifier): New bitfield 'repprefixok'.
|
||
* i386-gen.c (opcode_modifiers): Add RepPrefixOk.
|
||
* i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
|
||
instructions that have IsString.
|
||
* i386-tbl.h: Regenerate.
|
||
|
||
2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
|
||
|
||
* ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
|
||
(iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
|
||
(lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
|
||
(stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
|
||
(dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
|
||
(dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
|
||
(stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
|
||
(tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
|
||
(stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
|
||
|
||
2012-05-19 Alan Modra <amodra@gmail.com>
|
||
|
||
* ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
|
||
(get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
|
||
|
||
2012-05-18 Alan Modra <amodra@gmail.com>
|
||
|
||
* ia64-opc.c: Remove #include "ansidecl.h".
|
||
* z8kgen.c: Include sysdep.h first.
|
||
|
||
* arc-dis.c: Include sysdep.h first, remove some redundant includes.
|
||
* bfin-dis.c: Likewise.
|
||
* i860-dis.c: Likewise.
|
||
* ia64-dis.c: Likewise.
|
||
* ia64-gen.c: Likewise.
|
||
* m68hc11-dis.c: Likewise.
|
||
* mmix-dis.c: Likewise.
|
||
* msp430-dis.c: Likewise.
|
||
* or32-dis.c: Likewise.
|
||
* rl78-dis.c: Likewise.
|
||
* rx-dis.c: Likewise.
|
||
* tic4x-dis.c: Likewise.
|
||
* tilegx-opc.c: Likewise.
|
||
* tilepro-opc.c: Likewise.
|
||
* rx-decode.c: Regenerate.
|
||
|
||
2012-05-17 James Lemke <jwlemke@codesourcery.com>
|
||
|
||
* ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
|
||
|
||
2012-05-17 James Lemke <jwlemke@codesourcery.com>
|
||
|
||
* ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
|
||
|
||
2012-05-17 Daniel Richard G. <skunk@iskunk.org>
|
||
Nick Clifton <nickc@redhat.com>
|
||
|
||
PR 14072
|
||
* configure.in: Add check that sysdep.h has been included before
|
||
any system header files.
|
||
* configure: Regenerate.
|
||
* config.in: Regenerate.
|
||
* sysdep.h: Generate an error if included before config.h.
|
||
* alpha-opc.c: Include sysdep.h before any other header file.
|
||
* alpha-dis.c: Likewise.
|
||
* avr-dis.c: Likewise.
|
||
* cgen-opc.c: Likewise.
|
||
* cr16-dis.c: Likewise.
|
||
* cris-dis.c: Likewise.
|
||
* crx-dis.c: Likewise.
|
||
* d10v-dis.c: Likewise.
|
||
* d10v-opc.c: Likewise.
|
||
* d30v-dis.c: Likewise.
|
||
* d30v-opc.c: Likewise.
|
||
* h8500-dis.c: Likewise.
|
||
* i370-dis.c: Likewise.
|
||
* i370-opc.c: Likewise.
|
||
* m10200-dis.c: Likewise.
|
||
* m10300-dis.c: Likewise.
|
||
* micromips-opc.c: Likewise.
|
||
* mips-opc.c: Likewise.
|
||
* mips61-opc.c: Likewise.
|
||
* moxie-dis.c: Likewise.
|
||
* or32-opc.c: Likewise.
|
||
* pj-dis.c: Likewise.
|
||
* ppc-dis.c: Likewise.
|
||
* ppc-opc.c: Likewise.
|
||
* s390-dis.c: Likewise.
|
||
* sh-dis.c: Likewise.
|
||
* sh64-dis.c: Likewise.
|
||
* sparc-dis.c: Likewise.
|
||
* sparc-opc.c: Likewise.
|
||
* spu-dis.c: Likewise.
|
||
* tic30-dis.c: Likewise.
|
||
* tic54x-dis.c: Likewise.
|
||
* tic80-dis.c: Likewise.
|
||
* tic80-opc.c: Likewise.
|
||
* tilegx-dis.c: Likewise.
|
||
* tilepro-dis.c: Likewise.
|
||
* v850-dis.c: Likewise.
|
||
* v850-opc.c: Likewise.
|
||
* vax-dis.c: Likewise.
|
||
* w65-dis.c: Likewise.
|
||
* xgate-dis.c: Likewise.
|
||
* xtensa-dis.c: Likewise.
|
||
* rl78-decode.opc: Likewise.
|
||
* rl78-decode.c: Regenerate.
|
||
* rx-decode.opc: Likewise.
|
||
* rx-decode.c: Regenerate.
|
||
|
||
2012-05-17 Alan Modra <amodra@gmail.com>
|
||
|
||
* ppc_dis.c: Don't include elf/ppc.h.
|
||
|
||
2012-05-16 Meador Inge <meadori@codesourcery.com>
|
||
|
||
* arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
|
||
to PUSH/POP {reg}.
|
||
|
||
2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
|
||
Stephane Carrez <stcarrez@nerim.fr>
|
||
|
||
* configure.in: Add S12X and XGATE co-processor support to m68hc11
|
||
target.
|
||
* disassemble.c: Likewise.
|
||
* configure: Regenerate.
|
||
* m68hc11-dis.c: Make objdump output more consistent, use hex
|
||
instead of decimal and use 0x prefix for hex.
|
||
* m68hc11-opc.c: Add S12X and XGATE opcodes.
|
||
|
||
2012-05-14 James Lemke <jwlemke@codesourcery.com>
|
||
|
||
* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
|
||
(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
|
||
(vle_opcd_indices): New array.
|
||
(lookup_vle): New function.
|
||
(disassemble_init_powerpc): Revise for second (VLE) opcode table.
|
||
(print_insn_powerpc): Likewise.
|
||
* ppc-opc.c: Likewise.
|
||
|
||
2012-05-14 Catherine Moore <clm@codesourcery.com>
|
||
Maciej W. Rozycki <macro@codesourcery.com>
|
||
Rhonda Wittels <rhonda@codesourcery.com>
|
||
Nathan Froyd <froydnj@codesourcery.com>
|
||
|
||
* ppc-opc.c (insert_arx, extract_arx): New functions.
|
||
(insert_ary, extract_ary): New functions.
|
||
(insert_li20, extract_li20): New functions.
|
||
(insert_rx, extract_rx): New functions.
|
||
(insert_ry, extract_ry): New functions.
|
||
(insert_sci8, extract_sci8): New functions.
|
||
(insert_sci8n, extract_sci8n): New functions.
|
||
(insert_sd4h, extract_sd4h): New functions.
|
||
(insert_sd4w, extract_sd4w): New functions.
|
||
(insert_vlesi, extract_vlesi): New functions.
|
||
(insert_vlensi, extract_vlensi): New functions.
|
||
(insert_vleui, extract_vleui): New functions.
|
||
(insert_vleil, extract_vleil): New functions.
|
||
(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
|
||
(BI16, BI32, BO32, B8): New.
|
||
(B15, B24, CRD32, CRS): New.
|
||
(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
|
||
(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
|
||
(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
|
||
(SH6_MASK): Use PPC_OPSHIFT_INV.
|
||
(SI8, UI5, OIMM5, UI7, BO16): New.
|
||
(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
|
||
(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
|
||
(ALLOW8_SPRG): New.
|
||
(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
|
||
(OPVUP, OPVUP_MASK OPVUP): New
|
||
(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
|
||
(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
|
||
(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
|
||
(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
|
||
(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
|
||
(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
|
||
(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
|
||
(SE_IM5, SE_IM5_MASK): New.
|
||
(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
|
||
(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
|
||
(BO32DNZ, BO32DZ): New.
|
||
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
|
||
(PPCVLE): New.
|
||
(powerpc_opcodes): Add new VLE instructions. Update existing
|
||
instruction to include PPCVLE if supported.
|
||
* ppc-dis.c (ppc_opts): Add vle entry.
|
||
(get_powerpc_dialect): New function.
|
||
(powerpc_init_dialect): VLE support.
|
||
(print_insn_big_powerpc): Call get_powerpc_dialect.
|
||
(print_insn_little_powerpc): Likewise.
|
||
(operand_value_powerpc): Handle negative shift counts.
|
||
(print_insn_powerpc): Handle 2-byte instruction lengths.
|
||
|
||
2012-05-11 Daniel Richard G. <skunk@iskunk.org>
|
||
|
||
PR binutils/14028
|
||
* configure.in: Invoke ACX_HEADER_STRING.
|
||
* configure: Regenerate.
|
||
* config.in: Regenerate.
|
||
* sysdep.h: If STRINGS_WITH_STRING is defined then include both
|
||
string.h and strings.h.
|
||
|
||
2012-05-11 Nick Clifton <nickc@redhat.com>
|
||
|
||
PR binutils/14006
|
||
* arm-dis.c (print_insn): Fix detection of instruction mode in
|
||
files containing multiple executable sections.
|
||
|
||
2012-05-03 Sean Keys <skeys@ipdatasys.com>
|
||
|
||
* Makefile.in, configure: regenerate
|
||
* disassemble.c (disassembler): Recognize ARCH_XGATE.
|
||
* xgate-dis.c (read_memory, print_insn, print_insn_xgate):
|
||
New functions.
|
||
* configure.in: Recognize xgate.
|
||
* xgate-dis.c, xgate-opc.c: New files for support of xgate
|
||
* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
|
||
and opcode generation for xgate.
|
||
|
||
2012-04-30 DJ Delorie <dj@redhat.com>
|
||
|
||
* rx-decode.opc (MOV): Do not sign-extend immediates which are
|
||
already the maximum bit size.
|
||
* rx-decode.c: Regenerate.
|
||
|
||
2012-04-27 David S. Miller <davem@davemloft.net>
|
||
|
||
* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
|
||
* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
|
||
|
||
* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
|
||
* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
|
||
|
||
* sparc-opc.c (CBCOND): New define.
|
||
(CBCOND_XCC): Likewise.
|
||
(cbcond): New helper macro.
|
||
(sparc_opcodes): Add compare-and-branch instructions.
|
||
|
||
* sparc-dis.c (print_insn_sparc): Handle ')'.
|
||
* sparc-opc.c (sparc_opcodes): Add crypto instructions.
|
||
|
||
* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
|
||
into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
|
||
|
||
2012-04-12 David S. Miller <davem@davemloft.net>
|
||
|
||
* sparc-dis.c (X_DISP10): Define.
|
||
(print_insn_sparc): Handle '='.
|
||
|
||
2012-04-01 Mike Frysinger <vapier@gentoo.org>
|
||
|
||
* bfin-dis.c (fmtconst): Replace decimal handling with a single
|
||
sprintf call and the '*' field width.
|
||
|
||
2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
|
||
|
||
* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
|
||
|
||
2012-03-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
|
||
(powerpc_opcd_indices): Bump array size.
|
||
(disassemble_init_powerpc): Set powerpc_opcd_indices entries
|
||
corresponding to unused opcodes to following entry.
|
||
(lookup_powerpc): New function, extracted and optimised from..
|
||
(print_insn_powerpc): ..here.
|
||
|
||
2012-03-15 Alan Modra <amodra@gmail.com>
|
||
James Lemke <jwlemke@codesourcery.com>
|
||
|
||
* disassemble.c (disassemble_init_for_target): Handle ppc init.
|
||
* ppc-dis.c (private): New var.
|
||
(powerpc_init_dialect): Don't return calloc failure, instead use
|
||
private.
|
||
(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
|
||
(powerpc_opcd_indices): New array.
|
||
(disassemble_init_powerpc): New function.
|
||
(print_insn_big_powerpc): Don't init dialect here.
|
||
(print_insn_little_powerpc): Likewise.
|
||
(print_insn_powerpc): Start search using powerpc_opcd_indices.
|
||
|
||
2012-03-10 Edmar Wienskoski <edmar@freescale.com>
|
||
|
||
* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
|
||
* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
|
||
(PPCVEC2, PPCTMR, E6500): New short names.
|
||
(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
|
||
mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
|
||
lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
|
||
lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
|
||
lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
|
||
optional operands on sync instruction for E6500 target.
|
||
|
||
2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
|
||
|
||
* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
|
||
|
||
2012-02-27 Alan Modra <amodra@gmail.com>
|
||
|
||
* mt-dis.c: Regenerate.
|
||
|
||
2012-02-27 Alan Modra <amodra@gmail.com>
|
||
|
||
* v850-opc.c (extract_v8): Rearrange to make it obvious this
|
||
is the inverse of corresponding insert function.
|
||
(extract_d22, extract_u9, extract_r4): Likewise.
|
||
(extract_d9): Correct sign extension.
|
||
(extract_d16_15): Don't assume "long" is 32 bits, and don't
|
||
rely on implementation defined behaviour for shift right of
|
||
signed types.
|
||
(extract_d16_16, extract_d17_16, extract_i9): Likewise.
|
||
(extract_d23): Likewise, and correct mask.
|
||
|
||
2012-02-27 Alan Modra <amodra@gmail.com>
|
||
|
||
* crx-dis.c (print_arg): Mask constant to 32 bits.
|
||
* crx-opc.c (cst4_map): Use int array.
|
||
|
||
2012-02-27 Alan Modra <amodra@gmail.com>
|
||
|
||
* arc-dis.c (BITS): Don't use shifts to mask off bits.
|
||
(FIELDD): Sign extend with xor,sub.
|
||
|
||
2012-02-25 Walter Lee <walt@tilera.com>
|
||
|
||
* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
|
||
* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
|
||
TILEPRO_OPC_LW_TLS_SN.
|
||
|
||
2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* i386-opc.h (HLEPrefixNone): New.
|
||
(HLEPrefixLock): Likewise.
|
||
(HLEPrefixAny): Likewise.
|
||
(HLEPrefixRelease): Likewise.
|
||
|
||
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* i386-dis.c (HLE_Fixup1): New.
|
||
(HLE_Fixup2): Likewise.
|
||
(HLE_Fixup3): Likewise.
|
||
(Ebh1): Likewise.
|
||
(Evh1): Likewise.
|
||
(Ebh2): Likewise.
|
||
(Evh2): Likewise.
|
||
(Ebh3): Likewise.
|
||
(Evh3): Likewise.
|
||
(MOD_C6_REG_7): Likewise.
|
||
(MOD_C7_REG_7): Likewise.
|
||
(RM_C6_REG_7): Likewise.
|
||
(RM_C7_REG_7): Likewise.
|
||
(XACQUIRE_PREFIX): Likewise.
|
||
(XRELEASE_PREFIX): Likewise.
|
||
(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
|
||
cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
|
||
Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
|
||
(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
|
||
not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
|
||
MOD_C6_REG_7 and MOD_C7_REG_7.
|
||
(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
|
||
(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
|
||
xtest.
|
||
(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
|
||
(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
|
||
|
||
* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
|
||
CPU_RTM_FLAGS.
|
||
(cpu_flags): Add CpuHLE and CpuRTM.
|
||
(opcode_modifiers): Add HLEPrefixOk.
|
||
|
||
* i386-opc.h (CpuHLE): New.
|
||
(CpuRTM): Likewise.
|
||
(HLEPrefixOk): Likewise.
|
||
(i386_cpu_flags): Add cpuhle and cpurtm.
|
||
(i386_opcode_modifier): Add hleprefixok.
|
||
|
||
* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
|
||
add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
|
||
sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
|
||
operand. Add xacquire, xrelease, xabort, xbegin, xend and
|
||
xtest.
|
||
* i386-init.h: Regenerated.
|
||
* i386-tbl.h: Likewise.
|
||
|
||
2012-01-24 DJ Delorie <dj@redhat.com>
|
||
|
||
* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
|
||
* rl78-decode.c: Regenerate.
|
||
|
||
2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
|
||
|
||
PR binutils/10173
|
||
* cr16-dis.c (print_arg): Test symtab_size not num_symbols.
|
||
|
||
2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
|
||
|
||
* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
|
||
register and move them after pmove with PSR/PCSR register.
|
||
|
||
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* i386-dis.c (mod_table): Add vmfunc.
|
||
|
||
* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
|
||
(cpu_flags): CpuVMFUNC.
|
||
|
||
* i386-opc.h (CpuVMFUNC): New.
|
||
(i386_cpu_flags): Add cpuvmfunc.
|
||
|
||
* i386-opc.tbl: Add vmfunc.
|
||
* i386-init.h: Regenerated.
|
||
* i386-tbl.h: Likewise.
|
||
|
||
For older changes see ChangeLog-2011
|
||
|
||
Local Variables:
|
||
mode: change-log
|
||
left-margin: 8
|
||
fill-column: 74
|
||
version-control: never
|
||
End:
|