old-cross-binutils/sim/txvu
Andrew Cagney 64ed8b6a8c aclocal.m4: Don't enable inlining when cross-compiling.
mips/*: Tune mips simulator - allow all memory transfer code to be inlined.
1998-04-05 07:16:54 +00:00
..
.Sanitize massive sanitization fixes 1998-03-13 13:09:32 +00:00
ChangeLog Cleanup INLINE support for simulators using common framework. 1998-04-04 12:33:11 +00:00
config.in
configure aclocal.m4: Don't enable inlining when cross-compiling. 1998-04-05 07:16:54 +00:00
configure.in
device.c
device.h
dma.c
dma.h - added first batch of PKE code 1998-01-23 00:38:10 +00:00
engine-sky.c * Devices now get a issue() call. 1998-01-20 19:22:25 +00:00
gencode.c
gpuif.c
gpuif.h
hardware.c * Very, very early support for vu1 based on sce code. 1998-01-28 02:04:32 +00:00
hardware.h * Devices now get a issue() call. 1998-01-20 19:22:25 +00:00
interp.c Allow more than just read, write and exec memory spaces in the core 1998-03-11 12:18:39 +00:00
libvpe.c * Very, very early support for vu1 based on sce code. 1998-01-28 02:04:32 +00:00
libvpe.h * Very, very early support for vu1 based on sce code. 1998-01-28 02:04:32 +00:00
m16.igen
Makefile.in * Very, very early support for vu1 based on sce code. 1998-01-28 02:04:32 +00:00
mdmx.igen
mips.dc
mips.igen
pke.c - added first batch of PKE code 1998-01-23 00:38:10 +00:00
pke.h - added first batch of PKE code 1998-01-23 00:38:10 +00:00
r5900.igen
README.Cygnus
sim-main.h * Incorporate GPR_SET() macro from mips/sim-main.h 1998-01-22 20:48:22 +00:00
tconfig.in
vpe.h * Very, very early support for vu1 based on sce code. 1998-01-28 02:04:32 +00:00
vr5400.igen
vu.h * Very, very early support for vu1 based on sce code. 1998-01-28 02:04:32 +00:00
vu0.c * Devices now get a issue() call. 1998-01-20 19:22:25 +00:00
vu0.h * Devices now get a issue() call. 1998-01-20 19:22:25 +00:00
vu1.c * Very, very early support for vu1 based on sce code. 1998-01-28 02:04:32 +00:00
vu1.h * Very, very early support for vu1 based on sce code. 1998-01-28 02:04:32 +00:00

> README.Cygnus
-------------------------------------------------------------------------------

The following are the main reasons for constructing the simulator as a
generator:

1) Avoid large fixed decode source file, with lots of #ifs controlling
   the compilation. i.e. keep the source cleaner, smaller and easier
   to parse.

2) Allow optimum code to be created, without run-time checks on
   instruction types. Ensure that the simulator engine only includes
   code for the architecture being targetted. e.g. This avoids
   run-time checks on ISA conformance, aswell as increasing
   throughput.

3) Allow updates to the instruction sets to be added quickly. Having a
   table means that the information is together, and is easier to
   manipulate. Having the table generate the engine, rather than the
   run-time parse the table gives higher performance at simulation
   time.

4) Keep all the similar simulation code together. i.e. have a single
   place where, for example, the addition code is held. This ensures that
   updates to the simulation are not spread over a large flat source
   file maintained by the developer.

-------------------------------------------------------------------------------

To keep the simulator simple (and to avoid the slight chance of
mis-matched files) the manifests describing an engine, and the
simulator engine itself, are held in the same source file.

This means that the engine must be included twice, with the first pass
controlled by the SIM_MANIFESTS definition.

-------------------------------------------------------------------------------
> EOF README.Cygnus