Commit graph

549 commits

Author SHA1 Message Date
Alan Modra
fcfd491608 Missed this in last commit "Linux target variants for elfxx-hppa." 2001-01-15 02:36:21 +00:00
Kazu Hirata
19203624a6 2001-01-14 Kazu Hirata <kazu@hxi.com>
* config/tc-arc.c: Fix formatting.
2001-01-15 01:37:20 +00:00
Kazu Hirata
1e07b820d1 2001-01-14 Kazu Hirata <kazu@hxi.com>
* config/tc-arc.c: Fix formatting.
2001-01-14 20:36:41 +00:00
Kazu Hirata
bfb32b5207 2001-01-14 Kazu Hirata <kazu@hxi.com>
* config/tc-alpha.c: Fix formatting.
	* config/tc-arc.c: Likewise.
	* config/tc-arc.h: Likewise.
	* config/tc-d10v.c: Likewise.
	* config/tc-i370.c: Likewise.
	* config/tc-i386.c: Likewise.
	* config/tc-i960.c: Likewise.
	* config/tc-m68k.c: Likewise.
	* config/tc-ppc.c: Likewise.
	* config/tc-sparc.c: Likewise.
	* config/tc-tahoe.c: Likewise.
	* config/tc-vax.c: Likewise.
2001-01-14 18:54:06 +00:00
Alan Modra
c46b75158b Use SEGREL32 relocs for elf32-hppa unwind. 2001-01-14 07:03:49 +00:00
Alan Modra
1328dc9844 Adds assembly and dis-assembly support for the HPPA wide
mode, 16 bit forms of ldi, ldo, ldw and stw instructions.
2001-01-14 05:14:45 +00:00
Jan Hubicka
b9d79e0379 * tc-i386.h (TARGET_MACH): New macro.
(i386_mach): Declare.
	* tc-i386.c (i386_mach): New function.
2001-01-13 23:37:57 +00:00
Jan Hubicka
e2914f484e * i386.c (md_assemble): Check cpu_flags even for nullary instructions.
* i386.h (i386_optab): Fix pusha and ret templates.

	* i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret
	templates.
2001-01-13 09:05:55 +00:00
Alan Modra
6e0b89ee6c Cure recent x86 warts. 2001-01-12 03:34:49 +00:00
Nick Clifton
0d2bcfafbf Updated ARC assembler from arccores.com 2001-01-11 21:20:20 +00:00
Stephane Carrez
8805103910 Fix gas 68HC12 indexed addressing code generation 2001-01-11 20:19:17 +00:00
Stephane Carrez
d8273f3bf3 Fix weak symbols for 68HC11 as 2001-01-11 19:42:47 +00:00
Andreas Jaeger
eea2ad4501 * config/tc-i386.h (TC_RELOC_GLOBAL_OFFSET_TABLE): Removed, it's
not used anywhere.
2001-01-11 11:38:24 +00:00
Nick Clifton
7a91e76ad1 Allow ADRL relocs to be adjusted in arm-coff 2001-01-11 01:40:18 +00:00
Andreas Jaeger
b77a7acd1b 2001-01-08 Bo Thorsen <bo@suse.de>
* config/tc-i386.c (i386_immediate, i386_displacement):
        GOTPCREL check fix.
2001-01-08 09:37:43 +00:00
Jan Hubicka
b96d3a207a * configure.in: Define DEFAULT_ARCH for i386.
* tc-i386.c (md_assemble): Return after the error message;
	move testing for 64bit operands to proper place.

	* i386.exp: Add tests for presence of 32bit versus 64bit output
	format; run both 64bit and 32bit tests when format is available;
	add x86_64 test.
	* x86_64.s: New file.
	* x86_64.d: New file.
2001-01-06 12:36:04 +00:00
Jan Hubicka
7bc70a8e57 * tc-i386.c (md_assemble): Handle third byte of the opcode as prefix.
* i386.h (i386_optab): Make [sml]fence template to use immext field.
2001-01-05 12:30:12 +00:00
Jan Hubicka
a167610dd0 * tc-i386.c (cpu_arch): Add Pentium4 and modify sledgehammer entry.
* NEWS: Add note about Pentium4 support.
2001-01-04 21:27:56 +00:00
Jan Hubicka
09f131f2b6 * tc-i387.c (pi, pte, pt): Update.
(type_names): Add new types.
2001-01-03 16:27:41 +00:00
Jan Hubicka
6f8c0c4ccc * tc-i386.h (CpuK6, CpuAthlon, CpuSledgehammer, CpuMMX, Cpu3dnow,
CpuUnknown): Renumber
	(CpuP4, CpuSSE2): New.
	(CpuUnknownFlags): Add CpuP4 and CpuSSE2

	* i386.h (i386_optab): Fix 64bit pushf template; Add instructions
	introduced by Pentium4
2001-01-03 15:36:26 +00:00
Phil Blundell
b96ed59a57 2001-01-03 Philip Blundell <pb@futuretv.com>
* config/tc-alpha.c (alpha_force_relocation): Handle vtable
	relocs.
	(alpha_fix_adjustable): Likewise.
	(md_apply_fix): Likewise.
2001-01-03 10:03:46 +00:00
Richard Henderson
0a9ef43907 * as.h (rs_align_test): New.
* frags.c (NOP_OPCODE): Move default from read.c.
	(MAX_MEM_FOR_RS_ALIGN_CODE): New default.
	(frag_align_code): New.
	* frags.h (frag_align_code): Declare.
	* read.c (NOP_OPCODE): Remove.
	(do_align): Use frag_align_code.
	* write.c (NOP_OPCODE): Remove.
	(get_recorded_alignment): New.
	(cvt_frag_to_fill): Handle rs_align_test.
	(relax_segment): Likewise.
	(subsegs_finish): Align last subseg in section to the
	section alignment.  Use frag_align_code.
	* write.h (get_recorded_alignment): Declare.
	* config/obj-coff.c (size_section): Handle rs_align_test.
	(fill_section, fixup_mdeps): Likewise.
	(write_object_file): Use frag_align_code.

	* config/tc-alpha.c (alpha_align): Use frag_align_code.
	(alpha_handle_align): New.
	* config/tc-alpha.h (HANDLE_ALIGN): New.
	(MAX_MEM_FOR_RS_ALIGN_CODE): New.

	* config/tc-i386.h (md_do_align): Use frag_align_code.
	(MAX_MEM_FOR_RS_ALIGN_CODE): New.

	* config/tc-ia64.c (ia64_md_do_align): Don't do code alignment.
	(ia64_handle_align): New.
	* config/tc-ia64.h (HANDLE_ALIGN): New.
	(MAX_MEM_FOR_RS_ALIGN_CODE): New.

	* config/tc-m32r.c (m32r_do_align): Remove.
	(m32r_handle_align): New.
	(fill_insn): Use frag_align_code.
	* config/tc-m32r.h (md_do_align): Remove.
	(HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): New.
	* config/tc-m88k.c, config/tc-m88k.h: Similarly.
	* config/tc-mips.c, config/tc-mips.h: Similarly.

	* config/tc-sh.c (sh_cons_align): Use rs_align_test.
	(sh_handle_align): Likewise.  Handle rs_align_code.
	(sh_do_align): Remove.
	* config/tc-sh.h (md_do_align): Remove.
	(MAX_MEM_FOR_RS_ALIGN_CODE): New.

	* config/tc-sparc.c (sparc_cons_align): Use rs_align_test.
	(sparc_handle_align): Likewise.  Handle rs_align_code.
	* config/tc-sparc.h (md_do_align): Remove.
	(MAX_MEM_FOR_RS_ALIGN_CODE): New.
2000-12-28 10:07:56 +00:00
DJ Delorie
3cd4dda73e * config/tc-d10v.c (md_assemble): set prev_seg and prev_subseg
when we assemble the first half of a pair.
2000-12-22 22:06:32 +00:00
H.J. Lu
ec56dfb4b0 2000-12-22 H.J. Lu <hjl@gnu.org>
* config/tc-i386.c (reloc): Update the macro for non-bfd
	assembler.
	(BFD_RELOC_X86_64_GOTPCREL): Set to 0 for non-bfd assembler.
2000-12-22 20:53:35 +00:00
Jan Hubicka
3e73aa7c95 * tc-i386.h (i386_target_format): Define even for ELFs.
(QWORD_MNEM_SUFFIX): New macro.
	(CpuK6,CpuAthlon,CpuSledgehammer, Cpu64, CpuNo64, CpuUnknownFlags):
	New macros
	(CpuMMX,CpuSSE,Cpu3dnow, CpuUnknown): Renumber.
	(IgnoreSize, DefaultSize, No_?Suf, FWait, IsString, regKludge, IsPrefix,
	ImmExt): Renumber.
	(Size64, No_qSuf, NoRex64, Rex64): New macros.
	(Reg64, Imm32S, Imm64, Disp32S, Disp64): New macros.
	(Imm8, Imm8S, Imm16, Imm32, Imm1, BaseIndex, Disp8, Disp16, Disp32,
	InOutPortReg,ShiftCount, Control, Debug, Test, FloatReg, FloatAcc,
	SReg2, SReg3, Acc, JumpAbsolute, RegMMX, RegXMM, EsSeg, InvMem): Renumber.
	(Reg, WordReg): Add Reg64.
	(Imm): Add Imm32S and Imm64.
	(EncImm): New.
	(Disp): Add Disp64 and Disp32S.
	(AnyMem): Add Disp32S.
	(RegRex, RegRex64): New macros.
	(rex_byte): New type.
	* tc-i386.c (set_16bit_code_flag): Kill.
	(fits_in_unsigned_long, fits_in_signed_long): New functions.
	(reloc): New parameter "signed"; support x86_64.
	(set_code_flag): New.
	(DEFAULT_ARCH): New macro; default to "i386".
	(default_arch): New static variable.
	(struct _i386_insn): New fields Operand_PCrel; rex.
	(flag_16bit_code): Kill; All tests replaced to "flag_code == CODE_64BIT";
	(flag_code): New enum and static variable.
	(use_rela_relocations): New static variable.
	(flag_code_names): New static variable.
	(cpu_arch_flags): Default to CpuUnknownFlags|CpuNo64.
	(cpu_arch): Add "sledgehammer"; Add CPUAthlon to Athlon and CpuK6 to
	K6 and Athlon.
	(i386_align_code): Return plain "nop" for x86_64.
	(mode_from_disp_size): Support Disp32S.
	(smallest_imm_type): Support Imm32S and Imm64.
	(offset_in_range): Support size of 8.
	(set_cpu_arch): Do not clobber to Cpu64/CpuNo64.
	(md_pseudo_table): Add "code64"; use set_code_flat.
	(md_begin): Emit sane error message on hash failure.
	(tc_i386_fix_adjustable): Support x86_64 relocations.
	(md_assemble): Support QWORD_MNEM_SUFFIX, REX registers,
	instructions supported on particular arch just partially,
	output of 64bit immediates, handling of Imm32S and Disp32S type.
	(i386_immedaite): Support x86_64 relocations; support 64bit constants.
	(i386_displacement): Likewise.
	(i386_index_check): Cleanup; support 64bit addresses.
	(md_apply_fix3): Support x86_64 relocation and rela.
	(md_longopts): Add "32" and "64".
	(md_parse_option): Add OPTION_32 and OPTION_64.
	(i386_target_format): Call even for ELFs; choose between
	elf64-x86-64 and elf32-i386.
	(i386_validate_fix): Refuse GOTOFF in 64bit mode.
	(tc_gen_reloc): Support rela relocations and x86_64.
	(intel_e09_1): Support QWORD.

	* i386.h (i386_optab): Replace "Imm" with "EncImm".
	(i386_regtab): Add flags field.
2000-12-20 13:24:13 +00:00
Diego Novillo
21d6c4af5d 2000-12-15 Diego Novillo <dnovillo@redhat.com>
* config/tc-i386.c (intel_e09_1): Only flag as a memory operand if
	it's not an offset expression.
	(intel_e10_1): Ditto. Also, if the operand is an offset expression,
	keep the braces '[' and ']' in the output string.
	(intel_e11): Ditto. Also remove comparison intel_parser.op_modifier
	!= FLAT. There is no such op_modifier.
2000-12-16 05:45:08 +00:00
Alan Modra
0485cba3d3 Rodney Brown's CHECK_FIELD typo fixes. 2000-12-13 06:23:56 +00:00
Jim Wilson
514829c3af Eliminate ia64 compiler warnings. Fix ia64 gas testsuite again.
*  elfxx-ia64.c (get_dyn_sym_info): Cast %p argument to void *.
	* config/tc-ia64.h (ia64_init): Add prototype.
	* gas/ia64/dv-imply.d, gas/ia64/dv-mutex.d, gas/ia64/dv-safe.d,
	gas/ia64/dv-srlz.d, gas/ia64/opc-m.d: Update.
	* ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
	argument.
	* ia64_gen.c (insert_deplist): Cast sizeof result to int.
	(print_dependency_table): Print NULL if semantics field not set.
	(insert_opcode_dependencies): Mark cmp parameter as unused.
	(print_main_table): Use fprintf_vma to print long long fields.
	(main): Mark argv paramter as unused.  Convert to old style definition.
	* ia64-opc.c (ia64_find_dependency): Cast sizeof result to int.
	* ia64-asmtab.c: Regnerate.
2000-12-12 22:56:36 +00:00
Geoffrey Keating
8141c27d66 * config/obj-bout.c (obj_crawl_symbol_chain): Don't take
the address of a function result.
2000-12-12 20:48:45 +00:00
Geoffrey Keating
5d6f4f1679 2000-12-12 Franz Sirl <Franz.Sirl-kernel@lauterbach.com>
* config/tc-ppc.c (md_pseudo_table): Add .file and .loc.
	(md_assemble): Call dwarf2_emit_insn.
	(shlib): Fix typo SHILB -> SHLIB.
	(md_parse_option): Likewise.
	(ppc_elf_validate_fix): Likewise:
	* config/tc-ppc.h (DWARF2_LINE_MIN_INSN_LENGTH): New.
2000-12-12 20:05:16 +00:00
Nick Clifton
e972090a04 Fix formatting 2000-12-12 19:29:24 +00:00
Jan Hubicka
f16b83dfe5 * tc-i386.c (md_assemble): Refuse 's' and 'l' suffixes in the intel
mode; convert 'd' suffix to 's' or 'l'; remove all DWORD_MNEM_SUFFIX
	references.
	(intel_e09_1): Convert QWORD to 'l' suffix for FP operations; refuse
	otherwise.
	* tc-i386.h (DWORD_MNEM_SUFFIX): Kill.
	(No_dSuf): Kill.

	* i386.h (*_Suf): Remove No_dSuf.
	(d_suf, wld_Suf,sld_Suf, sldx_Suf, bwld_Suf, d_FP, sld_FP, sldx_FP)
	Remove.
	(i386_optab): Remove 'd' in the suffixes.
2000-12-11 14:01:46 +00:00
Alan Modra
50705ef487 Fix T_SHORT macro conflict. 2000-12-06 02:40:55 +00:00
Kazu Hirata
beae10d5eb 2000-12-05 Kazu Hirata <kazu@hxi.com>
* config/tc-mips.c: Fix formatting.
2000-12-05 18:51:08 +00:00
Nick Clifton
bccba5f08c Add outputting_stabs_line_debug varaible and D10v code to use it 2000-12-05 00:56:09 +00:00
Kazu Hirata
bc80588841 2000-12-03 Kazu Hirata <kazu@hxi.com>
* tc-a29k.c: Fix formatting.
	* tc-alpha.c: Likewise.
	* tc-arm.c: Likewise.
	* tc-cris.c: Likewise.
	* tc-hppa.c: Likewise.
	* tc-i370.c: Likewise.
	* tc-i386.c: Likewise.
	* tc-i860.c: Likewise.
	* tc-i960.c: Likewise.
	* tc-ia64.c: Likewise.
	* tc-m68hc11.c: Likewise.
	* tc-m68k.c: Likewise.
	* tc-m88k.c: Likewise.
	* tc-pj.c: Likewise.
	* tc-ppc.c: Likewise.
	* tc-sh.c: Likewise.
	* tc-sparc.c: Likewise.
	* tc-tahoe.c: Likewise.
	* tc-vax.c: Likewise.
2000-12-03 06:49:23 +00:00
Nick Clifton
c6c98b3833 Add MIPS SB1 machine 2000-12-02 01:10:33 +00:00
Nick Clifton
84ea6cf2c5 Add MIPS V and MIPS 64 machine numbers 2000-12-02 00:55:22 +00:00
Nick Clifton
e7af610e14 Add MIPS32 as a seperate MIPS architecture 2000-12-01 21:35:38 +00:00
Nick Clifton
4372b67322 Improve MIPS32 support 2000-12-01 20:05:32 +00:00
Nick Clifton
3dacdf2eb1 When calculating offsets, don't accept as constant the difference between the
addresses of symbols in two different sections.
2000-12-01 19:06:15 +00:00
Phil Blundell
4ce3447c16 2000-11-30 Philip Blundell <pb@futuretv.com>
* config/obj-coff.c (obj_coff_weak): Use S_SET_WEAK if it exists,
	even in non BFD_ASSEMBLER case.
2000-12-01 17:11:57 +00:00
Diego Novillo
76a0ddacc0 2000-11-30 Diego Novillo <dnovillo@redhat.com>
* tc-i386.c (md_assemble): Swap i.disp_relocs when using intel
	syntax.

2000-11-30  Diego Novillo  <dnovillo@redhat.com>

	* intel.s, intel.d: New test for @GOT references.
2000-12-01 03:08:32 +00:00
Hans-Peter Nilsson
e46fee7099 (parse_reg): Parse names case-insensitively. 2000-11-28 23:53:51 +00:00
Hans-Peter Nilsson
dda5ecfc74 (sh_elf_cons): Cast *input_line_pointer to unsigned char when
indexing is_end_of_line[].
	(md_assemble): Initialize size to 0.
	(md_section_align): Mark parameter seg as unused.
2000-11-28 23:48:44 +00:00
Hans-Peter Nilsson
99b222b479 * config/tc-sh.c (md_convert_frag) <undefined symbol, conditional
jump>: Use as_bad_where	instead of as_bad.  Tweak error message
	accordingly.  Stabilize frag by updating fix part and resetting
	variant part.
	<undefined symbol, unconditional jump>: Ditto.
2000-11-28 23:33:45 +00:00
Kazu Hirata
814f664127 2000-11-27 Kazu Hirata <kazu@hxi.com>
* config/obj-aout.h: Fix formatting.
	* config/obj-bout.h: Likewise.
	* config/obj-coff.c: Likewise.
	* config/obj-coff.h: Likewise.
	* config/obj-elf.h: Likewise.
	* config/obj-som.h: Likewise.
	* config/obj-vms.c: Likewise.
	* config/obj-vms.h: Likewise.
	* config/tc-h8300.h: Likewise.
	* config/tc-ns32k.h: Likewise.
	* config/tc-sparc.h: Likewise.
	* config/tc-tic54x.h: Likewise.
	* config/tc-z8k.h: Likewise.
2000-11-28 21:29:02 +00:00
Hans-Peter Nilsson
fcdc20a4d3 * config/tc-cris.c: Include dwarf2dbg.h.
(md_pseudo_table): Add .file and .loc.
	(md_assemble): Call dwarf2_emit_insn if generating ELF.
	(s_cris_file, s_cris_loc): New.
	* config/tc-cris.h (DWARF2_LINE_MIN_INSN_LENGTH): Define.
	* Makefile.am: Regenerate dependencies.
	* Makefile.in: Regenerate.
2000-11-28 15:39:15 +00:00
Stephane Carrez
ae3e85dd27 Fix movw/movb operands for 68HC12 2000-11-26 21:18:15 +00:00
Nick Clifton
077b8428ab Add ARM v5t, v5te and XScale support 2000-11-25 00:21:40 +00:00