if we encounter a positive stack adjustment.
(find_proc_desc): If heuristic_fence_post is non-zero, use
heuristic_proc_start to determine the start of a function before
calling heuristic_proc_desc.
* coffread.c (coff_symtab_read): Change minimal symbol types
for C_LABEL symbols from mst_* to mst_file_*.
* config/m68k/sun3os4.mh (MMALLOC_CFLAGS): Define MMCHECK_FORCE to 1.
* configure.in: Handle error message from sun3 native ld when
configuring HLDFLAGS.
* configure: Regenerated with autoconf.
* c-valprint.c (c_value_print): Adjust value address by VALUE_OFFSET.
* cp-valprint.c (cp_print_value): Prevent gdb crashes by making sure
that the virtual base pointer from an user object still points to
accessible memory.
* dbxread.c (dbx_symfile_init): Initialize sym_stab_info to
clear the recently added header_files fields.
(dbx_symfile_finish): Free hfiles[i].vector to avoid storage leak.
* d10v-sim.h (simops): Add flag is_long.
(State): Add pc_changed. Instructions which update the PC should
use the JMP macro which sets this.
(JMP): New macro. Sets the PC and the pc_changed flag.
* gencode.c (write_opcodes): Add is_long field.
* interp.c (lookup_hash): If we blindly apply a short opcode's mask
to a long opcode we could get a false match. Check the opcode size.
(hash): Add a size field to the hash table.
(sim_open): Initialize size field in hash table.
(sim_resume): Change to logic for setting the PC. Used to increment the
PC if it had not been changed. This didn't allow single-instruction loops.
Now checks the flag State.pc_changed. Also now stops when ^C is received.
(dmem_addr): Fix translation of data segments to unified memory.
(sim_ctrl_c): New function. When ^C is received, set stop_simulator flag.
* simops.c: Changed all branch and jump instructions to use new JMP macro.
(OP_20000000): Corrected trace information to show this is a ldi.l, not
a ldi.s instruction.
* d10v-tdep.c: Fix some problems with inferior function calls.
* config/d10v/tm-d10v.h (EXTRA_FRAME_INFO): Change dummy to be
a pointer to the dummy's stack instead of just a flag.
into call and jmp instructions with 32bit offsets.
Fix typo in bit test patterns.
* gas/mn10300/other.s: Tweak constants to improve
testsuite coverage.
operands are assumed to be 32bits. Use "bits" field to hold the
number of bits in the main instruction word for MN10300_OPERAND_SPLIT.
(mn10300_check_operand): MN10300_OPERAND_SPLIT operands are assumed
to be 32bits.
in MN10300_OPERAND_SPLIT operands for how many bits
appear in the basic insn word. Add IMM32_HIGH24,
IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
(mn10300_opcodes): Use new operands as needed.
Support for everything in the basic instruction manual (yippie!)
operands. Update opcode table as appropriate.
(IMM32): Add MN10300_OPERAND_SPLIT flag.
(mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
Cleaning up a little.
Attempting to insert most 32bit operands.
And a bug found by assembler testsuite.
movbu, movhu instructions. Check bit patterns for more bit
operations. Check bit patterns for various 16bit call, retf
and ret instructions.
* gas/mn10300/other.s: Update operands for better test coverage.
Improving testsuite coverage.
the extension part of the instruction if necessary.
(mn10300_insert_operand): Accept pointer to extension word
argument. Make insn a pointer argument too. Return type
is now void. All callers changed.
So we can correct insert operands into any instruction except those
which have 32bit operands.
operands (for indexed load/stores). Fix bitpos for DI
operand. Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
few instructions that insert immediates/displacements in the
middle of the instruction. Add IMM8E for 8 bit immediate in
the extended part of an instruction.
(mn10300_operands): Use new opcodes as appropriate.
Opcode table changes so we can correctly insert everything except
32bit operands.
a data/address register that appears in register field 0
and register field 1.
(mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN
Hacking Matsushita again. Yippie!
missing or zero-sized .text sections properly.
* mdebugread.c: Handle scRConst and scSUndefined storage classes.
* stabsread.c (scan_file_globals): Try to resolve symbols
for shared libraries from the minimal symbol table of the main
executable first.
alpha_macro emit field to expect a const argument, and change the
arg field to be const. Fix some spacing to follow the GNU
standard.
Fri Nov 1 10:32:03 1996 Richard Henderson <rth@tamu.edu>
* config/tc-alpha.c (md_parse_option): Add knowledge of 21164pc
(pca56) and 21264 (ev6) cpus.
(md_apply_fix): Private relocation types are now negative.
(alpha_force_relocation): Likewise.
(tc_gen_reloc): Likewise.
(emit_insn): Likewise.
(emit_ldXu): Do the right thing when the hardware can do byte insns.
(emit_stX): Likewise.
(emit_sextX): Likewise.
* alpha.h: Don't include "bfd.h"; private relocation types are now
negative to minimize problems with shared libraries. Organize
instruction subsets by AMASK extensions and PALcode
implementation.
(struct alpha_operand): Move flags slot for better packing.
* alpha-dis.c (print_insn_alpha): Use new NOPAL mask for
standard disassembly.
* alpha-opc.c (alpha_operands): Rearrange flags slot.
(alpha_opcodes): Add new BWX, CIX, and MAX instructions.
Recategorize PALcode instructions.
