Nick Clifton
010916c2e6
Removed v850 sanitization.
1997-09-03 22:19:11 +00:00
Nick Clifton
1f302a3bd9
Removed use of V850_OPERNAD_ADJUST_SHORT_MEMORY.
...
Fixed several operand patterns.
1997-09-02 22:40:39 +00:00
Nick Clifton
33e2f5278c
Made immediate parameter of MOVHI be unsigned
1997-08-26 16:40:28 +00:00
Nick Clifton
d87a154282
Updated from specs in HDD-tool-0611 document.
1997-08-22 17:35:24 +00:00
Nick Clifton
0c51939934
Moved divh opcodes next to each other.
1997-08-21 18:09:20 +00:00
Michael Meissner
0068e79cc5
Set V850_OPERAND_ADJUST_SHORT_MEMORY flag on sst.{h,w}/sld.{h,w} instructions
1996-12-31 20:11:39 +00:00
Jeff Law
244558e354
* v850-opc.c (D9_RELAX): Renamed from D9, all references
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changed.
(v850_operands): Make sure D22 immediately follows D9_RELAX.
1996-10-29 19:25:35 +00:00
Jeff Law
0f02ae6e5a
* v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for
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"bCC"instructions).
Because quantum's code uses jnz, jcc, etc etc etc.
1996-10-24 23:55:11 +00:00
Jeff Law
072b27ea5e
Add missing copyright.
1996-10-03 04:48:16 +00:00
Jeff Law
09478dc331
* v850-dis.c (disassemble): Handle insertion of ',', '[' and
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']' characters into the output stream.
* v850-opc.c (v850_opcodes: Remove size field from all opcodes.
Add "memop" field to all opcodes (for the disassembler).
Reorder opcodes so that "nop" comes before "mov" and "jr"
comes before "jarl".
Should give us a functional disassembler.
1996-08-31 22:00:45 +00:00
Jeff Law
502535cff7
* v850-dis.c (v850_reg_names): Define.
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(v850_sreg_names, v850_cc_names): Likewise.
(disassemble): Very rough cut at printing operands (unformatted).
One step at a time.
* v850-opc.c (BOP_MASK): Fix.
(v850_opcodes): Fix mask for jarl and jr.
Bugs exposed by disassembler testing.
1996-08-31 20:56:05 +00:00
Jeff Law
b219416478
* v850-opc.c (insert_d8_7, extract_d8_7): New functions.
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(insert_d8_6, extract_d8_6): New functions.
(v850_operands): Rename D7S to D7; operand for D7 is unsigned.
Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
Add D8_6.
(IF4A, IF4B): Use "D7" instead of "D7S".
(IF4C, IF4D): Use "D8_7" instead of "D8".
(IF4E, IF4F): New. Use "D8_6".
(v850_opcodes): Use IF4A/IF4B for sld.b/sst.b. Use IF4C/IF4D for
sld.h/sst.h. Use IF4E/IF4F for sld.w/sst.w.
So we can assemble sst/sld instructions correctly.
1996-08-31 18:23:02 +00:00
Jeff Law
c6b9c13532
* v850-opc.c (insert_d16_15, extract_d16_15): New functions.
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(v850_operands): Change D16 to D16_15, use special insert/extract
routines. New new D16 that uses the generic insert/extract code.
(IF7A, IF7B): Use D16_15.
(IF7C, IF7D): New. Use D16.
(v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
1996-08-31 17:43:28 +00:00
Jeff Law
fb8c25a3e4
* v850-opc.c (insert_d9, insert_d22): Slightly improve error
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message. Issue an error if the branch offset is odd.
1996-08-31 17:23:49 +00:00
Jeff Law
69ae4b82dc
* v850-opc.c: Add notes about needing special insert/extract
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for all the load/store insns, except "ld.b" and "st.b".
So we don't forget!
1996-08-31 07:32:01 +00:00
Jeff Law
574b9cb3d3
* v850-opc.c (insert_d22, extract_d22): New functions.
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(v850_operands): Use insert_d22 and extract_d22 for
D22 operands.
(insert_d9): Fix range check.
1996-08-31 07:28:22 +00:00
J.T. Conklin
d44b697b78
* v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
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and set bits field to D9 and D22 operands.
1996-08-31 01:04:39 +00:00
Jeff Law
e9ebb36451
* v850-opc.c (v850_operands): Define SR2 operand.
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(v850_opcodes): "ldsr" uses R1,SR2.
ldsr is kinda weird.
1996-08-30 19:44:42 +00:00
Jeff Law
e7f3e5fbbf
* v850-opc.c (v850_opcodes): Fix opcode specs for
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sld.w, sst.b, sst.h, sst.w, and nop.
1996-08-29 17:11:13 +00:00
Jeff Law
e7dd77751d
* v850-opc.c (v850_opcodes): Add null opcode to mark the
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end of the opcode table.
For the simulator
1996-08-28 21:56:03 +00:00
Jeff Law
d3edb57f12
* v850-opc.c (v850_operands): Define EP operand.
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(IF4A, IF4B, IF4C, IF4D): Use EP.
1996-08-23 20:55:15 +00:00
Jeff Law
18c97701b4
* v850-opc.c (v850_opcodes): Fix opcode numbers for "mov"
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with immediate operand, "movhi". Tweak "ldsr".
More fixes.
1996-08-23 20:27:25 +00:00
Jeff Law
fb6da8680e
* v850-opc.c (v850_opcodes): Get ld.[bhw] and st.[bhw]
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correct. Get sld.[bhw] and sst.[bhw] closer.
1996-08-23 19:32:41 +00:00
Jeff Law
38c7a4504d
* v850-opc.c (v850_operands): "not" is a two byte insn.
1996-08-23 19:12:05 +00:00
Jeff Law
6c1fc4d3fa
* v850-opc.c (v850_opcodes): Correct bit pattern for setf.
1996-08-23 18:58:57 +00:00
Jeff Law
9ab069eadc
* v850-opc.c (v850_operands): D16 inserts at offset 16!
1996-08-23 18:27:43 +00:00
Jeff Law
b1e897a97d
* v850-opc.c (two): Get order of words correct.
1996-08-23 18:17:31 +00:00
Jeff Law
9ad8ddf1bd
* v850-opc.c (v850_operands): I16 inserts at offset 16!
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Should get immediate 16bit operands into the right place
1996-08-23 17:52:00 +00:00
Jeff Law
e41c99bd11
* v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
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register source and destination operands.
(v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
More parsing fixes.
1996-08-23 17:35:11 +00:00
Jeff Law
c262d7d8f4
* v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix
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same thinko in "trap" opcode.
1996-08-23 17:09:28 +00:00
Jeff Law
85b5201342
* v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode.
1996-08-23 17:07:21 +00:00
Jeff Law
280d40df39
* v850-opc.c (v850_opcodes): Add initializer for size field
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on all opcodes.
1996-08-23 16:40:15 +00:00
Jeff Law
4be84c4951
* v850-opc.c (v850_operands): D6 -> DS7. References changed.
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Add D8 for 8-bit unsigned field in short load/store insns.
(IF4A, IF4D): These both need two registers.
(IF4C, IF4D): Define. Use 8-bit unsigned field.
(v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use
IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand
for "ldsr" and "stsr".
* v850-opc.c (v850_operands): 3-bit immediate for bit insns
is unsigned.
Fixing up the parser again.
1996-08-23 15:41:30 +00:00
Jeff Law
3c72ab7035
* v850-opc.c (v850_operansd): 3-bit immediate for bit insns
...
is unsigned.
1996-08-23 06:56:44 +00:00
J.T. Conklin
dbc6a8f6b3
Add V850_OPERAND_SIGNED flag as appropriate, create new unsigned IMM5 operand
1996-08-23 06:29:55 +00:00
Jeff Law
cc6e50b5b2
* v850-opc.c (v850_opcodes): Correct short store half (sst.h) and
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short store word (sst.w).
1996-08-23 06:27:37 +00:00
J.T. Conklin
4f23511029
start writing functions for extracting and inserting unusual operands
1996-08-23 02:35:16 +00:00
J.T. Conklin
69463cbb2b
* v850-opc.c (v850_operands): Added insert and extract fields,
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pointers to functions that handle unusual operand encodings.
1996-08-23 00:00:18 +00:00
Jeff Law
9c201b1fab
* v850-opc.c (v850_opcodes): Enable "trap".
1996-08-22 23:08:03 +00:00
Jeff Law
0bdf3144c6
* v850-opc.c (v850_opcodes): Fix order of displacement
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and register for "set1", "clr1", "not1", and "tst1".
1996-08-22 07:06:13 +00:00
J.T. Conklin
088d5b7309
minimal setf support
1996-08-22 06:33:27 +00:00
J.T. Conklin
e89a42c117
Stub in load and store insns. Fix order of jarl operands
1996-08-22 05:29:14 +00:00
Jeff Law
fa6761106f
Arggh. B3. shift counts are from the start of each half-word apparently.
1996-08-22 02:20:08 +00:00
Jeff Law
4cd595fcdd
Fix thinko in B3.
1996-08-22 02:18:07 +00:00
Jeff Law
7c8157dd48
* v850-opc.c (v850_operands): Add "B3" support.
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(v850_opcodes): Fix and enable "set1", "clr1", "not1"
and "tst1".
1996-08-22 02:08:02 +00:00
Jeff Law
fed1d21fc0
* v850-ope.c ("jmp"): R1 is only operand.
1996-08-22 01:39:22 +00:00
Jeff Law
b10e29f4b8
* v850-opc.c: Close unterminated comment.
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Something -Wall caught.
1996-08-22 00:46:47 +00:00
J.T. Conklin
6bc33c7fa5
* v850-opc.c: Add flags field to struct v850_operands, add move
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opcodes to opcode table.
1996-08-22 00:35:28 +00:00
J.T. Conklin
6d1e1ee875
* Makefile.in (ALL_MACHINES): Add v850-opc.o.
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* configure: (bfd_v850v_arch) Add new case.
* configure.in: (bfd_v850_arch) Add new case.
* v850-opc.c: New file.
1996-08-20 21:45:02 +00:00