bfd/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* cpu-ia64-opc.c (ins_cnt6a): New function.
(ext_cnt6a): Ditto.
(ins_strd5b): Ditto.
(ext_strd5b): Ditto.
(elf64_ia64_operands): Add new operand types.
gas/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* config/tc-ia64.c (reg_symbol): Add a new register.
(indirect_reg): Ditto.
(pseudo_func): Add new symbolic constants.
(operand_match): Add new operand types recognition.
(operand_insn): Add new register recognition.
(md_begin): Add new register definition.
(specify_resource): Add new register recognition.
gas/testsuite/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* gas/testsuite/gas/ia64/psn.d: New file.
* gas/testsuite/gas/ia64/psn.s: New file.
* gas/testsuite/gas/ia64/ia64.exp: Add new testcase.
* gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests.
* gas/testsuite/gas/ia64/opc-m.d: Ditto.
include/opcode/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64.h (ia64_opnd): Add new operand types.
opcodes/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64-asmtab.h (completer_index): Extend bitfield to full uint.
* ia64-gen.c: Promote completer index type to longlong.
(irf_operand): Add new register recognition.
(in_iclass_mov_x): Add an entry for the new mov_* instruction type.
(lookup_specifier): Add new resource recognition.
(insert_bit_table_ent): Relax abort condition according to the
changed completer index type.
(print_dis_table): Fix printf format for completer index.
* ia64-ic.tbl: Add a new instruction class.
* ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
* ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
* ia64-opc.h: Define short names for new operand types.
* ia64-raw.tbl: Add new RAW resource for DAHR register.
* ia64-waw.tbl: Add new WAW resource for DAHR register.
* ia64-asmtab.c: Regenerate.
Do not enable -lmcheck by default when Python is enabled with
threading support.
* configure.ac: (python_has_threads) New variable, by testing
if WITH_THREAD is defined in Python.h.
Move --enable-lmcheck after --with-python.
Do not enable -lmcheck by default if python_has_threads=yes.
Warn if --enable-lmcheck and python_has_threads=yes.
* configure: Regenerate.
* mi/mi-cmds.c (mi_cmds): New macros DEF_MI_CMD_CLI
DEF_MI_CMD_MI DEF_MI_CMD_CLI_1 and DEF_MI_CMD_CLI_1.
Update some commands.
* mi/mi-cmds.h (struct mi_cmd) <suppress_notification>: New field.
* mi/mi-main.c (mi_cmd_execute): Set '*parse->cmd->suppress_notification'
to 1.
(Powerpc_relobj::toc_base_offset): New stub function.
(Target_powerpc): Add tp_offset, dtp_offset. Rename
got_mod_index_offset to tlsld_got_offset. Update all refs.
(Target_powerpc::Relocate::enum skip_tls): New.
(Target_powerpc::call_tls_get_addr_): New var.
(Target_powerpc::is_branch_reloc): Move to file scope.
(Target_powerpc::relocate_tls, optimize_tls_reloc): Delete.
(Target_powerpc::optimize_tls_gd, optimize_tls_ld, optimize_tls_ie):
New functions.
(Target_powerpc::enum Got_type): Delete old values, add new ones.
(powerpc_info): Correct common_pagesize for ppc64.
(at_tls_transform, needs_dynamic_reloc, use_plt_offset): New functions.
(Powerpc_relocate_functions): Add overflow check enums and functions.
Add non-shift version of rela, rela_ua. Delete all rel public
functions. Delete addr16_lo. Add addr64, addr64_u, addr32,
addr32_u, addr24, addr16_u, addr16_hi2, addr16_ha2, addr16_hi3,
addr16_ha3, addr14 functions.
(Output_data_got_powerpc::add_constant_pair): New function.
(Output_data_got_powerpc::got_base_offset): Likewise.
(Output_data_got_powerpc::do_write): Correct 64-bit got header.
(instruction constants): Sort, add some more.
(Output_data_glink::do_write): Add and use Address typedef. Use
object->toc_base_offset() stub for 64-bit.
(Target_powerpc::tlsld_got_offset): Use add_constant_pair.
(Target_powerpc::Scan::get_reference_flags): Handle more relocs.
(Target_powerpc::Scan::local, global): Emit relative dynamic reloc
for R_PPC64_TOC. Handle more relocs. Generate got entries for TLS.
Always treat .opd relocs as against locally defined symbol.
Correct condition for RELATIVE relocs.
(Target_powerpc::do_finalize_sections): Test for NULL sections.
(Target_powerpc::Relocate::relocate): Use plt call stub as value
for 32-bit syms with a plt entry. Correct ppc64 toc base
calculations. Handle TLS relocs, and more. Add overflow
checking and adjust for Powerpc_relocate_functions changes.
(Target_powerpc::relocate_for_relocatable): Handle zero r_sym.
Reinstate --emit-relocs code with FIXME.
* ld-elf/export-class.vd: New test.
* ld-elf/export-class-def.s: New test source.
* ld-elf/export-class-dep.s: New test source.
* ld-elf/export-class-lib.s: New test source.
* ld-elf/export-class-ref.s: New test source.
* ld-elf/export-class-lib.ver: New test version script.
* ld-elf/export-class.exp: New test script.
* ld-arm/arm-export-class.rd: New test.
* ld-arm/arm-export-class.xd: New test.
* ld-arm/export-class.exp: New test script.
* ld-i386/i386-export-class.rd: New test.
* ld-i386/i386-export-class.xd: New test.
* ld-i386/export-class.exp: New test script.
* ld-mips-elf/mips-32-export-class.rd: New test.
* ld-mips-elf/mips-32-export-class.xd: New test.
* ld-mips-elf/mips-64-export-class.rd: New test.
* ld-mips-elf/mips-64-export-class.xd: New test.
* ld-mips-elf/export-class.exp: New test script.
* ld-powerpc/powerpc-32-export-class.rd: New test.
* ld-powerpc/powerpc-32-export-class.xd: New test.
* ld-powerpc/powerpc-64-export-class.rd: New test.
* ld-powerpc/powerpc-64-export-class.xd: New test.
* ld-powerpc/export-class.exp: New test script.
* ld-x86-64/x86-64-64-export-class.rd: New test.
* ld-x86-64/x86-64-x32-export-class.rd: New test.
* ld-x86-64/export-class.exp: New test script.
