Commit graph

706 commits

Author SHA1 Message Date
Alan Modra
6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Mickael Guene
ac4c9b0459 Add support for ARM's NOREAD section flag.
include/elf
     * arm.h: Add arm SHF_ARM_NOREAD section flag.

bfd  * bfd-in2.h: Regenerate.
     * section.c: Add SEC_ELF_NOREAD.
     * elf32-arm.c (elf32_arm_post_process_headers): Only set
     PF_X attribute if a segment only contains section with
     SHF_ARM_NOREAD flag.
     (elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion.
     (elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD
     to bfd flag.
     (elf32_arm_lookup_section_flags): New function to allow
     INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag.
     (elf32_arm_special_sections): Add special sections array
     to catch section prefix by '.text.noread' pattern.

ld/testsuite
     * ld-arm/arm-elf.exp: New tests.
     * ld-arm/thumb1-input-section-flag-match.d: New
     * ld-arm/thumb1-input-section-flag-match.s: New
     * ld-arm/thumb1-noread-not-present-mixing-two-section.d: New
     * ld-arm/thumb1-noread-not-present-mixing-two-section.s: New
     * ld-arm/thumb1-noread-present-one-section.d: New
     * ld-arm/thumb1-noread-present-one-section.s: New
     * ld-arm/thumb1-noread-present-two-section.d: New
     * ld-arm/thumb1-noread-present-two-section.s: New

binutils
	* readelf.c (get_elf_section_flags): Add support for ARM specific
	section flags.
2015-12-22 14:12:35 +00:00
Mickael Guene
72d98d16ed [ARM] Add support for thumb1 pcrop relocations.
To support thumb1 execute-only code we need to support four new
relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC,
R_ARM_THM_ALU_ABS_G2_NC and  R_ARM_THM_ALU_ABS_G3_NC).
These relocations allow the static linker to finalize construction
of symbol address.
Typical sequence of code to get address of the symbol foo is then
the following :
	movs	r3, #:upper8_15:#foo
	lsls	r3, #8
	adds	r3, #:upper0_7:#foo
	lsls	r3, #8
	adds	r3, #:lower8_15:#foo
	lsls	r3, #8
	adds	r3, #:lower0_7:#foo
This will give following sequence of text and relocations after
assembly :
   4:	2300      	movs	r3, #0
			4: R_ARM_THM_ALU_ABS_G3_NC	foo
   6:	021b      	lsls	r3, r3, #8
   8:	3300      	adds	r3, #0
			8: R_ARM_THM_ALU_ABS_G2_NC	foo
   a:	021b      	lsls	r3, r3, #8
   c:	3300      	adds	r3, #0
			c: R_ARM_THM_ALU_ABS_G1_NC	foo
   e:	021b      	lsls	r3, r3, #8
  10:	3300      	adds	r3, #0
			10: R_ARM_THM_ALU_ABS_G0_NC	foo
2015-12-16 10:19:51 +01:00
Alan Modra
006589cfa1 R_PPC64_ENTRY
Add a new relocation that marks large-model entry code, for edit back
to medium-model.

include/elf/
	* ppc64.h (R_PPC64_ENTRY): Define.
bfd/
	* reloc.c (BFD_RELOC_PPC64_ENTRY): New.
	* elf64-ppc.c (reloc_howto_type ppc64_elf_howto_raw): Add
	entry for R_PPC64_ENTRY.
	(LD_R2_0R12, ADD_R2_R2_R12, LIS_R2, ADDIS_R2_R12): Define.
	(ppc64_elf_reloc_type_lookup): Handle R_PPC64_ENTRY.
	(ppc64_elf_relocate_section): Edit code at R_PPC64_ENTTY.  Use
	new insn defines.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
2015-12-07 13:14:53 +10:30
Tristan Gingold
f075eb5e6b binutils: add support for arm-*-darwin and aarch64-*-darwin.
Currently only in bfd and binutils.

ChangeLog/
	* configure.ac: Add aarch64-*-darwin* and arm-*-darwin*.
	* configure: Regenerate.

bfd/ChangeLog/
	* targets.c (aarch64_mach_o_vec, arm_mach_o_vec): Declare.
	(_bfd_target_vector): Add new vectors.
	* reloc.c (BFD_RELOC_MACH_O_SUBTRACTOR32)
	(BFD_RELOC_MACH_O_SUBTRACTOR64, BFD_RELOC_MACH_O_ARM64_ADDEND)
	(BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGE21)
	(BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGEOFF12)
	(BFD_RELOC_MACH_O_ARM64_POINTER_TO_GOT): New relocations.
	(BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32)
	(BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64): Remove.
	* mach-o-x86-64.c (bfd_mach_o_x86_64_swap_reloc_out): Change
	name of subtractor relocations.
	* config.bfd: Handle aarch64-*-darwin*, arm-*-darwin*.
	* Makefile.am (BFD32_BACKENDS): Add mach-o-arm.lo.
	(BFD32_BACKENDS_CFILES): Add mach-o-arm.c.
	(BFD64_BACKENDS): Add mach-o-aarch64.lo.
	(BFD64_BACKENDS_CFILES): Add mach-o-aarch64.c.
	* configure.ac: Handle aarch64_mach_o_vec and arm_mach_o_vec.
	* mach-o-aarch64.c: New file.
	* mach-o-arm.c: New file.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* libbfd.h: Regenerate.
2015-11-20 14:53:06 +01:00
Peter Bergner
a680de9a98 Add assembler, disassembler and linker support for power9.
include/opcode/
	* ppc.h (PPC_OPCODE_POWER9): New define.
	(PPC_OPCODE_VSX3): Likewise.

opcodes/
	* ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries.
	Add PPC_OPCODE_VSX3 to the vsx entry.
	(powerpc_init_dialect): Set default dialect to power9.
        * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd,
        insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1,
        extract_l1 insert_xtq6, extract_xtq6): New static functions.
        (insert_esync): Test for illegal L operand value.
	(DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6,
	XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA,
	XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK,
	XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3,
	PPCVSX3): New defines.
	(powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu,
	fcmpo, ftdiv, ftsqrt>: Use XBF_MASK.
	<mcrxr>: Use XBFRARB_MASK.
	<addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq.,
	bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc.,
	cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first,
	cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx,
	lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll,
	lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw,
	modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last,
	rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx,
	stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx,
	subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh,
	vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh.,
	vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd,
	vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d,
	vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx,
	vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq,
	vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd,
	vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait,
	xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp,
	xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp,
	xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz,
	xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp,
	xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp,
	xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo,
	xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo,
	xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo,
	xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp,
	xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp,
	xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp,
	xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw,
	xxinsertw, xxperm, xxpermr, xxspltib>: New instructions.
	<doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9.
	<tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands.

include/elf/
	* ppc.h (R_PPC_REL16DX_HA): New reloction.
	* ppc64.h (R_PPC64_REL16DX_HA): Likewise.

bfd/
	* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA.
	(ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA.
	(ppc_elf_addr16_ha_reloc): Likewise.
	(ppc_elf_check_relocs): Likewise.
	(ppc_elf_relocate_section): Likewise.
	(is_insn_dq_form): Handle lxv and stxv instructions.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA.
	(ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA.
	(ppc64_elf_ha_reloc): Likewise.
	(ppc64_elf_check_relocs): Likewise.
	(ppc64_elf_relocate_section): Likewise.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
	* reloc.c (BFD_RELOC_PPC_REL16DX_HA): New.

elfcpp/
	* powerpc.h (R_POWERPC_REL16DX_HA): Define.

gas/
	* doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9.
	* doc/c-ppc.texi (PowerPC-Opts):  Likewise.
	* config/tc-ppc.c (md_show_usage): Likewise.
	(md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA.
	(md_apply_fix): Likewise.
	(ppc_handle_align): Handle power9's group ending nop.

gas/testsuite/
	* gas/ppc/altivec3.s: New test.
	* gas/ppc/altivec3.d: Likewise.
	* gas/ppc/vsx3.s: Likewise.
	* gas/ppc/vsx3.d: Likewise.
	* gas/ppc/power9.s: Likewise.
	* gas/ppc/power9.d: Likewise.
	* gas/ppc/ppc.exp: Run them.
	* gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests.
	* gas/ppc/power8.d: Likewise.
	* gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ...
	<lxvd2x, stxvd2x>: ...to this.
	* gas/ppc/vsx.d: Likewise.

gold/
	* gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function.
	(Powerpc_relocate_functions::addr16dx_ha): Likewise.
	(Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA.
	(Target_powerpc::Scan::global): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.

ld/testsuite/
	* ld-powerpc/addpcis.d: New test.
	* ld-powerpc/addpcis.s: New test.
	* ld-powerpc/powerpc.exp: Run it.
2015-11-11 19:52:52 -06:00
Dominik Vogt
29f628db88 bfd: Fix left shift of negative value.
This patch fixes all occurences of left-shifting negative constants in C code
which is undefined by the C standard.

bfd/ChangeLog:

        * elf64-ppc.c (ppc64_elf_size_stubs, ppc64_elf_build_stubs): Fix left
        shift of negative value.
        * libbfd.c (safe_read_leb128): Likewise.
        * dwarf2.c (place_sections): Likewise.
        * bfd-in.h (align_power): Likewise.
        * bfd-in2.h (align_power): Likewise.
2015-11-09 17:12:56 +01:00
Cupertino Miranda
6f4b1afcdc Fix errors in the gas testsuite for the ARC target.
bfd	* reloc.c (BFD_RELOC_ARC_32_PCREL): New entry.
	(ARC_TLS_DTPOFF): Arrange it in order.
	* elf32-arc.c (arc_elf_howto_ini): Update formula.
	(get_middle_endian_relocation): New function.
	(PDATA): Define.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.

elf	* arc-reloc.def (ARC_32_PCREL): New definition.

gas	* config/tc-arc.c (tokenize_arguments): Avoid creating unused
	symbols when parsing relocation types.
	(md_apply_fix): Handle TLS relocations. Fix BFD_RELOC_ARC_32_PCREL
	relocation.
	(arc_check_reloc): Emit BFD_RELOC_ARC_32_PCREL relocation.
2015-10-28 13:48:00 +00:00
Alan Modra
199af15039 Orphan output section with multiple input sections
If given input sections with differing flags, we'd like to place the
section according to the final output section flags.

bfd/
	PR ld/19162
	* elflink.c (_bfd_elf_gc_mark_reloc): Move code iterating over
	linker input bfds..
	* section.c (bfd_get_next_section_by_name): ..to here.  Add ibfd param.
	(bfd_get_linker_section): Adjust bfd_get_next_section_by_name call.
	* tekhex.c (first_phase): Likewise.
	* elflink.c (bfd_elf_gc_sections): Likewise.
	* bfd-in2.h: Regenerate.
ld/
	PR ld/19162
	* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Check flags
	before calling _bfd_elf_match_sections_by_type.  Merge flags for
	any other input sections that might match a new output section to
	decide placement.
2015-10-28 17:51:10 +10:30
Laurent Alfonsi
a504d23a83 Add --fix-stm32l4xx-629360 to the ARM linker to enable a link-time workaround for a bug in the bus matrix / memory controller for some of the STM32 Cortex-M4 based products (STM32L4xx).
bfd  * bfd-in2.h: Regenerate.
     * bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how
     STM32L4XX instruction scanning should be done.
     (bfd_elf32_arm_set_stm32l4xx_fix)
     (bfd_elf32_arm_stm32l4xx_erratum_scan)
     (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): Add prototypes.
     (bfd_elf32_arm_set_target_relocs): Add stm32l4xx fix type argument
     to prototype.
     * elf32-arm.c (STM32L4XX_ERRATUM_VENEER_SECTION_NAME)
     (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME): Define macros.
     (elf32_stm32l4xx_erratum_type): New enum.
     (elf32_stm32l4xx_erratum_list): New struct. List of veneers or
     jumps to veneers.
     (_arm_elf_section_data): Add stm32l4xx_erratumcount,
     stm32l4xx_erratumlist.
     (elf32_arm_link_hash_table): Add stm32l4xx_erratum_glue_size,
     stm32l4xx_fix and num_stm32l4xx_fixes fields.
     (ctz): New function.
     (popcount): New function.
     (elf32_arm_link_hash_table_create): Initialize stm32l4xx_fix.
     (put_thumb2_insn): New function.
     (STM32L4XX_ERRATUM_LDM_VENEER_SIZE): Define. Size of a veneer for
     LDM instructions.
     (STM32L4XX_ERRATUM_VLDM_VENEER_SIZE): Define. Size of a veneer for
     VLDM instructions.
     (bfd_elf32_arm_allocate_interworking_sections): Initialise erratum
     glue section.
     (record_stm32l4xx_erratum_veneer) : New function. Create a single
     veneer, and its associated symbols.
     (bfd_elf32_arm_add_glue_sections_to_bfd): Add STM32L4XX erratum glue.
     (bfd_elf32_arm_set_stm32l4xx_fix): New function. Set the type of
     erratum workaround required.
     (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): New function. Find
     out where veneers and branches to veneers have been placed in
     virtual memory after layout.
     (is_thumb2_ldmia): New function.
     (is_thumb2_ldmdb): Likewise.
     (is_thumb2_vldm ): Likewise.
     (stm32l4xx_need_create_replacing_stub): New function. Decide if a
     veneer must be emitted.
     (bfd_elf32_arm_stm32l4xx_erratum_scan): Scan the sections of an
     input BFD for potential erratum-triggering insns. Record results.
     (bfd_elf32_arm_set_target_relocs): Set stm32l4xx_fix field in
     global hash table.
     (elf32_arm_size_dynamic_sections): Collect glue information.
     (create_instruction_branch_absolute): New function.
     (create_instruction_ldmia): Likewise.
     (create_instruction_ldmdb): Likewise.
     (create_instruction_mov): Likewise.
     (create_instruction_sub): Likewise.
     (create_instruction_vldmia): Likewise.
     (create_instruction_vldmdb): Likewise.
     (create_instruction_udf_w): Likewise.
     (create_instruction_udf): Likewise.
     (push_thumb2_insn32): Likewise.
     (push_thumb2_insn16): Likewise.
     (stm32l4xx_fill_stub_udf): Likewise.
     (stm32l4xx_create_replacing_stub_ldmia): New function. Expands the
     replacing stub for ldmia instructions.
     (stm32l4xx_create_replacing_stub_ldmdb): Likewise for ldmdb.
     (stm32l4xx_create_replacing_stub_vldm): Likewise for vldm.
     (stm32l4xx_create_replacing_stub): New function. Dispatches the
     stub emission to the appropriate functions.
     (elf32_arm_write_section): Output veneers, and branches to veneers.

ld   * ld.texinfo: Description of the STM32L4xx erratum workaround.
     * emultempl/armelf.em (stm32l4xx_fix): New.
     (arm_elf_before_allocation): Choose the type of fix, scan for
     erratum.
     (gld${EMULATION_NAME}_finish): Fix veneer locations.
     (arm_elf_create_output_section_statements): Propagate
     stm32l4xx_fix value.
     (PARSE_AND_LIST_PROLOGUE): Define OPTION_STM32L4XX_FIX.
     (PARSE_AND_LIST_LONGOPTS): Add entry for handling
     --fix-stm32l4xx-629360.
     (PARSE_AND_LIST_OPTION): Add entry for helping on
     --fix-stm32l4xx-629360.
     (PARSE_AND_LIST_ARGS_CASES): Treat OPTION_STM32L4XX_FIX.

tests * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX
       tests.
     * ld-arm/stm32l4xx-cannot-fix-far-ldm.d: New.
     * ld-arm/stm32l4xx-cannot-fix-far-ldm.s: Likewise.
     * ld-arm/stm32l4xx-cannot-fix-it-block.d: Likewise.
     * ld-arm/stm32l4xx-cannot-fix-it-block.s: Likewise.
     * ld-arm/stm32l4xx-fix-all.d: Likewise.
     * ld-arm/stm32l4xx-fix-all.s: Likewise.
     * ld-arm/stm32l4xx-fix-it-block.d: Likewise.
     * ld-arm/stm32l4xx-fix-it-block.s: Likewise.
     * ld-arm/stm32l4xx-fix-ldm.d: Likewise.
     * ld-arm/stm32l4xx-fix-ldm.s: Likewise.
     * ld-arm/stm32l4xx-fix-vldm.d: Likewise.
     * ld-arm/stm32l4xx-fix-vldm.s: Likewise.
2015-10-27 13:20:33 +00:00
H.J. Lu
7b7e7f1da2 Check symbol defined by assignment in linker script
Symbol symbol defined by an assignment in a linker script has type
bfd_link_hash_new.  elf_i386_convert_load and elf_x86_64_convert_load
should check bfd_link_hash_new to see if a symbol is defined by a linker
script.

bfd/

	PR ld/19175
	* elf32-i386.c (elf_i386_convert_load): Check bfd_link_hash_new
	instead of calling bfd_link_get_defined_symbol.
	* elf64-x86-64.c (elf_x86_64_convert_load): Likewise.  Skip
	relocation overflow for bfd_link_hash_new.
	* linker.c (bfd_link_get_defined_symbol): Removed.
	* bfd-in2.h: Regenerated.

ld/testsuite/

	PR ld/19175
	* ld-i386/i386.exp: Run pr19175.
	* ld-x86-64/x86-64.exp: Likewise.
	* ld-i386/pr19175.d: New file.
	* ld-i386/pr19175.s: Likewise.
	* ld-i386/pr19175.t: Likewise.
	* ld-x86-64/pr19175.d: Likewise.
	* ld-x86-64/pr19175.s: Likewise.
	* ld-x86-64/pr19175.t: Likewise.
2015-10-26 16:32:55 -07:00
H.J. Lu
a6af384b19 Properly convert address load of __start_XXX/__stop_XXX
Since __start_XXX and __stop_XXX symbols aren't defined when address
load is being converted, we need to check if there is an XXX output
section to get their section and value.  This patch adds a new function,
bfd_link_get_defined_symbol, to search for the XXX output section to
check if __start_XXX and __stop_XXX symbols are defined.

bfd/

	PR ld/19171
	* elf32-i386.c (elf_i386_convert_load): Call
	bfd_link_get_defined_symbol to check if a symbol is defined.
	* elf64-x86-64.c (elf_x86_64_convert_load): Call
	bfd_link_get_defined_symbol to get defined symbol section and
	value.
	* linker.c (bfd_link_get_defined_symbol): New function.
	* bfd-in2.h: Regenerated.

ld/testsuite/

	PR ld/19171
	* ld-i386/lea1.s: Add tests for address load of __start_XXX
	and __stop_XXX.
	* ld-i386/mov1.s: Likewise.
	* ld-x86-64/lea1.s: Likewise.
	* ld-x86-64/mov1.s: Likewise.
	* ld-i386/lea1a.d: Updated.
	* ld-i386/lea1b.d: Likewise.
	* ld-i386/lea1c.d: Likewise.
	* ld-i386/mov1a.d: Likewise.
	* ld-i386/mov1b.d: Likewise.
	* ld-x86-64/lea1a.d: Likewise.
	* ld-x86-64/lea1b.d: Likewise.
	* ld-x86-64/lea1c.d: Likewise.
	* ld-x86-64/lea1d.d: Likewise.
	* ld-x86-64/lea1e.d: Likewise.
	* ld-x86-64/lea1f.d: Likewise.
	* ld-x86-64/mov1a.d: Likewise.
	* ld-x86-64/mov1b.d: Likewise.
	* ld-x86-64/mov1c.d: Likewise.
	* ld-x86-64/mov1d.d: Likewise.
2015-10-26 08:11:55 -07:00
H.J. Lu
56ceb5b540 Add R_X86_64_[REX_]GOTPCRELX support to gas and ld
This patch adds support for the R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX relocations proposed in

https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0

to gas and ld.  It updates gas to generate R_X86_64_GOTPCRELX,
R_X86_64_REX_GOTPCRELX if there is a REX prefix, relocation for memory
operand, foo@GOTPCREL(%rip).  With the locally defined symbol, foo, we
convert

  mov foo@GOTPCREL(%rip), %reg

to

   lea foo(%rip), %reg

and convert

   call/jmp *foo@GOTPCREL(%rip)
to

   nop call foo/jmp foo nop

When PIC is false, convert

   test %reg, foo@GOTPCREL(%rip)
to

test $foo, %reg

and convert

   binop foo@GOTPCREL(%rip), %reg

to

   binop $foo, %reg

where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.

bfd/

	* elf64-x86-64.c: Include opcode/i386.h.
	(x86_64_elf_howto_table): Add R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX.
	(R_X86_64_standard): Replace R_X86_64_PLT32_BND with
	R_X86_64_REX_GOTPCRELX.
	(x86_64_reloc_map): Add BFD_RELOC_X86_64_GOTPCRELX and
	BFD_RELOC_X86_64_REX_GOTPCRELX.
	(need_convert_mov_to_lea): Renamed to ...
	(need_convert_load): This.
	(elf_x86_64_check_relocs): Handle R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX.  Replace need_convert_mov_to_lea with
	need_convert_load.
	(elf_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX.
	(elf_x86_64_size_dynamic_sections): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	(elf_x86_64_convert_mov_to_lea): Renamed to ...
	(elf_x86_64_convert_load): This.  Replace need_convert_mov_to_lea
	with need_convert_load.  Support R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX transformations.
	* reloc.c (BFD_RELOC_X86_64_GOTPCRELX): New.
	(BFD_RELOC_X86_64_REX_GOTPCRELX): Likewise.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.

gas/

	* config/tc-i386.c (tc_i386_fix_adjustable): Handle
	BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX.
	(tc_gen_reloc): Likewise.
	(i386_validate_fix): Generate BFD_RELOC_X86_64_GOTPCRELX or
	BFD_RELOC_X86_64_REX_GOTPCRELX if fx_tcbit2 is set.
	* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Also return
	true for BFD_RELOC_X86_64_GOTPCRELX and
	BFD_RELOC_X86_64_REX_GOTPCRELX.

gas/testsuite/

	* gas/i386/i386.exp: Run x86-64-gotpcrel.
	* gas/i386/x86-64-gotpcrel.d: New file.
	* gas/i386/x86-64-gotpcrel.s: Likewise.
	* gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
	* gas/i386/x86-64-localpic.d: Replace R_X86_64_GOTPCREL with
	R_X86_64_REX_GOTPCRELX.
	* gas/i386/ilp32/x86-64-localpic.d: Likewise.

include/elf/

	* x86-64.h (R_X86_64_GOTPCRELX): New.
	(R_X86_64_REX_GOTPCRELX): Likewise.

ld/testsuite/

	* ld-ifunc/ifunc-5r-local-x86-64.d: Replace R_X86_64_GOTPCREL
	with R_X86_64_REX_GOTPCRELX.
	* ld-x86-64/plt-main1.rd: Likewise.
	* ld-x86-64/plt-main3.rd: Likewise.
	* ld-x86-64/plt-main4.rd: Likewise.
	* ld-x86-64/gotpcrel1.dd: New file.
	* ld-x86-64/gotpcrel1.out: Likewise.
	* ld-x86-64/gotpcrel1a.S: Likewise.
	* ld-x86-64/gotpcrel1b.c: Likewise.
	* ld-x86-64/gotpcrel1c.c: Likewise.
	* ld-x86-64/gotpcrel1d.S: Likewise.
	* ld-x86-64/load1.s: Likewise.
	* ld-x86-64/load1a.d: Likewise.
	* ld-x86-64/load1b.d: Likewise.
	* ld-x86-64/load1c.d: Likewise.
	* ld-x86-64/load1d.d: Likewise.
	* ld-x86-64/x86-64.exp: Run load1a, load1b, load1c and load1d
	tests.  Run gotpcrel1 test.
2015-10-22 04:49:38 -07:00
H.J. Lu
02a866936d Add R_386_GOT32X support to gas and ld
This patch adds support for the R_386_GOT32X relocation proposed in

https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I

to gas and ld.  It updates gas to generate R_386_GOT32X relocation for
memory operand, foo@GOT[(%reg)].  We must encode "mov foo@GOT, %eax"
with the 0x8b opcode, instead of the 0xb8 opcode, so that it can be
transformed to "lea foo, %eax".  With the locally defined symbol, foo,
we convert

   mov foo@GOT[(%reg1)], %reg2
to
   lea foo[@GOTOFF(%reg1)], %reg2

and convert

   call/jmp *foo@GOT[(%reg)]
to

   nop call foo/jmp foo nop

When PIC is false, convert

   test %reg1, foo@GOT[(%reg2)]
to
   test $foo, %reg1

and convert

binop foo@GOT[(%reg1)], %reg2

to

binop $foo, %reg2

where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.

bfd/

	* elf32-i386.c: Include opcode/i386.h.
	(elf_howto_table): Add R_386_GOT32X.
	(R_386_ext2): Replace R_386_IRELATIVE with R_386_GOT32X.
	(elf_i386_reloc_type_lookup): Handle BFD_RELOC_386_GOT32X.
	(need_convert_mov_to_lea): Renamed to ...
	(need_convert_load): This.
	(elf_i386_check_relocs): Handle R_386_GOT32X.  Replace
	need_convert_mov_to_lea with need_convert_load.
	(elf_i386_gc_sweep_hook): Handle R_386_GOT32X.
	(elf_i386_size_dynamic_sections): Likewise.
	(elf_i386_relocate_section): Likewise.
	(elf_i386_convert_mov_to_lea): Renamed to ...
	(elf_i386_convert_load): This.  Replace need_convert_mov_to_lea
	with need_convert_load.  Support R_386_GOT32X transformations.
	* reloc.c (BFD_RELOC_386_GOT32X): New.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.

gas/

	* config/tc-i386.c (tc_i386_fix_adjustable): Handle
	BFD_RELOC_386_GOT32X.
	(tc_gen_reloc): Likewise.
	(match_template): Force 0x8b encoding for "mov foo@GOT, %eax".
	(output_disp): Check for "call/jmp *mem", "mov mem, %reg",
	"test %reg, mem" and "binop mem, %reg" where binop is one of
	adc, add, and, cmp, or, sbb, sub, xor instructions.  Set
	fx_tcbit if the REX prefix is generated.  Set fx_tcbit2 if
	BFD_RELOC_386_GOT32X should be generated.
	(i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2
	is set.

gas/testsuite/

	* gas/i386/got.d: New file.
	* gas/i386/got.s: Likewise.
	* gas/i386/i386.exp: Run got.
	* gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X.
	* gas/i386/mixed-mode-reloc32.d: Likewise.
	* gas/i386/reloc32.d: Likewise.

include/elf/

	* i386.h (R_386_GOT32X): New relocation.

ld/testsuite/

	* ld-i386/branch1.d: New file.
	* ld-i386/branch1.s: Likewise.
	* ld-i386/call1.d: Likewise.
	* ld-i386/call1.s: Likewise.
	* ld-i386/call2.d: Likewise.
	* ld-i386/call2.s: Likewise.
	* ld-i386/got1.dd: Likewise.
	* ld-i386/got1.out: Likewise.
	* ld-i386/got1a.S: Likewise.
	* ld-i386/got1b.c: Likewise.
	* ld-i386/got1c.c: Likewise.
	* ld-i386/got1d.S: Likewise.
	* ld-i386/jmp1.d: Likewise.
	* ld-i386/jmp1.s: Likewise.
	* ld-i386/jmp2.d: Likewise.
	* ld-i386/jmp2.s: Likewise.
	* ld-i386/load1.d: Likewise.
	* ld-i386/load1.s: Likewise.
	* ld-i386/load2.d: Likewise.
	* ld-i386/load2.s: Likewise.
	* ld-i386/load3.d: Likewise.
	* ld-i386/load3.s: Likewise.
	* ld-i386/load4.s: Likewise.
	* ld-i386/load4a.d: Likewise.
	* ld-i386/load4b.d: Likewise.
	* ld-i386/load5.s: Likewise.
	* ld-i386/load5a.d: Likewise.
	* ld-i386/load5b.d: Likewise.
	* ld-i386/load6.d: Likewise.
	* ld-i386/load6.s: Likewise.
	* ld-i386/i386.exp: Run branch1, call1, call2, jmp1, jmp2,
	load1, load2, load3, load4a, load4b, load5a, load5b and load6
	tests.  Run got1 test.
2015-10-22 04:47:07 -07:00
Nick Clifton
886a250647 New ARC implementation.
bfd	* archures.c: Remove support for older ARC. Added support for new
	ARC cpus (ARC600, ARC601, ARC700, ARCV2).
	* bfd-in2.h: Likewise.
	* config.bfd: Likewise.
	* cpu-arc.c: Likewise.
	* elf32-arc.c: Totally changed file with a refactored
	inplementation of the ARC port.
	* libbfd.h: Added ARC specific relocation types.
	* reloc.c: Likewise.

gas     * config/tc-arc.c: Revamped file for ARC support.
        * config/tc-arc.h: Likewise.
        * doc/as.texinfo: Add new ARC options.
        * doc/c-arc.texi: Likewise.

ld	* configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*.
	* emulparams/arcebelf_prof.sh: New file
	* emulparams/arcebelf.sh: Likewise.
	* emulparams/arceblinux_prof.sh: Likewise.
	* emulparams/arceblinux.sh: Likewise.
	* emulparams/arcelf_prof.sh: Likewise.
	* emulparams/arcelf.sh: Likewise.
	* emulparams/arclinux_prof.sh: Likewise.
	* emulparams/arclinux.sh: Likewise.
	* emulparams/arcv2elfx.sh: Likewise.
	* emulparams/arcv2elf.sh: Likewise.
	* emultempl/arclinux.em: Likewise.
	* scripttempl/arclinux.sc: Likewise.
	* scripttempl/elfarc.sc: Likewise.
	* scripttempl/elfarcv2.sc: Likewise
	* Makefile.am: Add new ARC emulations.
	* Makefile.in: Regenerate.
	* NEWS: Mention the new feature.

opcodes * arc-dis.c: Revamped file for ARC support
	* arc-dis.h: Likewise.
	* arc-ext.c: Likewise.
	* arc-ext.h: Likewise.
	* arc-opc.c: Likewise.
	* arc-fxi.h: New file.
	* arc-regs.h: Likewise.
	* arc-tbl.h: Likewise.

binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact
	and ARCv2.
	(get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT.
	(guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_16bit_abs_reloc): Likewise.
	(is_none_reloc): Likewise.
	* NEWS: Mention the new feature.

include	* dis-asm.h (arc_get_disassembler): Correct declaration.
	* arc-reloc.def: Macro file with definition of all relocation
	types.
	* arc.h: Changed macros for the newly supported ARC cpus.  Altered
	enum defining the supported relocations.
	* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added
	macro for EM_ARC_COMPACT2.
        * arc-func.h: New file.
        * arc.h: Likewise.
2015-10-07 14:20:19 +01:00
Renlin Li
3b957e5b07 [Binutils][AARCH64]Add TLS IE large memory support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and
	AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Make
	TLSIE_MOVW_GOTTPREL_G1 check overflow.
	(aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1
	and TLSIE_MOVW_GOTTPREL_G0_NC.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): Add two entries for
	gottprel_g0_nc and gottprel_g1.
	(process_movw_reloc_info): Add support.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-gottprel_g0_nc.d: New.
	* gas/aarch64/reloc-gottprel_g0_nc.s: New.
	* gas/aarch64/reloc-gottprel_g1.d: New.
	* gas/aarch64/reloc-gottprel_g1.s: New.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/tls-large-ie.d: New.
	* ld-aarch64/tls-large-ie.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:56:08 +01:00
Renlin Li
3e8286c0d2 [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g0_nc.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g0_nc.d: New.
	* gas/aarch64/reloc-tlsgd_g0_nc.s: New.
2015-10-02 17:56:08 +01:00
Renlin Li
1aa66fb152 [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G1): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g1.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g1.s: New.
	* gas/aarch64/reloc-tlsgd_g1.s: New.
2015-10-02 17:56:08 +01:00
Renlin Li
ca632371ce [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC): New.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry
	MOVW_GOTOFF_G0_NC.
	* libbfd.h: Regnerate.
	* bfd-in2.h: Regenerate.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier
	gotoff_g0_nc.
	(process_movw_reloc_info): Support gotoff_g0_nc.
	(md_apply_fix): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-gotoff_g0_nc.s: New.
	* gas/aarch64/reloc-gotoff_g0_nc.d: New.
2015-10-02 17:56:07 +01:00
Renlin Li
654248e7f7 [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G1): New.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	MOVW_GOTOFF_G1.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.

gas/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier
	gotoff_g1.
	(process_movw_reloc_info): Support newly added modifier.
	(md_apply_fix): Likewise.

gas/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* gas/aarch64/reloc-gotoff_g1.s: New.
	* gas/aarch64/reloc-gotoff_g1.d: New.
2015-10-02 17:56:07 +01:00
H.J. Lu
cbd44e247e Don't use the output section size to copy input section
We can't use the output section size to copy input section since
--interleave will shrink the output section.  Instead, we change
bfd_convert_section_contents to return the updated input section
size.  When we do that, we don't need to adjust the output section
size to skip gap fills.

bfd/

	PR binutils/19020
	* bfd.c (bfd_convert_section_contents): Add ptr_size parameter.
	* bfd-in2.h: Regenerated.

binutils/

	PR binutils/19020
	* objcopy.c (copy_object): Don't adjust the output section size
	when copying from input sections.
	(copy_section): Use input section size for the copy.  Get the
	updated section size from bfd_convert_section_contents.

binutils/testsuite/

	PR binutils/19020
	* binutils-all/objcopy.exp: Run pr19020a and pr19020b.
	* lib/utils-lib.exp (run_dump_test): Support binary input.
	* binutils-all/pr19020.in: New file.
	* binutils-all/pr19020a.d: Likewise.
	* binutils-all/pr19020b.d: Likewise.
2015-09-29 13:31:57 -07:00
Doug Evans
015d2e7e49 default_read_var_value <LOC_UNRESOLVED>: Include minsym kind in error message.
bfd/ChangeLog:

	* targets.c (enum bfd_flavour): Add comment.
	(bfd_flavour_name): New function.
	* bfd-in2.h: Regenerate.

gdb/ChangeLog:

	* findvar.c (default_read_var_value) <LOC_UNRESOLVED>: Include the
	kind of minimal symbol in the error message.
	* objfiles.c (objfile_flavour_name): New function.
	* objfiles.h (objfile_flavour_name): Declare.

gdb/testsuite/ChangeLog:

	* gdb.dwarf2/dw2-bad-unresolved.c: New file.
	* gdb.dwarf2/dw2-bad-unresolved.exp: New file.
2015-09-18 21:43:38 -07:00
Alan Modra
6f20ed8a6b ppc64 section group handling
Two organizational changes to the array of additional info kept for
sections.
1) Move group info into a per-group allocated struct, in preparation
for future changes that need per-group accounting.
2) Expand the array to include output sections, which simplifies
sizing and removes the need for a separate output section array.

	* section.c (section_id): Make file scope.
	(bfd_get_next_section_id): New function.
	* elf64-ppc.c (struct map_stub): Remove toc_off field.  Move decl.
	(struct ppc_stub_hash_entry): Delete stub_sec and id_sec.  Add
	group.  Update all uses.
	(struct ppc_link_hash_table): Delete top_id, top_index, and
	input_list.  Add sec_info_arr_size.  Rename stub_group to
	sec_info, and make group info indirect.  Update stub_group refs
	throughout file.
	(ppc_add_stub): Don't look for stub_sec on link_sec stub_group
	entry.
	(ppc_build_one_stub): Delete FIXME.
	(ppc64_elf_setup_section_lists): Size htab->sec_info for all
	sections, not just input sections.  Don't create htab->input_list.
	(ppc64_elf_next_input_section): Update to use sec_info union as
	list pointer.
	(PREV_SEC): Delete.
	(group_sections): Pass "info" param rather than "htab".  Iterate
	over output sections rather than input_list.  Use sec_info union
	as list pointers.  Alloc atruct map_stub, and return fail status.
	* bfd-in2.h: Regenerate.
2015-08-31 22:54:06 +09:30
Alan Modra
7292b3ac74 Make asection->id and asection->index unsigned
These int vars are really unsigned, so make them so.

	* section.c (struct bfd_section): Make "id" and "index" unsigned.
	* coff-rs6000.c (_bfd_xcoff_sizeof_headers): Adjust local var to suit.
	* elf.c (elf_map_symbols): Likewise.
	* elf64-ppc.c (sym_exists_at): Make "id" param unsigned.
	(struct ppc_link_hash_table): Make "top_id" and "top_index" unsigned.
	(ppc64_elf_setup_section_lists): Ditto for local vars.
	* elf32-arm.c: Similarly to elf64-ppc.c.
	* elf32-avr.c: Likewise.
	* elf32-hppa.c: Likewise.
	* elf32-m68hc1x.c: Likewise.
	* elf32-metag.c: Likewise.
	* elf32-nios2.c: Likewise.
	* elfnn-aarch64.c: Likewise.
	* simple.c (struct saved_offsets): Make "section_count" unsigned.
	* bfd-in2.h: Regenerate.
2015-08-31 12:37:36 +09:30
Renlin Li
7c2bea1ad1 [AArch64] Fix a typo in the comment for BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
2015-08-25  Renlin Li  <renlin.li@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_LD64_GOTOFF_LO15): Use LP64 instead of
  ILP64.
  * bfd-in2.h: Regenerate.
2015-08-25 12:37:21 +01:00
Jiong Wang
4c5625238c [AArch64][5/6] GAS support TLSLD load/store relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c: New entries, including
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC.
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation types support for
  dtprel_lo12.
  (ldst_lo12_determine_real_reloc_type): Support
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  (parse_operands): Likewise.
  (md_apply_fix): Likewise
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-ldst8.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldstc.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst16.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst64.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst8.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst16.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst32.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst64.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d: Likewise.
2015-08-19 16:54:39 +01:00
Jiong Wang
49df5539f9 [AArch64][3/6] GAS support TLSLD move/add relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers,
  "dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1",
  "dtprel_g1_nc", "dtprel_g2".
  (md_apply_fix): Support new relocation types.
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_g0.s: New testcase.
  * gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g2.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0.d: New expectation file.
  * gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g2.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
2015-08-19 16:36:22 +01:00
Jiong Wang
13289c10e2 [AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
2015-08-19 16:28:08 +01:00
Jiong Wang
70151fb54a [AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

include/elf/
  * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define.

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers
  "dtprel_lo12".
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
2015-08-11 21:26:31 +01:00
Jiong Wang
a12fad50d2 [AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.d: New expectation file.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d: Likewise.
2015-08-11 21:25:51 +01:00
Jiong Wang
1107e076cf [AArch64][2/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-tlsldm-page-1.s: New testcase.
  * gas/aarch64/reloc-tlsldm-page-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-tlsldm-page-1.d: New expectation file.
  * gas/aarch64/reloc-tlsldm-page-ilp32-1.d: Likewise.
2015-08-11 21:24:38 +01:00
Jiong Wang
6c37fedc41 [AArch64][2/3] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21 2015-07-16 15:43:21 +01:00
H.J. Lu
889884731e Properly convert objects between different ELF classes
The output SHF_COMPRESSED section size is different from input if
ELF classes of input and output aren't the same.  We must adjust
the section sizes as well as the compression headers in
SHF_COMPRESSED sections when converting objects between different
ELF classes.

bfd/

	 PR binutils/18656
	 * bfd.c (bfd_convert_section_size): New function.
	 (bfd_convert_section_contents): Likewise.
	 * bfd-in2.h: Regenerated.

binutils/

2015-07-10  H.J. Lu  <hongjiu.lu@intel.com>

	 PR binutils/18656
	 * objcopy.c (setup_section): Call bfd_convert_section_size
	 to get the output section size.
	 (copy_section): Get the section size from the output section
	 and call bfd_get_full_section_contents to convert section
	 contents for output.

binutils/testsuite/

	 PR binutils/18656
	 * binutils-all/compress.exp (convert_test): New proc.
	 Run conversion tests between x86-64 and x32.
2015-07-10 14:27:39 -07:00
Sandra Loosemore
8c163c5a87 Relocations for Nios II R2
2015-07-01  Sandra Loosemore  <sandra@codesourcery.com>
	    Cesar Philippidis  <cesar@codesourcery.com>

	bfd/
	* bfd-in2.h: Regenerated.
	* elf32-nios2.c (elf_nios2_howto_table_rel): Rename to...
	(elf_nios2_r1_howto_table_rel): This.
	(elf_nios2_r2_howto_table_rel): New.
	(BFD_IS_R2): New.
	(lookup_howto): Add ABFD parameter.  Adjust to look up in either
	the R1 or R2 relocation table, as determined by ABFD.
	(nios2_reloc_map): Add R2 relocations.
	(nios2_elf32_bfd_reloc_type_lookup): Do lookup using lookup_howto.
	Pass it the ABFD parameter.
	(nios2_elf32_bfd_reloc_name_lookup): Use ABFD to decide whether to
	return an R1 or R2 relocation.
	(nios2_elf32_info_to_howto): Do lookup using lookup_howto.
	Pass it the ABFD parameter.
	(nios2_elf32_do_call26_relocate): Check for alignment on a 4-byte
	boundary.
	(nios2_elf32_relocate_section): Adjust call to lookup_howto.
	* libbfd.h: Regenerated.
	* reloc.c (BFD_RELOC_NIOS2_R2_S12): New.
	(BFD_RELOC_NIOS2_R2_I10_1_PCREL): New.
	(BFD_RELOC_NIOS2_R2_T1I7_1_PCREL): New.
	(BFD_RELOC_NIOS2_R2_T1I7_2): New.
	(BFD_RELOC_NIOS2_R2_T2I4): New.
	(BFD_RELOC_NIOS2_R2_T2I4_1): New.
	(BFD_RELOC_NIOS2_R2_T2I4_2): New.
	(BFD_RELOC_NIOS2_R2_X1I7_2): New.
	(BFD_RELOC_NIOS2_R2_X2L5): New.
	(BFD_RELOC_NIOS2_R2_F1I5_2): New.
	(BFD_RELOC_NIOS2_R2_L5I4X1): New.
	(BFD_RELOC_NIOS2_R2_T1X1I6): New.
	(BFD_RELOC_NIOS2_R2_T1X1I6_2): New.

	include/elf/
	* nios2.h (R_NIOS2_R2_S12): New.
	(R_NIOS2_R2_I10_1_PCREL): New.
	(R_NIOS2_R2_T1I7_1_PCREL): New.
	(R_NIOS2_R2_T1I7_2): New.
	(R_NIOS2_R2_T2I4): New.
	(R_NIOS2_R2_T2I4_1): New.
	(R_NIOS2_R2_T2I4_2): New.
	(R_NIOS2_R2_X1I7_2): New.
	(R_NIOS2_R2_X2L5): New.
	(R_NIOS2_R2_F1I5_2): New.
	(R_NIOS2_R2_L5I4X1): New.
	(R_NIOS2_R2_T1X1I6): New.
	(R_NIOS2_R2_T1X1I6_2): New.
	(R_NIOS2_ILLEGAL): Renumber.
2015-07-01 16:02:09 -07:00
Sandra Loosemore
965b1d8083 Add Nios II arch flags and compatibility tests
2015-07-01  Sandra Loosemore  <sandra@codesourcery.com>
	    Cesar Philippidis  <cesar@codesourcery.com>

	bfd/
	* archures.c (bfd_mach_nios2r1, bfd_mach_nios2r2): New.
	* bfd-in2.h: Regenerated.
	* cpu-nios2.c (nios2_compatible): New.
	(N): Use nios2_compatible instead of bfd_default_compatible.
	(NIOS2R1_NEXT, NIOS2R2_NEXT): Define.
	(arch_info_struct): New.
	(bfd_nios2_arch): Chain to NIOS2R1_NEXT.
	* elf32-nios2.c (is_nios2_elf): New.
	(nios2_elf32_merge_private_bfd_data): New.
	(nios2_elf32_object_p): New.
	(bfd_elf32_bfd_merge_private_bfd_data): Define.
	(elf_backend_object_p): Define.

	gas/
	* config/tc-nios2.c: Adjust includes.
	(OPTION_MARCH): Define.
	(md_longopts): Add -march option.
	(nios2_architecture): New.
	(nios2_use_arch): New.
	(md_parse_option): Handle OPTION_MARCH.
	(md_show_usage): Document -march.
	(md_begin): Set arch in BFD.
	(nios2_elf_final_processing): New.
	* config/tc-nios2.h (elf_tc_final_processing): Define.
	(nios2_elf_final_processing): New.
	* doc/c-nios2.texi (-march): Add documentation.

	include/elf/
	* nios2.h (EF_NIOS2_ARCH_R1, EF_NIOS2_ARCH_R2): Define.

	ld/testsuite/
	* ld-nios2/mixed1a.d: New.
	* ld-nios2/mixed1a.s: New.
	* ld-nios2/mixed1b.d: New.
	* ld-nios2/mixed1b.s: New.
	* ld-nios2/nios2.exp: Build the new compatibility tests.
2015-07-01 15:55:28 -07:00
Nick Clifton
54f66250d7 Add support for SADDR addressing to the RL78 port.
gas	* config/rl78-parse.y: Tag all saddr expressions throughout.
	(SET_SA): New.
	(expr_is_saddr): Allow symbolic expressions.
	* config/tc-rl78.c (md_apply_fix): Handle SADDR.

bfd	* elf32-rl78.c (rl78_elf_howto_table): Add RH_SADDR.
        (rl78_reloc_map): Add R_RL78_RH_SADDR.
	* reloc.c: Add BFD_RELOC_RL78_SADDR.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
2015-06-30 11:25:18 +01:00
H.J. Lu
ee0c0c503d Remove COMPRESS_DEBUG_ZLIB
COMPRESS_DEBUG_ZLIB isn't needed.  This patch removes COMPRESS_DEBUG_ZLIB
and replace COMPRESS_DEBUG_ZLIB with COMPRESS_DEBUG_GNU_ZLIB.

bfd/

	* bfd-in.h (compressed_debug_section_type): Remove
	COMPRESS_DEBUG_ZLIB.
	* bfd-in2.h : Regenerated.
gas/

	* as.c (parse_args): Replace COMPRESS_DEBUG_ZLIB with
	COMPRESS_DEBUG_GNU_ZLIB.
	* config/tc-i386.c (flag_compress_debug): Likewise.

ld/

	* emultempl/elf32.em  (gld${EMULATION_NAME}_handle_option):
	Replace COMPRESS_DEBUG_ZLIB with COMPRESS_DEBUG_GNU_ZLIB.
2015-06-28 06:30:10 -07:00
Jon Turney
56f4083249 Fix build when size_t is not available in bfd-in2.h
bfd/ChangeLog:

2015-06-15  Jon Turney  <jon.turney@dronecode.org.uk>

	* bfd.c: Change struct bfd_build_id to use bfd_size_type.
	* bfd-in2.h : Regenerate.
2015-06-16 13:41:30 +01:00
Jon Turney
c74f7d1c6c Allow gdb to find debug symbols file by build-id for PE file format also
This promotes BFD's struct elf_build_id to the generic struct bfd_build_id,
populated when an ELF or PE BFD is read.

gdb is updated to use that, and to use the build-id to find symbols for PE files
also.

There is currently no generic way to extract the build-id from an object file,
perhaps an option to objdump to do this might make sense?

On x86_64-pc-cygwin, gdb's sepdebug.exp changes:

-# of unsupported tests          1
+# of expected passes            90

I don't seem to get consistent testsuite runs on i686-linux-gnu, but there
don't appear to be any regressions.

bfd/ChangeLog:

2015-06-10  Jon Turney  <jon.turney@dronecode.org.uk>

	* elf-bfd.h : Remove struct elf_build_id.
	* bfd.c : Add struct bfd_build_id.
	* bfd-in2.h: Regenerate.
	* elf.c (elfobj_grok_gnu_build_id): Update to use bfd_build_id.
	* libpei.h: Add protoype and macros for
	bfd_XXi_slurp_codeview_record.
	* peXXigen.c (_bfd_XXi_slurp_codeview_record): Make public
	* peicode.h (pe_bfd_read_buildid): Add.
	(pe_bfd_object_p): Use pe_bfd_read_buildid().

gdb/ChangeLog:

2015-06-10  Jon Turney  <jon.turney@dronecode.org.uk>

	* build-id.c: Don't include elf-bfd.h.
	(build_id_bfd_get): Use bfd_build_id.
	(build_id_verify): Ditto.
	* build-id.h: Ditto.
	(find_separate_debug_file_by_buildid): Ditto.
	* python/py-objfile.c: Don't include elf-bfd.h.
	(objfpy_get_build_id) Use bfd_build_id.
	(objfpy_build_id_matches, objfpy_lookup_objfile_by_build_id): Ditto.
	* coffread.c: Include build-id.h.
	(coff_symfile_read): Try find_separate_debug_file_by_buildid.

gdb/doc/ChangeLog:

2015-06-10  Jon Turney  <jon.turney@dronecode.org.uk>

	* gdb.texinfo (Separate Debug Files): Document that PE is also
	supported.

gdb/testsuite/ChangeLog:

2015-06-10  Jon Turney  <jon.turney@dronecode.org.uk>

	* gdb.base/sepdebug.exp: Add EXEEXT where needed.
	* lib/gdb.exp (get_build_id): Teach how to extract build-id from a
	PE file.
	* lib/future.exp (gdb_find_objdump): Add gdb_find_objdump.

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
2015-06-15 12:10:55 +01:00
Renlin Li
87f5fbcc7a [AArch64] Gas add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 support
2015-06-15  Renlin Li <renlin.li@arm.com>
bfd/
    * reloc.c (BFD_RELOC_AARCH64_LD64_GOTOFF_LO15): New entry.
    * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
    BFD_RELOC_AARCH64_LD64_GOTOFF_LO15.
    * bfd-in2.h: Regenerate.
    * libbfd.h: Regenerate.

gas/
    * config/tc-aarch64.c (reloc_table): New relocation modifier.
    (md_apply_fix): Support BFD_RELOC_AARCH64_LD64_GOTOFF_LO15.
    (aarch64_force_relocation): Ditto

gas/testsuite/
    * gas/aarch64/reloc-insn.s: Update test
    * gas/aarch64/reloc-insn.d: Update expected result.
2015-06-15 11:07:37 +01:00
Jiong Wang
3d715ce420 [AArch64] GAS support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
This patch add BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 support in Gas.

The relocation modifier
===
  :gotpage_lo14:symbol

2015-06-01 Jiong.Wang <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14.
  (aarch64_force_relocation): Ditto.

gas/testsuite/
  * gas/aarch64/ilp32-basic.s: New testcase.
  * gas/aarch64/ilp32-basic.d: Ditto.
2015-06-01 15:41:54 +01:00
Jiong Wang
a921b5bd70 [AArch64] GAS Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
2015-06-01 Jiong.Wang <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15.
  (aarch64_force_relocation): Ditto.

gas/testsuite/
  * gas/aarch64/reloc-insn.s: New testcase.
  * gas/aarch64/reloc-insn.d: Ditto.
2015-06-01 10:22:15 +01:00
Catherine Moore
2f0c68f23b Compact EH Support
The specification for the Compact EH format is available at:
https://github.com/MentorEmbedded/cxx-abi/blob/master/MIPSCompactEH.pdf

2015-05-28  Catherine Moore  <clm@codesourcery.com>
	    Bernd Schmidt <bernds@codesourcery.com>
	    Paul Brook <paul@codesourcery.com>

	bfd/
	* bfd-in2.h: Regenerated.
	* elf-bfd.h (DWARF2_EH_HDR, COMPACT_EH_HDR): Define.
	(COMPACT_EH_CANT_UNWIND_OPCODE): Define.
	(dwarf_eh_frame_hdr_info): Move dwarf-specific fields from
	eh_frame_hdr_info.
	(compact_eh_frame_hdr_info): Declare.
	(eh_frame_hdr_info):  Redeclare with union for dwarf-specific
	fields and compact-eh fields.
	(elf_backend_data): Add cant_unwind_opcode and compact_eh_encoding.
	(bfd_elf_section_data): Add eh_frame_entry_field.
	(elf_section_eh_frame_entry): Define.
	(bfd_elf_parse_eh_frame_entries): Declare.
	(_bfd_elf_parse_eh_frame_entry): Declare.
	(_bfd_elf_end_eh_frame_parsing): Declare.
	(_bfd_elf_write_section_eh_frame_entry): Declare.
	(_bfd_elf_eh_frame_entry_present): Declare.
	(_bfd_elf_section_for_symbol): Declare.
	* elf-eh-frame.c (bfd_elf_discard_eh_frame_entry): New function.
	(bfd_elf_record_eh_frame_entry): New function.
	(_bfd_elf_parse_eh_frame_entry): New function.
	(_bfd_elf_parse_eh_frame): Update hdr_info field references.
	(cmp_eh_frame_hdr): New function.
	(add_eh_frame_hdr_terminator): New function.
	(_bfd_elf_end_eh_frame_parsing): New function.
	(find_merged_cie): Update hdr_info field references.
	(_bfd_elf_discard_section_eh_frame): Likewise.
	(_bfd_elf_discard_section_eh_frame_hdr): Add Compact EH support.
	(_bfd_elf_eh_frame_entry_present): New function.
	(_bfd_elf_maybe_strip_eh_frame_hdr): Add Compact EH support.
	(_bfd_elf_write_section_eh_frame_entry): New function.
	(_bfd_elf_write_section_eh_frame): Update hdr_info field references.
	(_bfd_elf_fixup_eh_frame_hdr): New function.
	(write_compact_eh_frame_hdr): New function.
	(write_dwarf_eh_frame_hdr): New function.
	(_bfd_elf_write_section_eh_frame_hdr): Add Compact EH support.
	* elflink.c (_bfd_elf_section_for_symbol): New function.
	(elf_section_ignore_discarded_relocs): Add Compact EH support.
	(elf_link_input_bfd): Likewise.
	(bfd_elf_final_link): Likewise.
	(_bfd_elf_gc_mark): Likewise.
	(bfd_elf_parse_eh_frame_entries): New function.
	(bfd_elf_gc_sections): Add Compact EH support.
	(bfd_elf_discard_info): Likewise.
	* elfxx-mips.c: Include dwarf2.h.
	(_bfd_mips_elf_compact_eh_encoding): New function.
	(_bfd_mips_elf_cant_unwind_opcode): New function.
	* elfxx-mips.h (_bfd_mips_elf_compact_eh_encoding): Declare.
	(_bfd_mips_elf_cant_unwind_opcode): Declare.
	(elf_backend_compact_eh_encoding): Define.
	(elf_backend_cant_unwind_opcode): Define.
	* elfxx-target.h (elf_backend_compact_eh_encoding): Provide default.
	(elf_backend_cant_unwind_opcode): Provide default.
	(elf_backend_data elfNN_bed): Add elf_backend_compact_eh_encoding and
	elf_backend_cant_unwind_opcode.
	* section.c (SEC_INFO_TYPE_EH_FRAME_ENTRY): Add definition.

	gas/
	* config/tc-alpha.c (all_cfi_sections): Declare.
	(s_alpha_ent): Initialize all_cfi_sections.
	(alpha_elf_md_end): Invoke cfi_set_sections.
	* config/tc-mips.c (md_apply_fix):  Handle BFD_RELOC_NONE.
	(s_ehword): Use BFD_RELOC_32_PCREL.
	(mips_fix_adjustable): Handle BFD_RELOC_32_PCREL.
	(mips_cfi_reloc_for_encoding): New function.
	* tc-mips.h (DWARF2_FDE_RELOC_SIZE): Redefine.
	(DWARF2_FDE_RELOC_ENCODING): Define.
	(tc_cfi_reloc_for_encoding): Define.
	(mips_cfi_reloc_for_encoding): Define.
	(tc_compact_eh_opcode_stop): Define.
	(tc_compact_eh_opcode_pad): Define.
	* doc/as.texinfo: Document Compact EH extensions.
	* doc/internals.texi: Likewise.
	* dw2gencfi.c (EH_FRAME_LINKONCE): Redefine.
	(tc_cfi_reloc_for_encoding): Provide default.
	(compact_eh): Declare.
	(emit_expr_encoded): New function.
	(get_debugseg_name): Add Compact EH support.
	(alloc_debugseg_item): Likewise.
	(cfi_set_sections): New function.
	(dot_cfi_fde_data): New function.
	(dot_cfi_personality_id): New function.
	(dot_cfi_inline_lsda): New function.
	(cfi_pseudo_table): Add cfi_fde_data, cfi_personality_id,
	and cfi_inline_lsda.
	(dot_cfi_personality): Add Compact EH support.
	(dot_cfi_lsda): Likewise.
	(dot_cfi_sections): Likewise.
	(dot_cfi_startproc): Likewise.
	(get_cfi_seg): Likewise.
	(output_compact_unwind_data): New function.
	(output_cfi_insn): Add Compact EH support.
	(output_cie): Likewise.
	(output_fde): Likewise.
	(cfi_finish): Likewise.
	(cfi_emit_eh_header): New function.
	(output_eh_header): New function.
	* dw2gencfi.h (cfi_set_sections): Declare.
	(SUPPORT_COMPACT_EH): Define.
	(MULTIPLE_FRAME_SECTIONS): Define.
	New enumeration to describe the Compact EH header format.
	(fde_entry): Add new fields personality_id, eh_header_type, eh_data_size,
	eh_data, eh_loc and sections.
	(CFI_EMIT_eh_frame, CFI_EMIT_debug_frame, CFI_EMIT_target,
	CFI_EMIT_eh_frame_compact): Define.

2015-05-22  Catherine Moore  <clm@codesourcery.com>
	    Bernd Schmidt <bernds@codesourcery.com>

	gas/testsuite/
	* gas/mips/mips.exp: Run new tests.

	* gas/mips/compact-eh-1.s: New file.
	* gas/mips/compact-eh-2.s: New file.
	* gas/mips/compact-eh-3.s: New file.
	* gas/mips/compact-eh-4.s: New file.
	* gas/mips/compact-eh-5.s: New file.
	* gas/mips/compact-eh-6.s: New file.
	* gas/mips/compact-eh-7.s: New file.
	* gas/mips/compact-eh-eb-1.d: New file.
	* gas/mips/compact-eh-eb-2.d: New file.
	* gas/mips/compact-eh-eb-3.d: New file.
	* gas/mips/compact-eh-eb-4.d: New file.
	* gas/mips/compact-eh-eb-5.d: New file.
	* gas/mips/compact-eh-eb-6.d: New file.
	* gas/mips/compact-eh-eb-7.d: New file.
	* gas/mips/compact-eh-el-1.d: New file.
	* gas/mips/compact-eh-el-2.d: New file.
	* gas/mips/compact-eh-el-3.d: New file.
	* gas/mips/compact-eh-el-4.d: New file.
	* gas/mips/compact-eh-el-5.d: New file.
	* gas/mips/compact-eh-el-6.d: New file.
	* gas/mips/compact-eh-el-7.d: New file.
	* gas/mips/compact-eh-err1.l: New file.
	* gas/mips/compact-eh-err1.s: New file.
	* gas/mips/compact-eh-err2.l: New file.
	* gas/mips/compact-eh-err2.s: New file.

2015-05-22  Catherine Moore  <clm@codesourcery.com>

	include/
	* bfdlink.h: Rename eh_frame_hdr to eh_frame_hdr_type.

2015-05-22  Catherine Moore  <clm@codesourcery.com>
	    Paul Brook <paul@codesourcery.com>

	ld/
	* emultempl/elf32.em (gld${EMULATION_NAME}_after_open):
	Add Compact EH support.
	* scripttempl/elf.sc: Handle .eh_frame_entry and .gnu_extab
	sections.

2015-05-22  Catherine Moore  <clm@codesourcery.com>

	ld/testsuite/
	* ld-mips-elf/compact-eh.ld: New linker script.
	* ld-mips-elf/compact-eh1.d: New.
	* ld-mips-elf/compact-eh1.s: New.
	* ld-mips-elf/compact-eh1a.s: New.
	* ld-mips-elf/compact-eh1b.s: New.
	* ld-mips-elf/compact-eh2.d: New.
	* ld-mips-elf/compact-eh2.s: New.
	* ld-mips-elf/compact-eh3.d: New.
	* ld-mips-elf/compact-eh3.s: New.
	* ld-mips-elf/compact-eh3a.s: New.
	* ld-mips-elf/compact-eh4.d: New.
	* ld-mips-elf/compact-eh5.d: New.
	* ld-mips-elf/compact-eh6.d: New.
	* ld-mips-elf/mips-elf.exp: Run new tests.
2015-05-28 15:21:17 -07:00
H.J. Lu
dab394de9e Don't add the zlib header to SHF_COMPRESSED section
In a SHF_COMPRESSED compressed section, the raw compressed data should
begin immediately after the compression header.  This patch removes the
extra zlib header from the SHF_COMPRESSED section.

bfd/

	* bfd.c (bfd_update_compression_header): Also write the zlib
	header if the SHF_COMPRESSED bit cleared..
	(bfd_check_compression_header): Return the uncompressed size.
	* compress.c (decompress_contents): Don't skip the zlib header.
	(bfd_compress_section_contents): Properly handle ELFCOMPRESS_ZLIB,
	which doesn't have the zlib header.
	(bfd_init_section_decompress_status): Likewise.
	(bfd_get_full_section_contents): Updated.
	(bfd_is_section_compressed): Likewise.
	(bfd_is_section_compressed_with_header): Return the uncompressed
	size.
	* elf.c (_bfd_elf_make_section_from_shdr): Updated.
	* bfd-in2.h: Regenerated.

binutils/

	* readelf.c (uncompress_section_contents): Add a parameter for
	uncompressed size.  Don't check the zlib header.
	(load_specific_debug_section): Updated.

binutils/testsuite/

	* binutils-all/compress.exp: Replace "$OBJDUMP -s -j .debug_info"
	with "$OBJDUMP -W".
	* binutils-all/libdw2-compressedgabi.out: Updated.

gas/

2015-05-14  H.J. Lu  <hongjiu.lu@intel.com>

	* write.c (compress_debug): Don't write the zlib header, which
	is handled by bfd_update_compression_header.
2015-05-14 16:02:08 -07:00
H.J. Lu
bf64a9511f Add Intel MCU support to bfd
bfd/

	* Makefile.am (ALL_MACHINES): Add cpu-iamcu.lo.
	(ALL_MACHINES_CFILES): Likewise.
	* archures.c (bfd_mach_iamcu): New.
	(bfd_mach_i386_iamcu): Likewise.
	(bfd_mach_i386_iamcu_intel_syntax): Likewise.
	(bfd_iamcu_arch): Likewise.
	(bfd_archures_list): Add &bfd_iamcu_arch.
	* config.bfd (targ_selvecs): Add iamcu_elf32_vec to
	i386_elf32_vec.
	(targ_archs): Add bfd_iamcu_arch if needed.
	* configure.ac: Support iamcu_elf32_vec.
	* cpu-iamcu.c: New file.
	* elf32-i386.c (elf32_iamcu_elf_object_p): New function.
	Add support for iamcu_elf32_vec and elf32_iamcu_bed.
	* targets.c (iamcu_elf32_vec): New.
	(_bfd_target_vector): Add iamcu_elf32_vec.
	* Makefile.in: Regenerated.
	* bfd-in2.h: Likewise.
	* configure: Likewise.

binutils/testsuite/

	* binutils-all/objdump.exp (cpus_expected): Append iamcu.
2015-05-11 10:31:00 -07:00
H.J. Lu
9361e6307b Define SEC_MEP_VLIW in bfd/section.c
Bits in section flags should only be defined in bfd/section.c.  This
patch moves SEC_MEP_VLIW to bfd/section.c.

bfd/

	PR binutils/18316
	* section.c (SEC_MEP_VLIW): New.
	* bfd-in2.h: Regenerated.

include/elf/

	PR binutils/18316
	* mep.h (SEC_MEP_VLIW): Removed.
2015-04-24 05:40:23 -07:00
H.J. Lu
f6fe1ccd62 Don't change compressed input debug section names
Change compressed input debug section name for objdump is very confusing.
But we need to change it for linker so that linker will consider the
input section as a debug section.  This patch delays section rename to
elf_fake_sections for objcopy and avoids it for objdump.

bfd/

	PR binutils/18209
	* bfd.c (bfd): Add is_linker_input.
	* elf.c (convert_debug_to_zdebug): New.
	(convert_zdebug_to_debug): Likewise.
	(_bfd_elf_make_section_from_shdr): Don't convert .debug_* to
	.zdebug_* here.  Use convert_zdebug_to_debug.  Set SEC_ELF_RENAME.
	(_bfd_elf_init_reloc_shdr): Pass a pointer to section name
	instead of a pointer to section.
	(elf_fake_sections): Rename the section name if SEC_ELF_RENAME
	is set.
	* section.c (SEC_ELF_RENAME): New.
	* bfd-in2.h: Regenerated.

binutils/

	PR binutils/18209
	* objcopy.c (setup_section): Copy compress status.

binutils/testsuite/

	PR binutils/18209
	* binutils-all/compress.exp: Replace dw2-3.W with dw2-3gabi.W
	on zlib-gabi output.
	* binutils-all/dw2-1.W: Convert section names to .zdebug_*.
	* binutils-all/dw2-3.W: Likewise.
	* binutils-all/objdump.W: Likewise.
	* binutils-all/dw2-3gabi.W: New file.

ld/

	PR binutils/18209
	* ldfile.c (ldfile_try_open_bfd): Set is_linker_input to 1.
2015-04-23 07:59:59 -07:00
H.J. Lu
0ce398f106 Add --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]
This patch adds --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]
to ld for ELF targets to support generating compressed DWARF debug
sections.  We always generate .zdebug_* section since section names have
been finalized and they can't be changed easily when compression is
being performed.

bfd/

	* bfd-in.h (compressed_debug_section_type): New.
	* compress.c (bfd_compress_section_contents): Add an argument
	for linker write compression and always generate .zdebug_*
	section when linking.
	(bfd_init_section_compress_status): Pass FALSE to
	bfd_compress_section_contents.
	(bfd_compress_section): New function.
	* elf.c (elf_fake_sections): For linking, set SEC_ELF_COMPRESS
	on DWARF debug sections if COMPRESS_DEBUG is set and rename
	section if COMPRESS_DEBUG_GABI_ZLIB isn't set.
	(assign_file_positions_for_non_load_sections): Set sh_offset
	to -1 if SEC_ELF_COMPRESS is set.
	(assign_file_positions_except_relocs): Likwise.
	(_bfd_elf_assign_file_positions_for_relocs): Renamed to ...
	(_bfd_elf_assign_file_positions_for_non_load): This.  Change
	return time to bfd_boolean.  Compress the section if
	SEC_ELF_COMPRESS is set.
	(_bfd_elf_write_object_contents): Updated.
	(_bfd_elf_set_section_contents): Write section contents to
	the buffer if SEC_ELF_COMPRESS is set.
	* merge.c: Include "elf-bfd.h".
	(sec_merge_emit): Add arguments for contents and offset.  Write
	to contents with offset if contents isn't NULL.
	(_bfd_write_merged_section): Write section contents to the
	buffer if SEC_ELF_COMPRESS is set.  Pass contents and
	output_offset to sec_merge_emit.
	* elflink.c (bfd_elf_final_link): Allocate the buffer for
	output section contents if SEC_ELF_COMPRESS is set.
	* section.c (SEC_ELF_COMPRESS): New.
	* bfd-in2.h: Regenerated.

gas/

	* as.h (compressed_debug_section_type): Removed.

include/

	* bfdlink.h (bfd_link_info): Add compress_debug.

ld/

	* ld.texinfo: Document --compress-debug-sections=.
	* ldmain.c (main): Set BFD_COMPRESS on output_bfd if
	COMPRESS_DEBUG is set.  Set BFD_COMPRESS_GABI on output_bfd
	for COMPRESS_DEBUG_GABI_ZLIB.
	* lexsup.c (elf_static_list_options): Add
	--compress-debug-sections=.
	* emultempl/elf32.em (OPTION_COMPRESS_DEBUG): New.
	(xtra_long): Add "compress-debug-sections".
	(gld${EMULATION_NAME}_handle_option): Handle
	OPTION_COMPRESS_DEBUG.

ld/testsuite/

	* ld-elf/compress.exp (build_tests): Add tests for
	--compress-debug-sections=.
	(run_tests): Likewise.
	Add additonal tests for --compress-debug-sections=.
	* ld-elf/gabiend.rt: New file.
	* ld-elf/gabinormal.rt: Likewise.
	* ld-elf/gnubegin.rS: Likewise.
	* ld-elf/gnunormal.rS: Likewise.
	* ld-elf/zlibbegin.rS: Likewise.
	* ld-elf/zlibnormal.rS: Likewise.
2015-04-14 22:01:38 -07:00
H.J. Lu
151411f8af Add SHF_COMPRESSED support to gas and objcopy
This patch adds --compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}
options to gas and objcopy for ELF files. They control how DWARF debug
sections are compressed.  --compress-debug-sections=none is equivalent to
--nocompress-debug-sections.  --compress-debug-sections=zlib and
--compress-debug-sections=zlib-gnu are equivalent to
--compress-debug-sections.  --compress-debug-sections=zlib-gabi compresses
DWARF debug sections with SHF_COMPRESSED from the ELF ABI.  No linker
changes are required to support SHF_COMPRESSED.

bfd/

	* archive.c (_bfd_get_elt_at_filepos): Also copy BFD_COMPRESS_GABI
	bit.
	* bfd.c (bfd::flags): Increase size to 18 bits.
	(BFD_COMPRESS_GABI): New.
	(BFD_FLAGS_SAVED): Add BFD_COMPRESS_GABI.
	(BFD_FLAGS_FOR_BFD_USE_MASK): Likewise.
	(bfd_update_compression_header): New fuction.
	(bfd_check_compression_header): Likewise.
	(bfd_get_compression_header_size): Likewise.
	(bfd_is_section_compressed_with_header): Likewise.
	* compress.c (MAX_COMPRESSION_HEADER_SIZE): New.
	(bfd_compress_section_contents): Return the uncompressed size if
	the full section contents is compressed successfully.  Support
	converting from/to .zdebug* sections.
	(bfd_get_full_section_contents): Call
	bfd_get_compression_header_size to get compression header size.
	(bfd_is_section_compressed): Renamed to ...
	(bfd_is_section_compressed_with_header): This.  Add a pointer
	argument to return compression header size.
	(bfd_is_section_compressed): Use it.
	(bfd_init_section_decompress_status): Call
	bfd_get_compression_header_size to get compression header size.
	Return FALSE if uncompressed section size is 0.
	* elf.c (_bfd_elf_make_section_from_shdr): Support converting
	from/to .zdebug* sections.
	* bfd-in2.h: Regenerated.

binutils/

	* objcopy.c (do_debug_sections): Add compress_zlib,
	compress_gnu_zlib and compress_gabi_zlib.
	(copy_options): Use optional_argument on compress-debug-sections.
	(copy_usage): Update --compress-debug-sections.
	(copy_file): Handle compress_zlib, compress_gnu_zlib and
	compress_gabi_zlib.
	(copy_main): Handle
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.
	* doc/binutils.texi: Document
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.

binutils/testsuite/

	* compress.exp: Add tests for
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.
	* binutils-all/dw2-3.rS: New file.
	* binutils-all/dw2-3.rt: Likewise.
	* binutils-all/libdw2-compressedgabi.out: Likewise.

gas/

	* as.c (show_usage): Update --compress-debug-sections.
	(std_longopts): Use optional_argument on compress-debug-sections.
	(parse_args): Handle
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.
	* as.h (compressed_debug_section_type): New.
	(flag_compress_debug): Change type to compressed_debug_section_type.
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.
	* write.c (compress_debug): Set BFD_COMPRESS_GABI for
	--compress-debug-sections=zlib-gabi.  Call
	bfd_get_compression_header_size to get compression header size.
	Don't rename section name for --compress-debug-sections=zlib-gabi.
	* config/tc-i386.c (compressed_debug_section_type): Set to
	COMPRESS_DEBUG_ZLIB.
	* doc/as.texinfo: Document
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.

gas/testsuite/

	* gas/i386/dw2-compressed-1.d: New file.
	* gas/i386/dw2-compressed-2.d: Likewise.
	* gas/i386/dw2-compressed-3.d: Likewise.
	* gas/i386/x86-64-dw2-compressed-2.d: Likewise.
	* gas/i386/i386.exp: Run dw2-compressed-2, dw2-compressed-1,
	dw2-compressed-3 and x86-64-dw2-compressed-2.

ld/testsuite/

	* ld-elf/compress.exp: Add a test for
	--compress-debug-sections=zlib-gabi.
	(build_tests): Add 2 tests for --compress-debug-sections=zlib-gabi.
	(run_tests): Likewise.
	Verify linker output with zlib-gabi compressed debug input.
	* ld-elf/compressed1a.d: New file.
	* ld-elf/compressed1b.d: Likewise.
	* ld-elf/compressed1c.d: Likewise.
2015-04-08 07:54:09 -07:00
Marcus Shawcroft
4106101c44 [AArch64] Workaround for Cortex A53 erratum 843419
Some early revisions of the Cortex-A53 have an erratum (843419).  The
details of the erratum are quite complex and involve dynamic
conditions.  For the purposes of the workaround we have simplified the
static conditions to an ADRP in the last two instructions of a 4KByte
page, followed within four instructions by a load/store dependent on
the ADRP.

This patch adds support to conservatively scan for and workaround
Cortex A53 erratum 843419.  There are two different workaround
strategies used.  The first is to rewrite ADRP instructions which form
part of an erratum sequence with an ADR instruction.  In situations
where the ADR provides insufficient offset the dependent load or store
instruction from the sequence is moved to a stub section and branches
are inserted from the original sequence to the relocated instruction
and back again.

Stub section sizes are rounded up to a multiple of 4096 in order to
ensure that the act of inserting work around stubs does not create
more errata sequences.

Workaround stubs are always inserted into the stub section associated
with the input section containing the erratum sequence.  This ensures
that the fully relocated form of the veneered load store instruction
is available at the point in time when the stub section is written.
2015-04-01 13:16:38 +01:00