Commit graph

67 commits

Author SHA1 Message Date
Jeff Law
fcfaf40d78 * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
Fixes 80 or so c-torture execution failures.  400 to go.
1996-12-02 19:35:55 +00:00
Jeff Law
b7b89deb44 * simops.c: Fix overflow computation for many instructions.
Fixes several hangs in the c-torture execution tests.  Also fixes about
40 failures.
1996-12-02 08:35:20 +00:00
Jeff Law
af388638ae * simops.c: Fix "movdm, an", "movbu dm, (an)", and "movhu dm, (an)".
Along with some compiler, bfd, assembler changes this fixes 90 or so
c-torture execution failures.
1996-12-02 07:38:10 +00:00
Jeff Law
c8f0171f5f * simops.c: Fix "mov am, dn".
Fixes more c-torture problems.
1996-12-02 04:23:37 +00:00
Jeff Law
6db7fc49d2 * simops.c: Fix more bugs in "add imm,an" and
"add imm,dn".
Fixes a half-dozen (of several hundred :( c-torture failures.
1996-12-01 23:10:04 +00:00
Jeff Law
6e7a01c144 * simops.c: Fix bugs in "movm" and "add imm,an".
main(){write (0, "hello world\n", 13);} works!
1996-11-27 23:20:24 +00:00
Jeff Law
3bb3fe44e0 * simops.c: Don't lose the upper 24 bits of the return
pointer in "call" and "calls" instructions.  Rough cut
        at emulated system calls.
1996-11-27 18:36:54 +00:00
Jeff Law
de0dce7c5c * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
Everything except the extended instructions, the loop instructions,
trap, rti, and rtm.
1996-11-27 17:56:10 +00:00
Jeff Law
ecb4b5a357 * simops.c Implement remaining 4 byte instructions. 1996-11-27 17:19:44 +00:00
Jeff Law
2e35551c74 * simops.c Implement remaining 3 byte instructions.
Moving right along...
1996-11-27 16:51:30 +00:00
Jeff Law
f5f13c1d73 * simops.c: Implement remaining 2 byte instructions. Call
abort for instructions we're not implementing now.
1996-11-27 16:25:03 +00:00
Jeff Law
707641f658 * simops.c: Implement lots of random instructions.
Implments most instructions with first nibble 0x0 - 0xe and
those with the first byte 0xf0 - 0xf2.
1996-11-27 07:20:36 +00:00
Jeff Law
1f3bea2169 * simops.c: Implement "movm" and "bCC" insns.
Function calls and conditional branches work!
1996-11-27 05:29:49 +00:00
Jeff Law
92284aaa35 * mn10300_sim.h (_state): Add another register (MDR).
(REG_MDR): Define.
        * simops.c: Implement "cmp", "calls", "rets", "jmp" and
        a few additional random insns.
We can now function calls.  We get out of crt0 into main now, then lose
when calls are nested (because don't handle movm yet).
1996-11-27 00:53:25 +00:00
Jeff Law
73e6529893 * mn10300_sim.h (PSW_*): Define for CC status tracking.
(REG_D0, REG_A0, REG_SP): Define.
        * simops.c: Implement "add", "addc" and a few other random
        instructions.
Starting to simulate instructions for the mn10300.  Executes some of
the crt0 code now!
1996-11-26 22:58:24 +00:00
Jeff Law
b5f831ac51 * gencode.c, interp.c: Snapshot current simulator code.
(crude) hashing works, along with dispatch to the OP_* functions.
1996-11-26 20:40:19 +00:00
Jeff Law
05ccbdfdd2 * Makefile.in, config.in, configure, configure.in: New files.
* gencode.c, interp.c, mn10300_sim.h, simops.c: New files.

Skeleton mn10300 simulator
1996-11-25 19:52:08 +00:00