45 lines
1.4 KiB
Text
45 lines
1.4 KiB
Text
Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com)
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* simops.c: Fix more bugs in "add imm,an" and
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"add imm,dn".
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Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
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* simops.c: Fix bugs in "movm" and "add imm,an".
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* simops.c: Don't lose the upper 24 bits of the return
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pointer in "call" and "calls" instructions. Rough cut
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at emulated system calls.
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* simops.c: Implement the remaining 5, 6 and 7 byte instructions.
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* simops.c: Implement remaining 4 byte instructions.
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* simops.c: Implement remaining 3 byte instructions.
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* simops.c: Implement remaining 2 byte instructions. Call
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abort for instructions we're not implementing now.
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Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
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* simops.c: Implement lots of random instructions.
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* simops.c: Implement "movm" and "bCC" insns.
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* mn10300_sim.h (_state): Add another register (MDR).
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(REG_MDR): Define.
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* simops.c: Implement "cmp", "calls", "rets", "jmp" and
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a few additional random insns.
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* mn10300_sim.h (PSW_*): Define for CC status tracking.
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(REG_D0, REG_A0, REG_SP): Define.
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* simops.c: Implement "add", "addc" and a few other random
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instructions.
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* gencode.c, interp.c: Snapshot current simulator code.
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Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
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* Makefile.in, config.in, configure, configure.in: New files.
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* gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
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